Multi-frequency circulating current suppression method and device of multi-port embedded direct current power flow controller and medium

Abstract

The invention relates to a multi-frequency circulating current suppression method and device for a multi-port embedded direct current power flow controller and a medium, and the method comprises the steps: a cascaded multi-level inverter embedded direct current power flow controller CMI-eDCPFC is embedded in a modular multi-level converter MMC, and is used for carrying out the suppression control of the multi-frequency circulating current of the direct current power flow controller; comprising the following steps: carrying out suppression control on fundamental frequency and double frequency components of coupled circulating current of a modular multilevel converter MMC and an embedded direct current power flow controller eDCPFC by adopting a circulating current suppression strategy; a quasi-proportional resonance controller is adopted to carry out suppression control on a third harmonic generation component of coupled circulating current of a modular multilevel converter MMC and an embedded direct current power flow controller eDCPFC. Compared with the prior art, the method has the advantage of good multi-frequency circulating current suppression effect.

Description

Technical Field

[0001] This invention relates to the field of power distribution network technology, and in particular to a method, device and medium for suppressing multi-frequency circulating current in a multi-port embedded DC power flow controller. Background Technology

[0002] With the increasing attention paid to flexible power transmission technology, multi-terminal DC grid (MTDC) based on modular multi-level converters (MMC) has become an effective way to collect and connect large-scale clean energy to the grid and transmit high-voltage, high-capacity power over long distances due to its advantages such as fast and independent control of active and reactive power, large transmission capacity and long transmission distance.

[0003] However, to provide more abundant energy flow channels, future flexible multi-terminal DC transmission and distribution systems will have a ring network topology, with the number of lines typically exceeding the number of flexible DC converter stations. In this case, the control degrees of freedom provided by the flexible DC converter stations are insufficient to meet the needs of DC power flow regulation, inevitably leading to uncontrollable DC power flow on some lines, potentially causing excessive line losses, line overloads, and other safety issues. Therefore, a DC Power Flow Controller (DCPFC) is introduced into the mesh multi-terminal flexible DC system to increase additional DC power flow control degrees of freedom, optimize operating conditions, and ensure system safety. Multi-port embedded DC power flow controllers have emerged to address this need. These devices, embedded within the MMC and interacting with it for power, achieve the dual objectives of energy balance within the device and power flow regulation across multiple DC lines.

[0004] For modular multilevel converters (MMCs), voltage fluctuations in MMC submodule capacitors coupled with modulation voltages can cause internal circulating currents, increasing device current stress and losses. Due to the symmetry of conventional MMC structures and control, the circulating current is mainly an even-harmonic component, and the second harmonic component can be suppressed through control. However, due to the asymmetry of the topology and energy distribution of cascaded multilevel inverter-embedded direct current power flow controllers (CMI-eDCPFCs), while providing more degrees of freedom in DC power flow control, they also create a more complex circulating current distribution.

[0005] Because the CMI-eDCPFC is asymmetrically installed in the MMC converter station, a coupling current circulation will be formed between the MMC and the eDCPFC. The non-third-harmonic coupling current will increase the internal circulating current of the MMC, while the third-harmonic coupling current will flow out into the DC system, which is detrimental to the stable operation of the DC system. Summary of the Invention

[0006] The purpose of this invention is to overcome the shortcomings of the prior art by providing a multi-frequency circulating current suppression method for a multi-port embedded DC power flow controller with good multi-frequency circulating current suppression effect, which can effectively reduce DC line losses.

[0007] The objective of this invention can be achieved through the following technical solutions:

[0008] According to a first aspect of the present invention, a method for suppressing multi-frequency circulating current in a multi-port embedded DC power flow controller is provided. A cascaded multi-level inverter embedded DC power flow controller CMI-eDCPFC is embedded in a modular multilevel converter (MMC) for suppressing and controlling the multi-frequency circulating current of the DC power flow controller, comprising:

[0009] A circulating current suppression strategy is adopted to suppress and control the fundamental and second harmonic components of the coupled circulating current of the modular multilevel converter (MMC) and the embedded DC power flow controller (eDCPFC).

[0010] A quasi-proportional resonant controller is used to suppress the third harmonic component of the coupled circulating current of the modular multilevel converter (MMC) and the embedded DC power flow controller (eDCPFC).

[0011] Preferably, the circulating current suppression strategy for suppressing and controlling the fundamental and second harmonic components of the coupled circulating current of the modular multilevel converter (MMC) and the embedded DC power flow controller (eDCPFC) specifically includes:

[0012] A circulating current suppressor based on second harmonic negative sequence coordinate transformation is used to suppress the second harmonic component of the coupled circulating current of the modular multilevel converter (MMC) and the embedded DC power flow controller (eDCPFC).

[0013] A fundamental frequency circulating current suppressor based on positive sequence coordinate transformation is used to suppress and control the fundamental frequency component of the coupled circulating current of the modular multilevel converter (MMC) and the embedded DC power flow controller (eDCPFC).

[0014] Preferably, the method of using a circulating current suppressor based on second-harmonic negative-sequence coordinate transformation to suppress the second-harmonic component of the coupled circulating current of the modular multilevel converter (MMC) and the embedded DC power flow controller (eDCPFC) specifically includes:

[0015] Set the d-axis circulation value With d-axis circulation icird The difference is sent to the first PI controller to set the q-axis circulating current. With q-axis circulation i cirq The difference is sent to the second PI controller;

[0016] Circulate i along the q-axis cirq The result of multiplying by 2ωL0 and then inverting the sum of the outputs of the first PI controller yields the d-axis voltage output u. comd Circulate i along the q-axis cirq The result after multiplying by 2ωL0 is compared with the d-axis voltage output u. comd Multiply by the sum after taking the inverse Obtain the d-axis circulation i cird Where ω is the angular frequency, and R0 and L0 are the bridge arm resistance and bridge arm inductance corresponding to the second harmonic impedance model, respectively.

[0017] circulate i along the d-axis cird The result after multiplying by 2ωL0 is subtracted from the output of the second PI controller to obtain the q-axis voltage output u. comq Circulate i along the d-axis cird The result after multiplying by 2ωL0 is compared with the q-axis voltage output u. comq After making the difference, multiply by Obtain the q-axis circulation i cirq .

[0018] Preferably, the method of using a fundamental frequency circulating current suppressor based on positive sequence coordinate transformation to suppress the fundamental frequency component of the coupled circulating current of the modular multilevel converter (MMC) and the embedded DC power flow controller (eDCPFC) specifically includes:

[0019] For the instantaneous values ​​of the upper and lower bridge arm currents of phase j, i jp and i jn The average value is taken to obtain the circulation of phase j bridge arm;

[0020] Perform an abc-dq transformation on the j-phase bridge arm circulating current to output the d-axis circulating current i. zd and q-axis circulation i zq ;

[0021] Set the d-axis circulation setting value and the d-axis circulation i zd The difference is input to the third PI controller, which compares the q-axis circulating current setpoint with the q-axis circulating current i. zq The difference is input to the fourth PI controller;

[0022] Circulate i along the q-axis zq Multiplying by the virtual resistance ωL and subtracting from the output of the third PI controller yields the d-axis voltage u. zd Circulate i along the d-axis zd Multiplying by ωL and subtracting from the output of the fourth PI controller yields the q-axis voltage u. zqWhere ω and L are the angular frequency and equivalent inductance, respectively;

[0023] For d-axis voltage u zd and q-axis voltage u zq Perform a dq-abc transformation to obtain the upper and lower bridge arm voltages u of phase j. zjp and u zjn .

[0024] Preferably, the third harmonic component of the coupled circulating current of the modular multilevel converter (MMC) and the embedded DC power flow controller (eDCPFC) is suppressed using a quasi-proportional resonant controller. The transfer function expression for the quasi-proportional resonant controller is as follows:

[0025]

[0026] In the formula: K p For proportional gain; K i ω is the resonant gain; c ω is the resonant bandwidth; ω0 is the resonant frequency.

[0027] Preferably, when calculating the third harmonic component of the coupled circulating current of the modular multilevel converter (MMC) and the embedded DC power flow controller (eDCPFC), the arm voltage fluctuation of the embedded DC power flow controller (eDCPFC) is ignored, and the calculation expression is as follows:

[0028]

[0029] In the formula: L MMC R MMC L1 and R1 are the equivalent inductance and equivalent resistance of the modular multilevel converter (MMC), respectively; L1 and R1 are the equivalent inductance and equivalent resistance of the bridge arm of the embedded DC power flow controller (eDCPFC), respectively; Δu kp , Δu kn These represent the voltage fluctuations of the upper and lower arms of the k-th power flow control module, respectively.

[0030] Preferably, the cascaded multilevel inverter embedded DC power flow controller CMI-eDCPFC includes multiple power flow control modules. The energy interaction port of each power flow control module is connected to the top of the upper bridge arm of the modular multilevel converter (MMC). The DC port of each power flow control module is connected to the corresponding DC line. Each power flow control module is equipped with a cascaded multilevel inverter (CMI).

[0031] The cascaded multilevel inverter embedded DC power flow controller CMI-eDCPFC controls the port voltage difference between different ports by finely adjusting the DC component of the output voltage of the power flow control module. The port voltage difference acts on the line impedance to adjust the line current, thereby realizing DC power flow control.

[0032] Preferably, the control strategy of the modular multilevel converter (MMC) further includes power closed-loop control, upper and lower arm energy balance control, and energy balance control related to the embedded DC power flow controller (eDCPFC); the control strategy of the embedded DC power flow controller (eDCPFC) includes power flow control for each DC port and internal energy balance control to maintain stable operation of the power flow control module.

[0033] According to a second aspect of the present invention, an electronic device is provided, including a memory and a processor, wherein the memory stores a computer program, and the processor executes the program to implement any of the methods described above.

[0034] According to a third aspect of the invention, a computer-readable storage medium is provided having a computer program stored thereon, which, when executed by a processor, implements any of the methods described herein.

[0035] Compared with the prior art, the present invention has the following beneficial effects:

[0036] (1) The present invention adopts a circulating current suppression strategy to suppress the fundamental frequency and second harmonic components of the coupled circulating current of the modular multilevel converter (MMC) and the embedded DC power flow controller (eDCPFC), and adopts a quasi-proportional resonant controller to suppress the third harmonic component of the coupled circulating current of the modular multilevel converter (MMC) and the embedded DC power flow controller (eDCPFC). This can effectively suppress the multi-frequency circulating current on the DC line caused by the operation of eDCPFC, without affecting the stable operation of the system and reducing the DC line loss.

[0037] (2) A quasi-proportional resonant controller is used to suppress the third harmonic component of the coupled circulating current of the modular multilevel converter (MMC) and the embedded DC power flow controller (eDCPFC). This overcomes the problem that the AC signal cannot be effectively suppressed due to sampling circuit errors and control system accuracy limitations, and enhances the circulating current suppression effect.

[0038] (3) When calculating the third harmonic component of the coupled circulating current of the modular multilevel converter (MMC) and the embedded DC power flow controller (eDCPFC), since the number of sub-modules of the eDCPFC is much smaller than that of the MMC, the influence of the MMC arm voltage fluctuation on the third harmonic circulating current will be significantly enhanced. Therefore, the arm voltage fluctuation of the eDCPFC can be ignored to simplify the calculation and reduce the difficulty of solving the problem. Attached Figure Description

[0039] Figure 1 This is a basic topology diagram of the CMI-eDCPFC of the present invention;

[0040] Figure 2This is a schematic diagram of the circuit connection of each power flow control module of the present invention;

[0041] Figure 3 This is a block diagram of the CMI-eDCPFC control strategy of the present invention; wherein (a) is the control block diagram of MMC and (b) is the control block diagram of eDCPFC;

[0042] Figure 4 The present invention provides a single-phase DC equivalent circuit and a single-phase AC equivalent circuit for the CMI-eDCPFC; wherein (a) is a single-phase DC equivalent circuit and (b) is a single-phase AC equivalent circuit.

[0043] Figure 5 This invention provides a CMI-eDCPFC third-harmonic coupling circulating circuit.

[0044] Figure 6 This is a block diagram of the second harmonic circulating current suppression control based on negative sequence transformation of the present invention;

[0045] Figure 7 This is a block diagram of the fundamental frequency circulating current suppression control based on positive sequence transformation of the present invention;

[0046] Figure 8 This is a control block diagram of the quasi-proportional resonant controller of the present invention;

[0047] Figure 9 Bode plots of the proportional resonant controller and quasi-proportional resonant controller of the present invention;

[0048] Figure 10 The simulation results of this invention are as follows: (a) shows the voltage difference and current waveform between DC lines; (b) shows the current waveform of the upper and lower arms of the MMC phase A and the voltage waveform of the sub-module capacitors of the three eDCPFC power flow control modules phase A; (c) shows the voltage waveform of the sub-module capacitors of the upper and lower arms of the MMC and the voltage waveform of the sub-module capacitors of the three eDCPFC power flow control modules phase A; and (d) shows the voltage and current waveforms on the AC grid side. Detailed Implementation

[0049] The following will clearly and completely describe the technical solutions in the embodiments of the present invention in conjunction with the accompanying drawings. Obviously, the described embodiments are part of the embodiments of the present invention, not all of them. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative efforts should fall within the scope of protection of the present invention.

[0050] Example

[0051] This embodiment proposes a method for suppressing multi-frequency circulating current in a multi-port embedded DC power flow controller. Taking the three-port cascaded multilevel inverter embedded DC power flow controller CMI-eDCPFC as an example, the method of this embodiment is described in detail.

[0052] The topology of a multi-port embedded DC power flow controller is as follows: Figure 1 As shown, the embedded DC power flow controller (eDCPFC) has multiple power flow control modules. The energy interaction port of each power flow control module is connected to the top of the upper arm of the modular multilevel converter (MMC), and the DC port of each power flow control module is connected to the corresponding DC line. The submodules of the MMC are half-bridge submodules, while the submodules of the eDCPFC are all full-bridge submodules. Figure 2 As shown, each DC current control module consists of a three-phase cascaded multilevel inverter (CMI). The DC port of each DC power flow control module is connected to the corresponding DC line. Therefore, the CMI-eDCPFC controls the DC power flow by fine-tuning the series voltage of each line.

[0053] For the proposed multi-port embedded DC power flow controller, an energy balance-based control strategy is proposed, such as... Figure 3 As shown. The control block diagram of the Modular Multilevel Converter (MMC) includes power closed-loop control, fundamental frequency circulating current suppression and second harmonic circulating current suppression, upper and lower arm energy balance control, and energy balance control related to the embedded DC power flow controller (eDCPFC). The control block diagram of the embedded DC power flow controller (eDCPFC) includes power flow control for each DC port and internal energy balance control to maintain the stable operation of the power flow control module.

[0054] 1. Working principle analysis of embedded DC power flow controller eDCPFC

[0055] According to the superposition theorem, the control circuits of the Modular Multilevel Converter (MMC) and the embedded DC power flow controller (eDCPFC) can be decomposed into DC single-phase equivalent circuits and AC single-phase equivalent circuits, as shown below. Figure 4 As shown in parts (a) and (b).

[0056] Among them, u j and i j U represents the voltage and current of the j-th phase of the power grid. jp and u jn i represents the upper and lower arm voltages of the modular multilevel converter (MMC), respectively. jp and i jn These represent the upper and lower bridge arm currents, u, respectively. kj and i kj U represents the voltage and current of the j-th phase of the k-th power flow control module arm, respectively.ok and I ok These represent the voltage and current at the k-th DC port of the embedded DC power flow controller eDCPFC, respectively.

[0057] The DC component of the MMC bridge arm voltage of the modular multilevel converter is a1U dc and a2U dc U dc This represents the rated DC voltage of the Modular Multilevel Converter (MMC), where a1 and a2 are the DC voltage biases of the upper and lower arms of the MMC, respectively, and the AC component is u. jp,ac and u jn,ac .

[0058] (1) DC power flow regulation principle

[0059] like Figure 4 As shown in section (a), the output voltage U of the k-th (k = 1, 2, ..., N) DC port of the embedded DC power flow controller eDCPFC is... ok for:

[0060] U ok =a1U dc +a2U dc +U kj,dc =U dc +U kj,dc (1)

[0061] In the formula: a1U dc and a2U dc The DC component of the MMC bridge arm voltage is represented by a1 and a2, which are the DC voltage biases of the upper and lower arms of the MMC bridge arm, respectively, satisfying a1 + a2 = 1. dc The rated DC voltage of the modular multilevel converter (MMC); U kj,dc This refers to the DC component of the output voltage of the embedded DC power flow controller eDCPFC.

[0062] It can be seen that by adjusting the DC component of the output voltage of the power flow control module, the port voltage difference between different ports can be controlled separately. The port voltage difference acts on the line impedance to achieve the purpose of regulating the line current.

[0063] (2) Embedded DC power flow controller eDCPFC energy balance

[0064] From equation (1), it can be seen that, given the voltage and current, the DC power flow P on the k-th DC line is... ok Represented as:

[0065] P ok =U ok I ok=(U dc +U kj,dc )I ok (2)

[0066] As can be seen from equation (2), DC power accumulates on each bridge arm of the embedded DC power flow controller eDCPFC. In order to maintain the overall energy balance, an overall power balance control voltage u is required. kj,o The AC power generated by coupling with the AC component of the bridge arm current balances the accumulated DC power.

[0067] Among them, u kj,o It is the AC component of the eDCPFC bridge arm voltage, which generates AC power by coupling with the AC component of the bridge arm current. This power is used to balance the DC power accumulated in the bridge arm, and the two cancel each other out to achieve the overall energy balance of the device.

[0068] 2. Generation mechanism of multi-frequency circulation

[0069] Because the cascaded multilevel inverter embedded DC power flow controller CMI-eDCPFC is asymmetrically installed in the modular multilevel converter MMC, a coupling current loop will be formed between the modular multilevel converter MMC and the embedded DC power flow controller eDCPFC.

[0070] Ideally, if the differential mode current of the modular multilevel converter (MMC) is three-phase symmetrical and does not contain a third harmonic component, and the current in each power flow control module of the cascaded multilevel inverter embedded DC power flow controller (CMI-eDCPFC) is also three-phase symmetrical and does not contain a third harmonic component, then the voltage at the output port of the cascaded multilevel inverter embedded DC power flow controller (CMI-eDCPFC) is a DC voltage.

[0071] Therefore, in an AC circuit, different output ports can be considered to be at the same potential. However, since the capacitor voltage is not constant, the actual voltage fluctuates dynamically. If there is a third-harmonic AC component in the voltage fluctuation, the AC components in the upper and lower bridge arms cannot be completely canceled out. In this case, the third-harmonic voltage fluctuation will flow into the DC power grid. Therefore, the circulation path of the third-harmonic current is different from that of other frequencies and needs to be studied separately.

[0072] Based on the characteristics that non-third harmonic components cancel each other out and have equal potential, the paths of DC and third harmonic AC current components are as follows: Figure 4 As shown in part (a), the non-third harmonic AC current circulation path is as follows: Figure 4 As shown in part (b).

[0073] Taking phase A of the modular multilevel converter (MMC) as an example, this paper analyzes the coupling current circulation of the MMC and the embedded DC power flow controller (eDCPFC), as well as the internal circulation of the embedded DC power flow controller (CMI-eDCPFC) of the cascaded multilevel inverter.

[0074] Considering the ripple of the capacitor voltage, the capacitor voltage can be rewritten as:

[0075] u C =U C +Δu C (3)

[0076] In the formula: u C This represents the capacitor voltage considering capacitor voltage ripple; U C This represents the rated capacitor voltage under ideal conditions; Δu C This represents the ripple of the capacitor voltage.

[0077] Taking the CMI-eDCPFC embedded DC power flow controller for a three-port cascaded multilevel inverter as an example, the non-third harmonic AC components of the three-phase current of the CMI-eDCPFC embedded DC power flow controller after considering capacitor voltage fluctuations are as follows:

[0078]

[0079] In the formula: X MMC The equivalent impedance of the MMC bridge arm inductor in a modular multilevel converter; X CMI The total equivalent impedance of all cascaded multilevel inverter embedded DC power flow controller (CMI-eDCPFC) arms connected to phase A of the modular multilevel converter (MMC); Δu 1a , Δu 2a and Δu 3a These represent the voltage fluctuations of the A-phase bridge arm of each of the three eDCPFC modules; u c1a u c2a and u c3a These are the bridge arm voltages of the eDCPFC module; Δu ap The voltage fluctuation of the upper arm of phase A of the modular multilevel converter (MMC); u OO′ This refers to the voltage between the energy exchange port and the DC port.

[0080] The three-phase currents of the cascaded multilevel inverter embedded DC power flow controller CMI-eDCPFC are added together to obtain the coupled circulating current, and the internal circulating current is obtained by subtracting each pair of phases.

[0081]

[0082] The internal circulating current of the embedded DC power flow controller (eDCPFC) of the cascaded multilevel inverter is related to the voltage fluctuation of the capacitor of the embedded DC power flow controller (eDCPFC).

[0083] Taking the A phase of the modular multilevel converter (MMC) and the bridge arm of the cascaded multilevel inverter embedded DC power flow controller (CMI-eDCPFC) connected to it as an example, the bridge arm voltage and current are first calculated, the capacitor voltage fluctuation is derived based on the state equation of the submodule capacitor, and the harmonics of different frequencies are decomposed. Then, the bridge arm current equation considering capacitor voltage fluctuation is calculated to explore the mechanism of multi-frequency circulating current generation.

[0084] (3) Modular Multilevel Converter (MMC) Circulating Current Analysis

[0085] A fundamental frequency circulating current suppression control strategy is adopted to suppress the fundamental frequency circulating current of the MMC, and a second harmonic circulating current suppression control strategy is adopted to suppress the second harmonic circulating current of the MMC.

[0086] Through the fundamental frequency circulating current suppression control strategy, the AC current I input on the AC side is evenly distributed between the upper and lower arms of the MMC, thus the AC current i in the upper arm of phase A is... ap,ac and the alternating current i of the lower bridge arm an,ac The expressions are as follows:

[0087]

[0088] In the formula: ω Angular frequency, This is the phase angle corresponding to the A-phase current on the grid side.

[0089] Based on the AC and DC equivalent circuits, the AC components of the switching functions of the upper and lower arms of phase A of the modular multilevel converter (MMC) are defined as follows:

[0090]

[0091] Where: m MMC It is a variable that controls the voltage of the MMC bridge arm of the modular multilevel converter; m CHB It controls the injection of the fundamental frequency voltage u to maintain overall energy balance. zap The variables are: ω is the angular frequency, and δ and γ are the phase angles, respectively.

[0092] The influence of the third harmonic circulation is considered in the circulation calculation. Assume the third harmonic circulation i... cir3 The equation is:

[0093]

[0094] In the formula: ω is the angular frequency, I c , These represent the current amplitude and phase of the overall energy balance control voltage, respectively.

[0095] The average current flowing through the capacitors of the upper and lower bridge arm submodules are respectively

[0096]

[0097] In the formula: a1 and a2 are the DC voltage biases of the upper and lower arms of the modular multilevel converter (MMC), respectively, satisfying a1+a2=1.

[0098] Furthermore, assume that the switching function component for suppressing the second harmonic circulating current voltage is:

[0099]

[0100] In the formula: ω is the angular frequency, ε, These represent the amplitude and phase of the switching function component that suppresses the second harmonic circulating current voltage, respectively.

[0101] Assume that the total equivalent capacitance of the upper and lower arms of the modular multilevel converter (MMC) is equal, and its value is C. M Based on the capacitor state equation and equation (9), the voltage fluctuation of the upper and lower bridge arm submodule capacitors is calculated as follows:

[0102]

[0103] The voltage fluctuation Δu of the capacitors in the upper and lower bridge arm submodules ap ,Δu an Each is then passed through its respective modulation function s ap ,s an This process ultimately results in the modulated bridge arm voltage fluctuation Δu. ap and Δu an The expressions are as follows:

[0104]

[0105] The fluctuation of the A-phase output voltage of the modular multilevel converter (MMC) was calculated, including DC components, fundamental frequency components, second harmonic components, and third harmonic components. The fluctuation of the bridge arm voltage will act on the bridge arm inductor, inducing a series of circulating currents of different frequencies.

[0106] (4) Cascaded Multilevel Inverter Embedded DC Power Flow Controller CMI-eDCPFC Circulation Analysis

[0107] The CMI-eDCPFC with three output ports is used as the analysis object.

[0108] In an ideal scenario, the arms within the power flow controller are perfectly symmetrical. Therefore, it is assumed that the arm currents of the modular multilevel converter (MMC) are evenly distributed among the arms of the power flow controller, meaning that the current flowing into one arm of the power flow control module satisfies:

[0109]

[0110] In the formula: i a This refers to the A-phase current on the AC grid side. Where I is the current amplitude and ω is the angular frequency. The phase angle corresponding to A; I dc This refers to the DC current on the DC side of the MMC.

[0111] Define the A-phase arm switching function of the k-th power flow control module connected to the A-phase of the modular multilevel converter (MMC) as follows:

[0112]

[0113] Where: m dk This is the adjustment function for the DC component of the DC component voltage of the DC-CPFC bridge arm, used to regulate the voltage difference and power flow distribution at the output DC ports; therefore, its value is related to the actual operating conditions. pka It is the AC voltage u of the kth power flow control module arm of phase A. pka The variable; m cka It is the base frequency voltage u injected into the bridge arm of the k-th power flow control module in phase A. cka The variables are: ω is the angular frequency, and γ and β are the overall energy balance voltages u. kj,o Phase and internal balance voltage u kj,i The phase.

[0114] The average current flowing through the DC power flow control module bridge arm is calculated based on the switching function:

[0115]

[0116] Based on the state equation of the capacitor, the capacitor voltage ripple within the k-th DC power flow control module controlling phase A is calculated as follows:

[0117]

[0118] In the formula: C CHB This represents the total capacitance of a single power flow control module arm. Ideally, the equivalent capacitance of each power flow control module arm should be equal.

[0119] The capacitor voltage ripple Δu of the kth DC power flow control module in phase A is controlled. Cka After the switching function s ka After modulation, the output voltage ripple is:

[0120] Δu ka =s ka ·Δu Cka (18)

[0121] The results show that in different arms of the DC power flow control module, the arm voltage has fundamental, second and third harmonic voltage ripples, which will generate current harmonics of different frequencies on the arm inductor.

[0122] The circulating current inside the DC power flow control module contains fundamental frequency components, second harmonic components, and third harmonic components, among which the fundamental frequency current circulating current component is the largest.

[0123] (5) Coupled Circulation Analysis

[0124] Similarly, the overall voltage fluctuation of the modular multilevel converter (MMC) and the embedded DC power flow controller (CMI-eDCPFC) of the cascaded multilevel inverter are solved, and the coupled circulating current of the MMC and CMI-eDCPFC is solved through the overall voltage fluctuation function.

[0125] The voltage ripple of phase A output of eDCPFC is:

[0126]

[0127] Adding the AC components of the voltage fluctuations in the three DC power flow control module arms, we get:

[0128]

[0129] First, the common-mode voltage fluctuation of CMI-eDCPFC is analyzed. Considering that the energy balance inside eDCPFC is achieved by the active injection of baseband circulating current between DC power flow control modules, and that the baseband circulating current injected between adjacent modules has the same amplitude but opposite phase, the expression for the common-mode voltage fluctuation is as follows:

[0130]

[0131] Equation (21) reveals the common-mode voltage fluctuation on the bridge arm of the DC power flow control module, which includes fundamental, second, and third harmonic components. Assuming the external DC grid voltage is constant, the common-mode voltage fluctuation will induce a series of circulating currents in the bridge arm reactor. Therefore, eliminating or reducing the common-mode voltage fluctuation is the prerequisite and foundation for suppressing the circulating currents.

[0132] The expression for the AC voltage fluctuation of phase A output voltage of MMC is:

[0133]

[0134] In the formula: This is the phase angle.

[0135] Based on the AC equivalent circuit and the common-mode fluctuation of the MMC and CMI-eDCPFC bridge arm voltages mentioned above, the overall state equation including the MMC bridge arm inductance and the CMI-eDCPFC bridge arm inductance is listed to solve for the circulating current of the MMC phase bridge arm.

[0136] (6) Analysis of factors influencing circulation

[0137] For DC power flow controllers, the CMI-eDCPFC modulation voltage mainly consists of a DC power flow regulation component (DC component) and an energy balance control voltage component (AC component), where the circulating current injection voltage is very small and can be approximately ignored. To facilitate modular design, the capacitor voltage of the CMI-eDCPFC submodules is kept consistent with that of the MMC at U. sm .

[0138] Considering the effects of asymmetry, the DC bias formed by the MMC due to the addition of CMI-eDCPFC is defined as follows: The calculation equation is as follows:

[0139]

[0140] In the formula: U PFC The overall energy balance voltage u kj,o The amplitude.

[0141] In this embodiment, the DC bias σ% is set to 2.5%, and the number of submodules in a single MMC bridge arm is n. MMC for:

[0142]

[0143] Considering that the CMI-eDCPFC operates under rated conditions, with a DC voltage difference of 5% of the rated DC grid voltage, and a reserve of rated voltage regulation for energy balance is also required, to prevent over-modulation, the number of submodules n within a single bridge arm of the CMI-eDCPFC is... CMI The following conditions must be met:

[0144]

[0145] In the formula: U sm The rated voltage of the MMC submodule capacitor is 2300V in this embodiment; U dc The rated DC voltage of the MMC is 500kV in this embodiment; `round` is a rounding function. Calculations show that in this embodiment, the number of submodules within a single bridge arm of the CMI-eDCPFC is n. CMI >17.

[0146] From the AC / DC equivalent circuit, it can be seen that the fundamental frequency and second harmonic in the coupled circulating current of MMC and eDCPFC are eliminated through the control strategy. Therefore, without considering the influence of the third harmonic circulating current, the relationship between the third harmonic circulating current of MMC and eDCPFC is as follows:

[0147]

[0148] Considering the impact of third-harmonic circulating current, since the number of submodules in the eDCPFC is much smaller than that in the MMC, the influence of MMC arm voltage fluctuations on the third-harmonic circulating current will be further increased. Therefore, when calculating the third-harmonic circulating current, the eDCPFC arm voltage fluctuations can be ignored. The flow path diagram of the third-harmonic circulating current is shown below. Figure 5 As shown.

[0149] Ignoring common-mode voltage fluctuations in the eDCPFC bridge arms, the formula for calculating the third-harmonic circulating current, according to KVL, is as follows:

[0150]

[0151] In the formula: L MMC R MMC L1 and R1 are the equivalent inductance and equivalent resistance of the MMC, respectively; L1 and R1 are the equivalent inductance and equivalent resistance of the eDCPFC bridge arm, respectively; Δu kp , Δu kn These represent the voltage fluctuations of the upper and lower arms of the k-th power flow control module, respectively.

[0152] 3. Circulation Suppression Strategy

[0153] In this embodiment, a circulating current suppressor based on second-harmonic negative-sequence coordinate transformation is used to suppress the second-harmonic component of the coupled circulating current of the modular multilevel converter (MMC) and the embedded DC power flow controller (eDCPFC). Figure 6 As shown, it specifically includes:

[0154] Set the d-axis circulation value With d-axis circulation i cird The difference is sent to the first PI controller to set the q-axis circulating current. With q-axis circulation i cirq The difference is sent to the second PI controller;

[0155] Circulate i along the q-axis cirq The result of multiplying by 2ωL0 and then inverting the sum of the outputs of the first PI controller yields the d-axis voltage output u. comd Circulate i along the q-axis cirq The result after multiplying by 2ωL0 is compared with the d-axis voltage output u. comd Multiply by the sum after taking the inverse Obtain the d-axis circulation i cirdWhere ω is the angular frequency, and R0 and L0 are the bridge arm resistance and bridge arm inductance corresponding to the second harmonic impedance model, respectively.

[0156] circulate i along the d-axis cird The result after multiplying by 2ωL0 is subtracted from the output of the second PI controller to obtain the q-axis voltage output u. comq Circulate i along the d-axis cird The result after multiplying by 2ωL0 is compared with the q-axis voltage output u. comq After making the difference, multiply by Obtain the q-axis circulation i cirq .

[0157] The corresponding calculation expression is:

[0158]

[0159] In the formula: L0 is the bridge arm reactance; R0 is the bridge arm resistance.

[0160] In this embodiment, a fundamental frequency circulating current suppressor based on positive sequence coordinate transformation is used to suppress the fundamental frequency component of the coupled circulating current of the modular multilevel converter (MMC) and the embedded DC power flow controller (eDCPFC). The control block diagram of the fundamental frequency circulating current suppressor based on positive sequence coordinate transformation is shown below. Figure 7 As shown, it specifically includes:

[0161] For the instantaneous values ​​of the upper and lower bridge arm currents of phase j, i jp and i jn The average value is taken to obtain the circulation of phase j bridge arm;

[0162] Perform an abc-dq transformation on the j-phase bridge arm circulating current to output the d-axis circulating current i. zd and q-axis circulation i zq ;

[0163] Set the d-axis circulation setting value and the d-axis circulation i zd The difference is input to the third PI controller, which compares the q-axis circulating current setpoint with the q-axis circulating current i. zq The difference is input to the fourth PI controller;

[0164] Circulate i along the q-axis zq Multiplying by ωL and subtracting from the output of the third PI controller yields the d-axis voltage u. zd Circulate i along the d-axis zd Multiplying by ωL and then inverting the sum with the output of the fourth PI controller, we obtain the q-axis voltage u. zq Where ω and L are the angular frequency and equivalent inductance, respectively;

[0165] For d-axis voltage u zd and q-axis voltage u zq Perform a dq-abc transformation to obtain the upper and lower bridge arm voltages u of phase j.zjp and u zjn .

[0166] For the third harmonic component of the coupled circulating current of MMC and eDCPFC, a quasi-proportional resonant controller is used to suppress the circulating current.

[0167] The transfer function of an ideal PR controller is:

[0168]

[0169] In the formula: K p For proportional gain; K i ω is the resonant gain; ω0 is the resonant angular frequency.

[0170] An ideal PR controller has infinite gain at the resonant angular frequency ω0. However, in practical applications, due to errors in the sampling circuit and limitations in the accuracy of the control system, the signal frequency may shift, thus failing to effectively suppress AC signals.

[0171] like Figure 8 As shown, a quasi-PR controller is selected in this embodiment to suppress the circulating current, specifically including:

[0172] Circulation setting With circulation i acir The difference is sent to the quasi-PR controller, and the output of the quasi-PR controller is compared with the voltage setpoint. The sum multiplied by Then, the circulating current i after suppressing the third harmonic component is obtained. acir .

[0173] The transfer function of the quasi-PR controller is:

[0174]

[0175] In the formula: K p For proportional gain; K i ω is the resonant gain; c ω is the resonant bandwidth, and ω0 is the resonant frequency.

[0176] Figure 9 This is a Bode diagram of the proportional resonant controller and the quasi-proportional resonant controller in this embodiment.

[0177] based on Figure 1 The CMI-eDCPFC topology shown is used to build a CMI-eDCPFC simulation model using MATLAB / Simulink software. Power closed-loop control is adopted, and the simulation is verified for this topology. The simulation parameters are shown in Table 1 below.

[0178] Table 1

[0179]

[0180] The simulation conditions are as follows:

[0181] Operating condition 1: During the 0-1s period, the power of the MMC converter station is 1.0pu, the output voltage of the eDCPFC is equal, and the power is naturally distributed;

[0182] Operating condition 2: During 1 to 5 seconds, the power of the MMC converter station is 1.0 pu. The eDCPFC performs power flow regulation to make the current of the three DC lines equal, but the third harmonic circulating current suppression is not activated.

[0183] Operating condition 3: During the period from 5 to 8 seconds, the power of the MMC converter station is 1.0 pu, and the eDCPFC performs power flow regulation to make the current of the three DC lines equal, and the third harmonic circulating current suppression is activated.

[0184] Simulation results are as follows Figure 10 As shown in the figure. In the figure, (a) shows the voltage difference between DC line 1 and DC line 2 and DC line 3. It can be seen that the power flow controller can regulate the power flow by adjusting the voltage difference between the DC line ports; (a) shows the current waveforms of the three DC lines. It can be seen that the harmonic content of the DC line current increases significantly after the power flow controller is put into operation, and the harmonics of the DC line current are suppressed after the circulating current suppressor is put into operation; (b) shows the current waveforms of the upper and lower bridge arms of the MMC phase A. It can be seen that the MMC energy remains balanced throughout the process; (b) shows the current waveforms of the three DC lines. The DC current waveforms correspond to the DC voltage waveforms, which will not be elaborated here; (c) shows the voltage waveforms of the capacitors of the upper and lower bridge arms of the MMC. (c) shows the voltage waveforms of the capacitors of the capacitors of the three eDCPFC power flow control modules phase A. As shown in the figure, the MMC and eDCPFC finally achieve energy balance; (d) shows the voltage waveforms of the AC grid side; (d) shows the current waveforms of the AC grid side. It can be seen that the power on the grid side remains stable throughout the simulation process.

[0185] Fourier analysis was performed on the current of the three DC lines under the above three operating conditions, and the results are shown in Table 2 below.

[0186] Table 2

[0187]

[0188]

[0189] The simulation results in the attached figure are consistent with the theoretical analysis. Therefore, the designed control strategy can realize the multi-frequency circulating current on the DC line caused by the operation of eDCPFC without affecting the stable operation of the system.

[0190] The electronic device of this invention includes a central processing unit (CPU), which can perform various appropriate actions and processes according to computer program instructions stored in read-only memory (ROM) or loaded from a storage unit into random access memory (RAM). The RAM may also store various programs and data required for device operation. The CPU, ROM, and RAM are interconnected via a bus. Input / output (I / O) interfaces are also connected to the bus.

[0191] Multiple components in the device are connected to the I / O interface, including: input units such as keyboards and mice; output units such as various types of displays and speakers; storage units such as disks and optical discs; and communication units such as network interface cards (NICs), modems, and wireless transceivers. The communication unit allows the device to exchange information / data with other devices through computer networks such as the Internet and / or various telecommunications networks.

[0192] The processing unit performs the various methods and processes described above. For example, in some embodiments, the methods may be implemented as computer software programs tangibly contained in a machine-readable medium, such as a storage unit. In some embodiments, part or all of the computer program may be loaded and / or installed on the device via ROM and / or a communication unit. When the computer program is loaded into RAM and executed by the CPU, one or more steps of the methods described above may be performed. Alternatively, in other embodiments, the CPU may be configured to execute the methods by any other suitable means (e.g., by means of firmware).

[0193] The functions described above in this document can be performed at least in part by one or more hardware logic components. For example, exemplary types of hardware logic components that can be used, without limitation, include: field programmable gate arrays (FPGAs), application-specific integrated circuits (ASICs), application-specific standard products (ASSPs), systems-on-a-chip (SoCs), payload programmable logic devices (CPLDs), and so on.

[0194] The program code used to implement the methods of the present invention can be written in any combination of one or more programming languages. This program code can be provided to a processor or controller of a general-purpose computer, special-purpose computer, or other programmable data processing device, such that when executed by the processor or controller, the program code causes the functions / operations specified in the flowcharts and / or block diagrams to be implemented. The program code can be executed entirely on the machine, partially on the machine, as a standalone software package partially on the machine and partially on a remote machine, or entirely on a remote machine or server.

[0195] In the context of this invention, a machine-readable medium can be a tangible medium that may contain or store a program for use by or in conjunction with an instruction execution system, apparatus, or device. A machine-readable medium can be a machine-readable signal medium or a machine-readable storage medium. Machine-readable media can include, but are not limited to, electronic, magnetic, optical, electromagnetic, infrared, or semiconductor systems, apparatus, or devices, or any suitable combination of the foregoing. More specific examples of machine-readable storage media include electrical connections based on one or more wires, portable computer disks, hard disks, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), optical fibers, portable compact disk read-only memory (CD-ROM), optical storage devices, magnetic storage devices, or any suitable combination of the foregoing.

[0196] The above description is merely a specific embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any person skilled in the art can easily conceive of various equivalent modifications or substitutions within the technical scope disclosed in the present invention, and such modifications or substitutions are intended to be within the scope of protection of the present invention. Therefore, the scope of protection of the present invention shall be subject to the scope of protection of the claims.

Claims

1. A method for suppressing multi-frequency circulating current in a multi-port embedded DC power flow controller, characterized in that, The Modular Multilevel Converter (MMC) incorporates a cascaded multilevel inverter embedded DC power flow controller (CMI-eDCPFC) for suppressing multi-frequency circulating currents in the DC power flow controller, including: A circulating current suppression strategy is adopted to suppress and control the fundamental and second harmonic components of the coupled circulating current of the modular multilevel converter (MMC) and the embedded DC power flow controller (eDCPFC). A quasi-proportional resonant controller is used to suppress the third harmonic component of the coupled circulating current of the modular multilevel converter (MMC) and the embedded DC power flow controller (eDCPFC).

2. The method for suppressing multi-frequency circulating current in a multi-port embedded DC power flow controller according to claim 1, characterized in that, The circulating current suppression strategy is used to suppress and control the fundamental and second harmonic components of the coupled circulating current of the modular multilevel converter (MMC) and the embedded DC power flow controller (eDCPFC). Specifically, it includes: A circulating current suppressor based on second harmonic negative sequence coordinate transformation is used to suppress the second harmonic component of the coupled circulating current of the modular multilevel converter (MMC) and the embedded DC power flow controller (eDCPFC). A fundamental frequency circulating current suppressor based on positive sequence coordinate transformation is used to suppress and control the fundamental frequency component of the coupled circulating current of the modular multilevel converter (MMC) and the embedded DC power flow controller (eDCPFC).

3. The method for suppressing multi-frequency circulating current in a multi-port embedded DC power flow controller according to claim 2, characterized in that, The method employs a circulating current suppressor based on second-harmonic negative-sequence coordinate transformation to suppress the second-harmonic component of the coupled circulating current of the modular multilevel converter (MMC) and the embedded DC power flow controller (eDCPFC). Specifically, this includes: Set the d-axis circulation value With d-axis circulation i cird The difference is sent to the first PI controller to set the q-axis circulating current. With q-axis circulation i cirq The difference is sent to the second PI controller; Circulate i along the q-axis cirq The result of multiplying by 2ωL0 and then inverting the sum of the outputs of the first PI controller yields the d-axis voltage output u. comd Circulate i along the q-axis cirq The result after multiplying by 2ωL0 is compared with the d-axis voltage output u. comd Multiply by the sum after taking the inverse Obtain the d-axis circulation i cird Where ω is the angular frequency, and R0 and L0 are the bridge arm resistance and bridge arm inductance corresponding to the second harmonic impedance model, respectively. circulate i along the d-axis cird The result after multiplying by 2ωL0 is subtracted from the output of the second PI controller to obtain the q-axis voltage output u. comq Circulate i along the d-axis cird The result after multiplying by 2ωL0 is compared with the q-axis voltage output u. comq After making the difference, multiply by Obtain the q-axis circulation i cirq .

4. The method for suppressing multi-frequency circulating current in a multi-port embedded DC power flow controller according to claim 2, characterized in that, The method employs a fundamental frequency circulating current suppressor based on positive sequence coordinate transformation to suppress and control the fundamental frequency component of the coupled circulating current of the modular multilevel converter (MMC) and the embedded DC power flow controller (eDCPFC). Specifically, this includes: For the instantaneous values ​​of the upper and lower bridge arm currents of phase j, i jp and i jn The average value is taken to obtain the circulation of phase j bridge arm; Perform an abc-dq transformation on the j-phase bridge arm circulating current to output the d-axis circulating current i. zd and q-axis circulation i zq ; Set the d-axis circulation setting value and the d-axis circulation i zd The difference is input to the third PI controller, which compares the q-axis circulating current setpoint with the q-axis circulating current i. zq The difference is input to the fourth PI controller; Circulate i along the q-axis zq Multiplying by ωL and subtracting from the output of the third PI controller yields the d-axis voltage u. zd Circulate i along the d-axis zd Multiplying by ωL and then inverting the sum with the output of the fourth PI controller, we obtain the q-axis voltage u. zq Where ω and L are the angular frequency and equivalent inductance, respectively; For d-axis voltage u zd and q-axis voltage u zq Perform a dq-abc transformation to obtain the upper and lower bridge arm voltages u of phase j. zjp and u zjn .

5. The method for suppressing multi-frequency circulating current in a multi-port embedded DC power flow controller according to claim 1, characterized in that, The method employs a quasi-proportional resonant controller to suppress the third harmonic component of the coupled circulating current of the modular multilevel converter (MMC) and the embedded DC power flow controller (eDCPFC). The transfer function expression for the quasi-proportional resonant controller is as follows: In the formula: K p For proportional gain; K i ω is the resonant gain; c ω is the resonant bandwidth; ω0 is the resonant frequency.

6. The method for suppressing multi-frequency circulating current in a multi-port embedded DC power flow controller according to claim 1, characterized in that, When calculating the third harmonic component of the coupled circulating current of the modular multilevel converter (MMC) and the embedded DC power flow controller (eDCPFC), neglecting the arm voltage fluctuation of the eDCPFC, the calculation expression is as follows: In the formula: L MMC R MMC L1 and R1 are the equivalent inductance and equivalent resistance of the modular multilevel converter (MMC), respectively; L1 and R1 are the equivalent inductance and equivalent resistance of the bridge arm of the embedded DC power flow controller (eDCPFC), respectively; Δu kp , Δu kn These represent the voltage fluctuations of the upper and lower arms of the k-th power flow control module, respectively.

7. The method for suppressing multi-frequency circulating current in a multi-port embedded DC power flow controller according to claim 1, characterized in that, The cascaded multilevel inverter embedded DC power flow controller CMI-eDCPFC includes multiple power flow control modules. The energy interaction port of each power flow control module is connected to the top of the upper bridge arm of the modular multilevel converter (MMC). The DC port of each power flow control module is connected to the corresponding DC line. Each power flow control module is equipped with a cascaded multilevel inverter (CMI). The cascaded multilevel inverter embedded DC power flow controller CMI-eDCPFC controls the port voltage difference between different ports by finely adjusting the DC component of the output voltage of the power flow control module. The port voltage difference acts on the line impedance to adjust the line current, thereby realizing DC power flow control.

8. The method for suppressing multi-frequency circulating current in a multi-port embedded DC power flow controller according to claim 1, characterized in that, The control strategy of the modular multilevel converter (MMC) also includes power closed-loop control, upper and lower arm energy balance control, and energy balance control related to the embedded DC power flow controller (eDCPFC). The control strategy of the embedded DC power flow controller (eDCPFC) includes power flow control of each DC port and internal energy balance control to maintain the stable operation of the power flow control module.

9. An electronic device comprising a memory and a processor, wherein the memory stores a computer program, characterized in that, When the processor executes the program, it implements the method as described in any one of claims 1 to 8.

10. A computer-readable storage medium having a computer program stored thereon, characterized in that, When the program is executed by the processor, it implements the method as described in any one of claims 1 to 8.

Images