Power module and electrical equipment

Abstract

The invention discloses a semiconductor device and electrical equipment. The semiconductor device comprises a substrate; the first inversion part, the second inversion part and the power factor corrector are arranged on the substrate; the driving side frame is arranged on the outer side of the base plate, the driving side frame and the base plate are arranged at intervals in the second direction, and the driving side frame comprises a first frame, a second frame and a third frame which are arranged at intervals in the first direction; the first driving integrated circuit is arranged on the first frame and is electrically connected with the first inverter part; the second driving integrated circuit is arranged on the second frame and is electrically connected with the second inverter part; the PFC driving integrated circuit is arranged on the third frame and is electrically connected with the power factor corrector; the PFC ground pin is electrically connected with the PFC driving integrated circuit, and the first inversion driving ground pin, the second inversion driving ground pin and the PFC ground pin are arranged at intervals and are electrically insulated.

Description

Technical Field

[0001] This application relates to the field of semiconductor technology, and more specifically to a power module and electrical device. Background Technology

[0002] Electronic control boards for equipment such as air conditioner compressors and washing machine motors can be equipped with semiconductor devices such as Intelligent Power Modules (IPMs). However, existing IPMs have limited functionality, only having an inverter function. Furthermore, the anti-interference capability of IPMs is an important factor affecting their reliability. Summary of the Invention

[0003] The summary section introduces a series of simplified concepts, which will be further explained in detail in the detailed description section. This summary section is not intended to limit the key and essential technical features of the claimed technical solution, nor is it intended to determine the scope of protection of the claimed technical solution.

[0004] To at least partially solve the above-mentioned problems, according to a first aspect of this application, a semiconductor device is provided, the semiconductor device having a first direction and a second direction, the first direction and the second direction being perpendicular to each other, comprising:

[0005] substrate;

[0006] The first inverter section, the second inverter section, and the power factor corrector are disposed on the substrate;

[0007] A drive-side frame is disposed on the outer side of the substrate and spaced apart from at least a portion of the substrate in a second direction. The drive-side frame includes a first frame, a second frame, and a third frame spaced apart in the first direction.

[0008] The first driver integrated circuit is disposed on the first frame and electrically connected to the first inverter unit;

[0009] The second driver integrated circuit is disposed on the second frame and electrically connected to the second inverter section;

[0010] The PFC driver integrated circuit is mounted on the third frame and is electrically connected to the power factor corrector.

[0011] The first frame includes a first inverter drive ground pin, a first driver integrated circuit, and the first inverter drive ground pin being electrically connected. The second frame includes a second inverter drive ground pin, the second driver integrated circuit, and the second inverter drive ground pin being electrically connected. The third frame includes a PFC ground pin, the PFC ground pin, and the PFC driver integrated circuit being electrically connected. The first inverter drive ground pin, the second inverter drive ground pin, and the PFC ground pin are spaced apart from each other and electrically isolated.

[0012] The above technical solution has the following advantages and beneficial effects: Since there is a large difference in the current carrying capacity between the first inverter section and the second inverter section, once the first inverter section and the second inverter section share a common ground, the inverter section with stronger current carrying capacity will interfere with the sampling of the inverter section with weaker current carrying capacity. However, by setting the first inverter drive ground pin, the second inverter drive ground pin and the PFC ground pin separately and electrically insulated from each other, that is, by eliminating the common ground frame, the mutual interference between the first inverter section and the second inverter section can be reduced. Moreover, compared with the case where the three are on a common ground, this application separates the ground loops between the various functional sections by eliminating the common ground frame, thereby avoiding the problem of inconsistent ground potential differences among the three due to the ground loop formed between them by the common ground, thereby improving the sampling accuracy, reducing interference coupling, and thus improving the overall reliability of the semiconductor device.

[0013] In one embodiment, the first frame further includes a first driving side pad, a first driving integrated circuit is disposed on the first driving side pad, and the first inverter driving ground pin includes a first inverter first driving ground pin portion and / or a first inverter second driving ground pin portion, the first inverter first driving ground pin portion is connected to the first driving side pad, and the first inverter second driving ground pin portion is connected to the first driving side pad.

[0014] The above technical solution has the following advantages and beneficial effects: the first inverter first drive ground pin and / or the first inverter second drive ground pin can provide better support for the first drive side pad, making the structure more stable and improving the stability of the whole device.

[0015] In one embodiment, the first inverter drive ground pin includes a first inverter first drive ground pin portion, a first inverter second drive ground pin portion, and a first inverter third drive ground pin portion. The first inverter third drive ground pin portion is connected to a first drive side pad. In a first direction, the first inverter first drive ground pin portion, the first inverter second drive ground pin portion, and the first inverter third drive ground pin portion are spaced apart, and the first inverter third drive ground pin portion is disposed between the first inverter first drive ground pin portion and the first inverter second drive ground pin portion.

[0016] The above technical solution has the following advantages and beneficial effects: the three inverter drive ground pins are spaced apart from each other and connected to the first drive side pad, forming a three-point support, so as to provide better support for the first drive side pad and the first drive integrated circuit on it.

[0017] In one embodiment, the first driving-side pad includes a first low-voltage driving-side pad, a first high-voltage driving-side pad, and a first pad connection portion. The first low-voltage driving-side pad and the first high-voltage driving-side pad are spaced apart in a first direction and connected to each other via the first pad connection portion. The first driving integrated circuit includes a first low-voltage driving integrated circuit and a first high-voltage driving integrated circuit. The first low-voltage driving integrated circuit is disposed on the first low-voltage driving-side pad, and the first high-voltage driving integrated circuit is disposed on the first high-voltage driving-side pad.

[0018] The first inverter first drive ground pin is connected to the side of the first low-voltage drive side pad that is away from the first high-voltage drive side pad in a first direction, and the first inverter second drive ground pin is connected to the side of the first high-voltage drive side pad that is away from the first low-voltage drive side pad in a first direction.

[0019] The above technical solution has the following advantages and beneficial effects: The above method can make the positions of the first inverter first drive ground pin and the first inverter second drive ground pin more reasonable. The first inverter first drive ground pin supports the low-voltage drive side pad separately, and the first inverter second drive ground pin supports the high-voltage drive side pad separately. This avoids the stress concentration problem caused by using only one ground pin to support the two pads, so that the force between the two inverter drive ground pins is relatively uniform, thereby reducing pin deformation and providing better support for the drive side pads and devices connected to them, making the structure more stable.

[0020] In one embodiment, the third drive ground pin of the first inverter is disposed between the first low-voltage drive side pad and the first high-voltage drive side pad.

[0021] The above technical solution has the following advantages and beneficial effects: Through the above settings, it can share the load-bearing stress in the relatively central area, thereby making the force between the three inverter drive ground pins relatively uniform, and thus jointly providing better support for the drive side pads connected to them, making the structure more stable.

[0022] In one embodiment, the first inverter third drive ground pin is connected to the side of the first low-voltage drive side pad away from the substrate, or to the side of the first high-voltage drive side pad away from the substrate, or to the side of the first pad connection portion away from the substrate, and the first inverter third drive ground pin is at least partially extended along the second direction toward the side away from the substrate.

[0023] The above technical solution has the following advantages and beneficial effects: By setting the first inverter third drive ground pin part in the above manner, the position of the first inverter third drive ground pin part can be more reasonable, and the force between the three inverter drive ground pin parts can be relatively uniform, so as to provide better support for the drive side pads and the devices on them, making the structure more stable.

[0024] In one embodiment, at least one of the first inverter first drive ground pin, the first inverter second drive ground pin, and the first inverter third drive ground pin is a connection pin, and at least one is a pseudo pin.

[0025] The above technical solution has the following advantages and beneficial effects: the grounding of the driver integrated circuit is achieved by connecting pins, and by setting pseudo pins, the overall stress of the pins can be balanced, providing better support. Furthermore, by setting pseudo pins, the physical distance between the two connecting pins separated by the pseudo pins can be increased, thereby increasing the electrical insulation distance and weakening coupling interference.

[0026] In one embodiment, the second frame further includes a second driver-side pad, the second driver integrated circuit is disposed on the second driver-side pad, and the second inverter driver ground pin includes a second inverter first driver ground pin and / or a second inverter second driver ground pin, the second inverter first driver ground pin is connected to the second driver-side pad, and the second inverter second driver ground pin is connected to the second driver-side pad.

[0027] The above technical solution has the following advantages and beneficial effects: the second inverter first drive ground pin and / or the second inverter second drive ground pin can provide better support for the second drive side pad and the drive integrated circuit on it, making the structure more stable.

[0028] In one embodiment, the second inverter drive ground pin includes a second inverter first drive ground pin, a second inverter second drive ground pin, and a second inverter third drive ground pin. The second inverter third drive ground pin is connected to the second drive side pad. In a first direction, the second inverter first drive ground pin, the second inverter second drive ground pin, and the second inverter third drive ground pin are spaced apart, and the second inverter third drive ground pin is located between the second inverter second drive ground pin and the second inverter first drive ground pin.

[0029] The above technical solution has the following advantages and beneficial effects: the three inverter drive ground pins are spaced apart from each other and connected to the second drive side pad, forming a three-point support, so as to provide better support for the second drive side pad and the second drive integrated circuit on it.

[0030] In one embodiment, the second driving-side pad includes a second low-voltage driving-side pad, a second high-voltage driving-side pad, and a second pad connection portion. The second low-voltage driving-side pad and the second high-voltage driving-side pad are spaced apart in a first direction and connected to each other via the second pad connection portion. The second driving integrated circuit includes a second low-voltage driving integrated circuit and a second high-voltage driving integrated circuit. The second low-voltage driving integrated circuit is disposed on the second low-voltage driving-side pad, and the second high-voltage driving integrated circuit is disposed on the second high-voltage driving-side pad.

[0031] The first drive ground pin of the second inverter is connected to the side of the second low-voltage drive side pad that is away from the second high-voltage drive side pad in the first direction, and the second drive ground pin of the second inverter is connected to the side of the second high-voltage drive side pad that is away from the second low-voltage drive side pad in the first direction.

[0032] The above technical solution has the following advantages and beneficial effects: the first drive ground pin of the second inverter independently supports the low-voltage drive side pad, and the second drive ground pin of the second inverter independently supports the high-voltage drive side pad. This avoids the stress concentration problem caused by using only one ground pin to support two pads. By forming a multi-point support through the first drive ground pin and the second drive ground pin of the second inverter, the force between the two inverter drive ground pins is relatively uniform, thereby reducing pin deformation. It can also provide better support for the second drive side pad and the drive integrated circuit on it, significantly improving the overall mechanical strength.

[0033] In one embodiment, the second inverter third drive ground pin is disposed between the second low-voltage drive side pad and the second high-voltage drive side pad.

[0034] The above technical solution has the following advantages and beneficial effects: By setting it up in the above way, it can distribute the load-bearing stress in the relatively central area, thereby making the force between the three inverter drive ground pins relatively uniform, reducing pin deformation, and thus providing better support for the drive side pads connected to it, making the structure more stable.

[0035] In one embodiment, the second inverter third drive ground pin is connected to the side of the second low-voltage drive side pad away from the substrate, or to the side of the second high-voltage drive side pad away from the substrate, or to the side of the second pad connection portion away from the substrate, and the second inverter third drive ground pin extends at least partially along the second direction toward the side away from the substrate.

[0036] The above technical solution has the following advantages and beneficial effects: By setting the second inverter third drive ground pin in the above manner, the position of the second inverter third drive ground pin can be more reasonable, and the force between the three inverter drive ground pins can be relatively uniform, so as to provide better support for the drive side pads and the devices on them, making the structure more stable.

[0037] In one embodiment, at least one of the second inverter first drive ground pin, the second inverter second drive ground pin, and the second inverter third drive ground pin is a connection pin, and at least one is a pseudo pin.

[0038] The above technical solution has the following advantages and beneficial effects: by setting pseudo-pins, the overall stress of the pins can be balanced, providing better support. Furthermore, by setting pseudo-pins, the physical distance between the two connecting pins separated by the pseudo-pins can be increased, thereby increasing the electrical insulation distance and weakening coupling interference.

[0039] In one embodiment, the third frame includes a third driver-side pad, a PFC driver integrated circuit is disposed on the third driver-side pad, a PFC ground pin extends in a second direction, and the PFC ground pin is connected to the side of the third driver-side pad away from the substrate.

[0040] The above technical solution has the following advantages and beneficial effects: it provides a low-impedance grounding loop for the PFC driver integrated circuit through the PFC ground pin, avoiding noise coupling to other circuits through the common ground, and provides support for the third driver side pad and the PFC driver integrated circuit through the PFC ground pin, thereby improving the mechanical stability of the third driver side pad and the PFC driver integrated circuit.

[0041] In one embodiment, the first frame includes a first inverter drive power supply voltage pin, which is electrically connected to a first driver integrated circuit; the second frame includes a second inverter drive power supply voltage pin, which is electrically connected to a second driver integrated circuit; and the third frame includes a PFC driver integrated circuit power supply voltage pin, which is electrically connected to a PFC driver integrated circuit.

[0042] The first inverter drive power supply voltage pin, the second inverter drive power supply voltage pin, and the PFC drive integrated circuit power supply voltage pin are spaced apart and electrically isolated in the first direction.

[0043] The above technical solution has the following advantages and beneficial effects: By using the above method, the mutual interference of power supply noise between the first driver integrated circuit, the second driver integrated circuit, and the PFC driver integrated circuit can be reduced, thereby improving the stability of the circuit.

[0044] In one embodiment, the first driving integrated circuit includes a first low-voltage driving integrated circuit and a first high-voltage driving integrated circuit, which are spaced apart in a first direction. The first inverter driving power supply voltage pin includes a first inverter high-side gate driving power supply voltage pin and a first inverter low-side gate driving power supply voltage pin, which are independent of each other and spaced apart in a first direction. The first inverter high-side gate driving power supply voltage pin is electrically connected to the first high-voltage driving integrated circuit, and the first inverter low-side gate driving power supply voltage pin is electrically connected to the first low-voltage driving integrated circuit.

[0045] The above technical solution has the following advantages and benefits: Through this solution, the high / low-side gate drive power supplies can be completely independent, avoiding mutual interference. The high-voltage driver IC is connected to the high-side power supply, and the low-voltage driver IC is directly connected to the low-side power supply, which shortens the current path and reduces transmission loss.

[0046] In one embodiment, the first frame includes a first driver-side pad, which includes a first low-voltage driver-side pad, a first high-voltage driver-side pad, and a first pad connection portion. The first low-voltage driver-side pad and the first high-voltage driver-side pad are spaced apart in the first direction and connected to each other via the first pad connection portion. The first low-voltage driver integrated circuit is disposed on the first low-voltage driver-side pad, and the first high-voltage driver integrated circuit is disposed on the first high-voltage driver-side pad.

[0047] The first inverter high-side gate drive supply voltage pin includes a first inverter first supply voltage pin portion, a first inverter second supply voltage pin portion (372), and a first inverter third supply voltage pin portion. A portion of the first inverter first supply voltage pin portion extends in a first direction, and another portion of the first inverter first supply voltage pin portion extends in a second direction. The first inverter first supply voltage pin portion surrounds a portion of the first high-voltage drive side pad and is spaced apart from the first high-voltage drive side pad. The first inverter second supply voltage pin portion and the first inverter third supply voltage pin portion are respectively disposed at both ends of the first inverter first supply voltage pin portion in the first direction. Both the first inverter second supply voltage pin portion and the first inverter third supply voltage pin portion extend in the second direction toward the side away from the substrate.

[0048] Among them, one of the first inverter second power supply voltage pin section and the first inverter third power supply voltage pin section is a pseudo pin, and the other is a connection pin.

[0049] The above technical solution has the following advantages and beneficial effects: the power supply of the driver integrated circuit is realized by connecting pins, the isolation distance between the connecting pins on both sides can be widened by setting pseudo pins, signal crosstalk can be reduced, and pseudo pins can also provide additional support fixing points to improve the overall structural strength.

[0050] In one embodiment, the second frame further includes a second inverter drive power supply voltage pin, and the second drive integrated circuit includes a second low-voltage drive integrated circuit and a second high-voltage drive integrated circuit.

[0051] The second inverter drive power supply voltage pin includes a second inverter high-side gate drive power supply voltage pin and a second inverter low-side gate drive power supply voltage pin. The second inverter high-side gate drive power supply voltage pin and the second inverter low-side gate drive power supply voltage pin are independent of each other and are spaced apart in a first direction. The second inverter high-side gate drive power supply voltage pin is electrically connected to the second high-voltage drive integrated circuit, and the second inverter low-side gate drive power supply voltage pin is electrically connected to the second low-voltage drive integrated circuit.

[0052] The above technical solution has the following advantages and benefits: Through this solution, the high / low-side gate drive power supplies can be completely independent, avoiding mutual interference. The high-voltage driver IC is connected to the high-side power supply, and the low-voltage driver IC is directly connected to the low-side power supply, which shortens the current path and reduces transmission loss.

[0053] In one embodiment, the second frame includes a second driver-side pad, which includes a second low-voltage driver-side pad, a second high-voltage driver-side pad, and a second pad connection portion. The second low-voltage driver-side pad and the second high-voltage driver-side pad are spaced apart in the first direction and connected to each other via the second pad connection portion. A second low-voltage driver integrated circuit is disposed on the second low-voltage driver-side pad, and a second high-voltage driver integrated circuit is disposed on the second high-voltage driver-side pad.

[0054] The second inverter high-side gate drive supply voltage pin includes a second inverter first supply voltage pin portion, a second inverter second supply voltage pin portion, and a second inverter third supply voltage pin portion. A portion of the second inverter first supply voltage pin portion extends in the first direction, and another portion extends in the second direction. The second inverter first supply voltage pin portion surrounds a portion of the second high-voltage drive side pad and is spaced apart from the second high-voltage drive side pad. The second inverter second supply voltage pin portion and the second inverter third supply voltage pin portion are respectively located at both ends of the second inverter first supply voltage pin portion in the first direction. Both the second inverter second supply voltage pin portion and the second inverter third supply voltage pin portion extend in the second direction towards the side opposite to the substrate.

[0055] One of the second inverter's second power supply voltage pin section and the second inverter's third power supply voltage pin section is a pseudo pin, and the other is a connection pin.

[0056] The above technical solution has the following advantages and beneficial effects: the power supply of the driver integrated circuit is realized by connecting pins, the isolation distance between the connecting pins on both sides can be widened by setting pseudo pins, signal crosstalk can be reduced, and pseudo pins can also provide additional support fixing points to improve the overall structural strength.

[0057] In one embodiment, the first inverter, the second inverter, and the power factor corrector are arranged sequentially at intervals in a first direction. In a second direction, the first frame corresponds at least partially to the first inverter, the second frame corresponds at least partially to the second inverter, and the third frame corresponds at least partially to the power factor corrector.

[0058] The above technical solution has the following advantages and benefits: by making the first inverter, the second inverter, the power factor corrector and their respective frames correspond, relatively short leads can be used to connect to the pins in the corresponding frames, avoiding the delay and noise introduced by long-distance traces.

[0059] In one embodiment, it also includes:

[0060] The rectifier bridge is mounted on the substrate.

[0061] A plastic package encapsulates a first inverter section, a second inverter section, a power factor corrector and a rectifier bridge, at least a portion of a substrate, and a portion of a drive-side frame, with some drive-side pins located outside the plastic package.

[0062] The above technical solution has the following advantages and beneficial effects: the plastic encapsulation can provide physical and electrical protection for at least part of the substrate, fan inverter, compressor inverter, power factor corrector and rectifier bridge encapsulated therein, so as to prevent damage to the device caused by external environmental impact, ensure the normal operation of the semiconductor device, and improve the compactness of the device by integrating multiple devices together.

[0063] This application also provides an electrical device that includes the aforementioned semiconductor device.

[0064] The above technical solution has the following advantages and beneficial effects: Since the electrical device includes the aforementioned semiconductor device, it has the same advantages as the aforementioned semiconductor device. Attached Figure Description

[0065] The following drawings, which are incorporated herein by reference and are used to understand this application, illustrate embodiments of the invention and their descriptions, thereby explaining the apparatus and principles of the invention.

[0066] Figure 1 A top view of the semiconductor device in the Z direction is shown in an embodiment of this application.

[0067] Figure 2 A top view of the semiconductor device with device designations in the Z direction is shown in the embodiment of this application.

[0068] Figure 3 A top view schematic diagram of the first inverter section in the semiconductor device according to an embodiment of this application is shown.

[0069] Figure 4 A top view schematic diagram of the second inverter section in the semiconductor device according to an embodiment of this application is shown.

[0070] Figure 5 A top view of the semiconductor device in another direction in the Z direction is shown in the embodiment of this application.

[0071] Figure 6 A schematic diagram showing the pin numbers on the driving side of the semiconductor device in an embodiment of this application is provided.

[0072] Figure 7 A side view of a semiconductor device in the X direction is shown in an embodiment of this application.

[0073] Figure 8a , Figure 8b , Figure 8c Schematic diagrams are shown of the alternation of long and short pins in some embodiments of the semiconductor device in this application.

[0074] Figure 9 A schematic diagram showing the pin numbers and pseudo-pin numbers of the semiconductor device on the driving side in an embodiment of this application is shown.

[0075] Figure 10 A schematic diagram of a semiconductor device having a groove formed on one side of a plastic package in an embodiment of this application is shown.

[0076] Figure 11 The diagram shows a relative layout design of the modules in some other embodiments of the semiconductor device in this application.

[0077] Figure 12 The diagram shows a relative layout design of the modules in some other embodiments of the semiconductor device in this application.

[0078] Figure label:

[0079] 100. Semiconductor devices;

[0080] 101. First inverter unit; 102. First driver integrated circuit; 103. Wind turbine inverter unit;

[0081] 1021. First low-voltage drive integrated circuit; 1022. First high-voltage drive integrated circuit;

[0082] 1031. First low-voltage power-side inverter circuit components;

[0083] 1032. First high-voltage power side inverter circuit components;

[0084] 201. Second inverter unit; 202. Second drive integrated circuit; 203. Compressor inverter unit;

[0085] 2021, Second low-voltage driver integrated circuit; 2022, Second high-voltage driver integrated circuit;

[0086] 2031. Second low-voltage power-side inverter circuit element; 2032. Second high-voltage power-side inverter circuit element;

[0087] 302. PFC driver integrated circuit; 303. Power factor corrector;

[0088] 401, Rectifier bridge; 402, Rectifier bridge pads; 403, Rectifier chip;

[0089] 500, substrate; 501, first power side pad; 502, second power side pad;

[0090] 5011, First low-voltage power side pad; 5012, First high-voltage power side pad;

[0091] 5021, Second low-voltage power side pad; 5022, Second high-voltage power side pad;

[0092] 503, Third power side pad;

[0093] 600, Drive-side frame; 601, First drive-side pad;

[0094] 602, First drive side pin; 440, First inverter drive ground pin; 441, First inverter first drive ground pin section; 442, First inverter second drive ground pin section; 443, First inverter third drive ground pin section; 444, First pad connection section;

[0095] 603, Second driver side pad; 604, Second driver side pin; 250, Second inverter driver ground pin; 251, Second inverter first driver ground pin; 252, Second inverter second driver ground pin; 253, Second inverter third driver ground pin;

[0096] 605, Third driver-side pin; 606, Fourth driver-side pin;

[0097] 370, First inverter drive power supply voltage pin; 37, First inverter high-side gate drive power supply voltage pin; 41, First inverter low-side gate drive power supply voltage pin; 371, First inverter first power supply voltage pin section; 372, First inverter second power supply voltage pin section; 373, First inverter third power supply voltage pin section;

[0098] 190. Second inverter drive power supply voltage pin; 19. Second inverter high-side gate drive power supply voltage pin; 23. Second inverter low-side gate drive power supply voltage pin; 9. PFC driver integrated circuit power supply voltage pin; 8. PFC ground pin;

[0099] 191. Second inverter first power supply voltage pin section; 192. Second inverter second power supply voltage pin section; 193. Second inverter third power supply voltage pin section; 194. Second pad connection section;

[0100] 6011, First low-voltage drive side pad; 6012, First high-voltage drive side pad; 444, First pad connection portion;

[0101] 6031, Second low-voltage drive side pad; 6032, Second high-voltage drive side pad; 194, Second pad connection portion;

[0102] 609, Third drive side pad; 6091, Clearance notch;

[0103] 700, Molded body; 701, First side; 702, Second side; 703, Groove;

[0104] Pseudo-pins: P01~P07 Detailed Implementation

[0105] The following description provides numerous specific details to offer a more thorough understanding of this application. However, it will be apparent to those skilled in the art that this application can be practiced without one or more of these details. In other instances, certain technical features well-known in the art have not been described to avoid confusion with this application.

[0106] It should be understood that this application can be implemented in various forms and should not be construed as limited to the embodiments set forth herein. Rather, providing these embodiments will make the disclosure thorough and complete, and will fully convey the scope of this application to those skilled in the art. In the drawings, for clarity, the dimensions and relative dimensions of layers and regions may be exaggerated. The same reference numerals denote the same elements throughout.

[0107] It should be understood that although the terms first, second, third, etc., may be used to describe various elements, components, areas, layers, and / or parts, these elements, components, areas, layers, and / or parts should not be limited by these terms. These terms are only used to distinguish one element, component, area, layer, or part from another element, component, area, layer, or part. Therefore, without departing from the teachings of this application, the first element, component, area, layer, or part discussed below may be referred to as the second element, component, area, layer, or part.

[0108] Spatial relation terms such as "below," "under," "below," "under," "above," and "above" are used here for convenience to describe the relationship between one element or feature shown in the figure and other elements or features. It should be understood that, in addition to the orientation shown in the figure, spatial relation terms are intended to also include different orientations of devices in use and operation.

[0109] The terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit the scope of this application. When used herein, the singular forms “a,” “an,” and “ / the” are also intended to include the plural forms unless the context clearly indicates otherwise. It should also be understood that the terms “compose” and / or “comprising,” when used in this specification, identify the presence of features, integers, steps, operations, elements, and / or components, but do not exclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or groups. When used herein, the term “and / or” includes any and all combinations of the associated listed items.

[0110] Embodiments of the invention are described herein with reference to cross-sectional views that serve as schematic diagrams of preferred embodiments (and intermediate structures) of this application. Thus, variations in the shown shape are contemplated due to, for example, manufacturing techniques and / or tolerances. Therefore, embodiments of this application should not be limited to the specific shapes shown herein, but include shape deviations due to, for example, manufacturing processes. Consequently, the figures are substantially schematic, and their shapes are not intended to show the actual shape of the device and are not intended to limit the scope of this application.

[0111] To fully understand this invention, detailed steps and structures will be set forth in the following description to illustrate the technical solutions proposed in this application. Preferred embodiments of this application are described in detail below; however, in addition to these detailed descriptions, this application may have other embodiments.

[0112] Below, we will refer to the appendix. Figures 1 to 12A semiconductor device according to an embodiment of this application will be described. In order to ensure the clarity of the views, some structural reference numerals may be omitted in some of the drawings. These reference numerals can be obtained by referring to other drawings. Without conflict, the various technical features in the embodiments of this application can be combined with each other.

[0113] like Figure 1 As shown, exemplarily, in some embodiments, the semiconductor device 100 may integrate a first inverter unit 101, a second inverter unit 201, a power factor correction (PFC) module 301, and a rectifier bridge 401. It should be noted that... Figure 1 The dashed boxes in the diagram are only used to illustrate the relative positional distribution of the first inverter unit 101, the second inverter unit 201, the power factor correction (PFC) module 301, and the rectifier bridge 401, and are not intended to limit the structural dimensions of each integrated object or the devices it contains. Optionally, one of the first inverter unit 101 and the second inverter unit 201 may be a compressor inverter unit, and the other may be a fan inverter unit. In this embodiment, the case where the first inverter unit 101 is a fan inverter unit and the second inverter unit 201 is a compressor inverter unit is mainly described, but this is not intended to constitute a limitation.

[0114] For example, such as Figure 2 As shown, three-dimensional space is represented using a Cartesian coordinate system. The first direction can be the X-axis, or the horizontal or length direction. The second direction can be the Y-axis, or the vertical or width direction.

[0115] In addition, such as Figure 2 The dashed line shown in the diagram, in the second direction, has the drive side and the power side on either side, respectively. In the following description, the names of various devices will be distinguished from the perspective of the power side and the drive side; these names are not intended to be necessary limitations on the structure or characteristics of the corresponding devices.

[0116] In some embodiments, the substrate 500 in the semiconductor device may be one of the following substrates: thin film ceramic substrate (TFC), thick film printed ceramic substrate (TPC), direct bonded copper ceramic substrate (DBC), direct aluminum-clad ceramic substrate (DBA), direct electroplated copper ceramic substrate (DPC), active metal-bonded ceramic substrate (AMB), direct sputtered copper ceramic substrate (DSC), and laser activated metal-ceramic substrate (LAM).

[0117] The substrate 500 has a first side and a second side disposed opposite to each other. The fan inverter 103, compressor inverter 203, power factor corrector 303, and rectifier bridge 401 can be disposed on the first side of the substrate 500. The rectifier bridge 401 is disposed on the side of the power factor corrector 303 away from the compressor inverter. For example, the first side of the substrate 500 has multiple power-side pads, and multiple circuit elements included in the fan inverter 103, compressor inverter, power factor corrector 303, and rectifier bridge 401 are disposed on various corresponding power-side pads. The substrate 500 can support the fan inverter 103, compressor inverter, power factor corrector 303, and rectifier bridge 401, and the substrate 500 has good thermal conductivity, which can improve the heat dissipation effect of each component on the substrate 500. The power-side pads on the first side of the substrate 500 can be used to bring out the components on the substrate 500 for electrical connection with other components.

[0118] Optionally, the substrate 500 can also be a PCB (printed circuit board). The PCB can be a substrate 500 in which electrical connections between electronic components are formed by patterning conductive copper foil onto the surface of an insulating material (such as fiberglass, epoxy resin, etc.). The PCB achieves electrical connections between electronic components through these copper foil lines and supports the components to be fixed on the board. Optionally, the PCB can be a single-sided, double-sided, or multi-sided PCB.

[0119] The substrate 500 may include pads and an insulating heat dissipation layer disposed below the pads. The insulating heat dissipation layer is mainly formed by sequentially stacking an insulating resin sheet and a copper layer, or by sequentially stacking an insulating resin sheet and an aluminum layer. The main material of the pads is copper or aluminum. In this case, most of the substrate 500 is wrapped by the molding compound 700, and the outer surface of the copper layer or the outer surface of the aluminum layer in the insulating heat dissipation layer of the substrate 500 is exposed from the outer surface of the molding compound 700.

[0120] Alternatively, the substrate 500 may include pads, an insulating layer, and a heat dissipation layer formed by sequentially stacking. The main material of the pads is a copper layer or an aluminum layer, the main material of the insulating layer is a ceramic insulating layer of ALN, AL2O3, Si3N4, or a combination of several materials, and the main material of the heat dissipation layer is a copper layer or an aluminum layer. In this case, most of the substrate 500 is encapsulated by the molding compound 700, and the outer surface of the heat dissipation layer of the substrate 500 is exposed from the outer surface of the molding compound 700.

[0121] Alternatively, the substrate 500 may include pads and an insulating layer disposed below the pads, wherein the main material of the insulating layer is an ALN ​​ceramic insulating layer, or an AL2O3 ceramic insulating layer, or a Si3N4 ceramic insulating layer. In this case, most of the substrate 500 is encapsulated by the molding compound 700, and the outer surface of the insulating layer of the substrate 500 is exposed from the outer surface of the molding compound 700.

[0122] Alternatively, the substrate 500 can be formed solely of solder pads. In this case, the substrate 500 is disposed within the molding compound 700, which completely encapsulates the substrate 500. The specific structural form of the substrate 500 can be adjusted according to the specific requirements and application environment of the smart power module.

[0123] The number of substrates 500 is one, and the fan inverter 103, compressor inverter, power factor corrector 303 and rectifier bridge 401 can be disposed on the same substrate 500. Alternatively, the number of substrates 500 is multiple, and the fan inverter 103, compressor inverter, power factor corrector 303 and rectifier bridge 401 are each disposed on one substrate 500. Or, at least two of them are disposed on one substrate 500, and the others are disposed on one or more other substrates 500.

[0124] Specifically, the substrate 500 has a first power side pad 501 and a second power side pad 502. The first power side pad 501 is the power side pad corresponding to the fan inverter section 103, and the second power side pad 502 is the power side pad corresponding to the compressor inverter section 203.

[0125] The drive-side frame 600 is disposed on the outer side of the substrate 500 and is spaced apart from at least a portion of the substrate (500) in a second direction. The drive-side frame 600 includes a first frame, a second frame, a third frame, and a rectifier pin frame. Figure 2 As shown, dashed box A1 indicates the basic range corresponding to the driver-side frame 600, dashed box A2 indicates the basic range corresponding to the first frame, dashed box A3 indicates the basic range corresponding to the second frame, dashed box A4 indicates the basic range corresponding to the third frame, and dashed box A' indicates the basic range corresponding to the rectifier pin frame. It should be noted that since integrated circuits are mostly irregularly shaped... Figure 2 The dashed boxes A1, A2, A3, A4, etc., and other dashed boxes mentioned later are only used to indicate the general location and are not intended to limit the specific frames. The drive-side frame 600 is disposed on the outside of the substrate 500 and spaced apart from the substrate 500, for example, spaced apart in the first direction. The drive-side frame 600 includes multiple drive-side pads and multiple drive-side pins.

[0126] The first frame corresponds at least partially, for example, at least half, of the first inverter unit, such as the fan inverter unit 103 (i.e., the first power side pad 501), in the second direction. For example, the first frame is a fan drive side frame, and the first power side pad 501 is a fan power side pad. The fan drive side frame and the fan power side pad are at least partially, for example, at least half, of each other in the second direction. Furthermore, the second frame corresponds at least partially, for example, of the second inverter unit, such as the compressor inverter unit (203), in the second direction. That is, the second frame corresponds at least partially, for example, at least half, of the second power side pad 502 in the second direction. For example, the second frame is a compressor drive side frame, and the second power side pad 502 is a compressor power side pad. The compressor drive side frame and the compressor power side pad are at least partially, for example, at least half, of each other in the second direction. The third frame corresponds at least partially, for example, at least half, of the power factor corrector 303 in the second direction.

[0127] Specifically, the first frame may include a first driver-side pad 601 and a plurality of first driver-side pins 602. Wherein, as... Figure 2 As shown, the first driving side pad 601 can be two, namely the first low-voltage driving side pad 6011 and the first high-voltage driving side pad 6012.

[0128] The second frame includes a second driver-side pad 603 and multiple second driver-side pins 604. For example... Figure 2 As shown, there can be two second drive side pads 603, namely a second low-voltage drive side pad 6031 and a second high-voltage drive side pad 6032.

[0129] The number of first drive-side pins 602 corresponding to the first inverter unit (such as the pins within the dashed box A2) is multiple. The number of second drive-side pins 604 corresponding to the second inverter unit (such as the pins within the dashed box A3) is multiple. The pins of the multiple first drive-side pins 602 and the pins of the multiple second drive-side pins 604 are spaced apart in the first direction. The multiple third drive-side pins corresponding to the PFC module can also be spaced apart in the first direction, which will be explained in detail later.

[0130] By using the driver-side frame 600 to house the driver integrated circuit and integrate the driver-side pins, it is possible to achieve a high degree of integration, reduce the number of components, shrink the overall size, and make the semiconductor device structure more compact. Furthermore, it can enhance heat dissipation and improve the stability and reliability of the semiconductor device.

[0131] Specifically, in some embodiments, such as Figure 3As shown, the first inverter unit 101 may include a fan inverter unit 103. The semiconductor device may include a first driver integrated circuit 102, which may be disposed on the first frame and electrically connected to the first inverter unit 101. The first driver integrated circuit 102 may include a first low-voltage driver integrated circuit 1021 and a first high-voltage driver integrated circuit 1022. The first low-voltage driver integrated circuit 1021 and the first high-voltage driver integrated circuit 1022 may be integrated into a single driver chip or may be separate driver chips. The first inverter unit 101 may include a first low-voltage power-side inverter circuit element 1031 and a first high-voltage power-side inverter circuit element 1032.

[0132] The substrate 500 generally has a first side and a second side arranged opposite to each other. The first inverter 101, such as the fan inverter 103, can be disposed on the first side of the heat dissipation substrate 500. The first side is the side of the heat dissipation substrate 500 with the power side pads. The fan inverter 103 can be disposed on the power side pads.

[0133] The substrate 500 supports the power switching device and has good thermal conductivity, which improves the heat dissipation of the power switching device and enhances its reliability. The power-side pads on the first side of the substrate allow the power switching device to be led out for electrical connection with other components. Direct electrical connection of the power switching device is achieved by directly placing it on the power-side pads, optimizing the wiring of the semiconductor device and simplifying its structure.

[0134] Specifically, in combination Figure 2 and Figure 3 As shown, the first driver integrated circuit 102 is disposed on the first driver side pad 601. For example, correspondingly, the first low-voltage driver integrated circuit 1021 can be disposed on the first low-voltage driver side pad 6011, and the first high-voltage driver integrated circuit 1022 can be disposed on the second high-voltage driver side pad 6032.

[0135] The first inverter unit 101, such as the wind turbine inverter unit 103, can be disposed on the first power side pad 501. The first power side pad 501 includes a first low-voltage power side pad 5011 and a first high-voltage power side pad 5012. Specifically, the first low-voltage power side inverter circuit element 1031 can be disposed on the first low-voltage power side pad 5011, and the first high-voltage power side inverter circuit element 1032 can be disposed on 5012.

[0136] In some embodiments, the number of first low-voltage power-side inverter circuit elements 1031 can be multiple, and the number of first high-voltage power-side inverter circuit elements 1032 can also be multiple. The number of first low-voltage power-side pads 5011 can be multiple, for example, three. The number of pads 5012 is at least one, for example, one.

[0137] For example, each inverter unit may include inverter circuit elements, which may include multiple power switching devices (also called inverter power chips). These multiple power switching devices form an inverter circuit; for example, a three-phase inverter bridge circuit may be composed of six inverter power chips. The three-phase inverter bridge circuit includes three-phase upper arm inverter power chips and three-phase lower arm inverter power chips. The power switching devices may include MOSFET or IGBT modules. The IGBT modules may be reverse-conducting insulated-gate bipolar transistors (RC-IGBTs), or IGBTs and fast recovery diodes (FRDs), or other suitable types of power switching devices. For example, taking RC-IGBTs as the inverter circuit elements, the number of RC-IGBTs may be multiple, such as three high-voltage power-side RC-IGBTs and three low-voltage power-side RC-IGBTs constituting the inverter. Specifically, the number of RC-IGBTs can be reasonably set according to actual needs.

[0138] It is worth mentioning that, in the embodiments of this application, the power switching devices, such as RC-IGBT or IGBT and fast recovery diode (FRD), are disposed on the corresponding power side pads, which are mechanically and electrically connected to the power side pads.

[0139] A reverse-conducting IGBT can be a basically rectangular semiconductor switching element, comprising an IGBT mounted on a single semiconductor substrate and a freewheeling diode (i.e., a reverse-conducting IGBT integrating the IGBT and freewheeling diode into a single chip). Since individual IGBT chips or freewheeling diodes mounted on different semiconductor substrates each contain a termination region and an active region, the termination portion can be shared when the two devices are combined into one chip, thereby reducing the area of ​​the termination portion. Therefore, the size of an RC IGBT is typically smaller than the size of a structure where the IGBT and freewheeling diode are mounted on different semiconductor substrates. Thus, using an RC IGBT as the power chip in a semiconductor device can reduce the size of the power chip and even the size of the semiconductor device itself. Reverse-conducting insulated-gate bipolar transistors are single-chip power devices, which reduces the number of chips on the semiconductor device 100 and the number of bonding wires.

[0140] In some embodiments, the RCIGBT may include a termination structure, which may employ a lateral variable doping structure. Employing a lateral variable doping structure offers the following advantages and benefits: compared to a field-limiting ring or a field-limiting ring plus a field plate termination structure, the lateral variable doping structure of the RC-IGBT can further reduce the chip area of ​​the RC-IGBT, thereby facilitating module miniaturization.

[0141] Lateral doping refers to the formation of a region with a gradual change in impurity doping concentration in the terminal region of a device through methods such as ion implantation. Typically, ion implantation is performed on the substrate region near the heavily doped main junction to form a lateral doping structure. The doping concentration is higher in the region closer to the main junction and lower in the region farther away.

[0142] In the first inverter section, the first driver integrated circuit 102 is electrically connected to the first inverter section 101, such as the fan inverter section 103. The fan inverter section 103 may include, for example, multiple IGBT modules. Taking an RC-IGBT module as an example, the driver integrated circuit and the RC-IGBT are electrically connected for controlling the RC-IGBT. For example, the driver integrated circuit and the RC-IGBT are electrically connected via an electrical connector, such as a wire. The driver integrated circuit controls the RC-IGBT, for example, by driving the RC-IGBT to turn it on or off. Or, for example, it protects the RC-IGBT in case of abnormality (e.g., overvoltage protection and / or overtemperature protection and / or electrostatic discharge protection, etc.).

[0143] It should be noted that the number of drive integrated circuits corresponding to the first inverter section 101 or the second inverter section 201 can be reasonably set according to the power switching element to be driven, such as RC-IGBT. For example, the number of drive integrated circuits can be one or more. When the number is multiple, it can include one high-voltage drive integrated circuit and one low-voltage drive integrated circuit, or it can include three high-voltage drive integrated circuits and one low-voltage drive integrated circuit, or other suitable cases. The high-voltage drive integrated circuit drives the high-voltage power-side RC-IGBT to turn on or off, while the low-voltage drive integrated circuit drives the low-voltage power-side RC-IGBT to turn on or off. Optionally, the drive integrated circuit can integrate multiple electronic components, such as transistors, diodes, triodes, resistors, or capacitors.

[0144] Specifically, such as Figure 2 or Figure 3As shown, the first low-voltage drive integrated circuit 1021 corresponding to the first inverter section is electrically connected to the first low-voltage power-side inverter circuit element 1031 via leads. Correspondingly, the first high-voltage drive integrated circuit 1022 is electrically connected to the first high-voltage power-side inverter circuit element 1032, and the first low-voltage drive integrated circuit 1021 is electrically connected to the first low-voltage power-side inverter circuit element 1031.

[0145] Furthermore, the first driver integrated circuit 102 is electrically connected to some pins of a plurality of first driver-side pins 602. For example... Figure 3 As shown in the figure, the multiple pins shown within the dashed box A5 are multiple first drive-side pins 602. Specifically, the first high-voltage drive integrated circuit 1022 and the first low-voltage drive integrated circuit 1021 may be connected to at least one of the first drive-side pins 602 via leads.

[0146] like Figure 4 As shown, similar to the first inverter section, the second inverter section 201 is a compressor inverter section 203. The semiconductor device also includes a second drive integrated circuit 202, which is disposed on the second frame and electrically connected to the second inverter section. The second drive integrated circuit 202 may include a second low-voltage drive integrated circuit 2021 and a second high-voltage drive integrated circuit 2022. The compressor inverter section 203 may include a second low-voltage power-side inverter circuit element 2031 and a second high-voltage power-side inverter circuit element 2032.

[0147] The second driver integrated circuit 202 can be disposed on the second driver side pad 603. Correspondingly, the second low-voltage driver integrated circuit 2021 can be disposed on the second low-voltage driver side pad 6031, and the second high-voltage driver integrated circuit 2022 can be disposed on the second high-voltage driver side pad 6032.

[0148] The compressor inverter unit 203 can be disposed on the second power side pad 502. The second power side pad 502 includes a second low-voltage power side pad 5021 and a second high-voltage power side pad 5022. Specifically, the second low-voltage power side inverter circuit element 2031 can be disposed on the second low-voltage power side pad 5021, and the second high-voltage power side inverter circuit element 2032 can be disposed on the second high-voltage power side pad 5022.

[0149] In one example, in the first direction, the first low-voltage power side pad 5011, the first high-voltage power side pad 5012, the second low-voltage power side pad 5021, and the second high-voltage power side pad 5022 are arranged in sequence.

[0150] In some embodiments, the number of second low-voltage power-side inverter circuit elements 2031 can be multiple, and the number of second high-voltage power-side inverter circuit elements 2032 can also be multiple. The number of second low-voltage power-side pads 5021 can be multiple, for example, three. The number of second high-voltage power-side pads 5022 is at least one, for example, one.

[0151] The second driver integrated circuit 202 is electrically connected to a second inverter unit, such as a compressor inverter unit 203, for example, via a lead. The second driver integrated circuit 202 is also electrically connected to at least a portion of a plurality of second driver-side pins 604. Figure 4 As shown in the dashed box A6, the multiple pins within the dashed box A6 are the second driving side pins 604, which include multiple connection pins and pseudo pins.

[0152] Furthermore, in some embodiments, the multiple pins corresponding to the high-voltage drive side of the first inverter unit 101 and the multiple pins corresponding to the low-voltage drive side are independently and spaced apart in a first direction. For example, the multiple pins corresponding to the low-voltage drive side may specifically be multiple pins corresponding to the first low-voltage drive integrated circuit 1021 and / or the first low-voltage drive side pad 6011, and multiple pins corresponding to the first high-voltage drive integrated circuit 1022 and / or the first high-voltage drive side pad 6012. The term "corresponding" may refer to a corresponding distribution in a second direction or an electrical connection between the pins and the drive integrated circuit.

[0153] In some embodiments, the multiple pins corresponding to the high-voltage drive side of the second inverter unit 201 and the multiple pins corresponding to the low-voltage drive side are independently and spaced apart in a first direction. For example, the multiple pins corresponding to the low-voltage drive side may specifically be multiple pins corresponding to the second low-voltage drive integrated circuit 2021 and / or the second low-voltage drive side pad 6031, and multiple pins corresponding to the second high-voltage drive integrated circuit 2022 and / or the second high-voltage drive side pad 6032. The term "corresponding" may refer to a corresponding distribution in the second direction or an electrical connection between the pins and the drive integrated circuit.

[0154] In the embodiments described above, the semiconductor device may also integrate a PFC driver integrated circuit 302 and a power factor corrector 303. Unless otherwise specified, the PFC module mentioned below is an abbreviation for PFC driver integrated circuit and power factor corrector. The rectifier bridge 401 may include rectifier bridge pads 402 and rectifier chip 403.

[0155] A rectifier bridge 401 is formed by multiple rectifier diodes, for example, by combining four rectifier diodes spaced apart. The rectifier bridge composed of four rectifier diodes converts the input AC power into DC power and outputs it.

[0156] like Figure 2 As shown, the substrate 500 also has a third power side pad 503.

[0157] The drive-side frame 600 also includes a third frame (such as...) Figure 2 (The portion within the dashed box A4). The third frame includes a third driver-side pad 609 and multiple third driver-side pins 605. The PFC driver integrated circuit is disposed on the third driver-side pad 609, and the PFC driver integrated circuit 302 is disposed on the third frame, for example, on the third power-side pad 503.

[0158] like Figure 2 As shown, the PFC driver integrated circuit 302 is electrically connected to at least a portion of a plurality of third driver-side pins 605, for example, via wire connections. The power factor corrector 303 is electrically connected to the PFC driver integrated circuit 302.

[0159] The power factor corrector 303 includes a PFC power switch chip and a PFC diode. These components form part of the PFC circuit, which adjusts the power factor of the DC power supply and outputs the adjusted DC power. The PFC power switch chip can be composed of an insulated-gate bipolar transistor (IGBT) and a freewheeling diode (FRD), or it can be a metal-oxide-semiconductor field-effect transistor (MOS), or it can be an RC-IGBT (a reverse-conducting IGBT that integrates the IGBT and freewheeling diode onto a single chip).

[0160] Specifically, the connection method can be as follows: the gate lead of the power switching device (i.e., the PFC power switching chip) is connected to the gate jumper pad pseudo-pin P07 between pins 4 and 5. The PFC driver integrated circuit 302 is connected to the gate jumper pad pseudo-pin P07 via a lead, for example, to the end of the gate jumper pad pseudo-pin P07 near the PFC driver integrated circuit 302. The power factor corrector 303 is also connected to the gate jumper pad pseudo-pin P07 via a lead, thereby realizing the electrical connection between the power factor corrector 303 and the PFC driver integrated circuit 302. In some specific examples, the gate jumper pad pseudo-pin P07 is located outside the third driving side pad 609 and near the rectifier bridge side. It extends at least partially in the second direction toward the side away from the substrate, and the end near the third driving side pad 609 protrudes toward the side where the substrate is located to form the gate jumper pad. Both the PFC driver integrated circuit 302 and the power factor corrector 303 are electrically connected to the gate jumper pad via leads.

[0161] like Figure 2As shown, a rectifier bridge pad 402 is also provided on the substrate 500. A first power side pad 501, a second power side pad 502, a third power side pad 503, and the rectifier bridge pad 402 are spaced apart in a first direction. A rectifier pin frame corresponds to the rectifier bridge pad 402 in a second direction. The rectifier pin frame extends at least partially to the rectifier bridge pad 402. A rectifier chip 403 is provided on the rectifier bridge pad 402. The rectifier pin frame includes a fourth drive-side pin 606, which is electrically connected to the rectifier chip 403. For example, the rectifier pin frame includes two fourth drive-side pins 606. In other embodiments, the number of fourth drive-side pins 606 is not limited to two. It should be noted that in other embodiments, a PCB board can be used instead of the driver-side frame 600. The PCB board (i.e., printed circuit board) is encapsulated in a plastic package. The PCB board has driver-side pads, and driver-side pins are electrically connected to the PCB board (e.g., by soldering or other suitable methods). A driver integrated circuit is disposed on the driver-side pads, and the driver integrated circuit is electrically connected to the driver-side pins. The side of the PCB board used to house the driver integrated circuit can have various wiring and pad areas for placing the driver integrated circuit. The wiring can realize the electrical connection between each pad area and the corresponding driver-side pin or structure. Specifically, the structure of the PCB board can be reasonably selected according to actual needs, and no specific limitation is made here. The PCB board can realize the wiring and support of the driver integrated circuit, and the PCB board structure is simple and more friendly to packaging. In some examples, the driver-side pins and the corresponding driver-side pads on the PCB board can be electrically connected by means such as soldering, connector connection, bonding wire, or spring connection, and no specific limitation is made here.

[0162] A PCB (Printed Circuit Board) can be a substrate formed by patterning conductive copper foil on the surface of an insulating material (such as fiberglass, epoxy resin, etc.) to create electrical connections between electronic components. The PCB uses these copper foil lines to achieve electrical connections between electronic components and to support and fix the components on the board. Optionally, the PCB can be a single-sided, double-sided, or multi-sided PCB.

[0163] like Figure 2As shown, the semiconductor device also includes a molding compound 700. The molding compound 700 is used to encapsulate various integrated components, such as at least a portion of a substrate, a portion of a drive-side frame, a first inverter section (e.g., a fan inverter 103), a second inverter section (e.g., a compressor inverter 203), a power factor corrector 303, drive integrated circuits (e.g., a first drive integrated circuit, a second drive integrated circuit, and a PFC drive integrated circuit), and a rectifier bridge 401. In other words, the substrate 500, drive-side frame 600, first inverter section 101, second inverter section 201, power factor corrector 303, and rectifier bridge 401 are disposed within the molding compound 700. It should be noted that "located within the molding compound" means that at least a portion of one or more of the substrate 500, drive-side frame 600, first inverter section 101, second inverter section 201, power factor corrector 303, and rectifier bridge 401 is located within the molding compound 700 (or encapsulated by the molding compound), and at least a portion may be exposed from the molding compound; for example, at least a portion of the substrate may be exposed from the molding compound. Some drive-side pins are located outside the molding compound 700 to facilitate electrical connection between the connection pins (also referred to as connection pins) in the drive-side pins and external circuitry.

[0164] The molded enclosure 700 is obtained by mold encapsulation, which can be generated, for example, using thermosetting resin through transfer molding. The molded enclosure can be epoxy resin or other resin materials suitable for semiconductor module encapsulation. The two opposite sides of the molded enclosure in the second direction are the drive side and the power side (described in detail later). The molded enclosure can provide physical and electrical protection for at least a portion of the substrate, the first inverter section, the second inverter section, etc., encapsulated therein, to prevent damage to at least a portion of the substrate, the first inverter section (e.g., fan inverter section 103), the second inverter section (e.g., compressor inverter section 203), the power factor corrector 303, the rectifier bridge 401, and the drive integrated circuit, etc., caused by external environmental impacts, thereby ensuring the normal operation of the semiconductor device 100.

[0165] After packaging, multiple pins protrude from the molded enclosure, meaning multiple pins are located outside the molded enclosure. For example... Figure 5 As shown, on the driving side, along the direction of the arrow in the first direction, the exposed pins are as follows: multiple first driving side pins 602 (multiple pins within the dashed box A7), multiple second driving side pins 604 (multiple pins within the dashed box A8), multiple third driving side pins 605 (multiple pins within the dashed box A9), and two fourth driving side pins 606 (two pins within the dashed box A10).

[0166] like Figure 6 As shown in some embodiments, the pin numbers and definitions of the semiconductor device on the driving side are as shown in Table 1:

[0167] Table 1

[0168]

[0169]

[0170]

[0171] Pins numbered 28-45 are the first driver-side pins 602, which correspond to multiple pins of the first inverter section. Pins numbered 27-10 are the second driver-side pins 604, which correspond to multiple pins of the second inverter section. Pins numbered 9-3 are the third driver-side pins 605, which correspond to multiple pins of the PFC. Pins numbered 1-2 are the fourth driver-side pins 606 included in the rectifier pin frame, which are the two fourth driver-side pins 606 corresponding to the rectifier bridge 401.

[0172] The first and second frames described above have the same layout structure, and the pin types of their respective connection pins are arranged in the same way in the first direction. For details, please refer to Table 1 and the corresponding appendix. Figure 6 And so on. Furthermore, the distribution of the pseudo-pins is also basically the same.

[0173] The following is a reference to Table 1, Figures 2 to 9 The accompanying drawings illustrate, by way of example, the pin designs in the semiconductor devices proposed in some embodiments of this application.

[0174] like Figure 6 and Figure 9 As shown, the first frame includes a first inverter drive ground pin 440 (including a common power supply ground pin 44), the second frame includes a second inverter drive ground pin 250, and the third frame includes a PFC ground pin 8. The first inverter drive ground pin 440 is electrically connected to the first drive side pad 601, the second inverter drive ground pin 250 is electrically connected to the second drive side pad 603, and the PFC ground pin 8 is electrically connected to the third drive side pad 609. The first inverter drive ground pin 440, the second inverter drive ground pin 250, and the PFC ground pin 8 are spaced apart from each other.

[0175] Since the semiconductor device in this embodiment can be used in a variable frequency air conditioner, and the electromagnetic interference source load of a variable frequency air conditioner, the PFC typically outputs a high-frequency switching signal with a frequency range of 30-100kHz. If the first inverter drive ground pin 440, the second inverter drive ground pin 250, and the PFC ground pin 8 share a common ground, the ground potential difference among the three will be inconsistent due to the influence of ground loops. This will affect the sampling accuracy of the first inverter unit 101, the second inverter unit 201, and the PFC, and will also cause interference coupling between the first inverter unit 101, the second inverter unit 201, and the PFC. Therefore, in this embodiment, by setting the first inverter drive ground pin 440, the second inverter drive ground pin 250, and the PFC ground pin 8 to be spaced apart, that is, by eliminating the common ground frame, the ground loops between the various functional units are separated, avoiding the ground loops formed between the three due to the common ground. This addresses the issue of inconsistent ground potential differences among the three components, thereby improving sampling accuracy and reducing interference coupling. Furthermore, due to the significant difference in current-carrying capacity between the first inverter 101 and the second inverter 201, if they share a common ground, the inverter with stronger current-carrying capacity will interfere with the sampling of the inverter with weaker current-carrying capacity. For example, if one of the first inverter 101 and the second inverter 201 is a fan inverter and the other is a compressor inverter, the compressor current is typically tens of amperes, while the fan current is typically less than 1 ampere. The large difference in current between the two means that common-mode interference from the compressor will affect the fan sampling. If they share a common ground, the fan sampling will be affected. Therefore, by eliminating the common ground frame, the mutual interference between the first inverter 101 and the second inverter 201 can be reduced, thereby improving the overall reliability of the semiconductor device.

[0176] For example, one of the first inverter unit 101 and the second inverter unit 201 is a fan inverter unit 103 and the other is a compressor inverter unit 203. For example, the first inverter unit 101 is a fan inverter unit 103 and the second inverter unit 201 is a compressor inverter unit 203. The first inverter unit 101, the second inverter unit 201 and the power factor corrector 303 are arranged in sequence at intervals in the first direction. The first inverter drive ground pin 440, the second inverter drive ground pin 250 and the PFC ground pin 8 are arranged at intervals in the first direction. Arranging the modules along intervals can reduce electromagnetic interference from high-power modules (such as compressor inverters and PFC) to low-power modules (such as fan inverters), improve the circuit's anti-interference capability, and help improve the heat dissipation conditions of each functional module. The spacing of the first inverter drive ground pin 440, the second inverter drive ground pin 250, and the PFC ground pin can avoid interference from high-current modules (such as compressor inverters and PFC) to low-current modules (such as fan inverters), and can also avoid the problem of inconsistent ground potential differences among the three due to the ground loop formed between them by the common ground. This improves sampling accuracy, reduces interference coupling, and improves the stability of the entire device.

[0177] In some embodiments, such as Figure 3 As shown, the first driver integrated circuit 102 is disposed on the first driver side pad 601. The first inverter driver ground pin 440 includes a first inverter first driver ground pin portion 441 and / or a first inverter second driver ground pin portion 442. The first inverter first driver ground pin portion 441 is connected to the first driver side pad 601, and the first inverter second driver ground pin portion 442 is connected to the first driver side pad 601. For example, the first inverter driver ground pin 440 includes a first inverter first driver ground pin portion 441 and a first inverter second driver ground pin portion 442. The first inverter first driver ground pin portion 441 and the first inverter second driver ground pin portion 442 are respectively connected to the first driver side pad 601 (for example, respectively connected to the opposite ends of the first driver side pad 601 in the first direction), and are spaced apart in the first direction. The first inverter first driver ground pin portion 441 and the first inverter second driver ground pin portion 442 can provide better support for the first driver side pad 601, making the structure more stable.

[0178] For example, more specifically, the first drive-side pad 601 includes a first low-voltage drive-side pad 6011 and a first high-voltage drive-side pad 6012. The first low-voltage drive-side pad 6011 and the first high-voltage drive-side pad 6012 are spaced apart in a first direction and connected to each other by a first pad connection portion 444. A plurality of first drive-side pins are disposed on the outside of the first drive-side pad 601. The first drive integrated circuit 102 includes a first low-voltage drive integrated circuit 1021 and a first high-voltage drive integrated circuit 1022. The first low-voltage drive integrated circuit 1021 is disposed on the first low-voltage drive-side pad 6011, and the first high-voltage drive integrated circuit 1022 is disposed on the first high-voltage drive-side pad 6012. The first inverter first drive ground pin portion 441 is connected to the first low-voltage drive-side pad 6011 away from the first high-voltage drive-side pad 6012. More specifically, on one side of 12, the first inverter first drive ground pin portion 441 extends along a first direction and at least partially extends along a second direction toward the side away from the substrate, and the first inverter first drive ground pin portion 441 is connected to the side of the first low-voltage drive side pad 6011 away from the first high-voltage drive side pad 6012, and the first inverter second drive ground pin portion 442 is connected to the side of the first high-voltage drive side pad 6012 away from the first low-voltage drive side pad 6012 in a first direction. More specifically, both the first inverter first drive ground pin portion 441 and the first inverter second drive ground pin portion 442 extend along a first direction and at least partially extend along a second direction toward the side away from the substrate, and the first inverter second drive ground pin portion 442 is connected to the side of the first high-voltage drive side pad 6012 away from the first low-voltage drive side pad 6011 in a first direction.

[0179] It is worth mentioning that the first drive-side pad 601 and the first inverter drive ground pin 440 can be integrally formed, thereby enabling the first inverter drive ground pin 440 to better support the first drive side and ensure the stability of the structure. Alternatively, under certain conditions where support is not a consideration, the first drive-side pad 601 and the first inverter drive ground pin 440 can also be two independent structures, which can be electrically connected by leads.

[0180] One of the first inverter first drive ground pin portion 441 and the first inverter second drive ground pin portion 442 is a dummy pin (e.g., a dummy ground pin), and the other is a connection pin. In this case, the connection pin can refer to a pin used for connecting to the ground terminal. However, in the embodiments of this application, the connection pin refers to a pin used for connecting to external devices.

[0181] In some examples, multiple first drive-side pins are spaced apart in a first direction. These pins also include a fan over-temperature protection pin 45 and a fan over-current protection pin 43, both electrically connected to the first low-voltage drive integrated circuit 1021. A first inverter first drive ground pin 441 is positioned between the fan over-temperature protection pin 45 and the fan over-current protection pin 43. By placing the first inverter first drive ground pin 441 between the fan over-temperature protection pin 45 and the fan over-current protection pin 43, the circuit's anti-interference capability, stability, and reliability are significantly improved. This design not only simplifies the circuit layout but also enhances the system's protection functions, effectively improving overall system performance and user experience.

[0182] It is worth mentioning that the position and layout of the first inverter drive ground pin 440 can be reasonably set according to actual needs.

[0183] Furthermore, in some examples, such as Figure 3 As shown, the first inverter drive ground pin 440 includes a first inverter first drive ground pin portion 441, a first inverter second drive ground pin portion 442, and a first inverter third drive ground pin portion 443. The first inverter third drive ground pin portion 443 is connected to the first drive side pad 601. In a first direction, the first inverter first drive ground pin portion 441, the first inverter second drive ground pin portion 442, and the first inverter third drive ground pin portion 443 are spaced apart, and the first inverter third drive ground pin portion 443 is disposed between the first inverter first drive ground pin portion 441 and the first inverter second drive ground pin portion 442. The three inverter drive ground pin portions are spaced apart from each other and connected to the first drive side pad 601, forming a three-point support to better support the first drive side pad 601 and the first drive integrated circuit on it. Optionally, in the first direction, the distance between the third inverter drive pin portion and the first inverter first drive ground pin portion 441 is substantially the same as the distance between the third inverter drive pin portion and the first inverter second drive ground pin portion 442.

[0184] For example, the first inverter third drive ground pin portion 443 can be disposed at any suitable position between the first inverter first drive ground pin portion 441 and the first inverter second drive ground pin portion 442. For example, the first inverter third drive ground pin portion 443 can be connected to the side of the first low voltage drive side pad 6011 away from the substrate, or connected to the side of the first high voltage drive side pad 6012 away from the substrate, or connected to the side of the first pad connection portion 444 away from the substrate. The first inverter third drive ground pin portion 443 extends at least partially along the second direction towards the side away from the substrate. By disposing the first inverter third drive ground pin portion 443 in the above manner, the position of the first inverter third drive ground pin portion 443 can be made more reasonable, and the force among the three inverter drive ground pin portions can be relatively uniform, thereby providing better support for the drive side pads and devices connected to them, making the structure more stable.

[0185] In one example, the first inverter third drive ground pin 443 is disposed between the first low-voltage drive side pad 6011 and the first high-voltage drive side pad 6012, so that it can share the load-bearing stress in a relatively central area, thereby making the force among the three inverter drive ground pins relatively uniform, and thus providing better support for the drive side pads to which they are connected, making the structure more stable.

[0186] In one example, at least one of the first inverter first drive ground pin 441, the first inverter second drive ground pin 442, and the first inverter third drive ground pin 443 is a connection pin, and at least one is a dummy pin. For example, the first inverter first drive ground pin 441 is a connection pin, and the first inverter second drive ground pin 442 and the first inverter third drive ground pin 443 are dummy pins; or, the first inverter second drive ground pin 442 is a connection pin, the first inverter first drive ground pin 441 is a connection pin, and the first inverter third drive ground pin 443 is a dummy pin. Specifically, which pin is the connection pin and which is the dummy pin can be reasonably selected according to actual needs. By setting a dummy pin, the overall stress of the pins can be balanced, providing better support. Furthermore, by setting a dummy pin, the physical distance between the two connection pins separated by the dummy pin can be increased, thereby increasing the electrical insulation distance and weakening electric field coupling interference.

[0187] In one example, such as Figure 3 ,like Figure 6 He Ru Figure 9As shown, the first frame includes multiple first drive-side pins 602, including a first inverter drive power supply voltage pin 370. The first inverter drive power supply voltage pin 370 is electrically connected to the first drive integrated circuit 102. The first inverter drive power supply voltage pin 370 includes a first inverter high-side gate drive power supply voltage pin 37 (e.g., a wind turbine high-side gate drive power supply voltage pin) and a first inverter low-side gate drive power supply voltage pin 41 (e.g., a wind turbine low-side gate drive power supply voltage pin). The first inverter high-side gate drive power supply voltage pin 37 and the first inverter low-side gate drive power supply voltage pin 41 are independent of each other and are spaced apart laterally (one or more other first drive-side pins may also be spaced apart between them). Pin 602, the first inverter high-side gate drive supply voltage pin 37 is electrically connected to the first high-voltage drive integrated circuit 1022, thereby providing drive voltage to the power switch in the first high-voltage drive integrated circuit 1022 through an external circuit. The first inverter low-side gate drive supply voltage pin 41 is electrically connected to the first low-voltage drive integrated circuit 1021, thereby providing drive voltage to the power switch in the first low-voltage drive integrated circuit 1021 through an external circuit. By physically isolating the high-side and low-side power supply pins (lateral spacing), ground noise coupling can be reduced, power loop crosstalk can be avoided, and the risk of gate drive signal glitches can be significantly reduced, especially in high-frequency switching scenarios, thus improving the drive stability of the first inverter section 101.

[0188] Furthermore, in one example, the first inverter high-side gate drive supply voltage pin 37 includes a first inverter first supply voltage pin portion 371, a first inverter second supply voltage pin portion 372, and a first inverter third supply voltage pin portion 373 (i.e., pseudo-pin P03). A portion of the first inverter first supply voltage pin portion 371 extends in a first direction, and another portion of the first inverter first supply voltage pin portion 371 extends in a second direction. The first inverter first supply voltage pin portion 371 surrounds a portion of the first high-voltage drive side pad 6012 (e.g., at least surrounds the side of the first high-voltage drive side pad 6012 facing away from the substrate) and is spaced apart from the first high-voltage drive side pad 6012. The first inverter second supply voltage pin portion 372 and the first inverter third supply voltage pin portion 373 are respectively disposed on the first inverter first... Both ends of the power supply voltage pin portion 371 in the first direction, the first inverter second power supply voltage pin portion 372 and the first inverter third power supply voltage pin portion 373, extend along the second direction away from the substrate 500. When the first frame and the second frame are arranged alternately in the first direction, the first inverter third power supply voltage pin portion 373 is closer to the second frame along the first direction than the first inverter second power supply voltage pin portion 372. The first inverter low-side gate drive power supply voltage pin 41 is spaced apart from the side of the first inverter second power supply voltage pin portion 372 away from the second frame along the first direction. One of the first inverter second power supply voltage pin portion 372 and the first inverter third power supply voltage pin portion 373 is a dummy pin, and the other is a connection pin. For example, the first inverter third power supply voltage pin portion 373 is a dummy pin P03. Through the above scheme, the overall stress of the pins can be balanced, providing better support. Furthermore, by setting the dummy pin, the physical distance between the two connection pins separated by the dummy pin can be increased, reducing electric field coupling interference.

[0189] Next, some details of the second frame will be described. The second frame is basically the same as the first frame in terms of structure and layout.

[0190] In one example, such as Figure 4 , Figure 6 and Figure 9As shown, the second frame also includes a second driver-side pad 603, on which a second driver integrated circuit is disposed. The second inverter driver ground pin 250 includes a second inverter first driver ground pin 251 and / or a second inverter second driver ground pin 252. The second inverter first driver ground pin 251 is connected to the second driver-side pad 603, and the second inverter second driver ground pin 252 is also connected to the second driver-side pad 603. For example, the second inverter driver ground pin 250 may include a second inverter first driver ground pin 251 and a second inverter second driver ground pin 252, which are respectively connected to the second driver-side pad 603 (e.g., respectively connected to opposite ends of the second driver-side pad 603 in a first direction). The second inverter first driver ground pin 251 and the second inverter second driver ground pin 252 provide better support for the second driver-side pad 603 and its driver integrated circuit, making the structure more stable.

[0191] For example, more specifically, the second drive-side pad 603 includes a second low-voltage drive-side pad 6031, a second high-voltage drive-side pad 6032, and a second pad connection portion 194. The second low-voltage drive-side pad 6031 and the second high-voltage drive-side pad 6032 are spaced apart in a first direction and connected to each other via the second pad connection portion 194. The second drive integrated circuit includes a second low-voltage drive integrated circuit and a second high-voltage drive integrated circuit. The second low-voltage drive integrated circuit is disposed on the second low-voltage drive-side pad 6031, and the second high-voltage drive integrated circuit is disposed on the second high-voltage drive-side pad. The second inverter first drive ground pin 251 is connected to the second low-voltage drive-side pad 6031 and is located away from the second high-voltage drive-side pad. More specifically, the second inverter first drive... The ground pin 251 extends along a first direction and at least partially extends along a second direction toward the side away from the substrate. The second inverter first drive ground pin 251 is connected to the second low-voltage drive side pad 6031 on the side away from the second high-voltage drive side pad in the first direction. The second inverter second drive ground pin 252 is connected to the second high-voltage drive side pad and is away from the second low-voltage drive side pad 6031 in the first direction. More specifically, both the second inverter first drive ground pin 251 and the second inverter second drive ground pin 252 extend along a first direction and at least partially extend along a second direction toward the side away from the substrate. The second inverter second drive ground pin 252 is connected to the second high-voltage drive side pad on the side away from the second low-voltage drive side pad 6031 in the first direction. The first drive ground pin of the second inverter independently supports the low-voltage drive side pad, and the second drive ground pin of the second inverter independently supports the high-voltage drive side pad. This avoids stress concentration caused by using a single ground pin to support the pad. The second drive ground pin 251 and the second drive ground pin 252 of the second inverter form a multi-point support, which can better support the second drive side pad 603 and the drive integrated circuit on it, significantly improve the overall mechanical strength, and reduce pin deformation.

[0192] It is worth mentioning that the second drive-side pad 603 and the second inverter drive ground pin 250 can be integrally formed, thereby enabling the second inverter drive ground pin 250 to better support the second drive side and ensure the stability of the structure. Alternatively, without considering support, the first drive-side pad 601 and the first inverter drive ground pin 440 can also be two independent structures, which can be electrically connected by leads.

[0193] In the second inverter, one of the first drive ground pin 251 and the second drive ground pin 252 is a dummy pin (e.g., a dummy ground pin), and the other is a connection pin. In this case, the connection pin can refer to a pin used to connect to the ground terminal. However, in the embodiments of this application, the connection pin refers to a pin used to connect to external devices.

[0194] Furthermore, in some examples, such as Figure 4 As shown, the second inverter drive ground pin 250 includes a second inverter first drive ground pin 251, a second inverter second drive ground pin 252, and a second inverter third drive ground pin 253. The second inverter third drive ground pin 253 is connected to the second drive-side pad 603. In a first direction, the second inverter first drive ground pin 251, the second inverter second drive ground pin 252, and the second inverter third drive ground pin 253 are spaced apart, and the second inverter third drive ground pin 253 is located between the second inverter second drive ground pin 252 and the second inverter first drive ground pin 251. The three inverter drive ground pins are spaced apart from each other and connected to the second drive-side pad 603, forming a three-point support to better support the second drive-side pad 603 and the second drive integrated circuit on it. Optionally, in the first direction, the distance between the second inverter third drive ground pin 253 and the second inverter first drive ground pin 251 is substantially the same as the distance between the second inverter third drive ground pin 253 and the second inverter second drive ground pin 252.

[0195] For example, the second inverter third drive ground pin 253 can be disposed at any suitable position between the second inverter first drive ground pin 251 and the second inverter second drive ground pin 252. For example, the second inverter third drive ground pin 253 can be connected to the side of the second low-voltage drive side pad 6031 away from the substrate, or connected to the side of the second high-voltage drive side pad away from the substrate, or connected to the side of the second pad connection portion 194 away from the substrate. The second inverter third drive ground pin 253 extends at least partially along the second direction towards the side away from the substrate. By disposing the second inverter third drive ground pin 253 in the above manner, the position of the second inverter third drive ground pin 253 can be made more reasonable, and the force between the three inverter drive ground pin portions can be made relatively uniform, thereby providing better support for the drive side pads and devices connected to them, making the structure more stable.

[0196] In one example, the second inverter third drive ground pin 253 is located between the second low-voltage drive side pad 6031 and the second high-voltage drive side pad, so that it can share the load-bearing stress in a relatively central area, thereby making the force among the three inverter drive ground pins relatively uniform, and thus providing better support for the drive side pads to which they are connected, making the structure more stable.

[0197] In one example, at least one of the second inverter's first drive ground pin 251, second drive ground pin 252, and third drive ground pin 253 is a connection pin, and at least one is a dummy pin. For example, the second inverter's first drive ground pin 251 is a connection pin, and the second inverter's second drive ground pin 252 and third drive ground pin 253 are dummy pins; or, the second inverter's third drive ground pin 253 is a connection pin, the second inverter's first drive ground pin 251 is a connection pin, and the second inverter's second drive ground pin 252 is a dummy pin. The choice of which pin is a connection pin and which is a dummy pin can be made according to actual needs. By setting dummy pins, the overall stress on the pins can be balanced, providing better support. Furthermore, setting dummy pins can increase the physical distance between the two connection pins separated by the dummy pins, thereby increasing the electrical insulation distance and weakening electric field coupling interference.

[0198] In some examples, the second drive-side pad 603 includes a second low-voltage drive-side pad 6031 and a second high-voltage drive-side pad 6032. The second low-voltage drive-side pad 6031 and the second high-voltage drive-side pad 6032 are spaced apart in a first direction and connected to each other by a connecting portion. The second drive integrated circuit 202 includes a second low-voltage drive integrated circuit 2021 and a second high-voltage drive integrated circuit 2022. The second low-voltage drive integrated circuit 2021 is disposed on the second low-voltage drive-side pad 6031, and the second high-voltage drive integrated circuit 2022 is disposed on the second high-voltage drive-side pad 6032. The second frame also includes a second inverter drive power supply voltage lead. Pin 190, the second inverter drive power supply voltage pin 190 includes a second inverter high-side gate drive power supply voltage pin 19 (e.g., a compressor high-side gate drive power supply voltage pin) and a second inverter low-side gate drive power supply voltage pin 23 (e.g., a compressor low-side gate drive power supply voltage pin). The second inverter high-side gate drive power supply voltage pin 19 and the second inverter low-side gate drive power supply voltage pin 23 are independent of each other and spaced apart in a first direction. The second inverter high-side gate drive power supply voltage pin 19 is electrically connected to the second high-voltage drive integrated circuit 2022, and the second inverter low-side gate drive power supply voltage pin 23 is electrically connected to the second low-voltage drive integrated circuit 2021. Through this scheme, the high / low-side gate drive power supplies can be completely independent, avoiding mutual interference. Connecting the high-voltage drive IC to the high-side power supply (pin 19) and the low-voltage drive IC directly to the low-side power supply (pin 23) can shorten the current path and reduce transmission losses.

[0199] The structure of the second inverter high-side gate drive power supply voltage pin 19 can be reasonably arranged according to actual needs. In one example, the second inverter high-side gate drive power supply voltage pin 19 includes a second inverter first power supply voltage pin portion 191, a second inverter second power supply voltage pin portion 192, and a second inverter third power supply voltage pin portion 193. The second inverter first power supply voltage pin portion 191 extends in a first direction, a portion of the second inverter first power supply voltage pin portion 191 extends in a first direction, and another portion of the second inverter first power supply voltage pin portion 191 extends in a second direction. Furthermore, the second inverter first power supply voltage pin portion 191 surrounds a portion of the second high-voltage drive side pad 6032 and is spaced apart from the second high-voltage drive side pad 6032. The second inverter second power supply voltage pin portion 192 and the second inverter third power supply voltage pin portion 193 are respectively disposed on the second inverter first power supply voltage pin portion 191. The voltage pin portion 191 extends at both ends in the first direction. The second inverter second power supply voltage pin portion 192 and the second inverter third power supply voltage pin portion 193 both extend in the second direction towards the side away from the substrate. When the second frame and the third frame are adjacent, the second inverter second power supply voltage pin portion 192 is closer to the third frame in the first direction than the second inverter third power supply voltage pin portion 193. The PFC driver integrated circuit power supply voltage pin 9 extends in the second direction and is spaced apart from the second inverter second power supply voltage pin portion 192 on the side away from the first frame in the second direction. The second inverter low-side gate drive power supply voltage pin 23 is spaced apart from the second inverter third power supply voltage pin portion 193 on the side away from the third frame in the first direction. One of the second inverter second power supply voltage pin portion 192 and the second inverter third power supply voltage pin portion 193 is a dummy pin, and the other is a connection pin. This design balances the overall stress of the pins, providing better support. Furthermore, by setting dummy pins, the physical distance between the two connection pins separated by the dummy pins can be increased, reducing electric field coupling interference.

[0200] In some examples, continue as Figure 6 and Figure 9 As shown, the third frame includes a third driver-side pad 609, on which a PFC driver integrated circuit is disposed. A PFC ground pin 8 extends in a second direction and connects to the side of the third driver-side pad 609 facing away from the substrate in the second direction. Optionally, the PFC ground pin 8 and the third driver-side pad 609 can be integrally formed, or they can be electrically connected via leads. The PFC ground pin 8 provides a low-impedance ground loop for the PFC driver integrated circuit, preventing noise from coupling to other circuits through a shared ground. Furthermore, the PFC ground pin 8 provides support for the third driver-side pad 609 and the PFC driver integrated circuit, improving their mechanical stability.

[0201] Furthermore, in some examples, the PFC driver integrated circuit power supply voltage pin 9 extends in the second direction and is spaced apart in the first direction from the side of the PFC ground pin 8 facing the second frame. The PFC driver integrated circuit power supply voltage pin 9 is also spaced apart in the second direction from the side of the third driver side pad 609 facing away from the substrate. A clearance notch 6091 is provided on the side of the third driver side pad 609 facing away from the PFC ground pin 8 in the first direction. The clearance notch 6091 is located at the end of the third driver side pad 609 facing the adjacent PFC driver integrated circuit power supply voltage pin 9, and is adapted to avoid at least a portion of the PFC driver chip power supply voltage pin 9 adjacent to the substrate 500 in the second direction. Through this solution, the third driver side pad 609 protrudes towards the second frame side, and the clearance notch 6091 avoids the power supply voltage pin 9, reducing spatial conflicts between components and making the layout more compact.

[0202] In some examples, continue as Figure 6 and Figure 9 As shown, multiple third-drive-side pins include a PFC driver integrated circuit power supply voltage pin 9, a compressor drive power supply voltage pin, and a second high-voltage driver integrated circuit 2022 electrically connected. The PFC driver integrated circuit power supply voltage pin 9 is also electrically connected to the PFC driver integrated circuit 302. However, the compressor drive power supply voltage pin and the PFC driver integrated circuit power supply voltage pin 9 are electrically isolated. By electrically isolating the compressor drive power supply voltage pin and the PFC driver integrated circuit power supply voltage pin, mutual interference of power supply noise between the compressor drive integrated circuit and the PFC driver integrated circuit can be avoided, improving circuit stability. Optionally, the compressor drive power supply voltage pin and the PFC driver integrated circuit power supply voltage pin 9 are spaced apart and independent of each other in a first direction. This spacing increases the physical distance between the two pins, reduces power supply noise coupling, and further reduces mutual interference.

[0203] In one example, the aforementioned first inverter drive power supply voltage pin 370, second inverter drive power supply voltage pin 190, and PFC drive integrated circuit power supply voltage pin are spaced apart and electrically isolated in the first direction, which can reduce the mutual interference of power supply noise between the first drive integrated circuit, the second drive integrated circuit, and the PFC drive integrated circuit, and improve the stability of the circuit.

[0204] like Figure 5 As shown, on the driving side, in the first direction, there are two specifications of the multiple pins exposed from the plastic package: one is a long pin and the other is a short pin. The length of the part of the long pin outside the plastic package in the second direction is greater than the length of the part of the short pin outside the plastic package in the second direction, and the long pins and short pins are basically alternately distributed in the first direction.

[0205] For example, in some embodiments, at least a portion of the long and short pins of the plurality of first drive-side pins 602 corresponding to the first inverter 101 and the plurality of second drive-side pins 604 corresponding to the second inverter 201 are alternately distributed in a first direction.

[0206] Optionally, in some embodiments, the multiple pins exposed in the self-molding body 700 of the multiple third drive-side pins 605 corresponding to the PFC may have long pins and short pins, or they may be distributed alternately in the first direction. In other embodiments, the pins corresponding to the PFC may not distinguish between long pins and short pins, that is, they may not be designed in an alternating manner of long pins and short pins.

[0207] It should be noted that "long lead" and "short lead" refer to the lengths of the long and short leads exposed within the self-molding body differing in a second direction, while they may be the same length in other directions. For example, in some embodiments, such as... Figure 7 As shown, taking pin 602 as an example, a pin 602 has a chip holder 6021 and a curved portion 6022 that bends from the chip holder 6021 in a third direction, as well as an external pin portion 6023 connected to the curved portion. The difference between long pins and short pins is that the length of the chip holder 6021 is significantly different in the second direction, while the height in the third direction can be the same. The third direction is the Z-axis direction, or the height direction and thickness direction.

[0208] It should be noted that, Figure 5 , Figure 6 or Figure 7 The pins shown are for illustrative purposes only. Multiple long pins have the same size specifications, multiple short pins have the same size specifications, and the difference in length between the long and short pins in the second direction is fixed.

[0209] In other embodiments, the long pins can be further designed into various different size specifications, or the short pins can be further designed into various different size specifications. For example, a length threshold can be set, where pins with a length greater than or equal to the threshold in the second direction are defined as long pins, and pins with a length less than the threshold are defined as short pins. The difference between the lengths of the long pins and the short pins in the second direction is not unique and can have multiple values.

[0210] Furthermore, it should be noted that there are several ways to alternate between long and short pins, for example, as shown below. Figure 8a The diagram shows alternating long and short pins, meaning that in two adjacent pins, one is a long pin and the other is a short pin. Or, as shown... Figure 8b The alternating pattern of two long and two short lines shown, or it could be as follows: Figure 8c The alternation of two long and one short lines shown are just a few examples, not all of which will be listed individually.

[0211] The pins on the driver side of the semiconductor device can be used in one or more combinations of the exemplary alternation methods described above. In some embodiments, such as... Figure 2 , Figure 5 As shown, the multiple pins on the drive side all adopt an alternating pattern of one long and one short. In other embodiments, other alternating patterns can be used or different alternating patterns can be combined. For example, the multiple first drive-side pins 602 corresponding to the first inverter unit 101 can adopt an alternating pattern of one long and one short, while the multiple pins 605 corresponding to the PFC can adopt other alternating patterns such as two long and two short.

[0212] The driving side adopts an alternating design of long and short pins. By lengthening the distance between two adjacent pins in the vertical direction (second direction) and shortening the lateral distance between two adjacent pins in the horizontal direction (first direction), sufficient insulation distance can still be achieved between the two pins, enabling module miniaturization. Compared with multiple discrete devices, this integrated semiconductor device can reduce the area occupied on the control board and eliminates the need for multiple insertions.

[0213] Among them, adopt Figure 8a The alternation pattern shown, which uses an alternation of adjacent long and short pins, can save the space occupied by pins to the greatest extent while ensuring the insulation distance. For example, if there are more pins on the driver side, applying this design on the driver side can significantly affect the product size.

[0214] In some embodiments, pseudo-pins are used in the design of multiple pins on the driver side, and the multiple pins also include pins that can be used to connect to external circuits, which can be called multiple functional pin connection pins, such as those that can be used to electrically connect to a processor (e.g., an MCU) or a power supply.

[0215] A dummy pin is a pin that is not typically used for electrical connection to an external circuit. Dummy pins protrude from the outer surface of the plastic package (e.g., the outer peripheral side). Figure 5 As shown, the dummy lead protrudes from the outer surface of the molded body 700 because it is flush with or slightly protrudes from the outer surface of the molded body in the second direction. Alternatively, a small portion of the dummy lead protrudes from the molded body, and the exposed portion is shorter than that of the short lead, for example... Figure 6 As shown, pins that protrude from the plastic package but are not marked with pin numbers are dummy pins.

[0216] Furthermore, in some embodiments, among the plurality of first driving-side pins 602, there is at least one first pseudo-pin. The first pseudo-pin can be a pseudo-ground pin, and the two pins located on both sides of the pseudo-ground pin and adjacent to the pseudo-ground pin are two long pins. A pseudo-ground pin is a type of pseudo-pin that is electrically connected to a ground pin. For example, the first pseudo-pin is connected to the first driving-side pad 601, and the first inverter driving ground pin 440 is also electrically connected to the first driving-side pad 601. That is, the first pseudo-pin and the first inverter driving ground pin 440 are electrically connected through the first driving-side pad 601.

[0217] Optionally, the first pseudo pins (P01, P04) extend along a first direction and at least partially extend along a second direction away from the side of the substrate 500.

[0218] More specifically, if Figure 9 As shown, there are two first pseudo-pins. One first pseudo-pin P01 is connected to the first low-voltage drive side pad 6011, and the other first pseudo-pin P04 is connected to the first high-voltage drive side pad 6012 and is adjacent to the drive side pin (i.e. the second frame) of the second drive integrated circuit 202.

[0219] The multiple first drive-side pins also include a high-side gate drive power supply voltage pin 37 and a low-side input signal pin 38 of the fan, located on the side of the first low-voltage drive integrated circuit 1021 away from the substrate 500. A first pseudo-pin P01 is located between the high-side gate drive power supply voltage pin 37 and the low-side input signal pin 38, i.e. Figure 9 As shown, there is a first pseudo-pin P01 between pins 37 and 38. Both pins 37 and 38 are long pins. The setting of the first pseudo-pin widens the physical distance between the high-side gate drive power supply voltage pin and the low-side input signal pin of the fan, reduces the parasitic capacitance and inductance between the pins, reduces signal crosstalk, and effectively isolates the interference between the power supply voltage pin and the input signal pin, thereby improving the anti-interference capability of the circuit.

[0220] Similarly, in some embodiments, among the plurality of second drive-side pins 604, there is a pseudo-ground pin, and the two adjacent pins on either side of the pseudo-ground pin are both long pins. For example, as Figure 9 As shown, there is a second pseudo-pin P02 between pin 20 and pin 19. The second pseudo-pin P02 is a pseudo-ground pin, and the two pins 20 and 19 on both sides of it are long pins. The second pseudo-pin P02 is disposed in the first direction between the compressor high-side gate drive power supply voltage pin 19 and the compressor low-side gate drive power supply voltage pin 23, and extends in the second direction toward the side away from the substrate 500.

[0221] The pseudo-ground pin has long pins on both sides, which is compatible with the pin definitions of existing discrete smart power modules, making it easier for end users to route the external circuitry of highly integrated smart power modules. Furthermore, the pseudo-pins in this embodiment can also enhance the support for the solder pads.

[0222] To ensure the electrical clearance between the pins corresponding to the first inverter section 101 and the multiple pins corresponding to the second inverter section 201, at least one pseudo-pin is provided in the first direction at the junction of the first frame and the second frame of the drive side frame, or between the multiple first drive side pins 602 and the multiple second drive side pins 604 (i.e., the pseudo-pin closer to the second drive side pin 604 is a first pseudo-pin).

[0223] For example, such as Figure 9 As shown, the area between pin 28 and pin 27 is the boundary area between the first frame and the second frame. Two pseudo pins are designed here, namely pseudo pin P03 and pseudo pin P04.

[0224] For example, in some embodiments, dummy pin P03 and the first dummy pin P04 can be two dummy ground pins. Alternatively, in other embodiments, the first dummy pin P04 can be a dummy ground pin, and the dummy pin P03 can be a dummy pin for the high-side gate drive supply voltage. For example, as... Figure 9 As shown, the pseudo pin P03 can be a pseudo pin brought out from pin 37.

[0225] Adding a pseudo-pin between the two inverter sections can increase the insulation distance between them, thus ensuring the operational stability of the semiconductor device.

[0226] It should be noted that in some embodiments, in the first direction, the two pins distributed on both sides of at least one first pseudo-pin and closest to at least one first pseudo-pin are two short pins. For example, as Figure 9 As shown, pins 27 and 28 on both sides of pseudo-pin P03 and the first pseudo-pin P04 are short pins.

[0227] Optionally, in some embodiments, at least one pseudo-pin (defined as a second pseudo-pin to avoid confusion with the first pseudo-pin described above) may be designed between the second and third frames on the drive-side frame 600. In the first direction, at least one second pseudo-pin is distributed between a plurality of second drive-side pins and a plurality of third drive-side pins.

[0228] For example, such as Figure 9As shown, between pin 10 and pin 9, a pseudo-pin P05 and a second pseudo-pin P06 are designed. Pseudo-pin P05 is the high-side gate drive supply voltage pin, and the second pseudo-pin P06 is a pseudo-ground pin. In other embodiments, pseudo-pin P05 and the second pseudo-pin P06 can be two pseudo-ground pins. The second pseudo-pin P06 extends along a first direction and protrudes at least partially in a second direction away from the substrate 500. The second pseudo-pin P06 is also connected to the second high-voltage drive side pad 6032 and is adjacent to the third frame.

[0229] Unlike the pin length design on both sides of the pseudo-pin at the junction of the first and second frames, in the pin design at the junction of the second and third frames, in the first direction, the two pins distributed on both sides of the second pseudo-pin and closest to it are one short pin and one long pin, for example, as shown below. Figure 9 As shown, pins 10 and 9 are located on both sides of pseudo-pin P05 and the second pseudo-pin P06, where pin 9 is a long pin and pin 10 is a short pin.

[0230] like Figure 9 As shown, the drive-side frame also includes at least one second pseudo-pin, such as second pseudo-pins P02 and P06, which are connected to the second drive-side pad 603. By setting the second pseudo-pin, the isolation distance between pins can be widened, reducing parasitic capacitance and inductance between pins, decreasing signal crosstalk, and improving signal integrity. The second pseudo-pin and the compressor pin are implemented as pseudo-ground pins via the second drive-side pad 603. Setting the pseudo-ground pin provides an additional low-impedance grounding path for the circuit, helping to disperse grounding current and reduce grounding noise.

[0231] Furthermore, in some embodiments, the third frame has a gate lead pad dummy pin P07. In the first direction, two pins distributed on both sides of the gate lead pad dummy pin P07 and adjacent to the gate lead pad dummy pin P07 are a long pin and a short pin. For example, pin 5 on both sides of the gate lead pad dummy pin P07 is a long pin and pin 4 is a short pin.

[0232] In addition, in some embodiments, a groove design is used on the molding compound to further ensure electrical isolation between different pins.

[0233] Specifically, the semiconductor device also has a third direction, a first direction, a second direction, and the three directions being perpendicular to each other, such as... Figure 10As shown, the molding compound 700 has a first side 701 and a second side 702 disposed opposite to each other in a second direction. The first side 701 is the side closer to the drive-side frame, that is, the outer peripheral side where the drive-side pins extend. A groove 703 is provided on the first side of the molding compound 700. The groove 703 is recessed from the outer peripheral side of the molding compound into the molding compound along the second direction, and the groove 703 penetrates the molding compound 700 in a third direction. That is, the groove 703 extends into the molding compound to penetrate the two surfaces that are respectively connected to the outer peripheral side. In other words, the outer peripheral side and the two surfaces enclose the molding compound 700.

[0234] For example, at least in the boundary region between the first frame and the second frame, that is, at the location between a plurality of first driving-side pins and a plurality of second driving-side pins (e.g., the plurality of first driving-side pins include a plurality of first connecting pins, and the plurality of second driving-side pins include a plurality of second connecting pins, then a groove can be disposed between adjacent first connecting pins and second connecting pins), and furthermore, in the first direction, the groove 703 is spaced apart from at least one first dummy pin. For example, in combination with Figure 10 and Figure 9 As shown, the groove 703 is formed between the pseudo-pin P03 and pin 28, and the groove 703 is offset or spaced apart from the pseudo-pin P03 and P04 in the first direction.

[0235] Correspondingly, a groove can also be provided in the molding compound at the junction of the second and third frames, for example, a groove can be provided between pin 10 and pin 9. Figure 9 As shown, a groove 703 is provided on the first side 701 of the molding compound 700 between pin 9 and pin 10. It can be seen that the groove 703 between pin 10 and pin 9 is spaced apart from or offset from the pseudo pins P05 and P06 in the first direction.

[0236] Optional, such as Figure 9 As shown, in some embodiments, the location in the molding compound where a groove needs to be formed may include one or more of the following locations: between pin 34 and pin 33; between pin 32 and pin 31; between pin 30 and pin 29; between pin 16 and pin 15; between pin 14 and pin 13; between pin 12 and pin 11; between pin 3 and pin 2.

[0237] Figure 9 The grooves shown are merely an exemplary solution, and those skilled in the art can adapt the number of grooves to suit actual needs. By providing grooves between some adjacent pins, the surface current path between adjacent pins is lengthened, improving the creepage distance and clearance performance between adjacent pins, thereby enhancing the electrical isolation performance between pins.

[0238] Furthermore, the semiconductor device proposed in some embodiments of this application is designed in terms of the pin width and pin spacing of the pins of the rectifier bridge 401 relative to the pins of other regions.

[0239] Combination Figure 2 , Figure 5 and Figure 9 The rectifier bridge 401 corresponds to two fourth driver-side pins, namely pin 2 and pin 1. For example, if the width of each of the plurality of first driver-side pins 602 (pins 45-28) and the plurality of second driver-side pins 604 (pins 27-10) is equal, and the pin width is defined as b1, then the width of pin 2 and pin 1 is equal, and the width of pin 2 or pin 1 is defined as b2, where b2 ≥ 2b1. Figure 9 as well as Figure 2 In the example shown, b2 = 2b1; in other embodiments, b2 > 2b1.

[0240] Optionally, in some embodiments, the pin width of the multiple pins (pins 9-3) corresponding to the PFC can be b1. In other embodiments, the pin width of pins 9-3 may not be equal to b1.

[0241] Furthermore, regarding the spacing design, the spacing between any two adjacent pins in the plurality of first drive-side pins (pins 45-28) and the plurality of second drive-side pins (pins 27-10) is equal, defined as a1. Therefore, the spacing between pin 1 and pin 2 is a2, where a2 ≥ 5a1. Figure 9 In the exemplary scheme shown in the accompanying drawings, a2 = 5a1; in other embodiments, a2 > 5a1.

[0242] The pin width and spacing design of the rectifier bridge 401, compared to other areas, can enhance the stability of the overall semiconductor structure.

[0243] In some embodiments, the lead wire extends obliquely towards the side closer to the first inverter section 101 in the second direction relative to the lead solder joint, and an angle α is formed between the lead wire and the lead solder joint, where α satisfies the relationship: 120°≤α≤180°. By making this angle α satisfy the above relationship, it is easier to wire the lead wire, and it can also ensure the insulation distance between multiple lead wires, avoiding short circuits caused by the lead wires being too close together, which could damage the device.

[0244] It should be noted that the embodiments listed above are merely illustrative examples, and various other implementation schemes can be obtained based on the above description. For example, the first inverter unit 101 can be applied to equipment such as a fan, and the second inverter unit 201 can be applied to equipment such as a compressor. In other embodiments, an integrated scheme in which the first inverter unit 101 is applied to the compressor and the second inverter unit 201 is applied to the fan can be obtained through adaptive modifications, and the positions of the inverter units of the fan and the compressor can be interchanged. In the embodiments listed above, the semiconductor device can sequentially integrate a power module consisting of a fan inverter unit 103, a compressor inverter unit 203, a PFC, and a rectifier bridge 401. In other embodiments, a power module that sequentially integrates a compressor inverter unit 203, a fan inverter unit 103, a PFC, and a rectifier bridge 401 can also be used. In this layout, the relative positions of the functional circuits are distributed as follows: Figure 11 As shown, the first inverter unit 101 may include a compressor inverter unit 203, and the second inverter unit 201 may include a fan inverter unit 103.

[0245] Or, such as Figure 12 As shown, in some other embodiments, the PFC may also be disposed between the first inverter section and the second inverter section.

[0246] By adopting the above integration scheme, the long and short pins are distributed alternately, which can shorten the distance between two adjacent pins in the horizontal direction (first direction). At the same time, since the distance between two pins in the vertical direction (second direction) is lengthened, a certain electrical clearance distance can be provided between two adjacent pins. While shortening the horizontal distance, the electrical insulation effect between the pins can also be guaranteed, which is conducive to the miniaturization of the module and saves the occupied area.

[0247] Specifically, the integrated intelligent power module (i.e., semiconductor device) has a molded body with a length L1 in the first direction, which is less than or equal to 98 mm; and a molded body with a length L2 in the second direction, which is less than or equal to 65 mm. Compared to the four parts, namely the fan inverter 103, the compressor inverter 203, the PFC, and the rectifier bridge 401, which all use discrete components, this integrated solution achieves product miniaturization, saves the area occupied on the control board, and only requires one insertion, thus solving the problem of requiring multiple insertions.

[0248] In another aspect of this application, an electrical device is also provided, which includes the aforementioned semiconductor device. This electrical device can include household appliances such as electric fans, air conditioners, kitchen range hoods, high-speed hair dryers, washing machines, etc., and the semiconductor device can be used in the motor drive system of these household appliances. The electrical device can also be a new energy vehicle, industrial automation equipment, switching power supply, etc.

[0249] Semiconductor devices can be used in equipment such as air conditioners, taking air conditioners as an example.

[0250] The function of the rectifier bridge 401 in an air conditioner is to convert alternating current (AC) to direct current (DC). It is typically used in the power supply section to provide DC voltage to subsequent circuits such as the power factor corrector 303 and the inverter section. It includes diodes and other auxiliary components. For example, the rectifier bridge 401 includes four diodes. The input terminal of the rectifier bridge 401 is connected to the AC power supply, and its output terminal is connected to the input terminal of the power factor corrector 303 (PFC).

[0251] The power factor corrector 303 is used to improve the power factor by bringing the current and voltage closer in phase and reducing ineffective power. It includes power switching devices, such as insulated-gate bipolar transistors (IGBTs), for controlling the current waveform, and diodes for rectification. It receives the DC voltage output from the rectifier bridge 401 and, by controlling the current waveform, makes the input current and voltage in phase, thereby improving the power factor and reducing ineffective power and harmonic interference. The DC voltage output by the PFC is typically boosted to a higher stable value (e.g., 400V DC) to supply power to the subsequent inverter section. The input terminal of the power factor corrector 303 is connected to the output terminal of the rectifier bridge 401, and the output terminal of the power factor corrector 140 is connected to the DC bus of the fan inverter section 103 and the compressor inverter section 203.

[0252] The fan inverter unit 103 is typically used to drive the indoor and outdoor fan motors of an air conditioner. The fan inverter unit 103 includes multiple power switching devices, such as IGBT modules or metal-oxide-semiconductor field-effect transistors (MOSFETs). The input terminal of the fan inverter unit 103 is connected to a DC bus (shared with the output terminal of the PFC and the compressor inverter unit 203). The output terminal of the fan inverter unit 103 is connected to the fan motor. The fan inverter unit 103 converts DC power into variable frequency AC power to drive the indoor and outdoor fan motors of the air conditioner, thereby controlling the fan speed.

[0253] The compressor inverter 203 drives the air conditioner compressor and has a relatively high power rating. It includes power switching devices, such as IGBT modules, which integrate multiple IGBTs and freewheeling diodes, or IGBT modules that include multiple RC-IGBTs. The compressor inverter 203 is connected in parallel with the fan inverter 103 and also draws power from the DC bus. The input terminal of the compressor inverter 203 is connected to the DC bus, and the output terminal is connected to the compressor motor. The compressor inverter 203 converts DC power into variable frequency AC power to drive the air conditioner compressor motor. By controlling the power switching devices (such as IGBT modules) in the inverter, the frequency and voltage of the output AC power are adjusted, thereby controlling the compressor speed and cooling / heating capacity.

[0254] Since the electrical device of this application has the aforementioned semiconductor device, it also has the advantages of the aforementioned semiconductor device.

[0255] Although exemplary embodiments have been described herein with reference to the accompanying drawings, it should be understood that the above exemplary embodiments are merely illustrative and are not intended to limit the scope of this application. Various changes and modifications can be made therein by those skilled in the art without departing from the scope and spirit of this application. All such changes and modifications are intended to be included within the scope of this application as claimed in the appended claims.

[0256] Numerous specific details are set forth in the specification provided herein. However, it will be understood that embodiments of this application may be practiced without these specific details. In some instances, well-known methods, structures, and techniques have not been shown in detail so as not to obscure the understanding of this specification.

[0257] Similarly, it should be understood that, in order to streamline this application and aid in understanding one or more of the various inventive aspects, features of this application may sometimes be grouped together in a single embodiment, figure, or description thereof in the description of exemplary embodiments of this application. However, this approach should not be construed as reflecting an intention that the claimed application requires more features than are expressly recited in each claim. Rather, as reflected in the corresponding claims, its inventive point lies in solving the corresponding technical problem with features fewer than all features of a single disclosed embodiment. Therefore, the claims following the detailed description are hereby expressly incorporated into that detailed description, wherein each claim itself is a separate embodiment of this application.

[0258] Those skilled in the art will understand that, apart from the mutual exclusion of features, all features disclosed in this specification (including the accompanying claims, abstract, and drawings) and all processes or elements of any method or apparatus so disclosed can be combined in any combination. Unless otherwise expressly stated, each feature disclosed in this specification (including the accompanying claims, abstract, and drawings) may be replaced by an alternative feature serving the same, equivalent, or similar purpose.

[0259] Furthermore, those skilled in the art will understand that although some embodiments herein include certain features included in other embodiments but not others, combinations of features from different embodiments are intended to be within the scope of this application and form different embodiments. For example, in the claims, any of the claimed embodiments can be used in any combination.

[0260] It should be noted that the above embodiments are illustrative of this application and not restrictive of this application, and that those skilled in the art can devise alternative embodiments without departing from the scope of the appended claims.

Claims

1. A semiconductor device, characterized in that, The semiconductor device has a first direction and a second direction, the first direction and the second direction being perpendicular to each other, including: substrate; A first inverter section, a second inverter section, and a power factor corrector are disposed on the substrate; A drive-side frame is disposed on the outside of the substrate and spaced apart from at least a portion of the substrate in the second direction. The drive-side frame includes a first frame, a second frame, and a third frame spaced apart in the first direction. A first driver integrated circuit is disposed on the first frame and electrically connected to the first inverter unit; The second driver integrated circuit is disposed on the second frame and electrically connected to the second inverter section; The PFC driver integrated circuit is disposed on the third frame and electrically connected to the power factor corrector; The first frame includes a first inverter drive ground pin, and the first driver integrated circuit and the first inverter drive ground pin are electrically connected. The second frame includes a second inverter drive ground pin, and the second driver integrated circuit and the second inverter drive ground pin are electrically connected. The third frame includes a PFC ground pin, and the PFC ground pin and the PFC driver integrated circuit are electrically connected. The first inverter drive ground pin, the second inverter drive ground pin, and the PFC ground pin are spaced apart from each other and electrically isolated.

2. The semiconductor device as claimed in claim 1, characterized in that, The first frame further includes a first driver-side pad, the first driver integrated circuit is disposed on the first driver-side pad, and the first inverter driver ground pin includes a first inverter first driver ground pin portion and / or a first inverter second driver ground pin portion, the first inverter first driver ground pin portion is connected to the first driver-side pad, and the first inverter second driver ground pin portion is connected to the first driver-side pad.

3. The semiconductor device as claimed in claim 2, characterized in that, The first inverter drive ground pin includes a first inverter first drive ground pin portion, a first inverter second drive ground pin portion, and a first inverter third drive ground pin portion. The first inverter third drive ground pin portion is connected to the first drive side pad. In the first direction, the first inverter first drive ground pin portion, the first inverter second drive ground pin portion, and the first inverter third drive ground pin portion are spaced apart, and the first inverter third drive ground pin portion is disposed between the first inverter first drive ground pin portion and the first inverter second drive ground pin portion.

4. The semiconductor device as claimed in claim 2 or 3, characterized in that, The first driving-side pad includes a first low-voltage driving-side pad, a first high-voltage driving-side pad, and a first pad connection portion. The first low-voltage driving-side pad and the first high-voltage driving-side pad are spaced apart in the first direction and connected to each other through the first pad connection portion. The first driving integrated circuit includes a first low-voltage driving integrated circuit and a first high-voltage driving integrated circuit. The first low-voltage driving integrated circuit is disposed on the first low-voltage driving-side pad, and the first high-voltage driving integrated circuit is disposed on the first high-voltage driving-side pad. The first inverter first drive ground pin is connected to the side of the first low-voltage drive side pad that is away from the first high-voltage drive side pad in a first direction, and the first inverter second drive ground pin is connected to the side of the first high-voltage drive side pad that is away from the first low-voltage drive side pad in a first direction.

5. The semiconductor device as claimed in claim 4, characterized in that, The third drive ground pin of the first inverter is disposed between the first low-voltage drive side pad and the first high-voltage drive side pad.

6. The semiconductor device as claimed in claim 5, characterized in that, The first inverter third drive ground pin is connected to the side of the first low-voltage drive side pad away from the substrate, or to the side of the first high-voltage drive side pad away from the substrate, or to the side of the first pad connection portion away from the substrate, and the first inverter third drive ground pin extends at least partially along the second direction towards the side away from the substrate.

7. The semiconductor device according to any one of claims 3 to 6, characterized in that, At least one of the first inverter first drive ground pin, the first inverter second drive ground pin, and the first inverter third drive ground pin is a connection pin, and at least one is a pseudo pin.

8. The semiconductor device according to any one of claims 1 to 7, characterized in that, The second frame further includes a second driver-side pad, the second driver integrated circuit is disposed on the second driver-side pad, the second inverter driver ground pin includes a second inverter first driver ground pin and / or a second inverter second driver ground pin, the second inverter first driver ground pin is connected to the second driver-side pad, and the second inverter second driver ground pin is connected to the second driver-side pad.

9. The semiconductor device as claimed in claim 8, characterized in that, The second inverter drive ground pin includes a second inverter first drive ground pin, a second inverter second drive ground pin, and a second inverter third drive ground pin. The second inverter third drive ground pin is connected to the second drive side pad. In the first direction, the second inverter first drive ground pin, the second inverter second drive ground pin, and the second inverter third drive ground pin are spaced apart, and the second inverter third drive ground pin is located between the second inverter second drive ground pin and the second inverter first drive ground pin.

10. The semiconductor device as claimed in claim 9, characterized in that, The second driving-side pad includes a second low-voltage driving-side pad, a second high-voltage driving-side pad, and a second pad connection portion. The second low-voltage driving-side pad and the second high-voltage driving-side pad are spaced apart in the first direction and connected to each other via the second pad connection portion. The second driving integrated circuit includes a second low-voltage driving integrated circuit and a second high-voltage driving integrated circuit. The second low-voltage driving integrated circuit is disposed on the second low-voltage driving-side pad, and the second high-voltage driving integrated circuit is disposed on the second high-voltage driving-side pad. The second inverter first drive ground pin is connected to the side of the second low-voltage drive side pad that is away from the second high-voltage drive side pad in a first direction, and the second inverter second drive ground pin is connected to the side of the second high-voltage drive side pad that is away from the second low-voltage drive side pad in a first direction.

11. The semiconductor device as claimed in claim 10, characterized in that, The second inverter third drive ground pin is located between the second low-voltage drive side pad and the second high-voltage drive side pad.

12. The semiconductor device as claimed in claim 11, characterized in that, The second inverter third drive ground pin is connected to the side of the second low-voltage drive side pad away from the substrate, or connected to the side of the second high-voltage drive side pad away from the substrate, or connected to the side of the second pad connection portion away from the substrate, and the second inverter third drive ground pin extends at least partially along the second direction towards the side away from the substrate.

13. The semiconductor device as claimed in any one of claims 8 to 12, characterized in that, At least one of the second inverter first drive ground pin, the second inverter second drive ground pin, and the second inverter third drive ground pin is a connection pin, and at least one is a pseudo pin.

14. The semiconductor device according to any one of claims 1 to 13, characterized in that, The third frame includes a third driving side pad, the PFC driver integrated circuit is disposed on the third driving side pad, the PFC ground pin extends in the second direction, and the PFC ground pin is connected to the side of the third driving side pad away from the substrate.

15. The semiconductor device according to any one of claims 1 to 14, characterized in that, The first frame includes a first inverter drive power supply voltage pin, which is electrically connected to the first driver integrated circuit. The second frame includes a second inverter drive power supply voltage pin, which is electrically connected to the second driver integrated circuit. The third frame includes a PFC driver integrated circuit power supply voltage pin, which is electrically connected to the PFC driver integrated circuit. The first inverter drive power supply voltage pin, the second inverter drive power supply voltage pin, and the PFC drive integrated circuit power supply voltage pin are spaced apart and electrically isolated in the first direction.

16. The semiconductor device as claimed in claim 15, characterized in that, The first driving integrated circuit includes a first low-voltage driving integrated circuit and a first high-voltage driving integrated circuit, which are spaced apart in a first direction. The first inverter driving power supply voltage pin includes a first inverter high-side gate driving power supply voltage pin and a first inverter low-side gate driving power supply voltage pin, which are independent of each other and spaced apart in a first direction. The first inverter high-side gate driving power supply voltage pin is electrically connected to the first high-voltage driving integrated circuit, and the first inverter low-side gate driving power supply voltage pin is electrically connected to the first low-voltage driving integrated circuit.

17. The intelligent power module according to claim 16, characterized in that, The first frame includes a first driver-side pad, which includes a first low-voltage driver-side pad, a first high-voltage driver-side pad, and a first pad connection portion. The first low-voltage driver-side pad and the first high-voltage driver-side pad are spaced apart in the first direction and connected to each other via the first pad connection portion. The first low-voltage driver integrated circuit is disposed on the first low-voltage driver-side pad, and the first high-voltage driver integrated circuit is disposed on the first high-voltage driver-side pad. The first inverter high-side gate drive supply voltage pin includes a first inverter first supply voltage pin portion, a first inverter second supply voltage pin portion, and a first inverter third supply voltage pin portion. A portion of the first inverter first supply voltage pin portion extends in a first direction, and another portion of the first inverter first supply voltage pin portion extends in a second direction. The first inverter first supply voltage pin portion surrounds a portion of the first high-voltage drive side pad and is spaced apart from the first high-voltage drive side pad. The first inverter second supply voltage pin portion and the first inverter third supply voltage pin portion are respectively disposed at both ends of the first inverter first supply voltage pin portion in the first direction. Both the first inverter second supply voltage pin portion and the first inverter third supply voltage pin portion extend in the second direction towards the side opposite to the substrate. Among them, one of the first inverter second power supply voltage pin section and the first inverter third power supply voltage pin section is a pseudo pin, and the other is a connection pin.

18. The semiconductor device according to any one of claims 1 to 17, characterized in that, The second frame also includes a second inverter drive power supply voltage pin, and the second drive integrated circuit includes a second low-voltage drive integrated circuit and a second high-voltage drive integrated circuit. The second inverter drive power supply voltage pin includes a second inverter high-side gate drive power supply voltage pin and a second inverter low-side gate drive power supply voltage pin. The second inverter high-side gate drive power supply voltage pin and the second inverter low-side gate drive power supply voltage pin are independent of each other and are spaced apart in a first direction. The second inverter high-side gate drive power supply voltage pin is electrically connected to the second high-voltage drive integrated circuit, and the second inverter low-side gate drive power supply voltage pin is electrically connected to the second low-voltage drive integrated circuit.

19. The semiconductor device as claimed in claim 18, characterized in that, The second frame includes a second driver-side pad, which comprises a second low-voltage driver-side pad, a second high-voltage driver-side pad, and a second pad connection portion. The second low-voltage driver-side pad and the second high-voltage driver-side pad are spaced apart in the first direction and connected to each other via the second pad connection portion. The second low-voltage driver integrated circuit is disposed on the second low-voltage driver-side pad, and the second high-voltage driver integrated circuit is disposed on the second high-voltage driver-side pad. The second inverter high-side gate drive supply voltage pin includes a second inverter first supply voltage pin portion, a second inverter second supply voltage pin portion, and a second inverter third supply voltage pin portion. A portion of the second inverter first supply voltage pin portion extends in the first direction, and another portion extends in the second direction. The second inverter first supply voltage pin portion surrounds a portion of the second high-voltage drive side pad and is spaced apart from the second high-voltage drive side pad. The second inverter second supply voltage pin portion and the second inverter third supply voltage pin portion are respectively located at both ends of the second inverter first supply voltage pin portion in the first direction. Both the second inverter second supply voltage pin portion and the second inverter third supply voltage pin portion extend in the second direction towards the side opposite to the substrate. One of the second inverter's second power supply voltage pin section and the second inverter's third power supply voltage pin section is a pseudo pin, and the other is a connection pin.

20. The semiconductor device according to any one of claims 1 to 19, characterized in that, The first inverter, the second inverter, and the power factor corrector are arranged sequentially at intervals in a first direction. In the second direction, the first frame corresponds at least partially to the first inverter, the second frame corresponds at least partially to the second inverter, and the third frame corresponds at least partially to the power factor corrector.

21. The semiconductor device according to any one of claims 1 to 20, characterized in that, Also includes: A rectifier bridge, wherein the rectifier bridge is disposed on the substrate; A plastic package encapsulates the first inverter section, the second inverter section, the power factor corrector and the rectifier bridge, at least a portion of the substrate, and a portion of the drive-side frame, with some of the drive-side pins located outside the plastic package.

22. An electrical appliance, characterized in that, The semiconductor device includes any one of claims 1-21.

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