Offshore wind power MMC submodule control optimization method, system, equipment and medium

Abstract

The invention relates to the technical field of offshore wind power flexible direct current power transmission, in particular to an offshore wind power MMC submodule control optimization method, system and device and a medium, and the method comprises the steps: determining the switching number of submodules according to a bridge arm reference voltage; obtaining capacitor voltages of the bridge arm sub-modules, and sorting and numbering the capacitor voltages by adopting a mixed sorting method; acquiring bridge arm voltage and current, calculating bridge arm power and judging charging and discharging states; according to the bridge arm power and the charging and discharging state, determining the serial numbers of sub-modules which are completely input and input by pulse width modulation (PWM); and determining a driving signal of the sub-module by adopting a hybrid switching modulation method combining PWM (Pulse Width Modulation) and nearest level approximation, and controlling the sub-module by using the driving signal. The method has the advantages that the time complexity is low, the sorting efficiency is high, the hardware cost is reduced, the sub-module faults can be handled, and the MMC can guarantee the good transient response under the condition of fault ride-through.

Description

Technical Field

[0001] This invention relates to the field of flexible DC transmission technology for offshore wind power, and in particular to a method, system, equipment and medium for controlling and optimizing MMC submodules in offshore wind power. Background Art

[0002] Flexible DC transmission systems (VSC-HVDC) based on voltage source converters have become a key technology for grid connection of new energy sources due to their significant advantages, including independent and rapid control of active and reactive power, no risk of commutation failure, and ability to supply power to passive networks. Early VSC-HVDC projects mainly used two-level or three-level voltage source converters. However, with the continuous increase in transmission voltage levels and transmission capacity, these traditional converters face problems such as difficulty in withstand voltage and series voltage equalization, severe electromagnetic interference, and high harmonic content in high-voltage, high-power applications. To address the limitations of traditional converters, modular multilevel converters (MMCs) have become the mainstream topology for modern flexible DC transmission, especially in high-voltage, high-capacity, and long-distance offshore wind power transmission. Their topology is as follows: Figure 1 As shown.

[0003] Each phase unit of an MMC consists of two arms, one above the other. Each arm is composed of numerous structurally identical sub-modules connected in series with an arm reactor. This modular design provides high redundancy, fault tolerance, and excellent scalability and flexibility. Common modulation strategies for MMCs can be categorized into space vector modulation, multi-carrier modulation, and stepped-wave modulation, with stepped-wave modulation including nearest-level modulation (NLM). NLM directly calculates the total number of sub-modules that need to be operational at the current moment based on the instantaneous value of the modulated wave, and uses a specific sorting algorithm to determine which specific sub-modules are engaged or disengaged, thereby maintaining capacitor voltage balance among the sub-modules. Traditional nearest-level modulation approximates the reference waveform with a finite level, resulting in significant errors. Furthermore, as the transmission voltage level increases, the number of sub-modules requiring operation also increases, causing the computational load of traditional sorting methods to grow exponentially. This makes it difficult for the controller to complete calculations, delaying other control tasks, and even leading to output waveform distortion and capacitor voltage runaway.

[0004] The information disclosed in this background section is intended only to enhance the understanding of the general background of the invention and should not be construed as an admission or in any way implying that the information constitutes prior art known to those skilled in the art. Summary of the Invention

[0005] This invention provides a method, system, equipment, and medium for optimizing the control of offshore wind power MMC submodules, thereby effectively solving the problems in the background art.

[0006] To achieve the above objectives, the technical solution adopted by this invention is: a method for optimizing the control of offshore wind power MMC submodules, comprising the following steps:

[0007] The number of submodules to be switched is determined based on the average value of the bridge arm reference voltage and the capacitor voltage.

[0008] Obtain the capacitor voltage of the bridge arm submodule, and sort and number the capacitor voltage using a hybrid sorting method;

[0009] Obtain bridge arm voltage and current, calculate bridge arm power, and determine charging and discharging status;

[0010] The submodule numbers for full engagement and pulse width modulation (PWM) engagement are determined based on the bridge arm power and charging / discharging status.

[0011] A hybrid switching modulation method combining PWM and nearest-level approximation is used to determine the drive signal of the submodule, and the drive signal is used to control the submodule.

[0012] Furthermore, the hybrid sorting method includes:

[0013] When the total number of submodules n is less than or equal to a preset threshold, binary insertion sort is used;

[0014] Otherwise, use insertion sort.

[0015] Furthermore, the insertion sort is used to sort and number the capacitor voltages, including the following steps:

[0016] Divide the capacitor voltages of all submodules into two parts: sorted and unsorted.

[0017] The capacitor voltage is compared sequentially with the sorted voltage in the unsorted part and then inserted into the sorted part.

[0018] Ensure that the sorted portion is in ascending order until the unsorted portion is completely inserted into the sorted portion.

[0019] Furthermore, the binary insertion sort is used to sort and number the capacitor voltages, including the following steps:

[0020] Divide the capacitor voltages of all submodules into two parts: sorted and unsorted.

[0021] Starting with the first voltage value of the unsorted submodule, the current capacitor voltage is used as the value to be inserted sequentially.

[0022] Binary search is used to quickly locate the first insertion position that is greater than the value to be inserted in the sorted interval. Then, the capacitor voltage after the insertion position is shifted one position to the right to make room.

[0023] Finally, place the voltage of the submodule to be inserted into the vacated space, and repeat this process until the unsorted part is completely inserted into the sorted part.

[0024] Furthermore, determining the number of submodules to be switched based on the average value of the bridge arm reference voltage and the capacitor voltage includes the following steps:

[0025] The current bridge arm voltage reference value v is obtained from the control loop. ref ;

[0026] The bridge arm voltage reference value v ref The average voltage v of the current bridge arm submodule capacitor avg Divide the two numbers and round down to get the number of submodules m that the current bridge arm needs to be fully engaged.

[0027] Furthermore, determining the submodule numbers for full engagement and PWM engagement based on the bridge arm power and charging / discharging state includes the following steps:

[0028] Obtain the arm current value and its direction, and obtain the arm power based on the arm voltage reference value and the arm current;

[0029] The charging and discharging status of the bridge arm is determined by the positive or negative power of the bridge arm, and the switching sequence of the sub-modules is determined based on the charging and discharging status.

[0030] When the bridge arm is in the charging state, the m+1 sub-modules with the lowest voltage at that time are activated;

[0031] When the bridge arm is in a discharging state, the m+1 sub-modules with the highest voltage at that time are activated.

[0032] Furthermore, the step of determining the submodule number for full engagement and PWM engagement based on the bridge arm power and charging / discharging state includes:

[0033] The first m sub-modules are fully engaged, and the (m+1)th sub-module is engaged via PWM.

[0034] Furthermore, the method of determining the drive signal of the submodule using a hybrid switching modulation method combining PWM and nearest-level approximation includes:

[0035] For fully engaged submodules, turn them on directly; for PWM-engaged submodules, drive the corresponding switching transistors according to the duty cycle signal.

[0036] For a submodule in PWM mode, the duty cycle is calculated as D = (v ref -m*vavg ) / v avg ;

[0037] In the formula, v ref This is the reference value for the bridge arm voltage; v avg is the average capacitor voltage of the current bridge arm submodule; m is the number of submodules that the bridge arm needs to fully engage.

[0038] Further, the step of driving the corresponding switching transistor according to the duty cycle signal includes:

[0039] Let D be (v ref -m*v avg ) / v avg ;

[0040] When v ref -m*v avg When the value is greater than 0, the switching transistor T1 of the PWM input submodule is normally on, the switching transistor T2 is normally off, the duty cycle of the switching transistor T3 is 1-D, and the duty cycle of the switching transistor T4 is D.

[0041] When v ref -m*v avg When <0, the switching transistor T1 of the PWM input submodule is normally off, the switching transistor T2 is normally on, the duty cycle of the switching transistor T3 is D, and the duty cycle of the switching transistor T4 is 1-D.

[0042] The present invention also includes an offshore wind power MMC submodule control optimization system, using the method described above, the system comprising:

[0043] The switching quantity calculation unit is used to determine the switching quantity of the submodule based on the bridge arm reference voltage and the average value of the capacitor voltage.

[0044] A hybrid sorting unit is used to obtain the capacitor voltage of the bridge arm submodule and sort and number the capacitor voltage using a hybrid sorting method.

[0045] The charging and discharging determination unit is used to acquire the voltage and current of the bridge arm, calculate the power of the bridge arm, and determine the charging and discharging status.

[0046] The modulation determination unit is used to determine the number of the sub-module that is fully engaged and pulse width modulation (PWM) engaged based on the bridge arm power and charging / discharging state.

[0047] The modulation unit is used to determine the drive signal of the submodule using a hybrid switching modulation method that combines PWM and nearest-level approximation, and to control the submodule using the drive signal.

[0048] The present invention also includes a computer device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor, when executing the computer program, implements the method as described above.

[0049] The present invention also includes a storage medium having a computer program stored thereon, which, when executed by a processor, implements the method as described above.

[0050] The beneficial effects of this invention are as follows: By employing a hybrid sorting method to sort and number capacitor voltages, the hybrid sorting is more flexible and can switch to the optimal sorting mode according to changes in the number of submodules. It has lower time complexity, higher sorting efficiency, and reduces hardware costs. Furthermore, it can handle situations where the number of available submodules in the bridge arm changes due to submodule failure, which is beneficial for the MMC to maintain a better transient response during fault ride-through. The numbering of submodules that are fully engaged and those engaged by pulse width modulation (PWM) is determined based on the bridge arm power and charging / discharging state. A hybrid switching modulation method combining PWM and nearest-level approximation is used to determine the drive signal of the submodule. The hybrid modulation strategy can reduce the gap between the reference value and the actual output value in the traditional nearest-level approximation method through PWM modulation, thereby reducing the error caused by the modulation strategy in MMC control. Attached Figure Description

[0051] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments recorded in the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0052] Figure 1 This is a schematic diagram of a modular multilevel converter structure.

[0053] Figure 2 This is a flowchart of the method in Example 1;

[0054] Figure 3 This is a schematic diagram of the system structure in Example 1;

[0055] Figure 4 This is an overall flowchart of the method in Example 2;

[0056] Figure 5 This is a flowchart of the insertion sort process in Example 2;

[0057] Figure 6 This is a flowchart of the binary insertion sort method in Example 2;

[0058] Figure 7 This is a flowchart illustrating the PWM input module drive signal generation process in the modulation strategy of Example 2.

[0059] Figure 8This is a simulation graph showing the running time of the insertion method and the binary insertion method in Example 2 with different numbers of submodules;

[0060] Figure 9 This is a simulation comparison of the running time of hybrid sorting, bucket sorting, and three-way quicksort in Example 2;

[0061] Figure 10 This is a comparison chart of the sorting process in Example 2 using PWM combined with nearest-level approximation and the traditional nearest-level approximation.

[0062] Figure 11 This is a schematic diagram of the structure of a computer device. Detailed Implementation

[0063] The technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present invention. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments.

[0064] Example 1:

[0065] like Figure 2 As shown: A method for optimizing the control of an offshore wind power MMC submodule includes the following steps:

[0066] The number of submodules to be switched is determined based on the average value of the bridge arm reference voltage and the capacitor voltage.

[0067] Obtain the capacitor voltage of the bridge arm submodule, and sort and number the capacitor voltage using a hybrid sorting method;

[0068] Obtain bridge arm voltage and current, calculate bridge arm power, and determine charging and discharging status;

[0069] The numbering of the sub-modules that are fully engaged and those that are engaged via pulse width modulation (PWM) is determined based on the bridge arm power and charging / discharging status.

[0070] A hybrid switching modulation method combining PWM and nearest-level approximation is used to determine the drive signal of the submodule, and the drive signal is used to control the submodule.

[0071] By employing a hybrid sorting method to sort and number capacitor voltages, hybrid sorting is more flexible than traditional sorting methods. It can switch to the optimal sorting mode according to changes in the number of submodules, has lower time complexity, higher sorting efficiency, and reduces hardware costs. Furthermore, it can handle situations where the number of available submodules in the bridge arm changes due to submodule failure, which is beneficial for ensuring better transient response of the MMC during fault ride-through. The numbering of submodules that are fully engaged and those engaged by pulse width modulation (PWM) is determined based on the bridge arm power and charging / discharging state. A hybrid switching modulation method combining PWM and nearest-level approximation is used to determine the drive signal of the submodule. The hybrid modulation strategy can reduce the gap between the reference value and the actual output value in the traditional nearest-level approximation method through PWM modulation, thereby reducing the error caused by the modulation strategy in MMC control.

[0072] In this embodiment, the hybrid sorting method includes:

[0073] When the total number of submodules n is less than or equal to a preset threshold, binary insertion sort is used;

[0074] Otherwise, use insertion sort.

[0075] The process of sorting and numbering capacitor voltages using insertion sort includes the following steps:

[0076] Divide the capacitor voltages of all submodules into two parts: sorted and unsorted.

[0077] The capacitor voltage is compared sequentially with the sorted voltage in the unsorted part and then inserted into the sorted part.

[0078] Ensure that the sorted portion is in ascending order until the unsorted portion is completely inserted into the sorted portion.

[0079] The binary insertion sort is used to sort and number the capacitor voltages, including the following steps:

[0080] Divide the capacitor voltages of all submodules into two parts: sorted and unsorted.

[0081] Starting with the first voltage value of the unsorted submodule, the current capacitor voltage is used as the value to be inserted sequentially.

[0082] Binary search is used to quickly locate the first insertion position that is greater than the value to be inserted in the sorted interval. Then, the capacitor voltage after the insertion position is shifted one position to the right to make room.

[0083] Finally, place the voltage of the submodule to be inserted into the vacated space, and repeat this process until all the unsorted parts are inserted into the sorted parts.

[0084] In this embodiment, the number of submodules to be switched is determined based on the average value of the bridge arm reference voltage and the capacitor voltage, including the following steps:

[0085] The current bridge arm voltage reference value v is obtained from the control loop. ref ;

[0086] The bridge arm voltage reference value v ref The average voltage v of the current bridge arm submodule capacitor avg Divide the two numbers and round down to get the number of submodules m that the current bridge arm needs to be fully engaged.

[0087] The process of determining the sub-module numbers for full engagement and PWM engagement based on bridge arm power and charging / discharging status includes the following steps:

[0088] Obtain the arm current value and its direction, and obtain the arm power based on the arm voltage reference value and the arm current;

[0089] The charging and discharging status of the bridge arm is determined by the positive or negative power of the bridge arm, and the switching sequence of the sub-modules is determined based on the charging and discharging status.

[0090] When the bridge arm is in the charging state (bridge arm power p>0), the m+1 sub-modules with the lowest voltage at this time are activated;

[0091] When the bridge arm is in a discharging state (bridge arm power p<0), the m+1 sub-modules with the highest voltage at that time are activated.

[0092] The submodules that are fully engaged and PWM engaged, determined based on the bridge arm power and charging / discharging status, include:

[0093] The first m sub-modules are fully engaged, and the (m+1)th sub-module is engaged via PWM.

[0094] The driving signal for the sub-module is determined using a hybrid switching modulation method combining PWM and nearest-level approximation, including:

[0095] For fully engaged submodules, turn them on directly; for PWM-engaged submodules, drive the corresponding switching transistors according to the duty cycle signal.

[0096] For a submodule in PWM mode, the duty cycle is calculated as D = (v ref -m*v avg ) / v avg ;

[0097] In the formula, v ref This is the reference value for the bridge arm voltage; v avg is the average capacitor voltage of the current bridge arm submodule; m is the number of submodules that the bridge arm needs to fully engage.

[0098] As a preferred embodiment of the above, driving the corresponding switching transistor according to the duty cycle signal includes:

[0099] Let D be (v ref -m*v avg ) / v avg ;

[0100] When v ref -m*v avg When the value is greater than 0, the switching transistor T1 of the PWM input submodule is normally on, the switching transistor T2 is normally off, the duty cycle of the switching transistor T3 is 1-D, and the duty cycle of the switching transistor T4 is D.

[0101] When v ref -m*v avg When <0, the switching transistor T1 of the PWM input submodule is normally off, the switching transistor T2 is normally on, the duty cycle of the switching transistor T3 is D, and the duty cycle of the switching transistor T4 is 1-D.

[0102] like Figure 3 As shown, this embodiment also includes an offshore wind power MMC submodule control optimization system, which uses the method described above. The system includes:

[0103] The switching quantity calculation unit is used to determine the switching quantity of the submodule based on the bridge arm reference voltage and the average value of the capacitor voltage.

[0104] The hybrid sorting unit is used to obtain the capacitor voltage of the bridge arm submodule and sort and number the capacitor voltage using a hybrid sorting method.

[0105] The charging and discharging determination unit is used to acquire the voltage and current of the bridge arm, calculate the power of the bridge arm, and determine the charging and discharging status.

[0106] The modulation determination unit is used to determine the sub-module number of full activation and pulse width modulation (PWM) activation based on the bridge arm power and charging / discharging status.

[0107] The modulation unit is used to determine the drive signal of the submodule using a hybrid switching modulation method that combines PWM and nearest-level approximation, and to control the submodule using the drive signal.

[0108] Example 2:

[0109] like Figure 4 As shown, this embodiment provides a control optimization method for a modular multilevel converter submodule, including the following steps:

[0110] Step 1: Obtain the number n of available submodules for each bridge arm and number them sequentially as 1, 2, ..., n. Compare n with the set mixed sorting switching threshold thr. When n is less than or equal to the threshold, enable binary insertion sort and disable insertion sort. When n is greater than the threshold, disable binary insertion sort and enable insertion sort.

[0111] Step 2: Obtain the capacitor voltage of each submodule in the current bridge arm, perform low-pass filtering on the capacitor voltage, and record the filtered result as an array [v1, v2…v…]. n It is necessary to ensure that each data in the array corresponds to the corresponding submodule number.

[0112] Step 3: Merge the array recording the capacitor voltage data of the submodule with the corresponding submodule number into a 2xn array V. For example... Figure 5 As shown, when insertion sort is enabled, array V is divided into two parts: sorted and unsorted. The sorted part is defined as array A, with elements A[j], and the unsorted part is defined as array B, with elements B[i]. The sorted part is initially the first column of array V, and the unsorted part is the second to the nth column of array V.

[0113] Step 4: Compare the voltage values ​​in the second column of the array with the voltage values ​​in the first column, and set the comparison count to 2. Simultaneously, expand the sorted portion from 2 rows and 1 column to 2 rows and 2 columns, where the voltage values ​​and labels in the second column can be temporarily set to 0. When the voltage value in the second column is greater than the voltage value in the first column, the first column of the sorted portion remains unchanged, and the second column of array V is assigned to the second column of the sorted portion. When the voltage value in the second column is less than the voltage value in the first column, the first column of the sorted portion is assigned to the second column of the sorted portion, and the second column of array V is assigned to the first column of the sorted portion.

[0114] Step 5: After sorting columns 1 and 2 of array V, increase the comparison count from 2 to 3. Simultaneously, expand the sorted portion from 2 rows and 2 columns to 2 rows and 3 columns, where the voltage value and label in column 3 can be temporarily set to 0. Compare the voltage value in column 3 of array V with the voltage values ​​in the sorted portion from right to left. If the voltage value in column 3 of array V is less than the currently compared voltage value, assign the corresponding column in the sorted portion to the next column. If the voltage value in column 3 of array V is greater than or equal to the currently compared voltage value, assign column 3 of array V to column 3 of the sorted portion and increment the comparison count by 1.

[0115] Step Six: Repeat the above steps. For comparison count j, first expand the sorted portion from 2 rows and j-1 columns to 2 rows and j columns, where the voltage value and label in the j-th column can be temporarily set to 0. Compare the voltage value in the j-th column of array V with the voltage values ​​in the sorted portion from back to front. If the voltage value in the j-th column of array V is less than the voltage value in the k-th column of the sorted portion, then assign the value of the k-th column to the (k+1)-th column in the sorted portion. If the voltage value in the j-th column of array V is greater than or equal to the voltage value in the k-th column of the sorted portion, then assign the value of the j-th column of array V to the (k+1)-th column in the sorted portion.

[0116] Step Seven: As Figure 6 As shown, when binary insertion sort is enabled, for comparison count j, the sorted portion is first expanded from 2 rows and j-1 columns to 2 rows and j columns, where the voltage value and label of the j-th column can be temporarily set to 0. The voltage value of the j-th column of array V is compared with (j-1) / 2 of the sorted portion. If (j-1) / 2 is not an integer, it is rounded down. If the voltage value of the j-th column of array V is less than the voltage value of (j-1) / 2 of the sorted portion, the (j-1)-th column of the sorted portion is assigned to the j-th column of the sorted portion, the (j-2)-th column of the sorted portion is assigned to the (j-1)-th column of the sorted portion, and so on until the (j-1) / 2-th column is assigned to the ((j-1) / 2+1)-th column. Next, the voltage value in column j of array V is compared with the voltage value in column (j-1) / 4 of the already sorted portion. If the voltage value in column j of array V is less than the voltage value in column (j-1) / 4 of the already sorted portion, then the value from column ((j-1) / 2-1) of the already sorted portion is assigned to column (j-1) / 2, the value from column ((j-1) / 2-2) of the already sorted portion is assigned to column ((j-1) / 2-1), and so on, until the value from column (j-1) / 4 is assigned to column ((j-1) / 4+1). This binary search and comparison process is repeated until no further binary search is possible, at which point the sorting is complete. If, during the array comparison process, the voltage value in the j-th column of array V is found to be greater than the comparison value (e.g., greater than the (j-1) / 2 voltage value of the already sorted portion), then without modifying the array, directly compare the voltage value in the j-th column of array V with the voltage value in the 3rd (j-1) / 4th column of the already sorted portion. Repeat this binary search and comparison process until no further binary search is possible, at which point the sorting is complete. Record the sorted array as V. a .

[0117] Step 8: Based on the bridge arm voltage reference value v given by the control outer loop. ref , take the reference value v ref Divide by the submodule capacitor voltage v avg Rounding down gives the number of submodules *m* that need to be fully engaged in the bridge arm. Multiplying the bridge arm voltage and current gives the bridge arm power *p*.

[0118] Step Nine: Figure 7 As shown, the current charging / discharging state of the bridge arm can be determined based on the sign of its power. If the bridge arm is currently discharging, the array V is retrieved. a The last m numbers in the second row are used as the submodule numbers that need to be fully implemented. The array V... a The (m+1)th number from the end of the second row specifies the submodule that needs PWM activation. If the current bridge arm is charging, then retrieve the array V. a The first m numbers in the second row are used as the submodule numbers that need to be fully implemented. The array V... a The (m+1)th number in the second row is designated as the submodule that needs PWM input.

[0119] Step 10: Let D be (v ref -m*v avg ) / v avg When v ref -m*v avg When v > 0, the PWM input submodule's switching transistor T1 is normally on, switching transistor T2 is normally off, the duty cycle of switching transistor T3 is 1-D, and the duty cycle of switching transistor T4 is D. ref -m*v avg When <0, the switching transistor T1 of the PWM input submodule is normally off, the switching transistor T2 is normally on, the duty cycle of the switching transistor T3 is D, and the duty cycle of the switching transistor T4 is 1-D.

[0120] In summary, the technical concept of this embodiment is as follows: Figure 8 As shown, considering the different sorting speeds of insertion sort and binary insertion sort for data of different sizes, binary insertion sort is used when the number of submodules is less than 50, while insertion sort is used when the number of submodules is between 50 and 1000. Switching the sorting mode according to the number of submodules reduces the sorting algorithm time required for capacitor voltage balancing in the nearest-level approximation strategy, thereby reducing overall computational power, improving operating efficiency, and ensuring stable system operation.

[0121] To illustrate the superiority of this control strategy, a simulation example of the present invention is given below. Figure 9 This is a simulation comparison of the running time of the hybrid sorting method used in this embodiment with bucket sort and three-way quicksort. The simulation results show that the hybrid sorting method has the shortest running time, indicating that the sorting method proposed in this embodiment significantly enhances real-time performance and reduces processor requirements, thus lowering hardware costs.

[0122] Furthermore, to further illustrate the innovativeness of this embodiment, Figure 10This diagram compares the PWM-based nearest-level approximation method used in this embodiment with the traditional nearest-level approximation method after sorting. Compared to the traditional nearest-level approximation method, this method reduces the error between the actual output voltage and the reference value. The PWM input submodule selection strategy proposed for this method eliminates the need to re-sort or retrieve the capacitor voltages, thus reducing the computation time required.

[0123] Please see Figure 11 The diagram shows a structural schematic of a computer device provided in an embodiment of this application. An embodiment of this application provides a computer device 400, including a processor 410 and a memory 420. The memory 420 stores a computer program executable by the processor 410. When the computer program is executed by the processor 410, it performs the method described above.

[0124] This application embodiment also provides a storage medium 430, on which a computer program is stored, and the computer program is executed by a processor 410 to perform the above method.

[0125] The storage medium 430 can be implemented by any type of volatile or non-volatile storage device or a combination thereof, such as Static Random Access Memory (SRAM), Electrically Erasable Programmable Read-Only Memory (EEPROM), Erasable Programmable Read Only Memory (EPROM), Programmable Red-Only Memory (PROM), Read-Only Memory (ROM), magnetic storage, flash memory, magnetic disk, or optical disk.

[0126] In the description of this invention, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. "A plurality of" means two or more, unless otherwise explicitly specified.

[0127] In this invention, unless otherwise explicitly specified and limited, the terms "installation," "connection," "linking," and "fixing," etc., should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral part; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication of two components or the interaction between two components. Those skilled in the art can understand the specific meaning of the above terms in this invention according to the specific circumstances.

[0128] In the description of this specification, the references to terms such as "one embodiment," "some embodiments," "example," "specific example," or "some examples," etc., indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of the present invention. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples. Furthermore, without contradiction, those skilled in the art can combine and integrate the different embodiments or examples described in this specification, as well as the features of different embodiments or examples.

[0129] Any process or method description in the flowchart or otherwise herein can be understood as representing a module, segment, or portion of code comprising one or more executable instructions for implementing a particular logical function or process, and the scope of the preferred embodiments of the invention includes additional implementations in which functions may be performed not in the order shown or discussed, including substantially simultaneously or in reverse order depending on the functions involved, as will be understood by those skilled in the art to which embodiments of the invention pertain.

[0130] The logic and / or steps represented in the flowchart or otherwise described herein, for example, can be considered as a ordered list of executable instructions for implementing logical functions, and can be embodied in any computer-readable medium for use by, or in conjunction with, an instruction execution system, apparatus, or device (such as a computer-based system, a processor-included system, or other system that can fetch and execute instructions from, an instruction execution system, apparatus, or device). For the purposes of this specification, "computer-readable medium" can be any means that can contain, store, communicate, propagate, or transmit programs for use by, or in conjunction with, an instruction execution system, apparatus, or device. More specific examples (a non-exhaustive list) of computer-readable media include: an electrical connection having one or more wires (electronic device), a portable computer disk drive (magnetic device), random access memory (RAM), read-only memory (ROM), erasable and editable read-only memory (EPROM or flash memory), fiber optic devices, and portable optical disc read-only memory (CDROM). Alternatively, the computer-readable medium may be paper or other suitable media on which the program can be printed, since the program can be obtained electronically, for example, by optically scanning the paper or other medium, followed by editing, interpreting, or otherwise processing as necessary, and then stored in a computer memory.

[0131] It should be understood that various parts of the present invention can be implemented in hardware, software, firmware, or a combination thereof. In the above embodiments, multiple steps or methods can be implemented in software or firmware stored in memory and executed by a suitable instruction execution system. For example, if implemented in hardware, as in another embodiment, it can be implemented using any one or a combination of the following techniques known in the art: discrete logic circuits having logic gates for implementing logical functions on data signals, application-specific integrated circuits (ASICs) having suitable combinational logic gates, programmable gate arrays (PGAs), field-programmable gate arrays (FPGAs), etc.

[0132] Those skilled in the art will understand that all or part of the steps of the methods described in the above embodiments can be implemented by a program instructing related hardware. The program can be stored in a computer-readable storage medium, and when executed, it includes one or a combination of the steps of the method embodiments.

[0133] The storage medium mentioned above can be a read-only memory, a disk, or an optical disk, etc. Although embodiments of the present invention have been shown and described above, it is to be understood that the above embodiments are exemplary and should not be construed as limiting the present invention. Those skilled in the art can make changes, modifications, substitutions, and variations to the above embodiments within the scope of the present invention.

Claims

1. A method for optimizing the control of an offshore wind power MMC submodule, characterized in that, Includes the following steps: The number of submodules to be switched is determined based on the average value of the bridge arm reference voltage and the capacitor voltage. Obtain the capacitor voltage of the bridge arm submodule, and sort and number the capacitor voltage using a hybrid sorting method; Obtain bridge arm voltage and current, calculate bridge arm power, and determine charging and discharging status; The submodule numbers for full engagement and pulse width modulation (PWM) engagement are determined based on the bridge arm power and charging / discharging status. A hybrid switching modulation method combining PWM and nearest-level approximation is used to determine the drive signal of the submodule, and the drive signal is used to control the submodule.

2. The offshore wind power MMC submodule control optimization method according to claim 1, characterized in that, The hybrid sorting method includes: When the total number of submodules n is less than or equal to a preset threshold, binary insertion sort is used; Otherwise, use insertion sort.

3. The offshore wind power MMC submodule control optimization method according to claim 2, characterized in that, The insertion sort is used to sort and number the capacitor voltages, including the following steps: Divide the capacitor voltages of all submodules into two parts: sorted and unsorted. The capacitor voltage is compared sequentially with the sorted voltage in the unsorted part and then inserted into the sorted part. Ensure that the sorted portion is in ascending order until the unsorted portion is completely inserted into the sorted portion.

4. The offshore wind power MMC submodule control optimization method according to claim 2, characterized in that, The binary insertion sort is used to sort and number the capacitor voltages, including the following steps: Divide the capacitor voltages of all submodules into two parts: sorted and unsorted. Starting with the first voltage value of the unsorted submodule, the current capacitor voltage is used as the value to be inserted sequentially. Using binary search, the first insertion position greater than the value to be inserted is located in the sorted interval. Then, the capacitor voltage after the insertion position is shifted one position to the right to make room. Place the voltage of the submodule to be inserted into the vacated space, and repeat this process until the unsorted part is completely inserted into the sorted part.

5. The offshore wind power MMC submodule control optimization method according to claim 1, characterized in that, The process of determining the number of submodules to be switched based on the bridge arm reference voltage and the average capacitor voltage includes the following steps: The current bridge arm voltage reference value v is obtained from the control loop. ref ; The bridge arm voltage reference value v ref The average voltage v of the current bridge arm submodule capacitor avg Divide the two numbers and round down to get the number of submodules m that the current bridge arm needs to be fully engaged.

6. The offshore wind power MMC submodule control optimization method according to claim 5, characterized in that, The step of determining the sub-module numbers for full engagement and PWM engagement based on the bridge arm power and charging / discharging state includes the following steps: Obtain the arm current value and its direction, and obtain the arm power based on the arm voltage reference value and the arm current; The charging and discharging status of the bridge arm is determined by the positive or negative power of the bridge arm, and the switching sequence of the sub-modules is determined based on the charging and discharging status. When the bridge arm is in the charging state, the m+1 sub-modules with the lowest voltage at that time are activated; When the bridge arm is in a discharging state, the m+1 sub-modules with the highest voltage at that time are activated.

7. The offshore wind power MMC submodule control optimization method according to claim 6, characterized in that, The method for determining the submodule number for full engagement and PWM engagement based on the bridge arm power and charging / discharging state includes: The first m sub-modules are fully engaged, and the (m+1)th sub-module is engaged via PWM.

8. The offshore wind power MMC submodule control optimization method according to claim 7, characterized in that, The method of determining the drive signal of the sub-module using a hybrid switching modulation method combining PWM and nearest-level approximation includes: For fully engaged submodules, turn them on directly; for PWM-engaged submodules, drive the corresponding switching transistors according to the duty cycle signal. For a submodule in PWM mode, the duty cycle is calculated as D = (v ref -m*v avg ) / v avg ; In the formula, v ref This is the reference value for the bridge arm voltage; v avg is the average capacitor voltage of the current bridge arm submodule; m is the number of submodules that the bridge arm needs to fully engage.

9. The offshore wind power MMC submodule control optimization method according to claim 8, characterized in that, The step of driving the corresponding switching transistor according to the duty cycle signal includes: Let D be (v ref -m*v avg ) / v avg ; When v ref -m*v avg When the value is greater than 0, the switching transistor T1 of the PWM input submodule is normally on, the switching transistor T2 is normally off, the duty cycle of the switching transistor T3 is 1-D, and the duty cycle of the switching transistor T4 is D. When v ref -m*v avg When <0, the switching transistor T1 of the PWM input submodule is normally off, the switching transistor T2 is normally on, the duty cycle of the switching transistor T3 is D, and the duty cycle of the switching transistor T4 is 1-D.

10. A control optimization system for offshore wind power MMC submodules, characterized in that, Using the method of any one of claims 1 to 9, the system comprises: The switching quantity calculation unit is used to determine the switching quantity of the submodule based on the bridge arm reference voltage and the average value of the capacitor voltage. A hybrid sorting unit is used to obtain the capacitor voltage of the bridge arm submodule and sort and number the capacitor voltage using a hybrid sorting method. The charging and discharging determination unit is used to acquire the voltage and current of the bridge arm, calculate the power of the bridge arm, and determine the charging and discharging status. The modulation determination unit is used to determine the number of the sub-module that is fully engaged and pulse width modulation (PWM) engaged based on the bridge arm power and charging / discharging state. The modulation unit is used to determine the drive signal of the submodule using a hybrid switching modulation method that combines PWM and nearest-level approximation, and to control the submodule using the drive signal.

11. A computer device, comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that, When the processor executes the computer program, it implements the method as described in any one of claims 1-9.

12. A storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by the processor, it implements the method as described in any one of claims 1-9.

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