Method and device for suppressing high-frequency oscillation of receiving end of DRU-MMC

Abstract

The invention relates to a DRU-MMC receiving end high-frequency oscillation suppression method and device. The method comprises the following steps: detecting an alternating current system side impedance and detecting whether an alternating current system side voltage has an oscillation trend or not; if it is judged that oscillation occurs, a reverse damping voltage needed to be output theoretically is calculated according to the alternating current system side impedance and serves as a voltage outer ring instruction value; tracking the generated voltage outer loop instruction value and outputting a modulation signal; driving pulses of all bridge arms of the power electronic energy converter are generated according to the modulation signals, so that the series converter is controlled to output active damping to counteract damping on the alternating current system side; according to the detected alternating current system side voltage, the positive sequence voltage phase and the angular frequency of the alternating current system side grid connection point are extracted, the positive sequence voltage phase is used for modulating module phase input, and the angular frequency is used for calculating the reverse damping voltage needed to be output theoretically. Impedance remodeling can be carried out according to the possible oscillation frequency, the positive damping characteristic is presented, and therefore the good oscillation suppression effect is achieved.

Description

Technical Field

[0001] This invention relates to the field of power electronic converter technology, specifically a method and apparatus for suppressing high-frequency oscillations at the receiving end of a DRU-MMC converter. Background Technology

[0002] Modular multilevel converter (MMC) technology is widely used in high-voltage direct current (HVDC) transmission due to its advantages such as high commutation reliability, flexible control methods, and low harmonic content. However, this has also led to increasingly prominent stability issues in MMC grid-connected projects, with frequent high-frequency oscillations posing a serious threat to the safe and stable operation of power systems. High-frequency oscillations in flexible DC systems differ from low-frequency oscillations in traditional power systems, which are primarily caused by electromechanical coupling. They are oscillations generated by the interaction between different devices, primarily controlled by power electronic systems, and represent a new type of power system stability problem in the development of the power industry. High-frequency oscillations can excite large-amplitude harmonics in the AC system, severely distorting AC voltage and current, increasing system operating losses, and potentially causing primary equipment breakdown and system shutdown. Therefore, researching methods to suppress high-frequency oscillations in flexible DC systems is of great significance for improving the safety, stability, and reliability of these projects.

[0003] The long control link delay of the diode-rectifier unit (DRU)-MMC system based on the modular multilevel converter (MMC) causes the high-frequency impedance of the flexible DC system to exhibit negative damping characteristics, making it prone to interaction with the distributed parameters of the AC transmission line and causing high-frequency oscillations. Flexible DC converter stations are characterized by high voltage, large capacity, and large link delays, and the connected AC system may have multiple capacitive effect frequency bands. The parameter design of its suppression scheme needs to coordinate the phase characteristics of the converter station's output impedance within multiple capacitive effect frequency bands. Therefore, the suppression effect of high-frequency oscillation suppression schemes in the field of renewable energy grid connection may be insignificant or ineffective, and may even cause additional frequency oscillations. If high-frequency oscillations are not effectively suppressed, they will have a serious impact on the main grid, severely endangering the safe and stable operation of the power system.

[0004] Therefore, considering the inherent parameters of the power electronic converter and the uncertainties of the system, how to adapt to the high-frequency AC oscillation at the receiving end of the DRU-MMC and reshape the impedance according to the possible oscillation frequency to make it exhibit positive damping characteristics and thus achieve a good oscillation suppression effect is the control challenge of the power electronic converter. Summary of the Invention

[0005] In view of the shortcomings of the prior art, the purpose of this invention is to provide a method and apparatus for suppressing high-frequency oscillations at the receiver end of a DRU-MMC.

[0006] A DRU-MMC receiver-end high-frequency oscillation suppression device includes a high-frequency oscillation detection module, an outer loop equivalent impedance generation module, a dual closed-loop control module, a modulation module, and a phase-locked loop module.

[0007] The high-frequency oscillation detection module is used to detect the AC system side impedance and whether the AC system side voltage has an oscillation trend.

[0008] The outer loop equivalent impedance generation module is used to calculate the theoretically required reverse damping voltage as the voltage outer loop command value based on the AC system side impedance detected by the high-frequency oscillation detection module if the high-frequency oscillation detection module determines that the system is oscillating.

[0009] The dual closed-loop control module is used to track the voltage outer loop command value generated by the outer loop impedance generation module and output the modulation signal;

[0010] The modulation module is used to generate drive pulses for each arm of the power electronic energy converter according to the modulation signal, thereby controlling the active damping output of the series converter to offset the damping on the AC system side and suppress high-frequency oscillations.

[0011] The phase-locked loop module is used to detect the AC system side voltage V detected by the high-frequency oscillation detection module. g Extract the positive sequence voltage phase θ at the grid connection point of the AC system. c and angular frequency ω c Positive sequence voltage phase θ c Used for phase input of the modulation module, angular frequency ω c Used to calculate the theoretically required reverse damping voltage output.

[0012] Furthermore, the high-frequency oscillation detection module uses a power frequency notch filter, a tracking and screening process, and a threshold judgment process to detect the AC system side voltage V. g Screening and comparison are performed to detect oscillations:

[0013] Step 1: The power frequency notch filter is used to filter the AC system side voltage V acquired by the high-frequency oscillation detection module. g Effective removal of fundamental frequency components from the data;

[0014] Step 2, the tracking and screening process is achieved through a tracking and screening channel, which consists of multiple sub-channels. The signal passes through a power frequency notch filter and enters the equal-frequency multi-signal tracking and screening channel. The sub-channels use phase-locked loops and low-pass filter technology to quickly track the frequency and amplitude of the oscillating signal within the target frequency range. By distributing multiple sub-channels in equal-frequency bands, the entire mid-to-high frequency region is covered.

[0015] Step 3: The output signals of each sub-channel pass through a threshold judgment stage to achieve rapid detection of medium- and high-frequency oscillation signals.

[0016] Furthermore, step 2 specifically includes:

[0017] Step 2.1, Instantaneous value of three-phase voltage V gj After power frequency notch filtering, the fundamental frequency component is removed, where j = a, b, c;

[0018] Step 2.2: The processed signal is then input to a frequency set to f. PLL_i In the filtering channels, the initial frequency setting of the PLL for filtering channel i is f. PLL_i ;

[0019] Step 2.3: To ensure that channel i can accurately detect signal frequencies within a specific frequency band while ignoring signals in other frequency bands, a tracking and filtering step Δf is added to the PLL. k The PLL for channel i is only valid for the frequency range f. PLL_i ±Δf k Track signals within;

[0020] Step 2.4: By adding a pair of low-pass filters on the d-axis and q-axis respectively, the input signal located at f... PLL_i ±Δf k Frequency components outside the frequency band are significantly attenuated, while signals within the frequency band are preserved. After this processing, the signal is finally transmitted to the threshold judgment stage for further detection and analysis.

[0021] Furthermore, the outer loop equivalent impedance generation module calculates the theoretically required reverse damping voltage as the voltage outer loop command value based on the AC system side impedance detected by the high-frequency oscillation detection module, including:

[0022] When the high-frequency oscillation detection module detects system oscillation, the outer loop equivalent impedance generation module compensates for the voltage of the simulated line impedance to achieve grid impedance cancellation. The resistance and inductance of the compensated simulated line are respectively represented by R. se L se This indicates that the resistance and inductance R se L se The selection needs to take into account the impedance Z of the AC system side. g At this time, the equivalent impedance on the AC system side is:

[0023] ;

[0024] Selected resistor and inductor R se L se Make the equivalent impedance Z g ’Operating within a stable system range can suppress AC system-side oscillations, generating the outer voltage command value V. sedref and V seqref They are respectively:

[0025] ;

[0026] ;

[0027] Among them, I gd and I gq These are the values ​​of the AC system side current in the dq coordinate system, respectively.

[0028] Furthermore, the dual closed-loop control module tracks the voltage outer loop command value generated by the outer loop impedance generation module and outputs a modulation signal, including:

[0029] The outer loop voltage command value V is obtained through the outer loop equivalent impedance generation module. sedref and V seqref Then, the actual voltage output value V of the series converter is compared with the actual voltage output value V through the dual closed-loop control module. sed and V seq The difference is calculated and input to the PI regulator for PI control, thus obtaining the reference value I of the d-axis current output of the series converter. sedref With q-axis current reference value I seqref They are respectively:

[0030] ;

[0031] ;

[0032] Obtain the reference value I of the d-axis current output of the series converter. sedref With q-axis current reference value I seqref Subsequently, the dual closed-loop control module continues to control the actual output current I of the series converter. sed and I seq With dq axis reference current command value I sedref with I seqref Calculate the difference between the two signals, then use a PI controller to perform PI control to obtain the modulation signal m. d and m q :

[0033] ;

[0034] .

[0035] A method for suppressing high-frequency oscillations at the receiver end of a DRU-MMC includes:

[0036] Detect the AC system side impedance and detect whether the AC system side voltage has an oscillation trend;

[0037] If the system is determined to be oscillating, the theoretically required reverse damping voltage is calculated based on the detected AC system side impedance and used as the outer voltage loop command value.

[0038] Track the generated outer loop voltage command value and output the modulation signal;

[0039] The modulation signal generates drive pulses for each arm of the power electronic energy converter, thereby controlling the active damping output of the series converter to offset the damping on the AC system side and suppress high-frequency oscillations.

[0040] Based on the detected AC system side voltage V g Extract the positive sequence voltage phase θ at the grid connection point of the AC system. c and angular frequency ω c Positive sequence voltage phase θ c Used for phase input of the modulation module, angular frequency ω c Used to calculate the theoretically required reverse damping voltage output.

[0041] Furthermore, the step of detecting whether the AC system side voltage has an oscillation trend includes:

[0042] Step 1: The power frequency notch filter is used to filter the acquired AC system side voltage V. g Effective removal of fundamental frequency components from the data;

[0043] Step 2, the tracking and screening process is achieved through a tracking and screening channel, which consists of multiple sub-channels. The signal passes through a power frequency notch filter and enters the equal-frequency multi-signal tracking and screening channel. The sub-channels use phase-locked loops and low-pass filter technology to quickly track the frequency and amplitude of the oscillating signal within the target frequency range. By distributing multiple sub-channels in equal-frequency bands, the entire mid-to-high frequency region is covered.

[0044] Step 3: The output signals of each sub-channel pass through a threshold judgment stage to achieve rapid detection of medium- and high-frequency oscillation signals.

[0045] Furthermore, step 2 specifically includes:

[0046] Step 2.1, Instantaneous value of three-phase voltage V gj After power frequency notch filtering, the fundamental frequency component is removed, where j = a, b, c;

[0047] Step 2.2: The processed signal is then input to a frequency set to f. PLL_i In the filtering channels, the initial frequency setting of the PLL for filtering channel i is f. PLL_i ;

[0048] Step 2.3: To ensure that channel i can accurately detect signal frequencies within a specific frequency band while ignoring signals in other frequency bands, a tracking and filtering step Δf is added to the PLL. k The PLL for channel i is only valid for the frequency range f. PLL_i ±Δf k Track signals within;

[0049] Step 2.4: By adding a pair of low-pass filters on the d-axis and q-axis respectively, the input signal located at f... PLL_i ±Δf k Frequency components outside the frequency band are significantly attenuated, while signals within the frequency band are preserved. After this processing, the signal is finally transmitted to the threshold judgment stage for further detection and analysis.

[0050] Furthermore, the step of calculating the theoretically required reverse damping voltage as the outer loop voltage command value based on the detected AC system-side impedance includes:

[0051] When the high-frequency oscillation detection module detects system oscillation, the outer loop equivalent impedance generation module compensates for the voltage of the simulated line impedance to achieve grid impedance cancellation. The resistance and inductance of the compensated simulated line are respectively represented by R. se L se This indicates that the resistance and inductance R se L se The selection needs to take into account the impedance Z of the AC system side. g At this time, the equivalent impedance on the AC system side is:

[0052] ;

[0053] Selected resistor and inductor R se L se Make the equivalent impedance Z g ’ Operating within a stable system range can suppress AC system-side oscillations, generating the outer voltage command value V. sedref and V seqref They are respectively:

[0054] ;

[0055] ;

[0056] Among them, I gd and I gq These are the values ​​of the AC system side current in the dq coordinate system, respectively.

[0057] Furthermore, the step of tracking the generated outer loop voltage command value and outputting a modulated signal includes:

[0058] Obtain the outer loop voltage command value V sedref and V seqref Then, compare the actual voltage output value V of the series converter. sed and V seq The difference is calculated and input to the PI regulator for PI control, thus obtaining the reference value I of the d-axis current output of the series converter. sedref With q-axis current reference value I seqref They are respectively:

[0059] ;

[0060] ;

[0061] Obtain the reference value I of the d-axis current output of the series converter. sedref With q-axis current reference value I seqref Then, continue to control the actual output current I of the series converter. sed and I seq With dq axis reference current command value I sedref with I seqref Calculate the difference between the two signals, then use a PI controller to perform PI control to obtain the modulation signal m. d and m q :

[0062] ;

[0063] .

[0064] This invention has outstanding substantive features and significant progress compared to the prior art, specifically:

[0065] (1) This invention is not only applicable to weak grid conditions caused by increased grid impedance, but also dynamically adjusts the damping coefficient by adjusting the output signal of the series converter (such as the amplitude and phase of the injected voltage) in real time to meet the oscillation suppression requirements under different operating conditions.

[0066] (2) Traditional passive damping requires parallel or series resistors (such as RC damping circuits) to dissipate oscillation energy through resistor heating, but this introduces additional fundamental wave loss (especially significant loss in high voltage and high power scenarios). This invention uses active damping of a series converter to generate a current / voltage signal that is inversely phase to the oscillation component through a control algorithm. It injects damping energy only for the high-frequency oscillation component and does not affect the fundamental wave power transmission. Therefore, there is almost no additional fundamental wave loss, and the system efficiency is higher.

[0067] (3) This invention can suppress system oscillations within 0.05s, such as Figure 8 As shown. This method can also improve the short-circuit ratio of the AC system and enhance system stability. The improvement in system strength will directly improve the power transfer characteristics and control stability of the MMC. Attached Figure Description

[0068] Figure 1 This is a schematic diagram of the structure of the DRU-MMC receiving-end AC high-frequency oscillation system based on the series impedance adjustment of the converter transformer in an embodiment of the present invention;

[0069] Figure 2 This is a schematic diagram of the structure of the DRU-MMC receiver-end high-frequency oscillation suppression device in an embodiment of the present invention;

[0070] Figure 3 This is a flowchart of the high-frequency oscillation suppression method at the receiving end of the DRU-MMC in this embodiment of the invention;

[0071] Figure 4 This is a schematic diagram of the high-frequency oscillation detection module in an embodiment of the present invention;

[0072] Figure 5 This is a schematic diagram of the outer ring equivalent impedance generation module in an embodiment of the present invention;

[0073] Figure 6 This is a schematic diagram of the structure of the series converter voltage and current dual closed-loop control module in an embodiment of the present invention;

[0074] Figure 7 This is a system structure diagram of the series converter after adding series compensation in an embodiment of the present invention;

[0075] Figure 8 This is a simulation comparison diagram of the embodiment of the present invention with and without the series converter applied. Detailed Implementation

[0076] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0077] like Figure 1 As shown, a high-frequency AC oscillation system based on series impedance adjustment of DRU-MMC receiver-end is described. The high-frequency oscillation suppression method of DRU-MMC receiver-end of this invention uses a Modular Multilevel Converter (MMC) series converter to adjust the series equivalent impedance in real time to reshape the impedance of the AC system side, thereby achieving high-frequency oscillation suppression.

[0078] The MMC converter transformer series converter includes a converter transformer body, a series converter, a power extraction transformer, and a power extraction converter. The windings of the converter transformer body include a grid-side winding, a valve-side winding, and a power extraction winding. The series converter is connected to the ground terminal of the grid-side winding of the converter transformer in a cascaded H-bridge configuration. The primary winding of the power extraction transformer is connected to the power extraction winding of the converter transformer. The AC side of the power extraction converter is connected to the power extraction transformer, and the DC side is connected to the DC side of the series converter. The series converter is equivalent to a controlled source output in the system structure.

[0079] like Figure 2 As shown, this embodiment of the invention provides a DRU-MMC receiving-end AC high-frequency oscillation suppression device based on converter transformer series impedance regulation, including a high-frequency oscillation detection module, an outer loop equivalent impedance generation module, a dual closed-loop control module, a modulation module, and a phase-locked loop module.

[0080] The high-frequency oscillation detection module is used to detect the AC system side impedance and whether the AC system side voltage has an oscillation trend.

[0081] The outer loop equivalent impedance generation module is used to calculate the theoretically required reverse damping voltage as the voltage outer loop command value based on the AC system side impedance detected by the high-frequency oscillation detection module if the high-frequency oscillation detection module determines that the system is oscillating.

[0082] The dual closed-loop control module is used to track the voltage outer loop command value generated by the outer loop impedance generation module and output the modulation signal;

[0083] The modulation module is used to generate drive pulses for each arm of the power electronic energy converter according to the modulation signal, thereby controlling the active damping output of the series converter to offset the damping on the AC system side and suppress high-frequency oscillations.

[0084] The phase-locked loop module is used to detect the AC system side voltage V detected by the high-frequency oscillation detection module. g Extract the positive sequence voltage phase θ at the grid connection point of the AC system. c and angular frequency ω c Positive sequence voltage phase θ c Used for phase input of the modulation module, angular frequency ω c Used to calculate the theoretically required output reverse damping voltage V sedref and V seqref .

[0085] like Figure 3 As shown, this embodiment of the invention provides a method for suppressing high-frequency oscillations at the receiver end of a DRU-MMC, comprising the following steps:

[0086] Step 1: The high-frequency oscillation detection module acquires the AC system side voltage V.g And the impedance of the AC system side;

[0087] Step two involves using a high-frequency oscillation detection module with three stages (power frequency notch filtering, tracking and screening, and threshold judgment) to measure the AC system side voltage V. g Screening and comparison are performed to quickly detect oscillations;

[0088] Specifically, such as Figure 4 The diagram shown illustrates the method of equal-frequency band multi-channel signal tracking and filtering in an embodiment of the present invention. The implementation process is as follows:

[0089] Step 1: The power frequency notch filter is used to filter the AC system side voltage V acquired by the high-frequency oscillation detection module. g Effective removal of fundamental frequency components from the data;

[0090] Step 2: The tracking and filtering channel consists of multiple sub-channels, each focusing on signals within a specific frequency range. The signal passes through a power frequency notch filter and enters the equal-band multi-signal tracking and filtering channel. These sub-channels, employing phase-locked loops (PLLs) and low-pass filter technology, achieve rapid tracking of the frequency and amplitude of oscillating signals within the target frequency range. By distributing multiple sub-channels in equal-band arrangements, the entire mid-to-high frequency region is covered.

[0091] Preferably, the explanation is based on the i-th filtering channel:

[0092] Step 2.1, Instantaneous value of three-phase voltage V gj (j=a, b, c) After power frequency notch filtering, the fundamental frequency component is removed;

[0093] Step 2.2: The processed signal is then input to a frequency set to f. PLL_i In the filtering channels, the initial frequency setting of the PLL for filtering channel i is f. PLL_i ;

[0094] Step 2.3: To ensure that channel i can accurately detect signal frequencies within a specific frequency band while ignoring signals in other frequency bands, a tracking and filtering step Δf is added to the PLL. k The PLL for channel i is only valid for the frequency range f. PLL_i ±Δf k Track signals within;

[0095] Step 2.4: By adding a pair of low-pass filters on the d-axis and q-axis respectively, the input signal located at f... PLL_i ±Δf kFrequency components outside the specified frequency band are significantly attenuated, while signals within that band are preserved. After this processing, the signal is finally passed to the threshold determination stage for further detection and analysis.

[0096] Step 3: The output signals of each sub-channel pass through a threshold judgment stage to achieve rapid detection of medium- and high-frequency oscillation signals.

[0097] Step 3: If the system is determined to be oscillating, the outer loop equivalent impedance generation module calculates the theoretically required reverse damping voltage as the voltage outer loop command value based on the AC system side impedance detected by the high frequency oscillation detection module, and obtains the inner loop current command value by subtracting it from the actual output voltage of the series converter.

[0098] The specific implementation steps are as follows:

[0099] like Figure 5 The diagram shows the structure of the outer loop equivalent impedance generation module and the phase-locked loop module. The high-frequency oscillation detection module detects the AC system-side impedance, and the outer loop equivalent impedance generation module calculates the theoretically required reverse damping voltage as the outer loop voltage command value. The specific steps are as follows:

[0100] When the high-frequency oscillation detection module detects system oscillation, the outer loop equivalent impedance generation module compensates for the voltage of the simulated line impedance to achieve grid impedance cancellation. The resistance and inductance of the compensated simulated line are respectively represented by R. se L se This indicates that the resistance and inductance R se L se The selection needs to take into account the impedance Z of the AC system side. g At this time, the equivalent impedance on the AC system side is:

[0101] ;

[0102] Selected resistor and inductor R se L se Make the equivalent impedance Z g ’ Operating within a stable system range can suppress AC system-side oscillations, generating the outer voltage command value V. sedref and V seqref They are respectively:

[0103] ;

[0104] ;

[0105] Among them, I gd and I gq These are the values ​​of the AC system side current in the dq coordinate system, respectively.

[0106] The d-axis voltage of the series converter is used to output a virtual resistance or balance active power, while the q-axis voltage is used to control the virtual inductor. When the current-controlled inverter outputs a q-axis current component, the voltage and current phases are not the same. In this case, the equivalent resistance or inductance is simulated from both the d and q axes, meaning both resistance and inductance have d- and q-axis voltage components. The virtual inductor is used to change the AC system impedance, thus improving stability. The virtual inductor is given by obtaining the grid-connected inverter's output angular frequency ω through a phase-locked loop module. c Multiplying the selected virtual inductance value Lse as the voltage reference, the output is sent to the line through a series converter to offset part of the voltage drop of the inductance, so that the equivalent inductance is within the stable operating range, offsetting the AC system side impedance and thus suppressing the high-frequency oscillation of the system.

[0107] Step four: Track the voltage outer loop command value generated by the outer loop impedance generation module through the dual closed-loop control module and output the modulation signal. The specific implementation steps are as follows:

[0108] like Figure 6 The diagram shows the dual closed-loop control module for the series converter in this embodiment of the invention. The outer loop voltage command value V is obtained through the outer loop equivalent impedance generation module. sedref and V seqref Then, the actual voltage output value V of the series converter is compared with the actual voltage output value V through the dual closed-loop control module. sed and V seq The difference is calculated and input to the PI regulator for PI control, thus obtaining the reference value I of the d-axis current output of the series converter. sedref With q-axis current reference value I seqref They are respectively:

[0109] ;

[0110] ;

[0111] Obtain the reference value I of the d-axis current output of the series converter. sedref With q-axis current reference value I seqref Subsequently, the dual closed-loop control module continues to control the actual output current I of the series converter. sed and I seq With dq axis reference current command value I sedref with I seqref Calculate the difference between the two signals, then use a PI controller to perform PI control to obtain the modulation signal m. d and m q :

[0112] ;

[0113] .

[0114] After the modulated signal is transformed into a signal in the abc coordinate system through the inverse Park transform, it generates drive pulses for each arm of the series converter. The modulated signal in the abc coordinate system is:

[0115] ;

[0116] Phase-locked loop (PLL) mode extraction of the positive sequence voltage phase θ at the grid connection point of the AC system side. c and angular frequency ω c Positive sequence voltage phase θ c Used for phase input of the modulation module, angular frequency ω c Used to calculate the theoretically required output reverse damping voltage V sedref and V seqref .

[0117] Step 5: The modulation module generates drive pulses for each arm of the power electronic power converter according to the modulation signal, thereby controlling the active damping output of the series converter to offset the damping on the AC system side and suppress high-frequency oscillations.

[0118] like Figure 7 The diagram shown is a system structure diagram of the series converter after adding series compensation in an embodiment of the present invention. After the outer loop equivalent impedance generation module generates the outer loop reference voltage of the dual closed-loop control module of the series converter, the modulation module generates the driving pulses of each bridge arm of the power electronic energy converter to control the series converter to output the theoretically required reverse damping voltage.

[0119] Step 6: After determining that the system oscillation has disappeared, control the output of the series converter to be 0.

[0120] The above description is merely a specific embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the technical scope disclosed in the present invention should be included within the scope of protection of the present invention. Therefore, the scope of protection of the present invention should be determined by the scope of the claims.

Claims

1. A high-frequency oscillation suppression device at the receiver end of a DRU-MMC, characterized in that, It includes a high-frequency oscillation detection module, an outer loop equivalent impedance generation module, a dual closed-loop control module, a modulation module, and a phase-locked loop module; The high-frequency oscillation detection module is used to detect the AC system side impedance and whether the AC system side voltage has an oscillation trend. The outer loop equivalent impedance generation module is used to calculate the theoretically required reverse damping voltage as the voltage outer loop command value based on the AC system side impedance detected by the high-frequency oscillation detection module if the high-frequency oscillation detection module determines that the system is oscillating. The dual closed-loop control module is used to track the voltage outer loop command value generated by the outer loop impedance generation module and output the modulation signal; The modulation module is used to generate drive pulses for each arm of the power electronic energy converter according to the modulation signal, thereby controlling the active damping output of the series converter to offset the damping on the AC system side and suppress high-frequency oscillations. The phase-locked loop module is used to detect the AC system side voltage V detected by the high-frequency oscillation detection module. g Extract the positive sequence voltage phase θ at the grid connection point of the AC system. c and angular frequency ω c Positive sequence voltage phase θ c Used for phase input of the modulation module, angular frequency ω c Used to calculate the theoretically required reverse damping voltage output.

2. The DRU-MMC receiver-end high-frequency oscillation suppression device as described in claim 1, characterized in that: The high-frequency oscillation detection module detects the AC system side voltage V through a power frequency notch filter, a tracking and screening process, and a threshold judgment process. g Screening and comparison are performed to detect oscillations: Step 1: The power frequency notch filter is used to filter the AC system side voltage V acquired by the high-frequency oscillation detection module. g Effective removal of fundamental frequency components from the data; Step 2, the tracking and screening process is achieved through a tracking and screening channel, which consists of multiple sub-channels. The signal passes through a power frequency notch filter and enters the equal-frequency multi-signal tracking and screening channel. The sub-channels use phase-locked loops and low-pass filter technology to quickly track the frequency and amplitude of the oscillating signal within the target frequency range. By distributing multiple sub-channels in equal-frequency bands, the entire mid-to-high frequency region is covered. Step 3: The output signals of each sub-channel pass through a threshold judgment stage to achieve rapid detection of medium- and high-frequency oscillation signals.

3. The DRU-MMC receiver-end high-frequency oscillation suppression device as described in claim 2, characterized in that: Step 2 specifically includes: Step 2.1, Instantaneous value of three-phase voltage V gj After power frequency notch filtering, the fundamental frequency component is removed, where j = a, b, c; Step 2.2: The processed signal is then input to a frequency set to f. PLL_i In the filtering channels, the initial frequency setting of the PLL for filtering channel i is f. PLL_i ; Step 2.3: To ensure that channel i can accurately detect signal frequencies within a specific frequency band while ignoring signals in other frequency bands, a tracking and filtering step Δf is added to the PLL. k The PLL for channel i is only valid for the frequency range f. PLL_i ±Δf k Track signals within; Step 2.4: By adding a pair of low-pass filters on the d-axis and q-axis respectively, the input signal located at f... PLL_i ±Δf k Frequency components outside the frequency band are significantly attenuated, while signals within the frequency band are preserved. After this processing, the signal is finally transmitted to the threshold judgment stage for further detection and analysis.

4. The DRU-MMC receiver-end high-frequency oscillation suppression device as described in claim 1, characterized in that: The outer loop equivalent impedance generation module calculates the theoretically required reverse damping voltage output as the voltage outer loop command value based on the AC system side impedance detected by the high-frequency oscillation detection module, including: When the high-frequency oscillation detection module detects system oscillation, the outer loop equivalent impedance generation module compensates for the voltage of the simulated line impedance to achieve grid impedance cancellation. The resistance and inductance of the compensated simulated line are respectively represented by R. se L se This indicates that the resistance and inductance R se L se The selection needs to take into account the impedance Z of the AC system side. g At this time, the equivalent impedance on the AC system side is: ； Selected resistor and inductor R se L se Make the equivalent impedance Z g ’ Operating within a stable system range can suppress AC system-side oscillations, generating the outer voltage command value V. sedref and V seqref They are respectively: ； ； Among them, I gd and I gq These are the values ​​of the AC system side current in the dq coordinate system, respectively.

5. The DRU-MMC receiver-end high-frequency oscillation suppression device as described in claim 4, characterized in that: The dual closed-loop control module tracks the voltage outer loop command value generated by the outer loop impedance generation module and outputs a modulation signal, including: The outer loop voltage command value V is obtained through the outer loop equivalent impedance generation module. sedref and V seqref Then, the actual voltage output value V of the series converter is compared with the actual voltage output value V through the dual closed-loop control module. sed and V seq The difference is calculated and input to the PI regulator for PI control, thus obtaining the reference value I of the d-axis current output of the series converter. sedref With q-axis current reference value I seqref They are respectively: ； ； Obtain the reference value I of the d-axis current output of the series converter. sedref With q-axis current reference value I seqref Subsequently, the dual closed-loop control module continues to control the actual output current I of the series converter. sed and I seq With dq axis reference current command value I sedref with I seqref Calculate the difference between the two signals, then use a PI controller to perform PI control to obtain the modulation signal m. d and m q : ； 。 6. A method for suppressing high-frequency oscillations at the receiver end of a DRU-MMC, characterized in that, include: Detect the AC system side impedance and detect whether the AC system side voltage has an oscillation trend; If the system is determined to be oscillating, the theoretically required reverse damping voltage is calculated based on the detected AC system side impedance and used as the outer voltage loop command value. Track the generated outer loop voltage command value and output the modulation signal; The modulation signal generates drive pulses for each arm of the power electronic energy converter, thereby controlling the active damping output of the series converter to offset the damping on the AC system side and suppress high-frequency oscillations. Based on the detected AC system side voltage V g Extract the positive sequence voltage phase θ at the grid connection point of the AC system. c and angular frequency ω c Positive sequence voltage phase θ c Used for phase input of the modulation module, angular frequency ω c Used to calculate the theoretically required reverse damping voltage output.

7. The high-frequency oscillation suppression method at the receiver end of DRU-MMC as described in claim 6, characterized in that: The method for detecting whether the AC system side voltage has an oscillation trend includes: Step 1: The power frequency notch filter is used to filter the acquired AC system side voltage V. g Effective removal of fundamental frequency components from the data; Step 2, the tracking and screening process is achieved through a tracking and screening channel, which consists of multiple sub-channels. The signal passes through a power frequency notch filter and enters the equal-frequency multi-signal tracking and screening channel. The sub-channels use phase-locked loops and low-pass filter technology to quickly track the frequency and amplitude of the oscillating signal within the target frequency range. By distributing multiple sub-channels in equal-frequency bands, the entire mid-to-high frequency region is covered. Step 3: The output signals of each sub-channel pass through a threshold judgment stage to achieve rapid detection of medium- and high-frequency oscillation signals.

8. The high-frequency oscillation suppression method at the receiver end of DRU-MMC as described in claim 7, characterized in that: Step 2 specifically includes: Step 2.1, Instantaneous value of three-phase voltage V gj After power frequency notch filtering, the fundamental frequency component is removed, where j = a, b, c; Step 2.2: The processed signal is then input to a frequency set to f. PLL_i In the filtering channels, the initial frequency setting of the PLL for filtering channel i is f. PLL_i ; Step 2.3: To ensure that channel i can accurately detect signal frequencies within a specific frequency band while ignoring signals in other frequency bands, a tracking and filtering step Δf is added to the PLL. k The PLL for channel i is only valid for the frequency range f. PLL_i ±Δf k Track signals within; Step 2.4: By adding a pair of low-pass filters on the d-axis and q-axis respectively, the input signal located at f... PLL_i ±Δf k Frequency components outside the frequency band are significantly attenuated, while signals within the frequency band are preserved. After this processing, the signal is finally transmitted to the threshold judgment stage for further detection and analysis.

9. The high-frequency oscillation suppression method at the receiver end of DRU-MMC as described in claim 6, characterized in that: The step of calculating the theoretically required reverse damping voltage output based on the detected AC system side impedance as the outer voltage loop command value includes: When the high-frequency oscillation detection module detects system oscillation, the outer loop equivalent impedance generation module compensates for the voltage of the simulated line impedance to achieve grid impedance cancellation. The resistance and inductance of the compensated simulated line are respectively represented by R. se L se This indicates that the resistance and inductance R se L se The selection needs to take into account the impedance Z of the AC system side. g At this time, the equivalent impedance on the AC system side is: ； Selected resistor and inductor R se L se Make the equivalent impedance Z g ’ Operating within a stable system range can suppress AC system-side oscillations, generating the outer voltage command value V. sedref and V seqref They are respectively: ； ； Among them, I gd and I gq These are the values ​​of the AC system side current in the dq coordinate system, respectively.

10. The high-frequency oscillation suppression method at the receiving end of DRU-MMC as described in claim 6, characterized in that: The tracking generates an outer loop voltage command value and outputs a modulated signal, including: Obtain the outer loop voltage command value V sedref and V seqref Then, compare the actual voltage output value V of the series converter. sed and V seq The difference is calculated and input to the PI regulator for PI control, thus obtaining the reference value I of the d-axis current output of the series converter. sedref With q-axis current reference value I seqref They are respectively: ； ； Obtain the reference value I of the d-axis current output of the series converter. sedref With q-axis current reference value I seqref Then, continue to control the actual output current I of the series converter. sed and I seq With dq axis reference current command value I sedref with I seqref Calculate the difference between the two signals, then use a PI controller to perform PI control to obtain the modulation signal m. d and m q : ； 。

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