Spwm modulation method for single dc power supply three-level equipment load test

Abstract

The application discloses an SPWM modulation method for single-DC power supply three-level equipment load test, and belongs to the technical field of power electronics. The method is based on an SPWM modulation system, generates an initial sinusoidal modulation wave through input modulation parameters, generates two modulation waveforms after collecting upper and lower bus voltages, compares the two modulation waveforms with a triangular carrier to obtain a switching signal and synthesizes a three-level switching signal, and then controls the operation of a power device. The innovation lies in the fact that the positive and negative half-axes are respectively modulated and then synthesized, the dynamic imbalance of the bus voltage and the load current fluctuation problem under single power supply are solved, no additional closed-loop control is needed, the system complexity and cost are reduced, the output voltage sinusoidal degree and the load current stability are ensured, and the method is suitable for three-level equipment with various topological structures such as wind power converters, energy storage PCSs and the like.

Description

TECHNICAL FIELD

[0001] The application belongs to the technical field of power electronics, and particularly relates to a SPWM modulation method for load test of a three-level device powered by a single direct-current power supply. BACKGROUND

[0002] In the field of power electronics, three-level inverters are widely used in high-voltage applications due to their unique advantages. The typical topology of three-level inverters is the I-type three-level topology, which divides the DC bus voltage into multiple switching devices, reducing the voltage stress on each power device to half of the DC bus voltage, which greatly improves the reliability of the system. In the factory load test of three-level inverters, a specific connection method is usually used, i.e. connecting one end of the load reactor to the AC side of the power unit and the other end to the DC side neutral point of the load reactor, and by precisely controlling the amplitude and frequency of the load current, the rated value of the power unit of the inverter is reached.

[0003] Traditional three-level inverter power supply schemes mostly use dual DC power supplies, such as positive and negative symmetrical bus, to supply power to the positive and negative DC buses of the inverter. However, this scheme requires strict isolation and voltage balance of the dual power supply to ensure the quality of the output current. In actual applications, meeting these requirements undoubtedly greatly increases the complexity of the system, and also leads to a significant increase in cost. In view of this, the single DC bus power supply scheme has emerged. This scheme uses a single DC power supply combined with a capacitor voltage division structure, significantly reducing hardware costs and volume, and greatly simplifying the difficulty of obtaining power supply, which only requires a single rectifier or energy storage device to achieve power supply, and exhibits good economic efficiency and convenience in actual applications.

[0004] In a single direct current power supply three-level inverter, SPWM modulation is a commonly used modulation method. However, the traditional SPWM modulation method has many problems in the case of single direct current power supply. The traditional method directly divides the given output voltage by the direct current bus voltage to obtain the modulation wave, which will cause two key problems. Firstly, there is a current injection effect in the voltage division capacitor structure, which will cause the dynamic imbalance of the upper and lower bus voltages. Since the modulation wave is directly obtained by dividing the given output voltage by the direct current bus voltage, the modulation ratio is fixed and cannot be changed. When the midpoint voltage fluctuates, the output voltage will also fluctuate, thereby causing the load current to fluctuate. In order to ensure the stability of the load current, current sampling is increased for closed-loop control, which not only increases the test cost, but also greatly increases the control difficulty. Secondly, if the upper and lower bus voltages deviate from the normal state for a long time, the duty cycle of the positive and negative half cycles of the modulation wave will be asymmetric due to the actual uneven voltage division. The asymmetry of the modulation will cause the charging and discharging of the midpoint current to be uneven, further widening the deviation of the upper and lower bus voltages, and thus exacerbating the deviation trend of the upper and lower bus voltages. If the deviation state lasts for a long time, one of the capacitor voltages may exceed the rated value, eventually causing the capacitor to age rapidly or even break down, which seriously affects the normal operation and service life of the inverter.

[0005] In summary, the existing SPWM modulation method in the load test of the single direct current power supply three-level inverter has obvious defects and cannot meet the requirements of inverter performance, stability and reliability in actual applications. Therefore, it is urgent to develop a new SPWM modulation method for single direct current power supply three-level device load test to solve the above technical problems and improve the operating performance and reliability of the three-level inverter under single direct current power supply mode. SUMMARY

[0006] The present application aims to solve the above problems of the prior art and provides a SPWM modulation method for single direct current power supply three-level device load test, which uses positive and negative half-axis modulation and synthesis to ensure the sinusoidal degree of the output voltage and the load current when the bus voltage fluctuates, thereby realizing the stability of the load current under single power supply.

[0007] To achieve the above object, the application adopts the following technical solution:

[0008] The SPWM modulation method for single direct current power supply three-level device load test is based on the SPWM modulation system to implement SPWM modulation. The SPWM modulation system includes a power supply module, a sampling circuit, a control unit, a drive circuit and a main circuit topology. The power supply module is in power supply connection with the main circuit topology. The control unit is in electrical connection with the main circuit topology through the sampling circuit and in control connection with the main circuit topology through the drive circuit. The SPWM modulation method comprises the following steps:

[0009] S1, input modulation parameters to the control unit according to load requirements, and use the control unit to generate an initial sinusoidal modulation wave. The sampling circuit is used to collect the upper bus voltage of the power module and main circuit topology. and lower bus voltage and voltage and lower bus voltage Input control unit;

[0010] S2 utilizes the control unit to generate two modulation waveforms based on the initial sinusoidal modulation wave and the upper and lower bus voltages, respectively. and ;

[0011] S3, based on the triangular carrier given by the control unit After preprocessing by the control unit, the two modulated waveforms are respectively coupled with triangular carrier waves. By comparison, obtain and Two-way switch signal waveforms;

[0012] S4, the control unit is based on and Two-way switch signal waveforms generate one-way three-level switch signal waveform ;

[0013] S5, the control unit based on the three-level switch signal waveform Level output switching sequence The drive circuit controls the operation of the power switching devices in the main circuit topology.

[0014] Preferably, in step S1, the modulation parameters include the modulation wave frequency. and modulation amplitude The control unit is based on the formula Generate initial sinusoidal modulated wave ;in, Indicates time.

[0015] Preferably, the power supply module of the SPWM modulation system includes a single DC power supply and a voltage divider capacitor network; the two ends of the voltage divider capacitor network are respectively connected to the positive and negative terminals of the single DC power supply, and are connected to the upper bus capacitor bank. and lower bus capacitor bank The series configuration divides the DC voltage of a single DC power supply into upper and lower parts, forming the basic power supply voltage for a three-level device.

[0016] Preferably, in step S1, a sampling circuit is used to collect the upper bus capacitor pool. Voltage as upper bus voltage , the lower bus capacitor bank is collected voltage as the lower bus voltage .

[0017] Preferably, in the step S2, the control unit generates two modulated waveforms based on the analog divider, i.e. the two modulated waveforms are respectively represented as:

[0018] ;

[0019] .

[0020] Preferably, in the step S3, the peak value of the given triangular carrier is 1 and the valley value is -1.

[0021] Preferably, in the step S3, the pre-processing of the two modulated waveforms by the control unit includes: subtracting the amplitude of the triangular carrier from the sinusoidal modulated waveform based on the analog subtractor, i.e. the zero point is ; and adding the amplitude of the triangular carrier to the sinusoidal modulated waveform based on the analog adder, i.e. the zero point is 1.

[0022] Preferably, in the step S3, the control unit compares the pre-processed two modulated waveforms with the triangular carrier by using the analog comparator, i.e. the two switch signal waveforms are respectively represented as:

[0023] ;

[0024] .

[0025] Preferably, in the step S3, the control unit adds the two switch signal waveforms by using the analog adder to obtain the three-level switch signal waveform, i.e. .

[0026] Preferably, the main circuit topology of the SPWM modulation system includes four insulated gate bipolar transistors, which are respectively , , and ; wherein, the collector of is connected to the positive polarity of the power module, the drain of is connected to​​​​​​​​​​​​​ The collector is connected. Drain and The collector is connected. Drain and The collector is connected. The drain of the device is connected to the negative terminal of the power module.

[0027] Preferably, in step S5, the switching sequence Represented as:

[0028] ;

[0029] in, , , and These represent the insulated-gate bipolar transistors in the main circuit topology. , , and The switch signal is 1 for on and 0 for off.

[0030] The beneficial effects of this invention are:

[0031] 1) This technical solution uses a single DC power supply combined with a voltage divider capacitor network (upper bus capacitor bank and lower bus capacitor bank), requiring only a single rectifier or energy storage device for power supply, significantly reducing hardware costs and system size, and simplifying power acquisition. The single power supply solution avoids the technical challenges of dual power supply isolation design, reduces the use of isolation devices, and further reduces system complexity and cost.

[0032] 2) This technical solution uses a sampling circuit to collect the upper and lower bus voltages in real time, and combines them with an initial sinusoidal modulation wave to generate two independent modulation waveforms. and Based on two independent modulation waveforms and Independent modulation of the positive and negative half-axis is achieved. When the bus voltage fluctuates, the corresponding modulation wave amplitude is automatically adjusted, and the charging time of the upper and lower buses is dynamically balanced through switching logic to suppress the aggravation of voltage deviation. In addition, this technical solution generates two switching signals by preprocessing the two modulation waves (subtracting / adding the triangular carrier amplitude) and independently comparing them with the triangular carrier. and Then synthesize a three-level switching signal. Ensure balanced charging and discharging of the midpoint current to suppress bus voltage deviation from the source.

[0033] 3) The technical solution is to adjust the modulation wave and the triangle carrier by comparing the logic, even if the bus voltage fluctuates, the output voltage can still be guaranteed to be sinusoidal, and the stability of the load current can be maintained. In the wind power converter load experiment, the traditional method of grid-side converter load current effective value fluctuation range is 1068A, and the technical solution reduces to 285A; the machine-side converter reduces from 2318A to 885A. In the single-phase ANPC power unit of the energy storage PCS, the traditional method fluctuates in the range of 3350A, and the technical solution is only 1A, which verifies the significant improvement of the stability of the load current.

[0034] 4) The technical solution improves the modulation method, directly suppresses current fluctuation from the modulation link, does not need additional closed-loop control, simplifies the control logic, reduces the test cost. The output switch sequence is designed through the state machine , combined with the dead time to prevent the power device from being directly connected, to ensure the safety and accuracy of the switch action, avoid the damage of the device or the instability of the output voltage caused by unreasonable switch logic, and further improve the system reliability.

[0035] The technical solution is not only suitable for traditional three-level device topology, but also can be applied to different topological structures such as wind power converter power unit and single-phase ANPC power unit of energy storage PCS, which can adapt to different load requirements by adjusting the modulation parameters, and has wide engineering application prospect. BRIEF DESCRIPTION OF DRAWINGS

[0036] Figure 1 It is a basic implementation flow chart of SPWM modulation method for single DC power supply three-level device load test;

[0037] Figure 2 It is a SPWM modulation signal processing flow chart for single DC power supply three-level device load test;

[0038] Figure 3 It is a single power supply wind power converter power unit load experiment device topology structure schematic diagram;

[0039] Figure 4 It is Figure 3 The grid-side converter adopts the traditional direct bus voltage modulation load current effective value waveform schematic diagram;

[0040] Figure 5 It is Figure 3 The machine-side converter adopts the traditional direct bus voltage modulation load current effective value waveform schematic diagram;

[0041] Figure 6 It is Figure 3 The grid-side converter adopts the technical solution modulation load current effective value waveform schematic diagram;

[0042] Figure 7 For Figure 3 The load current effective value waveform diagram modulated by the machine side converter adopting the technical solution is shown in the figure;

[0043] Figure 8 It is a single power supply energy storage PCS single-phase ANPC power unit load experimental device topology structure schematic diagram;

[0044] Figure 9 For Figure 8 The load current effective value waveform diagram modulated by the topology structure adopting the traditional direct division of bus voltage is shown in the figure;

[0045] Figure 10 For Figure 8 The load current effective value waveform diagram modulated by the topology structure adopting the technical solution is shown in the figure. DETAILED DESCRIPTION

[0046] In order to make the purpose, technical scheme and advantages of the application clearer, the technical scheme in the application will be described clearly and completely below in combination with the drawings in the application. Obviously, the described embodiments are part of the embodiments of the application, rather than all the embodiments.

[0047] Therefore, the following detailed description of the application provided in the drawings is not intended to limit the scope of the claimed application, but only represents selected embodiments of the application. Based on the embodiments in the application, all other embodiments obtained by those of ordinary skill in the art without creative labor are within the scope of protection of the application.

[0048] Embodiment 1

[0049] The embodiment discloses a single direct current power supply three-level equipment load test SPWM modulation method, as a preferred embodiment of the application, the SPWM modulation system includes a power supply module, a sampling circuit, a control unit, a drive circuit and a main circuit topology; the power supply module is in power supply connection with the main circuit topology; the control unit is in electrical connection with the main circuit topology through the sampling circuit, and is in control connection with the main circuit topology through the drive circuit. Based on this, as shown in the figure, the SPWM modulation method of the technical solution comprises the following steps: Figure 1

[0050] S1, input the modulation parameters to the control unit according to the load demand, and generate an initial sinusoidal modulation wave by using the control unit . The upper bus voltage and the lower bus voltage of the power supply module and the main circuit topology are collected by using the sampling circuit, and the upper bus voltage and the lower bus voltage ​Input control unit. Specifically: input modulation parameters to the control unit (such as DSP or FPGA) through the human-computer interaction interface (such as touch screen, host computer software), and the control unit generates high-precision initial sinusoidal modulation wave based on the DDS (direct digital frequency synthesis) technology with the help of phase accumulator and sine lookup table . At the same time, the sampling circuit adopts a voltage dividing resistor network combined with a 12-bit or more ADC chip (such as ADS1115), and combines a differential amplifier circuit (such as INA240) to suppress common-mode interference, respectively collects the upper bus voltage and the lower bus voltage of the power supply module and the main circuit topology, and the sampling frequency is set to 10 times the modulation wave frequency to meet the Nyquist sampling theorem, and finally the collected voltage signal is input to the control unit.

[0051] The core principle of this process is that the sinusoidal modulation wave generation relies on digital signal processing to realize accurate waveform synthesis, ensuring matching with the load voltage level; voltage sampling uses the voltage division principle to convert high voltage signals into low voltage signals that can be received by ADC, and differential sampling eliminates the influence of power supply ground noise, ensuring that the collected upper bus voltage and the lower bus voltage accurately reflect the actual voltage. The traditional scheme uses a fixed DC bus voltage (such as ) for normalization, which cannot adapt to voltage fluctuations (such as ) under the single power supply voltage dividing capacitor structure. This technical solution real-time acquires upper and lower bus voltage fluctuation data, providing a dynamic reference for subsequent modulation wave normalization, which can avoid sudden changes in modulation ratio caused by voltage offset, suppress load current fluctuations from the source, and generate modulation waves that match the load voltage level, ensuring that the output voltage of the three-level device meets the load demand, and providing a standard waveform for subsequent normalization processing.

[0052] S2, generate two modulation waveforms based on the initial sinusoidal modulation wave and the upper and lower bus voltages using the control unit, respectively and . Specifically: the control unit divides the initial sinusoidal modulation wave by the collected upper bus voltage and lower bus voltage based on an analog divider (such as a four-quadrant analog divider chip AD734), and outputs two modulation waveforms, i.e. two modulation waveforms are respectively represented as:

[0053] ;

[0054] .

[0055] The technical solution is based on the essence of division operation, the modulation wave amplitude is scaled according to the actual bus voltage, a normalized waveform matched with the upper and lower bus voltages is formed, and the four-quadrant divider can process positive and negative signals to ensure that the modulation wave can be correctly normalized in the positive and negative half cycles. With When unbalanced, the modulation ratio deviates from the actual demand, resulting in unbalanced midpoint current. And The technical solution is based on the essence of division operation, the modulation wave amplitude is scaled according to the actual bus voltage, a normalized waveform matched with the upper and lower bus voltages is formed, and the four-quadrant divider can process positive and negative signals to ensure that the modulation wave can be correctly normalized in the positive and negative half cycles. When unbalanced, the modulation ratio deviates from the actual demand, resulting in unbalanced midpoint current. For example, if The amplitude decreases, the upper bus switch action duty cycle decreases, the upper bus capacitor charging time decreases, and the voltage further increases, forming a dynamic balance mechanism.

[0056] S3, based on the given triangular carrier of the control unit , the two modulation waveforms are compared with the triangular carrier , and two switch signal waveforms are obtained. And The traditional scheme only compares one modulation waveform with the carrier, which cannot cope with voltage fluctuations in the upper and lower buses. The technical solution compares the two modulation waves with the triangular carrier through preprocessing, so that And correspond to the switch logic of the upper and lower buses, respectively, and independently adjust the duty cycle of the upper and lower buses when the voltage deviates, preventing the midpoint voltage deviation from increasing, thereby suppressing load current fluctuations.

[0057] S4, the control unit generates a three-level switch signal waveform based on the two switch signal waveforms . Specifically: the control unit is an analog adder with differential input structure (such as AD8276), which converts the voltage signals of the two switch signal waveforms And into current signals, and then converts them into voltage outputs through resistance to obtain a three-level switch signal waveform , which ensures the accuracy of the amplitude of the three-level switch signal waveform. The technical solution is based on the principle of superposition, and the input impedance matching of the adder ensures that the signals are superimposed without attenuation, and the output voltage is proportional to the sum of the input voltages, realizing

[0058] ​The physical calculations are as follows. Traditional solutions only compare one modulation waveform with the carrier wave, and the directly obtained three-level switching waveform cannot accurately reflect the fluctuations of the upper and lower buses. The technical solution combines two two-level signals into a three-level signal. The generated three-level switching signal can accurately reflect the voltage fluctuations of the upper and lower buses, providing a foundation for the subsequent drive main circuit topology and ensuring the sinusoidal nature of the output voltage and the stability of the load current.

[0059] S5, the control unit based on the three-level switch signal waveform Level output switching sequence The drive circuit controls the operation of power switching devices in the main circuit topology. Traditional solutions may lead to power device damage or unstable output voltage due to unreasonable switch sequence design. However, this technical solution ensures the correctness and safety of the switch sequence, prevents power device damage, and guarantees the accuracy of the three-level output. It converts digital switch signals into physical switch actions, controls the three-level voltage required by the main circuit topology output, drives the load, and achieves stable control of the load current, meeting the load testing requirements of three-level equipment powered by a single DC power supply.

[0060] Example 2

[0061] This embodiment discloses an SPWM modulation method for load testing of a three-level device powered by a single DC power supply. As a preferred embodiment of the present invention, based on Embodiment 1, in step S1, the modulation parameters include the modulation wave frequency. and modulation amplitude The control unit is based on the formula Generate initial sinusoidal modulated wave .in, Indicates time, modulation amplitude. It is determined by the peak voltage required by the load.

[0062] Example 3

[0063] This embodiment discloses an SPWM modulation method for load testing of a three-level device powered by a single DC power supply. As a preferred embodiment of the invention, based on embodiment 1 or 2, the power module of its SPWM modulation system includes a single DC power supply and a voltage divider capacitor network; the two ends of the voltage divider capacitor network are respectively connected to the positive and negative polarities of the single DC power supply, and are connected to the upper bus capacitor bank. and lower bus capacitor bank The series connection divides the DC voltage of a single power supply into upper and lower parts, forming the basic power supply voltage for a three-level device. Therefore, in step S1, the sampling circuit collects the upper bus capacitor pool data. Voltage as upper bus voltage Collect the lower bus capacitor bank Voltage as lower bus voltage .

[0064] Embodiment 4

[0065] The embodiment discloses an SPWM modulation method for single direct-current power supply three-level equipment load test, as a preferred embodiment of the application, that is, based on any one of embodiments 1-3, in step S3, the control unit generates a symmetrical triangular carrier with a peak value of 1 and a valley value of -1 based on the PWM module of the control unit , the frequency of which is set to tens of times of the modulation wave frequency, and the symmetrical characteristics of the waveform are ensured by adjusting the counter period and the comparison value. The principle of the process is that the triangular carrier is generated through a timer interrupt, and the symmetrical characteristics ensure that the positive and negative half cycles of the modulation wave are balanced.

[0066] Embodiment 5

[0067] The embodiment discloses an SPWM modulation method for single direct-current power supply three-level equipment load test, as a preferred embodiment of the application, that is, based on embodiment 4, in step S3, the preprocessing of the two modulation waveforms by the control unit comprises the following steps: based on an analog subtractor (such as an LM324 operational amplifier), the amplitude of the sinusoidal modulation waveform is subtracted from the triangular carrier (the reference voltage is set to the amplitude 1 of the triangular carrier, and the amplitude is realized through a resistance dividing network), that is , and the zero point is offset to . Based on an analog adder, the amplitude of the triangular carrier is added to the sinusoidal modulation waveform (the reference voltage is set to the amplitude 1 of the triangular carrier, and the amplitude is realized through a same-phase amplification circuit), that is , and the zero point is offset to 1.

[0068] The principle of the process is that the operational amplifier works in the linear region, the signal addition and subtraction operations are realized through a feedback resistance network, so that and are offset to a range matched with the triangular carrier .

[0069] Embodiment 6

[0070] The embodiment discloses an SPWM modulation method for single direct-current power supply three-level equipment load test, as a preferred embodiment of the application, that is, based on any one of embodiments 1-5, in step S3, the control unit is an analog comparator (such as LM339), and the two preprocessed modulation waveforms and ​, inverted terminal triangle carrier triangle carrier , output through pull-up resistor connection 3.3V power supply to form OC gate structure, respectively output and two-way switch signal waveform, wherein:

[0071] ;

[0072] .

[0073] The principle of the process is that the threshold trigger mechanism of the analog comparator realizes waveform digital conversion, and the output level is compatible with the logic input of the control unit.

[0074] Embodiment 7

[0075] The embodiment discloses a SPWM modulation method for single DC power supply three-level equipment load test, which is a preferred embodiment of the present application, that is, based on any one of embodiments 1-6, the main circuit topology of the SPWM modulation system comprises four insulated gate bipolar transistors, which are , , and ; wherein, the collector of is connected with the positive polarity of the power module, the drain of is connected with the collector of , the drain of is connected with the collector of , the drain of

[0076] is connected with the negative polarity of the power module. On this basis, the control unit adopts state machine design according to the level of three-level switch signal waveform , and outputs the corresponding switch sequence through software logic, and the switch sequence

[0077] is represented as: ;

[0078] wherein, , , and respectively represent the insulated gate bipolar transistors , , and The switch signal is 1 for turn-on and 0 for turn-off, and a dead time is added to prevent the IGBT from being short-circuited. The switch sequence is amplified by an optical coupling isolation driving circuit (such as HCPL-3120 and 2SC0435T) to control the gate voltage (such as 0V for turn-off and 15V for turn-on) of the IGBT in the main circuit topology, thereby controlling the operation of the power switch device.

[0079] The specific principle is that the state machine maps the level value of the input signal to the corresponding switch combination according to the state table. The dead time is realized by a timer interrupt to avoid the short circuit of the power supply caused by the simultaneous turn-on of the upper and lower bridge arms of the IGBT. The switch state of the IGBT is controlled by the gate voltage, and different switch combinations realize three-level output (such as

[0080] Embodiment 8

[0081] The embodiment discloses a SPWM modulation method for a three-level device load test powered by a single DC power supply, which is applied to a wind power converter power unit load test device as a preferred embodiment of the application, and the topology is as shown in Figure 3 which comprises a DC power supply , an upper bus capacitor bank , a lower bus capacitor bank , a grid-side converter and a machine-side converter. The voltage of the DC power supply is

[0082] In the grid-side converter, there are IGBTs , , , 、 、 and a load reactor . The grid-side converter is indicated by , , and , which is the main circuit topology of the grid-side converter , , and .The collector of the IGBT is connected to the positive pole of the DC power supply , and the drain of the IGBT ​​​collector of drain connection collector of drain connection collector of drain connection DC power supply negative polarity of collector connection drain of drain connection collector of drain connection collector of. Load reactor two ends are connected respectively drain of drain. Load reactor , the network side converter rated phase voltage , the network side converter rated current .

[0083] In the machine side converter, containing insulated gate bipolar transistor , , , , , and load reactor . Wherein, indicates the machine side, then , , and namely the main circuit topology of the network side converter ( , , and ). collector connection DC power supply positive polarity of drain connection collector of drain connection collector of drain connection collector of drain connection DC power supply negative polarity of collector connection drain of drain connection collector of drain connection collector of. Load reactor two ends are connected respectively drain of The drain of the load reactor The rated phase voltage of the machine-side converter The rated current of the machine-side converter .

[0084] The drain of the load reactor and The collector of the load reactor The drain of the load reactor and The collector of the load reactor. The upper bus capacitor One end is connected to The collector of the load reactor and The collector of the load reactor (also the positive polarity of the DC power supply ), the other end of the upper bus capacitor Is connected with one end of the lower bus capacitor The drain of the load reactor and The collector of the load reactor, the other end of the lower bus capacitor Is connected to The drain of the load reactor and The drain of the load reactor (also the negative polarity of the DC power supply ). On this basis, the voltage acquisition module I is connected across the upper bus capacitor For acquiring the upper bus voltage , and the voltage acquisition module II is connected across the lower bus capacitor For acquiring the lower bus voltage . The grid-side converter and the machine-side converter both adopt the SPWM modulation method as shown in

[0085] In the embodiment, the modulation wave frequency of the grid-side converter is Figure 2 , and the modulation wave frequency of the machine-side converter is , and since the use steps of the technical solution in the grid-side converter and the machine-side converter are completely the same, for the convenience of description, the following steps are represented by The modulation wave frequency. The steps are as follows:

[0086] S1, input the modulation wave frequency And the modulation wave amplitude To the control unit according to the load demand, generate an initial sinusoidal modulation wave Using the control unit; the voltages of the upper bus capacitor bank And the lower bus capacitor bank Are respectively acquired as the upper bus voltage And the lower bus voltage Input the control unit using the sampling circuit (voltage acquisition module I and voltage acquisition module II).

[0087] ​S2, the control unit based on the initial sine modulation wave and bus voltage generated two modulation waveform, respectively, for and ; two modulation waveform is represented as: and .

[0088] S3, based on the control unit given triangle carrier , two modulation waveform through the control unit after pretreatment, respectively, with the triangle carrier comparison, get and two road switch signal waveform. Wherein, given triangle carrier range is , the pretreatment of two modulation waveform includes: based on the analog subtractor on the sine modulation waveform minus the amplitude of the triangle carrier , namely , zero point ; based on the analog adder on the sine modulation waveform plus the amplitude of the triangle carrier , namely , zero point is 1. By comparing the triangle carrier , respectively, and , get the range is and the range is two level waveform and , represented as:

[0089] ;

[0090] .

[0091] S4, the and two road switch signal waveform is added to obtain three level switching signal waveform , namely .

[0092] S5, the control unit according to the three level switching signal waveform the level of the output switch sequence to the drive circuit, through the drive circuit control main circuit topology in the power switch device operation. Wherein, switch sequence represented as:

[0093] ;

[0094] wherein, , , and respectively represent the switching signals of the four insulated gate bipolar transistors in the main circuit topology, 1 represents turn-on, and 0 represents turn-off. In the grid-side converter, the four switching signals are represented as , , and respectively, and correspond to the gates of , , and respectively; in the machine-side converter, the four switching signals are represented as , , and respectively, and correspond to the gates of , , and respectively.

[0095] Figure 4 and Figure 5 are the fluctuation conditions of the grid-side converter and the machine-side converter when a conventional modulation method of directly dividing by the bus voltage is used. Among them, Figure 4 is the waveform of the grid-side converter load current effective value, and the fluctuation range difference between 8s~10s is 1068A; Figure 5 is the waveform of the machine-side converter load current effective value, and the fluctuation range difference between 8s~10s is 2318A.

[0096] Figure 6 and Figure 7 are the fluctuation conditions of the grid-side converter and the machine-side converter when a single DC power supply three-level equipment load test SPWM modulation method proposed in the technical solution is used, wherein Figure 6 is the waveform of the grid-side converter load current effective value, and the fluctuation range difference between 8s~10s is 285A; Figure 7 is the waveform of the machine-side converter load current effective value, and the fluctuation range difference between 8s~10s is 885A.

[0097] Comparing Figure 4 and Figure 6 , and Figure 5 and Figure 7 , the grid-side and machine-side load current effective value fluctuations are greatly reduced, verifying the effectiveness of the technical solution.

[0098] Embodiment 12

[0099] This embodiment discloses an SPWM modulation method for load testing of a three-level device powered by a single DC power supply. As a preferred embodiment of the present invention, it is applied to a load testing device for a single-phase ANPC power unit of an energy storage PCS, the topology of which is as follows: Figure 8 As shown, it includes: a DC power supply Upper bus capacitor bank Lower bus capacitor bank And a single-phase ANPC topology. The DC power supply... voltage , .

[0100] Single-phase ANPC topology includes , Main circuit topology ( , , and and load reactor . The collector is connected to a DC power supply. The positive polarity, drain connection The collector, Drain connection The collector, drain connection The collector, The drain is connected to the DC power supply. The negative polarity; collector connection The drain electrode, drain connection The collector, drain connection The collector. Load reactor. Connect the two ends respectively Drain and The drain of the load reactor. The rated phase voltage of the power unit is 658V, and the rated current of the power unit is 1880A.

[0101] If this technical solution is adopted, Figure 2 The SPWM modulation method shown below has the following steps:

[0102] S1, input the modulation wave frequency to the control unit according to the load demand. and modulation amplitude The control unit generates the initial sinusoidal modulated wave. The sampling circuits (voltage acquisition module I and voltage acquisition module II) are used to collect data from the upper bus capacitor pool. and lower bus capacitor bank the voltage of the upper bus as the upper bus voltage and the voltage of the lower bus as the lower bus voltage an input control unit.

[0103] S2, the control unit generates two modulated waveforms based on the initial sinusoidal modulation wave and the upper and lower bus voltages, respectively as and ; the two modulated waveforms are respectively represented as: and .

[0104] S3, based on the control unit giving a triangular carrier , the two modulated waveforms are respectively compared with the triangular carrier after being preprocessed by the control unit, to obtain two switching signal waveforms and . Among them, the given triangular carrier ranges from , the preprocessing of the two modulated waveforms includes: based on the analog subtractor, subtracting the amplitude of the triangular carrier from the sinusoidal modulation waveform , that is , and the zero point is ; based on the analog adder, adding the amplitude of the triangular carrier to the sinusoidal modulation waveform , that is , and the zero point is 1. By comparing the triangular carrier with and respectively, two two-level waveforms and ranging from and are obtained, which are represented as:

[0105] ;

[0106] .

[0107] S4, adding the two switching signal waveforms and to obtain a three-level switching signal waveform , that is .

[0108] S5, the control unit outputs a switching sequence to the driving circuit according to the level of the three-level switching signal waveform , and controls the operation of the power switching device in the main circuit topology through the driving circuit. Among them, the switching sequence is represented as:

[0109] ;

[0110] wherein, 、 、 and respectively represent the switching signals of the four insulated gate bipolar transistors in the main circuit topology of the energy storage PCS power unit topology, 1 represents turn-on, and 0 represents turn-off. 、 、 and respectively correspond to 、 、 、 .

[0111] Figure 9 When a conventional SPWM modulation method of directly dividing by the bus voltage is used, the fluctuation of the load current effective value of the energy storage PCS single-phase ANPC power unit is 3350 A in the fluctuation range difference of 8s~10s.

[0112] Figure 10 When the SPWM modulation method of a single direct current power supply for three-level device load test is used, the fluctuation of the load current effective value of the energy storage PCS single-phase ANPC power unit is 1 A in the fluctuation range difference of 8s~10s.

[0113] By comparing Figure 9 and Figure 10 , the fluctuation of the load current effective value of the energy storage PCS single-phase ANPC power unit is greatly reduced, verifying the effectiveness of the technical solution.

Claims

1. A SPWM modulation method for single DC power supply three-level equipment load test, characterized in that, The application discloses a SPWM modulation method and system. S1, inputting modulation parameters to the control unit according to load requirements, generating an initial sinusoidal modulation wave by the control unit ; collecting upper bus voltage and lower bus voltage of the power module and main circuit topology by the sampling circuit , and inputting the voltage and the lower bus voltage to the control unit ; S2, the control unit generates two modulated waveforms based on the initial sinusoidal modulating wave and the upper and lower bus voltages according to an analog divider, the two modulated waveforms are respectively represented as and ​ S3, the control unit to give the triangular carrier , two modulation waveform through the control unit after the pre-processing, respectively, with the triangular carrier comparison, get and two-way switch signal waveform; S4, the control unit adds two switch signal waveforms through an analog adder and generates a three-level switch signal waveform ; S5, the control unit based on the three-level switch signal waveform Level output switching sequence The drive circuit controls the operation of the power switching devices in the main circuit topology.

2. The SPWM modulation method for testing the load of the single DC power supply three-level device according to claim 1, wherein, In step S1, the modulation parameters include the modulation wave frequency. and modulation amplitude The control unit is based on the formula Generate initial sinusoidal modulated wave ;in, Indicates time.

3. The SPWM modulation method for testing the load of the single DC power supplied three-level device according to claim 1, wherein, The power module of the SPWM modulation system comprises a single direct current power supply DC and a voltage dividing capacitor network; the voltage dividing capacitor network is connected with the positive polarity and the negative polarity of the single direct current power supply DC respectively by an upper bus capacitor bank and a lower bus capacitor bank in series, divides the voltage of the single direct current power supply DC into two parts, and forms a basic power supply voltage of a three-level device.

4. The SPWM modulation method for testing the load of the single DC power supply three-level device according to claim 3, wherein, In the step S1, the sampling circuit is used to collect the upper bus capacitor bank The voltage is taken as the upper bus voltage The lower bus capacitor bank is collected The voltage is taken as the lower bus voltage .

5. The SPWM modulation method for testing the load of the single DC power supply three-level device according to claim 1, wherein, In the step S3, the triangular carrier with a peak of 1 and a trough of -1.

6. The SPWM modulation method for testing the load of the single DC power supply three-level device as claimed in claim 5, wherein, The SPWM modulation system comprises a power module, a sampling circuit, a control unit, a driving circuit and a main circuit topology; the power module is connected with the main circuit topology in power supply; the control unit is electrically connected with the main circuit topology through the sampling circuit and is connected with the main circuit topology in control through the driving circuit; the SPWM modulation method comprises the following steps: In the step S3, the preprocessing of the two modulation waveforms by the control unit comprises: Based on analog subtractor in sinusoidal modulation waveform Subtracting the amplitude of the triangular carrier from the sine wave, i.e. , the zero point is ; Based on analog adders in sinusoidal modulation waveforms Add a triangular carrier The amplitude, i.e. The zero point is 1.

7. The SPWM modulation method for testing the load of the single DC power supply three-level device according to claim 1, wherein, In the step S3, the control unit is to use an analog comparator to compare the two pre-processed modulation waveforms with a triangular carrier wave respectively, i.e. and The two switch signal waveforms are represented as: ； 。 8. The SPWM modulation method for testing the load of the single DC power supply three-level device according to claim 1, wherein, The main circuit topology of the SPWM modulation system comprises four insulated gate bipolar transistors, respectively 、 、 and ; wherein, the collector is connected with the positive polarity of the power module, the drain is connected with the collector, the drain is connected with the collector, the drain is connected with the collector, the drain is connected with the negative polarity of the power module.

9. The SPWM modulation method for testing the load of the single DC power supply three-level device according to claim 8, characterized in that, In the step S5, the switching sequence is represented as: ； wherein, , , and represent the switching signals of the insulated gate bipolar transistors , , and in the main circuit topology, 1 represents turn-on, and 0 represents turn-off.

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