Printed circuit board for embedded components and method for manufacturing the same

Abstract

The application relates to the technical field of printed circuit boards, and discloses a printed circuit board with embedded components and a manufacturing method of the printed circuit board with embedded components. The manufacturing method of the printed circuit board with embedded components comprises the following steps: providing an embedding layer, wherein the embedding layer comprises a first core plate, a first dielectric layer, an intermediate layer, a second dielectric layer and a second core plate, the intermediate layer comprises an intermediate core plate, a power assembly is arranged in the embedding layer, the power assembly comprises a heat dissipation base and components; a first connecting layer and a first circuit increasing layer are sequentially stacked on the side of the second core plate away from the second dielectric layer, the components are arranged on the side of the heat dissipation base facing the first connecting layer; and the embedding layer, the first connecting layer and the first circuit increasing layer are subjected to a pressing treatment. The printed circuit board with embedded components and the manufacturing method of the printed circuit board with embedded components provided by the application can improve the problem that the board is prone to warping during pressing in the process of manufacturing the printed circuit board with embedded components.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of printed circuit boards, and in particular to a printed circuit board with embedded components and a manufacturing method thereof. BACKGROUND

[0002] With the volume of electronic products becoming smaller and smaller, the available area of the corresponding printed circuit boards is becoming smaller and smaller, while the electronic components on the printed circuit boards are becoming more and more numerous, so that some components need to be embedded in the interior of the printed circuit board. In order to meet the requirements of dense wiring and the working environment of large current, a heat dissipation base needs to be placed at the bottom of the embedded components (such as chips), and the heat dissipation base and the components form a power assembly.

[0003] Generally, the printed circuit board with embedded components is a semi-embedded structure. After embedding the power assembly into the embedding groove of the embedding layer, a semi-cured sheet and a copper foil are sequentially covered on the side where the components of the power assembly are located, and after multiple lamination, drilling is performed to make the chip and the circuit conductive. However, during the pressing process, the problem of board warping is easily caused, which further causes damage to the components and uneven mounting of the product in the later stage. SUMMARY

[0004] The present application provides a printed circuit board with embedded components and a manufacturing method thereof, which is used to improve the problem of board warping during the pressing process of manufacturing the printed circuit board with embedded components.

[0005] In a first aspect, the embodiments of the present application provide a manufacturing method of a printed circuit board with embedded components, comprising:

[0006] An embedding layer is provided, which comprises a first core plate, a first dielectric layer, an intermediate layer, a second dielectric layer and a second core plate arranged in sequence and stacked, the intermediate layer comprises an intermediate core plate, the embedding layer is internally provided with a power assembly, the power assembly comprises a heat dissipation base and a component arranged on the heat dissipation base;

[0007] A first connecting layer and a first circuit increasing layer are sequentially stacked on the side of the second core plate away from the second dielectric layer, the component is located on the side of the heat dissipation base facing the first connecting layer;

[0008] The embedding layer, the first connecting layer and the first circuit increasing layer are subjected to a pressing process.

[0009] In some embodiments, the first core plate and the second core plate are symmetrically arranged about the intermediate layer; and / or, the first dielectric layer and the second dielectric layer are symmetrically arranged about the intermediate layer.

[0010] In some embodiments, the intermediate layer further comprises an intermediate dielectric layer, and two intermediate core boards are arranged between the intermediate dielectric layer, one of the intermediate core boards is arranged between the first dielectric layer and the intermediate dielectric layer, and the other of the intermediate core boards is arranged between the second dielectric layer and the intermediate dielectric layer.

[0011] In some embodiments, the two intermediate core boards are symmetrically arranged with respect to the intermediate dielectric layer.

[0012] In some embodiments, the thickness of the first line-increasing layer is less than or equal to 10 μm.

[0013] In some embodiments, the pressing process of the embedded layer, the first connecting layer and the first line-increasing layer comprises:

[0014] pressing the embedded layer, the first connecting layer and the first line-increasing layer using a press at a preset temperature rising rate until the pressing temperature of the press rises to a first temperature, and the preset temperature rising rate is 1 ℃ / min-3 ℃ / min;

[0015] pressing the embedded layer, the first connecting layer and the first line-increasing layer using the press at the first temperature for a preset time length;

[0016] pressing the embedded layer, the first connecting layer and the first line-increasing layer using the press at a preset temperature falling rate until the pressing temperature of the press falls to a second temperature, and the preset temperature falling rate is 0.4 ℃ / min-0.6 ℃ / min.

[0017] In some embodiments, the pressing process of the embedded layer, the first connecting layer and the first line-increasing layer comprises:

[0018] pressing the embedded layer, the first connecting layer and the first line-increasing layer using a press at a first pressure, and the first pressure is 50 PSI-100 PSI;

[0019] pressing the embedded layer, the first connecting layer and the first line-increasing layer using the press at a second pressure, and the second pressure is 200 PSI-300 PSI;

[0020] pressing the embedded layer, the first connecting layer and the first line-increasing layer using the press at a third pressure, and the third pressure is 300 PSI-500 PSI.

[0021] In some embodiments, when the first connecting layer and the first circuitry increasing layer are sequentially stacked on the side of the second core plate away from the second dielectric layer, a false pressing layer is stacked on the side of the first core plate away from the first dielectric layer; and when the embedding layer, the first connecting layer and the first circuitry increasing layer are subjected to the pressing process, the false pressing layer, the embedding layer, the first connecting layer and the first circuitry increasing layer are subjected to the pressing process.

[0022] In some embodiments, after the embedding layer, the first connecting layer and the first circuitry increasing layer are subjected to the pressing process, the method for manufacturing the printed circuit board of the embedded component further comprises:

[0023] a first hole penetrating through the first connecting layer and the first circuitry increasing layer is processed, and the component defines a bottom surface of the first hole;

[0024] a first conductive part is filled in the first hole, and the component and the first circuitry increasing layer are connected with the first conductive part.

[0025] In a second aspect, the embodiments of the present application provide a printed circuit board of an embedded component, which is manufactured by the method for manufacturing the printed circuit board of the embedded component as described in the first aspect.

[0026] The method for manufacturing the printed circuit board of the embedded component provided by the embodiments of the present application has the beneficial effect that, since the embedding layer comprises the first core plate, the first dielectric layer, the intermediate layer, the second dielectric layer and the second core plate which are sequentially and laminatedly arranged, the intermediate layer comprises the intermediate core plate, the embedding layer is internally provided with the power assembly, and the power assembly comprises the heat dissipation base and the component arranged on the heat dissipation base, when the first connecting layer and the first circuitry increasing layer are sequentially stacked on the side of the second core plate away from the second dielectric layer, and the embedding layer, the first connecting layer and the first circuitry increasing layer are subjected to the pressing process, the rigidity of the embedding layer can be improved by the intermediate core plate, the stress of the circuitry increasing layer can be balanced, and the problem of board warping is less likely to occur.

[0027] The printed circuit board of the embedded component provided by the present application has the beneficial effect compared with the prior art, which can be explained by referring to the beneficial effect of the method for manufacturing the printed circuit board of the embedded component provided by the present application, which will not be described herein again. BRIEF DESCRIPTION OF DRAWINGS

[0028] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings needed to be used in the embodiments or the prior art description will be briefly introduced as follows. Obviously, the drawings in the following description are only some embodiments of the present application, and other drawings can be obtained by those skilled in the art without any creative labor.

[0029] Figure 1 is a flow chart of a manufacturing method of a printed circuit board with embedded components in one embodiment of the present application;

[0030] Figure 2 is a structural schematic diagram of a printed circuit board with embedded components in one embodiment of the present application;

[0031] Figure 3 is a structural schematic diagram of a printed circuit board with embedded components in another embodiment of the present application.

[0032] The meanings of the marks in the figures are as follows:

[0033] 10, embedded layer;

[0034] 101, heat dissipation base; 102, component; 11, first core plate; 12, first dielectric layer; 13, intermediate layer; 131, intermediate core plate; 132, intermediate dielectric layer; 14, second dielectric layer; 15, second core plate;

[0035] 20, first connecting layer;

[0036] 30, first circuitry build-up layer;

[0037] 40, second connecting layer;

[0038] 50, second circuitry build-up layer;

[0039] 60, first conductive part; 61, first heat conductive part;

[0040] 70, second conductive part; 71, second heat conductive part. DETAILED DESCRIPTION

[0041] In order to make the objectives, technical solutions and advantages of the present application clearer, the present application will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and should not be used to limit the present application.

[0042] It should be noted that when an element is referred to as being "fixed to" or "set on" another element, it can be directly on the other element or indirectly on the other element. When an element is referred to as being "connected to" another element, it can be directly connected to the other element or indirectly connected to the other element.

[0043] In addition, the terms "first" and "second" are only used for descriptive purposes and should not be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined with "first" and "second" can explicitly or implicitly include one or more of the features. In the description of the present application, the meaning of "a plurality of" is two or more, unless otherwise specifically limited.

[0044] In this specification, references to "one embodiment," "some embodiments," or simply "embodiment" mean that one or more embodiments of this application include a specific feature, structure, or characteristic described in connection with that embodiment. Therefore, the phrases "in one embodiment," "in some embodiments," "in other embodiments," "in still other embodiments," etc., appearing in different parts of this specification do not necessarily refer to the same embodiment, but rather mean "one or more, but not all, embodiments," unless otherwise specifically emphasized. Furthermore, in one or more embodiments, specific features, structures, or characteristics may be combined in any suitable manner.

[0045] To illustrate the technical solution of this application, the following description is provided in conjunction with specific accompanying drawings and embodiments.

[0046] As electronic products become smaller, the usable area of ​​their corresponding printed circuit boards (PCBs) becomes smaller, while the number of electronic components on the PCBs increases. Therefore, it is necessary to embed some components inside the PCB. To meet the requirements of dense wiring and high-current operating environments, heat sinks need to be placed under the embedded components (such as chips). The heat sinks and components together form a power assembly.

[0047] Generally, printed circuit boards with embedded components have a semi-embedded structure. That is, after the power components are embedded in the embedding groove of the embedding layer, a prepreg and copper foil are sequentially covered on the side where the power components are located. After multiple laminations, holes are drilled to connect the chips and circuits.

[0048] Since the rigidity and modulus of the dielectric layer in the embedded layer are less than those of the core board, when laminating to add layers, lamination is only performed on one side. If the rigidity of the embedded layer is insufficient, the stress of the copper foil during lamination will cause the board to warp, which will lead to component damage and uneven product mounting in the later stages.

[0049] In view of this, this application provides a printed circuit board for embedded devices and a method for manufacturing the same. Since the embedded layer includes a first core board, a first dielectric layer, an intermediate layer, a second dielectric layer and a second core board arranged sequentially and in layers, and the intermediate layer includes an intermediate core board, and a power component is disposed inside the embedded layer, the power component includes a heat sink base and components disposed on the heat sink base, so when the first connection layer and the first line addition layer are stacked sequentially on the side of the second core board away from the second dielectric layer, and the embedded layer, the first connection layer and the first line addition layer are pressed together, the rigidity of the embedded layer can be improved by the intermediate core board, the stress of the line addition layer can be balanced, and the problem of board warping is not easy to occur.

[0050] Please refer to Figure 1 and Figure 2In a first aspect, embodiments of this application provide a method for manufacturing a printed circuit board with embedded components, comprising:

[0051] S100: An embedded layer 10 is provided. The embedded layer 10 includes a first core board 11, a first dielectric layer 12, an intermediate layer 13, a second dielectric layer 14, and a second core board 15 arranged sequentially and in layers. The intermediate layer 13 includes an intermediate core board 131. A power component is disposed inside the embedded layer 10. The power component includes a heat sink 101 and components 102 disposed on the heat sink 101.

[0052] The first core board 11, the second core board 15, and the third core board can all be copper-clad laminates or optical core boards. The first dielectric layer 12 and the second dielectric layer 14 can both be prepregs, etc. For example, the first dielectric layer 12 and the second dielectric layer 14 are both formed by laminating two prepregs with a thickness of 0.075mm, model 7628, and an RC64% adhesive content. The high adhesive content and flowability of the prepregs allow for sufficient filling of the gaps between the power components and the first core board 11 and the second core board 15.

[0053] The heat sink 101 can be a ceramic block, an aluminum block, or a copper block, etc. One or more components 102 can be provided, and the components 102 can be chips, etc. The embedded layer 10 can be provided with embedded grooves that penetrate the intermediate core plate 131. The power components are disposed within the embedded grooves. Embedded openings are provided on the first core plate 11, the first dielectric layer 12, the intermediate layer 13, the second dielectric layer 14, and the second core plate 15 to form embedded grooves.

[0054] It should be noted that if the intermediate layer 13 is not provided, there is only a dielectric layer between the first core board 11 and the second core board 15. At this time, the dielectric layer is thick and lacks rigidity, which results in insufficient rigidity of the entire embedded layer 10.

[0055] The relationship between stiffness and elastic modulus is as follows:

[0056] The elastic modulus is an intrinsic parameter of a material, representing the magnitude of the internal stress of the material under unit strain. The larger the elastic modulus, the smaller the elastic deformation of the material under the same external force. For example, the elastic modulus of metals is higher than that of resins, therefore metals are less prone to deformation under stress.

[0057] Stiffness is typically expressed by the formulas K = (E*A) / L, which represents tensile / compressive stiffness, and K = (E*I) / (L^3), which represents bending stiffness, where E is the modulus of elasticity, and A, I, and L are the cross-sectional area, moment of inertia, and length, respectively. It is evident that increasing the modulus of elasticity directly improves stiffness.

[0058] For example, the elastic modulus of the core board after lamination is approximately 20-25 GPA, while that of the prepreg after lamination is approximately 15-20 GPA. The core board is a fully cured material with high molecular cross-linking and stable modulus. The prepreg undergoes secondary resin curing during lamination, which may cause localized modulus fluctuations due to uneven flow. Therefore, the modulus of the prepreg after lamination is inherently lower than that of the core board. Furthermore, the uneven flow during prepreg lamination further exacerbates the product warpage problem.

[0059] For example, the thickness of the first core board 11 and the second core board 15 is 0.2 mm, and the thickness of the intermediate core board 131 is 0.4 mm.

[0060] Understandably, if the thickness of the embedded layer 10 is adjusted, the thickness of the first core board 11 and the second core board 15 can also be adjusted, specifically based on the thickness of the embedded layer 10. The first core board 11, the second core board 15, and the intermediate core board 131 can be fabricated using conventional methods such as lamination, exposure, development, and etching to create the inner layer circuitry. If the embedded layer 10 has no circuitry, it can be etched into a bare board, while retaining the bottom copper layer on the side furthest from the component 102.

[0061] S200: The first connection layer 20 and the first line addition layer 30 are stacked sequentially on the side of the second core board 15 away from the second dielectric layer 14, and the component 102 is located on the side of the heat sink 101 facing the first connection layer 20.

[0062] The first connecting layer 20 can be a prepreg, etc. The first circuit enhancement layer 30 can be copper foil or a core board, etc. The embedded layer 10, the first connecting layer 20 and the first circuit enhancement layer 30 can be connected together by rivets and positioned by pins. A high-temperature resistant protective film can be first attached to the side of the first core board 11 away from the first dielectric layer 12 to fix the power component.

[0063] S300: The embedded layer 10, the first connecting layer 20 and the first line addition layer 30 are pressed together.

[0064] During the pressing process, the first dielectric layer 12, the second dielectric layer 14, and the first connecting layer 20 first become molten, filling the gap between the inner wall of the embedded groove and the power component before solidifying.

[0065] It should be noted that without the intermediate layer 13, there is only a dielectric layer between the first core board 11 and the second core board 15. In order to fill the gap between the inner wall of the embedded groove and the power component, a dielectric layer of sufficient thickness is required. However, increasing the thickness of the dielectric layer will prolong its resin curing time, resulting in more significant internal stress accumulation. For example, the thickness of the prepreg of the 1080 model after lamination is approximately 0.2 mm. If the thickness exceeds 0.25 mm, it may cause interlayer delamination or deformation.

[0066] In the method for manufacturing a printed circuit board for embedded components provided in this application embodiment, by setting an intermediate layer 13 including an intermediate core board 131, the strength of the embedded layer 10 can be improved. At the same time, the thickness of the first dielectric layer 12 and the second dielectric layer 14 can be made thinner, thereby reducing the accumulation of internal stress after the first dielectric layer 12 and the second dielectric layer 14 melt and solidify, thus making it less likely to cause board warping.

[0067] As can be seen from the above, the method for manufacturing a printed circuit board with embedded components provided in this application embodiment, since the embedded layer 10 includes a first core board 11, a first dielectric layer 12, an intermediate layer 13, a second dielectric layer 14 and a second core board 15 arranged sequentially and in layers, the intermediate layer 13 includes an intermediate core board 131, and a power component is disposed inside the embedded layer 10. The power component includes a heat sink 101 and a component 102 disposed on the heat sink 101. Therefore, when the first connection layer 20 and the first line enhancement layer 30 are stacked sequentially on the side of the second core board 15 away from the second dielectric layer 14, and the embedded layer 10, the first connection layer 20 and the first line enhancement layer 30 are pressed together, the rigidity of the embedded layer 10 can be improved by the intermediate core board 131, the stress of the line enhancement layer can be balanced, and the problem of board warping is not easy to occur.

[0068] As one possible implementation, in some embodiments, after laminating the embedded layer 10, the first interconnect layer 20, and the first line addition layer 30, the method for manufacturing a printed circuit board with embedded components further includes:

[0069] First, a first hole is machined to penetrate the first connecting layer 20 and the first line addition layer 30, and the component 102 defines the bottom surface of the first hole.

[0070] The first hole can be machined using methods such as mechanical milling and laser processing. One or more first holes can be provided. Additionally, if the core boards of the embedded layer 10 require conductive circuitry, through holes or blind holes can be drilled from the inner circuit layer to each core board of the embedded layer 10.

[0071] Secondly, the first conductive part 60 is filled into the first hole, and the component 102 and the first line addition layer 30 are both connected to the first conductive part 60.

[0072] Specifically, the first conductive portion 60 can be filled into the first hole by copper plating, while the first circuit layer 30 can be thickened by electroplating. Simultaneously, a copper layer is formed in the through-holes or blind holes from the inner circuit layer to the chip pads and to the heat sink 101 blind holes, as well as from the inner circuit layer to the embedded layer 10 core board, thus making the inner circuit layer conductive with the chip, heat sink 101, or core board layer. The material of the first conductive portion 60 can be copper.

[0073] By adopting the above scheme, electrical conduction between component 102 and the first line addition layer 30 can be achieved.

[0074] Optionally, when processing the first hole through the first connecting layer 20 and the first line enhancement layer 30, a second hole through the first connecting layer 20 and the first line enhancement layer 30 is also processed, and the heat dissipation base 101 defines the bottom surface of the second hole; the first heat-conducting part 61 is filled in the first hole, and both the heat dissipation base 101 and the first line enhancement layer 30 are connected to the first heat-conducting part 61.

[0075] With this configuration, the heat generated by the first heat-conducting part 61 can be conducted to the first line layer 30.

[0076] It should be noted that multiple second holes can be provided, and the material of the first heat-conducting part 61 can be copper or the like. After the first conductive part 60 is filled into the first hole, the first circuit fabrication can be performed on the first circuit enhancement layer 30 by means of film application, exposure, development, and etching. The first circuit enhancement layer 30 may include a first circuit part and a second circuit part spaced apart, the first circuit part being connected to the first conductive part 60, and the second circuit part being connected to the first heat-conducting part 61.

[0077] It is understandable that, after filling the first conductive portion 60 into the first hole, the manufacturing method of the printed circuit board with embedded components also includes:

[0078] First, the second connecting layer 40 and the second line addition layer 50 are stacked on the first line addition layer 30 and then pressed together.

[0079] The second connecting layer 40 can be a prepreg, etc. The second circuit layer 50 can be copper foil or core board, etc.

[0080] Next, a third hole penetrating the second connecting layer 40 and the second circuit layer 50, and a fourth hole penetrating the second connecting layer 40 and the second circuit layer 50 are machined. The first circuit portion defines the bottom surface of the third hole, and the second circuit portion defines the bottom surface of the fourth hole. At the same time, if there are designed circuit connections between the outer circuit layer and each core board of the embedded layer 10, through holes or blind holes can also be drilled simultaneously between the outer circuit layer and each core board layer of the embedded layer 10.

[0081] Then, the second conductive part 70 and the second heat-conducting part 71 are filled into the third hole and the fourth hole respectively. The third line part of the first line part and the second line enhancement layer 50 are both connected to the second conductive part 70, and the fourth line part of the second line part and the second line enhancement layer 50 are both connected to the second heat-conducting part 71. It may also include forming a copper layer in the through holes or blind holes from the outer layer line to the inner layer line and from the outer layer line to the core board of the embedded layer 10, so that the outer layer line is connected to the inner layer line and the core board layer of the embedded layer 10.

[0082] It is also understandable that by filling the third and fourth holes with the second conductive part 70 and the second heat-conducting part 71 respectively, the connecting layer and the circuit layer can be stacked on the second circuit layer 50 for multiple layering operations, which will not be elaborated here.

[0083] After filling the third and fourth holes with the second conductive part 70 and the second heat-conducting part 71 respectively, the second circuit layer 50 can be fabricated, and then the solder resist, character, quality inspection and packaging and shipping processes are carried out, which are completed in the conventional production method.

[0084] Please refer to Figure 2 In some embodiments, the first core board 11 and the second core board 15 are symmetrically arranged with respect to the intermediate layer 13; and / or, the first dielectric layer 12 and the second dielectric layer 14 are symmetrically arranged with respect to the intermediate layer 13.

[0085] This design allows the embedded layer 10 to have a centrally symmetrical structure, thus offsetting the stress and better balancing the internal stress of the embedded layer 10, preventing board warping.

[0086] Please refer to Figure 3 In another embodiment, the intermediate layer 13 further includes an intermediate dielectric layer 132. Two intermediate core boards 131 are provided, and the intermediate dielectric layer 132 is located between the two intermediate core boards 131. One intermediate core board 131 is located between the first dielectric layer 12 and the intermediate dielectric layer 132, and the other intermediate core board 131 is located between the second dielectric layer 14 and the intermediate dielectric layer 132.

[0087] By adopting the above scheme, the thick dielectric layer that needs to be set in the embedded layer 10 can be divided into a thinner first dielectric layer 12, an intermediate dielectric layer 132, and a second dielectric layer 14, which ensures that the inner wall of the embedded groove and the gap between the power components can be filled, thus improving the rigidity of the embedded layer 10.

[0088] It should be noted that the intermediate medium layer 132 can be a prepreg, etc.

[0089] Optionally, the two intermediate core plates 131 are arranged symmetrically about the intermediate dielectric layer 132.

[0090] This design allows the embedded layer 10 to have a centrally symmetrical structure, thus offsetting the stress and better balancing the internal stress of the embedded layer 10, preventing board warping.

[0091] For example, the thickness of the embedded layer 10 is 1.25 mm, the thickness of the first core board 11, the second core board 15, and the two intermediate core boards 131 is 0.2 mm, and the thickness of the first dielectric layer 12, the second dielectric layer 14, and the intermediate dielectric layer 132 is 0.15 mm thick, composed of two 0.075 mm thick prepreg sheets. The prepreg sheet can be a 7628 prepreg sheet with an RC64% adhesive content. If the thickness of the embedded layer 10 is adjusted, the number and thickness of the prepreg sheets can be adjusted accordingly, specifically determined by the thickness of the embedded layer 10.

[0092] In the method for manufacturing a printed circuit board for embedded components provided in this application embodiment, the two core boards in the related technology are decomposed into four core boards: a first core board 11, a second core board 15, and two intermediate core boards 131. These four core boards are of equal thickness. At the same time, the dielectric layer between the two core boards in the related technology is decomposed into the four core boards. While ensuring sufficient filling of the gap between the power component and the embedded groove, the pressing stress concentrated in the same dielectric layer is dispersed into three layers. The first core board 11, the second core board 15, the two intermediate core boards 131, the first dielectric layer 12, the second dielectric layer 14, and the intermediate dielectric layer 132 are all symmetrical structures. When the pressing structure is symmetrical, the stress is canceled out. At the same time, since the core board is a fully cured material with high molecular cross-linking degree and stable modulus, the stress of the prepreg is canceled out during the pressing process, while the core board remains fixed. Its overall rigidity is stable and it is not easy to deform.

[0093] It should be noted that among the four core boards consisting of the first core board 11, the second core board 15, and the two intermediate core boards 131, the wiring can be transferred to the two core boards facing the outer layer, or to the upper and lower core boards among the four core boards, or the wiring can be distributed to the four core boards. No specific limitation is made here.

[0094] Optionally, the thickness of the first line addition layer 30 is less than or equal to 10 μm, such as 10 μm, 9 μm or 8 μm.

[0095] This design allows for a thinner first line layer 30, reducing the initial stress during lamination.

[0096] Please refer to Figure 1 and Figure 2 In some embodiments, the embedded layer 10, the first connecting layer 20, and the first line addition layer 30 are subjected to a lamination process, including:

[0097] First, a press is used to press the embedded layer 10, the first connecting layer 20 and the first circuit addition layer 30 at a preset heating rate until the pressing temperature of the press rises to the first temperature. The preset heating rate is 1℃ / min-3℃ / min, such as 1℃ / min, 2℃ / min or 3℃ / min.

[0098] The initial temperature of the press can be 100℃-140℃, and the first temperature can be 140℃-230℃.

[0099] Next, a press is used to press the embedded layer 10, the first connecting layer 20 and the first line addition layer 30 at a first temperature for a preset time.

[0100] Then, a press is used to press the embedded layer 10, the first connecting layer 20 and the first line addition layer 30 at a preset cooling rate until the pressing temperature of the press drops to the second temperature. The preset cooling rate is 0.4℃ / min-0.6℃ / min, such as 0.4℃ / min, 0.5℃ / min or 0.6℃ / min.

[0101] By adopting the above scheme, stress abrupt changes can be reduced by controlling the preset heating rate, and residual thermal stress can be reduced by using a stepped cooling process with a preset cooling rate.

[0102] Optionally, the embedded layer 10, the first connecting layer 20, and the first line addition layer 30 are subjected to a lamination process, including:

[0103] First, a press is used to press the embedded layer 10, the first connecting layer 20 and the first line addition layer 30 with a first pressure of 50PSI-100PSI, such as 50PSI, 80PSI or 100PSI.

[0104] Next, a press is used to press the embedded layer 10, the first connecting layer 20 and the first line addition layer 30 with a second pressure. The magnitude of the second pressure is 200PSI-300PSI, such as 200PSI, 250PSI or 300PSI.

[0105] Then, a press is used to press the embedded layer 10, the first connecting layer 20 and the first line addition layer 30 with a third pressure. The magnitude of the third pressure is 300PSI-500PSI, such as 300PSI, 400PSI or 500PSI.

[0106] This setup allows for the balance between stress transmission and the deformation risk of the first line layer 30 through three-stage pressure control.

[0107] As one possible approach, when using a press to press the embedded layer 10, the first connecting layer 20, and the first line addition layer 30 at a preset heating rate, the magnitude of the first pressure exerted by the press on the embedded layer 10 and the first line addition layer 30 is from 50 PSI to 100 PSI, and the temperature of the press can be from an initial temperature of 100°C to 140°C.

[0108] When the press is used to press the embedded layer 10, the first connecting layer 20 and the first line addition layer 30 at a first temperature for a preset time, the second pressure of the press on the embedded layer 10 and the first line addition layer 30 is 200PSI-300PSI, and the temperature of the press can be 140℃-230℃.

[0109] When the press is used to press the embedded layer 10, the first connecting layer 20 and the first line addition layer 30 with the third pressure (final pressure setting), the magnitude of the third pressure of the press on the embedded layer 10 and the first line addition layer 30 is 300PSI-500PSI, and the temperature of the press can be 230℃.

[0110] The cooling rate of the press after pressing is 0.4℃ / min-0.6℃ / min.

[0111] This setup allows for the balance between stress transfer and the deformation risk of the first line layer 30 through three-stage pressure control and a reduction in the cooling rate.

[0112] Please refer to Figure 1 and Figure 2 In some embodiments, when the first connecting layer 20 and the first line addition layer 30 are stacked sequentially on the side of the second core board 15 away from the second dielectric layer 14, a dummy layer is stacked on the side of the first core board 11 away from the first dielectric layer 12; when the embedded layer 10, the first connecting layer 20 and the first line addition layer 30 are pressed together, the dummy layer, the embedded layer 10, the first connecting layer 20 and the first line addition layer 30 are pressed together.

[0113] By adopting the above scheme, the stress of the first connecting layer 20 and the first line addition layer 30 can be better balanced by the pressure layer, making it less likely for the board to warp.

[0114] It should be noted that the dummy laminate can be a bare core board, an aluminum sheet, or other materials. After the product is manufactured, the dummy laminate can be removed and the product can be packaged and shipped. The dummy laminate can be bonded to a high-temperature resistant protective film.

[0115] Secondly, embodiments of this application provide a printed circuit board for embedded components, which is manufactured by the method for manufacturing a printed circuit board for embedded components as described in the first aspect.

[0116] The printed circuit board with embedded components provided in this application embodiment includes a first core board 11, a first dielectric layer 12, an intermediate layer 13, a second dielectric layer 14, and a second core board 15 arranged sequentially and in layers. The intermediate layer 13 includes an intermediate core board 131. A power component is disposed inside the embedded layer 10. The power component includes a heat sink 101 and a component 102 disposed on the heat sink 101. Therefore, when the first connection layer 20 and the first line enhancement layer 30 are stacked sequentially on the side of the second core board 15 away from the second dielectric layer 14, and the embedded layer 10, the first connection layer 20, and the first line enhancement layer 30 are pressed together, the rigidity of the embedded layer 10 can be improved by the intermediate core board 131, the stress of the line enhancement layer can be balanced, and the problem of board warping is not easy to occur.

[0117] The above embodiments are only used to illustrate the technical solutions of this application, and are not intended to limit them. Although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of this application, and should all be included within the protection scope of this application.

Claims

1. A method of manufacturing a printed circuit board for a buried component, characterized by, The application relates to a power module embedded layer, which comprises a first core plate, a first medium layer, an intermediate layer, a second medium layer and a second core plate arranged in sequence and in layers, the intermediate layer comprises an intermediate core plate, the power module is arranged in the embedded groove, the embedded windows are arranged on the first core plate, the first medium layer, the intermediate layer, the second medium layer and the second core plate to form the embedded groove, the power module comprises a heat dissipation base and components arranged on the heat dissipation base, the intermediate layer further comprises an intermediate medium layer, the intermediate core plate is arranged in two, and the intermediate medium layer is arranged between the two intermediate core plates, one of the intermediate core plates is arranged between the first medium layer and the intermediate medium layer, and the other intermediate core plate is arranged between the second medium layer and the intermediate medium layer, and the intermediate medium layer is a prepreg. A first connecting layer and a first circuit increasing layer are arranged in sequence on the side of the second core plate away from the second medium layer, and the components are arranged on the side of the heat dissipation base facing the first connecting layer. The embedded layer, the first connecting layer and the first circuit increasing layer are subjected to a pressing treatment, the first medium layer and the second medium layer are first changed into a molten state, and then the gap between the inner wall of the embedded groove and the power module is filled and solidified. The first core plate and the second core plate are symmetrically arranged about the intermediate layer; and / or the first medium layer and the second medium layer are symmetrically arranged about the intermediate layer.

2. The method for manufacturing a printed circuit board with embedded components according to claim 1, characterized in that, The two intermediate core plates are symmetrically arranged about the intermediate medium layer.

3. The method of claim 1, wherein the step of forming the plated through hole comprises the steps of: forming a first plated through hole in the substrate; and forming a second plated through hole in the substrate, the second plated through hole being formed after the first plated through hole. The thickness of the first circuit increasing layer is less than or equal to 10 mu m.

4. The method for manufacturing a printed circuit board with embedded components according to claim 1, characterized in that, The pressing treatment of the embedded layer, the first connecting layer and the first circuit increasing layer comprises the following steps:

5. The method for manufacturing a printed circuit board with embedded components according to claim 1, characterized in that, A pressing machine is used to press the embedded layer, the first connecting layer and the first circuit increasing layer at a preset temperature rising rate until the pressing temperature of the pressing machine rises to a first temperature, and the preset temperature rising rate is 1 DEG C / min-3 DEG C / min; The pressing machine is used to press the embedded layer, the first connecting layer and the first circuit increasing layer for a preset time length at the first temperature; The pressing machine is used to press the embedded layer, the first connecting layer and the first circuit increasing layer at a preset temperature falling rate until the pressing temperature of the pressing machine falls to a second temperature, and the preset temperature falling rate is 0.4 DEG C / min-0.6 DEG C / min. The pressing treatment of the embedded layer, the first connecting layer and the first circuit increasing layer comprises the following steps:

6. The method for manufacturing a printed circuit board for embedded components according to claim 1, characterized in that, A pressing machine is used to press the embedded layer, the first connecting layer and the first circuit increasing layer at a first pressure, and the first pressure is 50 PSI-100 PSI; The pressing machine is used to press the embedded layer, the first connecting layer and the first circuit increasing layer at a second pressure, and the second pressure is 200 PSI-300 PSI; ​ The press is used to perform a pressing process on the embedding layer, the first connecting layer and the first circuitry increasing layer with a third pressure, and the third pressure is 300 PSI-500 PSI.

7. The method of manufacturing a printed circuit board for a buried component according to any one of claims 1 to 6, wherein When the first connecting layer and the first circuitry increasing layer are sequentially stacked on the side of the second core plate away from the second dielectric layer, a false pressing layer is stacked on the side of the first core plate away from the first dielectric layer; when the embedding layer, the first connecting layer and the first circuitry increasing layer are pressed, the false pressing layer, the embedding layer, the first connecting layer and the first circuitry increasing layer are pressed.

8. The method of manufacturing a printed circuit board for a buried component according to any one of claims 1 to 6, wherein After the embedding layer, the first connecting layer and the first circuitry increasing layer are pressed, the method for manufacturing the printed circuit board of the embedded component further comprises: a first hole penetrating through the first connecting layer and the first circuitry increasing layer is processed, and the component defines a bottom surface of the first hole; a first conductive part is filled in the first hole, and the component and the first circuitry increasing layer are connected with the first conductive part.

9. A printed circuit board for a buried component, characterized by The printed circuit board of the embedded component is processed by the method for manufacturing the printed circuit board of the embedded component according to any one of claims 1 to 8.

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