IGBT device
By introducing shielding gate trenches and p-type body regions with different doping concentrations into IGBT devices, combined with voltage and charge combinations, the problem of high turn-off loss in IGBT devices is solved, achieving lower turn-off loss and higher switching performance.
Patent Information
- Application Number
- CN202510964367.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-07-14
- Publication Date
- 2025-10-28
AI Technical Summary
During turn-off, IGBT devices suffer from low carrier concentration distribution, increased saturation voltage drop, large turn-off losses, and a tailing phenomenon in turn-off current due to the low hole injection efficiency at the boundary between the p-type body region and the n-type drift region.
By introducing shielded gate trenches and p-type body regions with different doping concentrations into IGBT devices, and combining low threshold voltage with large gate charge and high threshold voltage with small gate charge, the region separation of fast turn-off and delayed turn-off can be achieved by controlling the turn-off process of the current channel.
This effectively reduces the turn-off loss of IGBT devices, minimizes the turn-off loss in the region combining high threshold voltage and small gate charge, and improves the switching performance of the devices.
Smart Images
Figure CN120857531A_ABST
Abstract
Description
Technical Field
[0001] This invention belongs to the field of semiconductor power device technology, and in particular relates to an IGBT device. Background Technology
[0002] An Insulated Gate Bipolar Transistor (IGBT) is a composite device made of a Metal Oxide Semiconductor (MOS) transistor and a bipolar transistor. The input electrode of an IGBT is a MOS transistor, and the output electrode is a PNP transistor. It combines the advantages of both types of transistors: the low drive power and fast switching speed of MOS transistors, and the low saturation voltage drop and large capacitance of bipolar transistors. However, due to the low hole injection efficiency at the boundary between the p-type body region and the n-type drift region, the carrier concentration in IGBT devices is very low, leading to a high saturation voltage drop. During turn-off, a large number of minority carriers are stored in the n-type drift region, resulting in severe turn-off current tailing and high turn-off losses. Summary of the Invention
[0003] In view of this, the object of the present invention is to provide an IGBT device to reduce the turn-off loss of the IGBT device.
[0004] To achieve the above-mentioned objectives of this invention, this invention provides an IGBT device, comprising:
[0005] The n-type semiconductor layer, and the following located within the n-type semiconductor layer:
[0006] A plurality of shielding grid grooves arranged in sequence, wherein a shielding grid structure is provided in the shielding grid grooves;
[0007] A p-type body region is provided between two adjacent shielding grid trenches. A portion of the p-type body region is defined as the first p-type body region, and the remaining p-type body region is defined as the second p-type body region. The turn-on voltage of the current channel in the first p-type body region is less than the turn-on voltage of the current channel in the second p-type body region.
[0008] A first gate is provided between the first p-type body region and the shielding gate trenches on both sides, and a second gate is provided between the second p-type body region and the shielding gate trenches on both sides. The width of the first gate is greater than the width of the second gate, and a gate dielectric layer is provided between the first gate, the second gate and the n-type semiconductor layer.
[0009] Optionally, each of the shielding trenches has the same width, and the spacing between adjacent shielding trenches is the same.
[0010] Optionally, the doping concentration of the first p-type body region is less than the doping concentration of the second p-type body region.
[0011] Optionally, an n-type charge storage region located within the n-type semiconductor layer is provided below both the first gate and the second gate.
[0012] Optionally, it may also include a p-type collector region located below the n-type semiconductor layer.
[0013] Optionally, it also includes an n-type collector region, which is located below the n-type semiconductor layer and is alternately spaced with the p-type collector region.
[0014] Optionally, it also includes an n-type field cutoff region, which is located between the p-type collector region and the n-type semiconductor layer.
[0015] Optionally, the shielding grid structure includes a shielding grid and a field oxide layer.
[0016] The IGBT device of this invention combines a low threshold voltage Vth1 with a large gate charge Qg1, and a high threshold voltage Vth2 with a small gate charge Qg2. During the IGBT device's turn-on to turn-off process, the current channel in the region where the high threshold voltage Vth2 and small gate charge Qg2 are combined is quickly turned off, while the current channel in the region where the low threshold voltage Vth1 and large gate charge Qg1 are combined is turned off later. Therefore, when the current channel in the region where the high threshold voltage Vth2 and small gate charge Qg2 are combined is just turned off, the current channel in the region where the low threshold voltage Vth1 and large gate charge Qg1 are combined is still in a conducting state. As the gate voltage further decreases, the current channel in the region where the low threshold voltage Vth1 and large gate charge Qg1 are combined is turned off. Thus, the IGBT device exhibits reduced turn-off losses in the region where the low threshold voltage Vth1 and large gate charge Qg1 are combined, while reducing the turn-off losses in the region where the high threshold voltage Vth2 and small gate charge Qg2 are combined, thereby reducing the overall turn-off loss of the IGBT device. Attached Figure Description
[0017] To more clearly illustrate the technical solutions of exemplary embodiments of the present invention, the accompanying drawings used in describing the embodiments are briefly introduced below.
[0018] Figure 1 This is a cross-sectional structural schematic diagram of an embodiment of the IGBT device provided by the present invention. Detailed Implementation
[0019] The technical solution of the present invention will be fully described below with reference to the accompanying drawings of the embodiments of the present invention. Obviously, the described embodiments are only some, not all, of the embodiments of the present invention. Furthermore, to clearly illustrate the specific implementation of the present invention, the schematic diagrams in the accompanying drawings are enlarged to show the thickness of the layers and regions described in the present invention, and the sizes of the figures do not represent actual dimensions.
[0020] Figure 1 This is a cross-sectional structural schematic diagram of an embodiment of the IGBT device provided by the present invention, as shown below. Figure 1 As shown, the IGBT device of the present invention includes an n-type semiconductor layer 20, a p-type collector region 31 and an n-type collector region 32 located below the n-type semiconductor layer 20, the p-type collector region 31 and the n-type collector region 32 being alternately spaced below the n-type semiconductor layer 20. An n-type field-stop region 33 is also provided between the p-type collector region 31, the n-type collector region 32 and the n-type semiconductor layer 20. The p-type collector region, the n-type collector region and the n-type field-stop region are the basic structures in an IGBT device, and will not be described in detail in the embodiments of the present invention.
[0021] A plurality of shielding gate trenches 21 arranged sequentially within the n-type semiconductor layer 20, Figure 1 Only four shielding trenches 21 are shown as an example, and Figure 1 The shielding gate trenches 21 on both sides are shown only as examples of half a shielding gate trench. A shielding gate structure is provided within the shielding gate trench 21, which typically includes a shielding gate 22 and a field oxide layer 23. The shielding gate 22 is typically connected to the emitter voltage. Preferably, each shielding gate trench 21 has the same width C, and the spacing D between adjacent shielding gate trenches 21 is the same. This results in a uniform electric field near the bottom of each shielding gate trench, giving the IGBT device a more stable withstand voltage.
[0022] A p-type body region is provided between two adjacent shielding gate trenches 21. A portion of this p-type body region is defined as the first p-type body region 24a, and the remaining p-type body region is defined as the second p-type body region 24b. Both the first p-type body region 24a and the second p-type body region 24b contain n-type emitter regions 25. The turn-on voltage of the current channel in the first p-type body region 24a is lower than the turn-on voltage of the current channel in the second p-type body region 24b. That is, the cell containing the first p-type body region 24a has a low threshold voltage Vth1, and the cell containing the second p-type body region 24b has a high threshold voltage Vth2. The current channel structure is a basic structure in IGBT devices and will not be described in detail in this embodiment. To achieve the goal of making the turn-on voltage of the current channel in the first p-type body region 24a lower than that in the second p-type body region 24b, different structures can be used. For example, the doping concentration of the first p-type body region 24a can be lower than that of the second p-type body region 24b; or different gate dielectric layer thicknesses and different channel implantation methods can be used. These will not be described in detail in this invention.
[0023] A first gate 2 is disposed between the first p-type body region 24a and the shielding gate trenches 21 on both sides, and a second gate 1 is disposed between the second p-type body region 24b and the shielding gate trenches 21 on both sides. The width A of the first gate 2 is greater than the width B of the second gate 1. Therefore, the cell containing the first gate 2 has a larger gate charge Qg than the cell containing the second gate 1. That is, the cell containing the first gate 2 has a large gate charge Qg1, and the cell containing the second gate 1 has a small gate charge Qg2. A gate dielectric layer is disposed between the first gate 2, the second gate 1, and the n-type semiconductor layer.
[0024] In this embodiment of the invention, the first gate 2 is adjacent to the first p-type body region 24a, and the second gate 1 is adjacent to the second p-type body region 24b, such that the low threshold voltage Vth1 combines with the large gate charge Qg1, and the high threshold voltage Vth2 combines with the small gate charge Qg2. Thus, during the process of the IGBT device from turn-on to turn-off, the current channel in the region where the high threshold voltage Vth2 and the small gate charge Qg2 are combined will be turned off quickly, while the current channel in the region where the low threshold voltage Vth1 and the large gate charge Qg1 are combined will be turned off later. Therefore, when the current channel in the region where the high threshold voltage Vth2 and the small gate charge Qg2 are combined is just turned off, the current channel in the region where the low threshold voltage Vth1 and the large gate charge Qg1 are combined is still in the conducting state. As the gate voltage Vg further decreases, the current channel in the region where the low threshold voltage Vth1 and the large gate charge Qg1 are combined is turned off. Therefore, the IGBT device exhibits turn-off losses in the region where the low threshold voltage Vth1 and the large gate charge Qg1 are combined, while the turn-off losses in the region where the high threshold voltage Vth2 and the small gate charge Qg2 are combined are reduced, thus lowering the overall turn-off loss of the IGBT device.
[0025] In the IGBT device of the present invention, an n-type charge storage region 28 located in the n-type semiconductor layer 20 may also be provided below each first gate 2 and second gate 1. The n-type charge storage region is also a basic structure in the IGBT device, and will not be described in detail in the embodiments of the present invention.
[0026] The above specific implementation methods and embodiments are specific support for the technical concept of the present invention, and should not be used to limit the scope of protection of the present invention. Any equivalent changes or modifications made on the basis of the technical solution based on the technical concept proposed by the present invention shall still fall within the scope of protection of the technical solution of the present invention.
Claims
1. An IGBT device, characterized in that, include: The n-type semiconductor layer, and the following located within the n-type semiconductor layer: A plurality of shielding grid grooves arranged in sequence, wherein a shielding grid structure is provided in the shielding grid grooves; A p-type body region is provided between two adjacent shielding grid trenches. A portion of the p-type body region is defined as the first p-type body region, and the remaining p-type body region is defined as the second p-type body region. The turn-on voltage of the current channel in the first p-type body region is less than the turn-on voltage of the current channel in the second p-type body region. A first gate is provided between the first p-type body region and the shielding gate trenches on both sides, and a second gate is provided between the second p-type body region and the shielding gate trenches on both sides. The width of the first gate is greater than the width of the second gate, and a gate dielectric layer is provided between the first gate, the second gate and the n-type semiconductor layer.
2. The IGBT device as described in claim 1, characterized in that, Each of the shielding grid trenches has the same width, and the spacing between adjacent shielding grid trenches is the same.
3. The IGBT device as described in claim 1, characterized in that, The doping concentration of the first p-type body region is less than that of the second p-type body region.
4. The IGBT device as described in claim 1, characterized in that, Both the first gate and the second gate are provided with an n-type charge storage region located within the n-type semiconductor layer.
5. The IGBT device as described in claim 1, characterized in that, It also includes a p-type collector region, which is located below the n-type semiconductor layer.
6. The IGBT device as described in claim 5, characterized in that, It also includes an n-type collector region, which is located below the n-type semiconductor layer and is alternately spaced with the p-type collector region.
7. The IGBT device as described in claim 5, characterized in that, It also includes an n-type field cutoff region, which is located between the p-type collector region and the n-type semiconductor layer.
8. The IGBT device as described in claim 1, characterized in that, The shielding grid structure includes a shielding grid and a field oxide layer.