Gallium nitride-based miniature light-emitting diode with low side wall damage and preparation method of gallium nitride-based miniature light-emitting diode

Abstract

The invention discloses a gallium nitride-based miniature light-emitting diode with low side wall damage and a preparation method thereof, and relates to the technical field of light-emitting tube preparation, and the preparation method comprises the steps: carrying out the evaporation of a current diffusion layer on a gallium nitride epitaxial wafer, and carrying out the evaporation of an etching mask on the current diffusion layer; transferring a preset mask pattern to the etching mask and the current diffusion layer through etching in sequence by utilizing photoetching; etching the mesa of the micro light-emitting diode on the gallium nitride epitaxial wafer through an inductively coupled plasma etching process to obtain the mesa of the micro light-emitting diode; performing side wall passivation on the micro light-emitting diode table-board by using an atomic layer etching process to obtain a micro light-emitting diode table-board after side wall passivation; and evaporating a plurality of passivation layers on the micro light-emitting diode table board with the passivated side wall to obtain the gallium nitride-based light-emitting diode with the low side wall damage. According to the invention, the preparation of the miniature light-emitting diode with extremely low side wall damage is realized, and the light emitting efficiency of the miniature light-emitting diode is effectively improved.

Description

Technical Field

[0001] This invention relates to a gallium nitride-based micro light-emitting diode with low sidewall damage and its fabrication method, belonging to the field of light-emitting diode fabrication technology. Background Technology

[0002] Light-emitting diodes (LEDs) are currently the most widely used lighting source, boasting advantages such as high brightness, long lifespan, fast response speed, and environmental friendliness. The combination of semiconductor micro-nano manufacturing technology and LED devices has brought even more possibilities to LED performance. When the size of an LED is reduced to below 50μm, it can be called a micro-LED (or μLED).

[0003] In the manufacturing process, inductively coupled plasma etching (ICP) technology can create numerous defects in the sidewall regions of Micro-LEDs. Since sidewall light emission accounts for a large proportion of the light extraction efficiency of small-sized Micro-LEDs, these sidewall defects have a significant impact on their performance. Repairing the sidewall damage caused by ICP dry etching is an indispensable part of high-efficiency Micro-LED research.

[0004] In current Micro-LED manufacturing processes, wet etching combined with sidewall passivation is typically used to reduce sidewall defects caused by etching. A layer of SiO2 is deposited on the top of the etched Micro-LED mesa as a protective layer, and then the sample is placed in an alkaline solution such as KOH to wet-etch the gallium nitride (GaN) sidewalls. Although chemical etching removes sidewall damage and reduces surface state defect density, sidewall stability remains poor, making it prone to degradation in air, leading to reduced performance. Therefore, it is necessary to deposit an inorganic passivation layer on the mesa sidewalls to further reduce sidewall defects and surface states, and to protect the sidewall region.

[0005] Furthermore, due to the anisotropic crystal structure of GaN, the etching rate is inconsistent and has a specific directionality (e.g., KOH etching will choose the C-face of GaN, while tetramethylammonium hydroxide (TMAH) etching will choose the m-face of GaN), making the process difficult to control. At the same time, GaN-based Micro-LEDs are composed of multiple layers of different materials (u-type gallium nitride (u-GaN), quantum well (MQW), p-type gallium nitride (p-GaN), etc.), and the etching direction and rate of different materials are also different, further reducing the stability of the process.

[0006] Among the existing methods for reducing sidewall etching damage, some researchers have used atomic layer deposition (ALD) to passivate materials such as Al2O3 or SiN to repair the sidewalls after KOH etching, thereby reducing sidewall damage. However, due to the uncontrollable nature of the KOH etching process, the repair effect is limited. Summary of the Invention

[0007] The purpose of this invention is to overcome the shortcomings of the prior art and provide a gallium nitride-based micro light-emitting diode with low sidewall damage and its fabrication method, thereby achieving the fabrication of a micro light-emitting diode with extremely low sidewall damage and effectively improving the light extraction efficiency of the micro light-emitting diode.

[0008] To achieve the above objectives, the present invention is implemented using the following technical solution: On one hand, the present invention provides a method for fabricating a gallium nitride-based micro light-emitting diode with low sidewall damage, comprising: A current diffusion layer is deposited on a gallium nitride epitaxial wafer, and an etching mask is deposited on the current diffusion layer. Photolithography is used to sequentially transfer a pre-set mask pattern onto an etching mask and a current diffusion layer via etching. The mesa of a micro light-emitting diode is obtained by etching a micro light-emitting diode on a gallium nitride epitaxial wafer using an inductively coupled plasma etching process. A micro LED mesa is obtained by sidewall passivation using atomic layer etching (ALT) technology. The process includes a modification process and an etching process. The modification process parameters include a power supply of 300-400W, a pressure of 6-10 mTorr, and a chlorine flow rate of 40-70 sccm. The etching process parameters include a power supply of 200-500W, a pressure of 10-15 mTorr, and an argon flow rate of 10-30 sccm. Gallium nitride-based light-emitting diodes with low sidewall damage are obtained by depositing multiple passivation layers on the micro light-emitting diode mesa after sidewall passivation.

[0009] Furthermore, the current diffusion layer is made of indium tin oxide, and the thickness of the indium tin oxide is 150~200nm; and / or, the etching mask is made of silicon dioxide, and the thickness of the silicon dioxide is 500~600nm.

[0010] Furthermore, the preset mask pattern on the etching mask is obtained by an advanced oxide etching process, and the preset mask pattern on the current diffusion layer is obtained by an inductively coupled plasma etching process.

[0011] Furthermore, the etching depth of the gallium nitride epitaxial wafer is 1.2~1.4μm; and / or, the etching parameters of the inductively coupled plasma etching process include a power supply of 300~500W, a pressure of 6~10mTorr, a chamber temperature of 70~80℃, a chlorine flow rate of 30~40sccm, and a boron chloride flow rate of 10~20sccm.

[0012] Furthermore, the passivation layer is made of silicon dioxide and includes a first passivation layer and a second passivation layer arranged from near to far from the micro LED mesa after passivation of the sidewall. The thickness of the first passivation layer is 20~30nm and the thickness of the second passivation layer is 150~200nm.

[0013] Furthermore, the first passivation layer is produced using atomic layer deposition (ALD) and the second passivation layer is produced using inductively coupled plasma chemical vapor deposition (ICP-CVD).

[0014] Furthermore, in the atomic layer deposition process, the thickness ratio of the top and sidewalls of the micro LED mesa is 1:1, and in the inductively coupled plasma chemical vapor deposition process, the thickness ratio of the top and sidewalls is 2:1.

[0015] Furthermore, the vapor deposition process parameters for the first passivation layer include a deposition temperature of 200~400℃, a power of 200~300W, a pressure of 1~10Torr, a silane flow rate of 50~100sccm, and an oxygen flow rate of 50~100sccm. The vapor deposition process parameters for the second passivation layer include a deposition temperature of 100~300℃, a pressure of 1~20 Torr, a silane flow rate of 5~20 sccm, and an N2O flow rate of 20~50 sccm.

[0016] On the other hand, the present invention also provides a gallium nitride-based micro light-emitting diode with low sidewall damage, which is prepared by the method for preparing a gallium nitride-based micro light-emitting diode with low sidewall damage as described in any of the above claims.

[0017] Compared with the prior art, the beneficial effects achieved by the present invention are as follows: This invention combines inductively coupled plasma etching (ICP) and atomic layer etching (ALE) technologies, leveraging the advantages of ICP's high etching rate and ALE's low damage to achieve etching of micro-LEDs with extremely low sidewall damage. It also combines atomic layer deposition (ALD) and inductively coupled plasma chemical vapor deposition (ICPCVD) to achieve the growth of a double passivation layer film, achieving both film quality and growth speed, further protecting the sidewalls, and completing the fabrication of gallium nitride-based micro-LEDs with extremely low sidewall damage. The gallium nitride-based micro LED with extremely low sidewall damage provided by this invention has smoother sidewalls and lower sidewall damage than conventional etching methods, which reduces the loss of light emitted from the sidewalls. Furthermore, theoretical calculations show that the light extraction efficiency and surface light emission efficiency are effectively improved compared to etching methods, which is more conducive to the light emission of the micro LED. Attached Figure Description

[0018] Figure 1 This is a schematic diagram of the process flow for depositing the current diffusion layer and etching the mask layer in the method for fabricating a sidewall-damaged gallium nitride micro light-emitting diode according to an embodiment of the present invention. Figure 2 This is a schematic diagram of the process flow for etching the current diffusion layer and etching the mask layer in the method for fabricating a sidewall-damaged gallium nitride micro light-emitting diode according to an embodiment of the present invention. Figure 3 This is a schematic diagram of the process flow for etching the epitaxial wafer in the fabrication method of a sidewall-damaged gallium nitride micro light-emitting diode according to one embodiment of the present invention. Figure 4 This is a schematic diagram of the sidewall passivation process in the fabrication method of a sidewall-damaged gallium nitride micro light-emitting diode according to one embodiment of the present invention. Figure 5 This is a scanning electron microscope schematic diagram of the sidewall-damaged gallium nitride micro-light-emitting diode prepared in Example 1 of the present invention, wherein the left side is an oblique view and the right side is a cross-sectional view; Figure 6 This is a scanning electron microscope schematic diagram of the sidewall-damaged gallium nitride micro-light-emitting diode prepared in Comparative Example 3 of the present invention, wherein the left side is an oblique view and the right side is a cross-sectional view; Figure 7 This is a scanning electron microscope schematic diagram of the sidewall-damaged gallium nitride micro-light-emitting diode prepared in Comparative Example 1 of the present invention. Figure 8 This is a scanning electron microscope schematic diagram of the sidewall-damaged gallium nitride micro-light-emitting diode prepared in Comparative Example 2 of the present invention. Figure 9 This is a schematic diagram showing the effect of the mesa tilt angle on the light extraction efficiency of the sidewall-damaged gallium nitride micro-light-emitting diodes prepared in Example 1 and Comparative Example 1 of the present invention. Figure 10 This is a schematic diagram showing the effect of the mesa tilt angle on the surface light extraction efficiency of the sidewall-damaged gallium nitride micro-light-emitting diodes prepared in Embodiment 1 and Comparative Example 2 of the present invention. Figure 11 This is a schematic diagram showing the relationship between the sidewall tilt angle and the surface light emission ratio of a micro LED. Detailed Implementation

[0019] The present invention will be further described below with reference to the accompanying drawings. The following embodiments are only used to more clearly illustrate the technical solution of the present invention, and should not be used to limit the scope of protection of the present invention. Example 1

[0020] like Figure 1 As shown, this embodiment of the invention provides a method for fabricating a sidewall-damaged gallium nitride micro-light-emitting diode, comprising the following steps: A 150 nm indium tin oxide (ITO) layer is deposited on a gallium nitride (GaN) epitaxial wafer on a sapphire substrate as a current diffusion layer, and then a 500 nm silicon dioxide layer is deposited on the indium tin oxide layer using plasma enhanced chemical vapor deposition (PECVD) as an etching mask.

[0021] Then, the preset mask pattern is transferred to silicon dioxide by photolithography using advanced oxide etching (AOE). Using silicon dioxide as a hard mask, the indium tin oxide layer is etched by ion beam etching (IBE). Finally, gallium nitride with a thickness of 1.2~1.4μm is etched by inductively coupled plasma etching (ICP). The etching parameters of ICP are: power supply of 300~500W, pressure of 6~10mTorr, chamber temperature of 70~80℃, chlorine flow rate of 30~40sccm, and boron chloride flow rate of 10~20sccm. The mesa of the micro-LED is finally obtained. After etching the mesa, the mesa of the micro-LED is characterized by scanning electron microscopy (SEM).

[0022] Next, atomic layer etching (ALE) is performed directly in the reaction chamber. The ALE process consists of two steps. The first step is a modification process with the following parameters: power supply of 300~400W, pressure of 6~10mTorr, and chlorine flow rate of 40~70sccm. The second step is the etching process with the following parameters: power supply of 300~400W, pressure of 10~15mTorr, and argon flow rate of 10~30sccm. Using the above process parameters can ensure that the mesa of the micro LED has a better light emission angle.

[0023] Then, a dense silicon dioxide layer of 20-30 nm is deposited as the first passivation layer by atomic layer deposition (ALD). The process parameters are: deposition temperature of 200-400℃, power of 200-300W, pressure of 1-10 Torr, silane flow rate of 50-100 sccm, and oxygen flow rate of 50-100 sccm. Due to the good step coverage of the atomic layer deposition process, the thickness of the top and sidewall of the mesa of the micro LED is about 1:1 during the atomic layer deposition process.

[0024] Finally, a 200nm silicon dioxide layer was deposited as the second passivation layer using inductively coupled plasma chemical vapor deposition (ICPCVD). The process parameters were: deposition temperature of 100~300℃, pressure of 1~20 Torr, silane flow rate of 5~20 sccm, and N2O flow rate of 20~50 sccm. During the inductively coupled plasma chemical vapor deposition process, the thickness of the top and sidewall of the mesa of the micro LED was approximately 2:1. Because the silicon dioxide deposited by atomic layer deposition has high density, it is better used as the bottom layer for repair. To ensure the passivation layer effect and avoid failure, the passivation layer was thickened using inductively coupled plasma chemical vapor deposition, and finally, a gallium nitride micro LED with sidewall damage was obtained. Example 2

[0025] This embodiment provides a method for fabricating a sidewall-damaged gallium nitride micro light-emitting diode, including the following steps: A 150 nm indium tin oxide (ITO) layer is deposited on a gallium nitride (GaN) epitaxial wafer on a sapphire substrate as a current diffusion layer, and then a 500 nm silicon dioxide layer is deposited on the indium tin oxide layer using plasma enhanced chemical vapor deposition (PECVD) as an etching mask.

[0026] Then, the preset mask pattern was transferred to silicon dioxide by photolithography using advanced oxide etching (AOE). Using silicon dioxide as a hard mask, the indium tin oxide layer was etched by ion beam etching (IBE), and finally, gallium nitride was etched to a thickness of 1.2~1.4μm by neutral beam etching (NBE). The etching parameters of the inductively coupled plasma etching process were as follows: power supply of 400W (pulse 10kHz, duty cycle 0.5), pressure of 0.2Pa, chamber temperature of 70~80℃, chlorine flow rate of 35sccm, and RF bias power of 100W. Finally, the mesa of the micro light-emitting diode was obtained. After etching the mesa, the mesa of the micro light-emitting diode was characterized by scanning electron microscopy (SEM).

[0027] Next, atomic layer etching (ALE) is performed directly in the reaction chamber. The ALE process consists of two steps. The first step is a modification process with the following parameters: power supply of 300~400W, pressure of 6~10mTorr, and chlorine flow rate of 40~70sccm. The second step is the etching process with the following parameters: power supply of 300~400W, pressure of 10~15mTorr, and argon flow rate of 10~30sccm. Using the above process parameters can ensure that the mesa of the micro LED has a better light emission angle.

[0028] Then, a dense silicon dioxide layer of 30 nm is deposited as the first passivation layer by atomic layer deposition (ALD). The process parameters are: deposition temperature of 200~400℃, power of 200~300W, pressure of 1~10 Torr, silane flow rate of 50~100 sccm, and oxygen flow rate of 50~100 sccm. Due to the good step coverage of the atomic layer deposition process, the thickness of the top and sidewall of the mesa of the micro LED is about 1:1 during the atomic layer deposition process.

[0029] Finally, a 200nm silicon dioxide layer was deposited as the second passivation layer using inductively coupled plasma chemical vapor deposition (ICPCVD). The process parameters were: deposition temperature of 100~300℃, pressure of 1~20 Torr, silane flow rate of 5~20 sccm, and N2O flow rate of 20~50 sccm. During the inductively coupled plasma chemical vapor deposition process, the thickness of the top and sidewall of the mesa of the micro LED was approximately 2:1, resulting in a gallium nitride micro LED with sidewall damage.

[0030] In this embodiment, neutral beam etching is used instead of inductively coupled plasma etching, which can also effectively reduce sidewall damage caused by etching.

[0031] Comparative Example 1: The only difference between this comparative example and Example 1 is that the process parameters are: power supply power of 200~300W, pressure of 6~10mTorr, and chlorine flow rate of 40~70sccm; the second step is an etching process, with process parameters including power supply power of 200~300W, pressure of 10~15mTorr, and argon flow rate of 10~30sccm.

[0032] Comparative Example 2: The only difference between this comparative example and Example 1 is that the process parameters are: power supply of 400~500W, pressure of 6~10mTorr, and chlorine flow rate of 40~70sccm; the second step is an etching process, with process parameters including power supply of 400~500W, pressure of 10~15mTorr, and argon flow rate of 10~30sccm.

[0033] Comparative Example 3: The only difference between this comparative example and Example 1 is that sidewall passivation following potassium hydroxide wet etching is used instead of atomic layer etching followed by sidewall passivation. Specifically, this includes the following steps: A 48wt% potassium hydroxide solution was diluted with water at a ratio of 1:5. The diluted potassium hydroxide solution was heated to 80°C using a water bath. The mesa of the micro LED was then placed in the heated potassium hydroxide solution, and the water bath was maintained at 80-85°C for 15-20 minutes. After potassium hydroxide etching, the remaining silicon dioxide was etched for 2 minutes using a 1:6 buffered oxide etchant (BOE) to remove excess silicon dioxide.

[0034] Combination Figure 7 and Figure 8 , Figure 7 This is a scanning electron microscope schematic diagram of the sidewall-damaged gallium nitride micro-light-emitting diode prepared in Comparative Example 1. Figure 8 The image shows a scanning electron microscope (SEM) schematic of the sidewall-damaged gallium nitride micro-light-emitting diode (LED) prepared in Comparative Example 2. As can be seen from the image, the mesa of the LEDs in both images is relatively rough. Therefore, it can be determined that the etching power of ALE is optimal between 300 and 400 W.

[0035] Next, the micro-light-emitting diodes obtained in Example 1 and the comparative example were characterized by scanning electron microscopy, and the results are as follows: Figure 5 and Figure 6 As shown in the figure, it can be seen that the sidewall repaired by atomic layer etching in Example 1 is much smoother than the sidewall repaired by potassium hydroxide etching in the comparative example. It can also be seen from the figure that atomic layer etching can keep the tilt angle of the mesa at about 70°, while potassium hydroxide etching can only make the mesa of the micro LED have a tilt angle of 90°.

[0036] To address this characteristic, we will next use FDTD to simulate the stage tilt angle in order to analyze the impact of the stage tilt angle on light extraction efficiency (LEE), surface light extraction efficiency (LSE), and surface light extraction ratio (S).

[0037] The analysis results are as follows: Figure 9 , Figure 10 and Figure 11 As shown, from Figure 7 It can be seen that after potassium hydroxide etching, the light extraction efficiency of the micro-LED with a 90° sidewall is only 21.54%, while using atomic layer etching, a 70° sidewall can increase the light extraction efficiency to 28.80%, an improvement of approximately 33%. Figure 8 It is known that after potassium hydroxide etching, the surface light extraction efficiency of the micro-LED with a 90° sidewall is only 10.18%, while using atomic layer etching, a 70° sidewall can increase the surface light extraction efficiency of the micro-LED to 18.90%, an improvement of approximately 85%. Figure 9Simulations were performed for sidewall tilt angles of 45° to 90°. The results showed that when the sidewall tilt angle was 70°, the surface light emission ratio was significantly improved. When the sidewall tilt angle was less than 60°, although the surface light emission ratio was improved, small sidewall tilt angles could not be achieved due to process limitations. Therefore, among the achievable sidewall tilt angles, 70° is more conducive to surface light emission of micro LEDs.

[0038] The results above show that atomic layer etching is more conducive to improving the light extraction efficiency and surface light emission efficiency of micro LEDs, and is an effective method for repairing the sidewalls of micro LEDs.

[0039] The above description is only a preferred embodiment of the present invention. It should be noted that for those skilled in the art, several improvements and modifications can be made without departing from the technical principles of the present invention, and these improvements and modifications should also be considered within the scope of protection of the present invention.

Claims

1. A method for fabricating a gallium nitride-based micro light-emitting diode with low sidewall damage, characterized in that, include: A current diffusion layer is deposited on a gallium nitride epitaxial wafer, and an etching mask is deposited on the current diffusion layer. Photolithography is used to sequentially transfer a pre-set mask pattern onto an etching mask and a current diffusion layer via etching. The mesa of a micro light-emitting diode is obtained by etching a micro light-emitting diode on a gallium nitride epitaxial wafer using an inductively coupled plasma etching process. A micro LED mesa is obtained by sidewall passivation using atomic layer etching (ALT) technology. The process includes a modification process and an etching process. The modification process parameters include a power supply of 300-400W, a pressure of 6-10 mTorr, and a chlorine flow rate of 40-70 sccm. The etching process parameters include a power supply of 200-500W, a pressure of 10-15 mTorr, and an argon flow rate of 10-30 sccm. Gallium nitride-based light-emitting diodes with low sidewall damage are obtained by depositing multiple passivation layers on the micro light-emitting diode mesa after sidewall passivation.

2. The method for fabricating a low sidewall damage gallium nitride-based micro light-emitting diode according to claim 1, characterized in that, The current diffusion layer is made of indium tin oxide, and the thickness of the indium tin oxide is 150~200nm; and / or, the etching mask is made of silicon dioxide, and the thickness of the silicon dioxide is 500~600nm.

3. The method for fabricating a low-sidewall-damage gallium nitride-based micro-light-emitting diode according to claim 1, characterized in that, The preset mask pattern on the etching mask is obtained by etching using an advanced oxide etching process, and the preset mask pattern on the current diffusion layer is obtained by etching using an inductively coupled plasma etching process.

4. The method for fabricating a low sidewall damage gallium nitride-based micro light-emitting diode according to claim 1, characterized in that, The etching depth of the gallium nitride epitaxial wafer is 1.2~1.4μm; and / or, the etching parameters of the inductively coupled plasma etching process include a power supply of 300~500W, a pressure of 6~10mTorr, a chamber temperature of 70~80℃, a chlorine flow rate of 30~40sccm, and a boron chloride flow rate of 10~20sccm.

5. The method for fabricating a low-sidewall-damage gallium nitride-based micro-light-emitting diode according to claim 1, characterized in that, The passivation layer is made of silicon dioxide and includes a first passivation layer and a second passivation layer arranged from near to far from the micro LED mesa after passivation of the sidewall. The thickness of the first passivation layer is 20~30nm and the thickness of the second passivation layer is 150~200nm.

6. The method for fabricating a low sidewall damage gallium nitride-based micro light-emitting diode according to claim 5, characterized in that, The first passivation layer is produced using atomic layer deposition (ALD) and the second passivation layer is produced using inductively coupled plasma chemical vapor deposition (ICP-CVD).

7. The method for fabricating a low-sidewall-damage gallium nitride-based micro light-emitting diode according to claim 6, characterized in that, In the atomic layer deposition process, the thickness ratio of the top and sidewalls of the micro LED mesa is 1:1, while in the inductively coupled plasma chemical vapor deposition process, the thickness ratio of the top and sidewalls is 2:

1.

8. The method for fabricating a low sidewall damage gallium nitride-based micro light-emitting diode according to claim 6, characterized in that, The vapor deposition process parameters for the first passivation layer include a deposition temperature of 200~400℃, a power of 200~300W, a pressure of 1~10Torr, a silane flow rate of 50~100sccm, and an oxygen flow rate of 50~100sccm. The vapor deposition process parameters for the second passivation layer include a deposition temperature of 100~300℃, a pressure of 1~20 Torr, a silane flow rate of 5~20 sccm, and an N2O flow rate of 20~50 sccm.

9. A gallium nitride-based micro light-emitting diode with low sidewall damage, characterized in that, It is prepared by the method for fabricating gallium nitride-based micro light-emitting diodes with low sidewall damage as described in any one of claims 1 to 8.

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