Method and device for detecting capacitance value of capacitor in inverter

Abstract

The invention provides a capacitance value detection method and device for a capacitor in an inverter, and belongs to the field of inverters. The method comprises the following steps: based on pre-stored voltage change rate information of a to-be-measured capacitor, determining voltage recording moments when the current of the to-be-measured capacitor is zero, the voltage recording moments at least comprising a first moment and a second moment; obtaining a first voltage value of the to-be-measured capacitor at the first moment and a second voltage value of the to-be-measured capacitor at the second moment, and obtaining an accumulated charge quantity of the direct current bus for charging and discharging the to-be-measured capacitor in a time period corresponding to the first moment and the second moment; and finally, determining the capacitance value of the capacitor to be measured according to the first voltage value, the second voltage value and the accumulated charge quantity. According to the method, the inverter does not need to be shut down, the capacitor does not need to be detached and measured, the capacitance value of the capacitor is calculated according to the voltage value when the current of the capacitor is zero, the influence of ESR can be eliminated, and accurate detection of the capacitance value can be achieved in real time.

Description

Technical Field

[0001] This invention relates to the field of inverters, and more particularly to a method and apparatus for detecting the capacitance value of capacitors in an inverter. Background Technology

[0002] In new energy power generation systems, inverters, as one of the core components, convert variable new energy power into stable electrical energy that meets grid standards or load demands. Therefore, they are widely used in various new energy power generation and distributed power systems. The stability and reliability of the inverter directly affect the safety of the entire power electronic system and the output waveform quality. Capacitors, as one of the most common and essential energy storage components in inverters, undertake many important functions, such as energy storage, filtering, decoupling, and voltage regulation. Therefore, the health of the capacitors is crucial to the normal operation of the inverter.

[0003] However, capacitors are highly sensitive to electrical and thermal stresses, and their performance is easily degraded by temperature changes, fluctuations in operating current, and long-term high voltage. This is primarily manifested as a gradual decrease in capacitance, leading to reduced energy storage capacity and increased losses. For inverters with complex topologies such as three-level inverters, capacitor aging can even cause circuit failures and system malfunctions. Therefore, monitoring capacitor capacitance is crucial to ensuring the long-term stable operation of inverters.

[0004] Traditional offline monitoring methods require shutting down the inverter and disassembling and measuring the capacitors to obtain their capacitance and equivalent series resistance (ESR) information. This method, because it interrupts the continuous operation of the inverter, is unsuitable for scenarios requiring continuous and reliable power supply. In existing online monitoring methods, the presence of ESR introduces significant errors in capacitor monitoring, making accurate capacitance measurement impossible. Summary of the Invention

[0005] This invention provides a method and apparatus for detecting the capacitance value of capacitors in an inverter, in order to solve the problem of the inability to accurately detect the capacitance value.

[0006] In a first aspect, embodiments of the present invention provide a method for detecting the capacitance value of a capacitor in an inverter, comprising:

[0007] Based on the pre-stored voltage change rate information of the capacitor under test, the voltage recording time of the capacitor under test is determined; wherein, the recording time includes at least a first time and a second time, the current of the capacitor under test is zero at both the first time and the second time, and the voltage change rate information includes information on the change of the voltage change rate of the capacitor under test over time within the voltage modulation wave period;

[0008] The first voltage value of the capacitor under test at the first moment and the second voltage value of the capacitor under test at the second moment are obtained, and the cumulative charge of the DC bus charging and discharging the capacitor under test during the time period corresponding to the first moment and the second moment is obtained.

[0009] The capacitance value of the capacitor under test is determined based on the first voltage value, the second voltage value, and the cumulative charge.

[0010] In one possible implementation, determining the voltage recording time of the capacitor under test based on pre-stored voltage change rate information of the capacitor under test includes:

[0011] Based on the voltage change rate information, determine two adjacent moments when the voltage change rate of the capacitor under test is zero;

[0012] The two adjacent moments are respectively designated as the first moment and the second moment.

[0013] In one possible implementation, before determining the voltage recording time of the capacitor under test based on pre-stored voltage change rate information of the capacitor under test, the method further includes:

[0014] Obtain the first expression information of the modulation wave voltage of each phase under the action of the modulation wave, and determine the second expression information when the output state of each phase is the zero vector state based on the first expression information;

[0015] Based on the second expression information, the inductor current expression information for each phase, and the current expression information of the capacitor under test, the voltage change rate information of the capacitor under test is determined; wherein, the current expression information includes the relationship between the current of the capacitor under test and the current-inductance of each phase.

[0016] In one possible implementation, the step of obtaining the cumulative charge of the DC bus charging and discharging the capacitor under test during the time period corresponding to the first time and the second time includes:

[0017] Obtain the inductor current in the zero-vector state for each phase, and determine the zero-vector duration for each phase;

[0018] Based on the inductor current in the zero-vector state of each phase and the zero-vector duration, the charge information of the DC bus charging and discharging of the capacitor under test within one switching cycle is determined.

[0019] The cumulative charge is determined based on the charge information, the first time point, and the second time point.

[0020] In one possible implementation, determining the zero-vector action time for each phase includes:

[0021] Based on the magnitude between the modulating wave and the carrier wave, determine the ideal zero vector action time for each phase within a switching cycle;

[0022] The zero-vector action time of each phase is obtained by subtracting the preset switching buffer time from the ideal zero-vector action time of each phase.

[0023] In one possible implementation, determining the charge information of the DC bus charging and discharging of the capacitor under test within one switching cycle based on the inductor current of each phase in the zero-vector state and the zero-vector duration includes:

[0024] Multiply the inductor current in the zero-vector state of each phase by the zero-vector duration of that phase to obtain the amount of charge transferred in the capacitor for each phase.

[0025] The charge transfer amounts corresponding to each phase are added together to obtain the charge information.

[0026] In one possible implementation, after determining the capacitance value of the capacitor to be tested, the method further includes:

[0027] Calculate the difference between the capacitance value and the initial value of the capacitor under test;

[0028] If the difference is greater than a preset threshold, the capacitor under test is determined to be faulty, and a prompt message is output; wherein, the prompt message is used to indicate that the capacitor under test has failed.

[0029] In one possible implementation, determining the capacitance value of the capacitor under test based on the first voltage value, the second voltage value, and the accumulated charge includes:

[0030] The voltage difference between the first voltage value and the second voltage value is calculated.

[0031] The ratio of the accumulated charge to the voltage difference is used as the capacitance value of the capacitor under test.

[0032] Secondly, embodiments of the present invention provide a capacitance value detection device for a capacitor in an inverter, comprising:

[0033] The first processing unit is used to determine the voltage recording time of the capacitor under test based on the pre-stored voltage change rate information of the capacitor under test; wherein the recording time includes at least a first time and a second time, the current of the capacitor under test is zero at both the first time and the second time, and the voltage change rate information includes information on the change of the voltage change rate of the capacitor under test over time within the voltage modulation wave period.

[0034] The acquisition unit is used to acquire the first voltage value of the capacitor under test at the first moment and the second voltage value of the capacitor under test at the second moment, and to acquire the cumulative charge of the DC bus charging and discharging the capacitor under test during the time period corresponding to the first moment and the second moment.

[0035] The second processing unit is used to determine the capacitance value of the capacitor under test based on the first voltage value, the second voltage value, and the cumulative charge.

[0036] In one possible implementation, the first processing unit is specifically used for:

[0037] Based on the voltage change rate information, determine two adjacent moments when the voltage change rate of the capacitor under test is zero;

[0038] The two adjacent moments are respectively designated as the first moment and the second moment.

[0039] This invention provides a method and apparatus for detecting the capacitance value of a capacitor in an inverter. First, based on pre-stored voltage change rate information of the capacitor under test, the voltage recording time when the current of the capacitor under test is zero is determined, including at least a first time and a second time. Then, a first voltage value of the capacitor under test at the first time and a second voltage value of the capacitor under test at the second time are acquired, and the cumulative charge amount of the DC bus charging and discharging the capacitor under test within the time period corresponding to the first and second times is obtained. Finally, the capacitance value of the capacitor under test is determined based on the first voltage value, the second voltage value, and the cumulative charge amount. This method does not require shutting down the inverter, does not interrupt the continuous operation of the inverter, and does not require disassembling and measuring the capacitor. It is suitable for scenarios requiring continuous and reliable power supply. Furthermore, since this method uses the voltage value when the current of the capacitor is zero to calculate the capacitance value, the influence of ESR can be eliminated, enabling accurate detection of the capacitance value in real time. Attached Figure Description

[0040] To more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0041] Figure 1 This is a flowchart illustrating the implementation of the capacitor capacitance detection method in an inverter provided in this embodiment of the invention.

[0042] Figure 2This is a flowchart illustrating the implementation of another method for detecting the capacitance value of a capacitor in an inverter, provided by an embodiment of the present invention.

[0043] Figure 3 This is a waveform diagram of a modulated wave and a carrier wave provided in an embodiment of the present invention;

[0044] Figure 4 This is a DC-side voltage main circuit topology diagram provided in an embodiment of the present invention;

[0045] Figure 5 This is a schematic diagram of the voltage waveform across a capacitor provided in an embodiment of the present invention;

[0046] Figure 6 This is a schematic diagram of a capacitance value result provided in an embodiment of the present invention;

[0047] Figure 7 This is a schematic diagram of the structure of the capacitor capacitance detection device in the inverter provided in an embodiment of the present invention. Detailed Implementation

[0048] In the following description, specific details such as particular system architectures and techniques are set forth for illustrative purposes and not for limitation, in order to provide a thorough understanding of the embodiments of the invention. However, those skilled in the art will understand that the invention can be implemented in other embodiments without these specific details. In other instances, detailed descriptions of well-known systems, apparatuses, circuits, and methods are omitted so as not to obscure the description of the invention with unnecessary detail. Invention Overview

[0050] In new energy power generation systems, inverters, as one of the core components, convert variable new energy power into stable electrical energy that meets grid standards or load requirements. Therefore, they are widely used in various new energy power generation and distributed power systems. The stability and reliability of the inverter directly affect the safety and output quality of the entire power electronic system. Capacitors, as one of the most common and essential energy storage components in inverters, undertake many important functions, such as energy storage, filtering, decoupling, and voltage regulation. Therefore, the health of the capacitors is crucial for the normal operation of the inverter. However, capacitors are sensitive to electrical and thermal stresses and are prone to performance degradation due to temperature changes, operating current fluctuations, and long-term high voltage. This is mainly manifested as a gradual decrease in capacitance and a gradual increase in ESR, which leads to a decrease in the capacitor's energy storage capacity and an increase in losses. For inverters with complex topologies such as three-level inverters, the decay of the capacitance value will directly lead to aggravated midpoint voltage fluctuations. Increased midpoint voltage fluctuations not only affect the accuracy of the output voltage, causing the output level to deviate from the predetermined value, but also cause distortion of the output current, thereby reducing the quality of power. More seriously, an imbalance in capacitor values ​​may cause uneven voltage distribution across the capacitors at both ends of the DC bus, resulting in localized overvoltage, which further accelerates the aging of the capacitors and may even lead to circuit failure and system malfunction.

[0051] Through research, the inventors have discovered that current capacitor monitoring technologies can be broadly categorized into offline monitoring and online monitoring. However, traditional offline monitoring requires shutting down the inverter and disassembling the capacitor for measurement to obtain its capacitance and ESR information. This method, however, is unsuitable for scenarios requiring continuous and reliable power supply because it interrupts the inverter's continuous operation. In existing online monitoring methods, the presence of ESR leads to significant errors in the capacitor monitoring process, making accurate detection of capacitance values ​​impossible.

[0052] To improve the accuracy, convenience, and real-time performance of capacitor capacitance detection, this invention first determines the voltage recording time when the capacitor current is zero, based on pre-stored voltage change rate information of the capacitor under test, including at least a first time and a second time. Then, it acquires the first voltage value of the capacitor under test at the first time and the second voltage value at the second time, and obtains the cumulative charge of the DC bus charging and discharging the capacitor under test during the time period corresponding to the first and second times. Finally, it determines the capacitance value of the capacitor under test based on the first voltage value, the second voltage value, and the cumulative charge. This method eliminates the need to shut down the inverter, interrupt its continuous operation, or disassemble the capacitor for measurement. It is suitable for scenarios requiring continuous and reliable power supply. Furthermore, because this method uses the voltage value when the capacitor current is zero to calculate the capacitance value, it eliminates the influence of ESR and enables accurate real-time capacitance detection.

[0053] To make the objectives, technical solutions, and advantages of the present invention clearer, specific embodiments will be described below in conjunction with the accompanying drawings.

[0054] Figure 1 The implementation flowchart of the capacitor capacitance detection method in the inverter provided by the embodiment of the present invention is described in detail below:

[0055] Step 101: Based on the pre-stored voltage change rate information of the capacitor under test, determine the voltage recording time of the capacitor under test; wherein, the recording time includes at least the first time and the second time, the current of the capacitor under test is zero at both the first time and the second time, and the voltage change rate information includes the information on the change of the voltage change rate of the capacitor under test over time within the voltage modulation wave period.

[0056] For example, this embodiment determines the voltage recording time of the capacitor under test based on the pre-stored information on the voltage change rate of the capacitor under test during the voltage modulation wave period. For example, the voltage recording time of the capacitor under test is determined to be the time when the voltage change rate is zero, at which time the current flowing through the capacitor under test is zero.

[0057] Step 102: Obtain the first voltage value of the capacitor under test at the first moment and the second voltage value of the capacitor under test at the second moment, and obtain the cumulative charge of the DC bus charging and discharging the capacitor under test during the time period corresponding to the first moment and the second moment.

[0058] For example, after determining the first time and the second time, this embodiment monitors and acquires the first voltage value of the capacitor under test at the first time and the second voltage value of the capacitor under test at the second time, and simultaneously records and acquires the cumulative charge of the DC bus charging and discharging the capacitor under test during the time period corresponding to the first time and the second time.

[0059] In one feasible implementation, this embodiment can determine the voltage of the capacitor under test at the first and second time points based on voltage sensor monitoring.

[0060] In one example, since the current of the capacitor under test is zero at both the first and second moments, the obtained first and second voltages have eliminated the effect of ESR.

[0061] Step 103: Determine the capacitance value of the capacitor to be tested based on the first voltage value, the second voltage value, and the cumulative charge.

[0062] For example, in this embodiment, the capacitance value of the capacitor to be tested can be calculated based on the first voltage value, the second voltage value, and the cumulative charge obtained in the above steps.

[0063] In one feasible implementation, this embodiment determines whether a capacitor has failed by comparing its capacitance value with the initial capacitance value and based on the failure criteria for different types of capacitors.

[0064] In another feasible implementation, changes in capacitor value can affect the inverter's output characteristics. By measuring the capacitor value, the actual operating state of the inverter can be understood in real time, allowing for optimization and adjustment of the modulation strategy. For example, adjusting the parameters in the space vector pulse width modulation algorithm can improve the inverter's output voltage quality, reduce harmonic distortion, and enhance the overall system performance.

[0065] In addition, in a three-level inverter, the capacitance value is one of the important parameters for calculating the neutral point current. By measuring the capacitance value and combining it with the inverter's topology and operating status, the magnitude and direction of the neutral point current can be accurately calculated, providing a crucial basis for neutral point potential balance control. Furthermore, during inverter operation, if a capacitor experiences a short circuit, open circuit, or a sharp drop in capacitance value, the capacitance value can be used to quickly locate the fault point, reducing troubleshooting time and improving system reliability and maintainability.

[0066] In summary, this embodiment of the invention first determines the voltage recording time when the current of the capacitor under test is zero based on pre-stored voltage change rate information of the capacitor under test, including at least a first time and a second time. Then, it acquires the first voltage value of the capacitor under test at the first time and the second voltage value at the second time, and obtains the cumulative charge of the DC bus charging and discharging the capacitor under test during the time period corresponding to the first and second times. Finally, it determines the capacitance value of the capacitor under test based on the first voltage value, the second voltage value, and the cumulative charge. This method does not require shutting down the inverter, interrupting its continuous operation, or disassembling the capacitor for measurement. It is suitable for scenarios requiring continuous and reliable power supply. Furthermore, since this method uses the voltage value when the capacitor current is zero to calculate the capacitor capacitance value, it can eliminate the influence of ESR and achieve accurate detection of the capacitance value in real time.

[0067] To facilitate the determination of the two time points when the capacitor current is zero, this embodiment first derives the second expression information when the output state of each phase is in the zero vector state based on the first expression information of the modulation wave voltage of each phase. Then, based on the second expression information, the inductor current expression information of each phase, and the current expression information of the capacitor under test, the voltage change rate information of the capacitor under test is derived and determined. Based on this voltage change rate information, this embodiment can quickly and accurately determine two adjacent moments when the voltage change rate of the capacitor under test is zero, i.e., two adjacent moments when the capacitor current is zero. Then, the voltage value of the capacitor at these two adjacent moments is obtained. Since the capacitor current is zero at this time, the voltage drop across the ESR is also zero, thus eliminating the influence of ESR and greatly improving the accuracy of capacitance value detection. Simultaneously, when obtaining the cumulative charge of the capacitor during the time interval between these two adjacent moments, this embodiment determines the charge information of the DC bus charging and discharging the capacitor under test within one switching cycle based on the inductor current of each phase in the zero-vector state and the zero-vector duration of each phase. This process does not require an additional capacitor current detection device, greatly reducing costs and avoiding interference problems caused by inserting a current sensor into the capacitor branch. Furthermore, based on the numerical relationship between the switching cycle and the time intervals corresponding to the first and second moments, the cumulative charge of the DC bus charging and discharging the capacitor under test within the time intervals corresponding to the first and second moments is determined. Finally, based on the first voltage value, the second voltage value, and the cumulative charge, the capacitance value of the capacitor under test is determined. In addition, the present invention does not require shutdown during capacitance value detection, and can flexibly perform online detection. The voltage value, inductor current and other data can be obtained through the sensors of the inverter topology itself, without the need to add additional hardware circuits, so as to realize the detection of capacitor capacitance value.

[0068] Figure 2The following is a detailed flowchart of another method for detecting the capacitance value of a capacitor in an inverter, provided by an embodiment of the present invention:

[0069] Step 201: Obtain the first expression information of the modulation wave voltage of each phase under the action of the modulation wave, and determine the second expression information when the output state of each phase is the zero vector state based on the first expression information.

[0070] For example, in this embodiment, the first expression information of the modulation wave voltage of each phase under the action of the modulation wave is obtained, and the second expression information when the output state of each phase is a zero vector state is determined according to the first expression information.

[0071] The information in the first expression can be represented by the following formula:

[0072]

[0073] In equation (1), u a,b,c ω represents the three-phase modulation wave voltage, m is the modulation ratio, and ω is the angular frequency.

[0074] The second expression information when the output state of each phase is the zero vector state can be derived by using equation (1).

[0075] Step 202: Determine the voltage change rate information of the capacitor under test based on the second expression information, the inductor current expression information for each phase, and the current expression information of the capacitor under test; wherein, the current expression information includes the relationship between the current of the capacitor under test and the current and inductance of each phase.

[0076] For example, in this embodiment, the voltage change rate information of the capacitor under test is determined based on the second expression information, the inductor current expression information of each phase, and the current expression information of the capacitor under test; wherein, the current expression information includes the relationship between the current of the capacitor under test and the current inductance of each phase.

[0077] The three-phase inductor current, i.e., the inductor current of each phase, can be expressed as:

[0078]

[0079] In equation (2), I is the power factor angle. m This represents the current amplitude.

[0080] In one example, assume the bus voltage is V. inBased on the topology of the three-level inverter and the Space Vector Pulse Width Modulation (SVPWM) modulation method, the inverter has three output states: P, O, and N. The output voltage corresponding to the P state is V. in The output voltage corresponding to state O is The output voltage corresponding to the N state is 0.

[0081] When one of the three phases is in state P, the upper arm switch (S) corresponding to that phase bridge arm is in state P. i1 ) and lower arm switch (S i2 When one of the three phases is in the 0 state, the intermediate state switching transistors (Si2 and Si3) of that phase are turned on. When one of the three phases is in the N state, the intermediate state switching transistor S of that phase is turned on. i3 and S i4 Conduction. Specifically, when the switch S of that phase... i2 and S i3 When the circuit is on, the DC bus charges and discharges the capacitor. According to Kirchhoff's Current Law (KCL), the capacitor current is equal to the inductor current. Therefore, the capacitor current i can be obtained from the three-phase inductor currents. cap The current expression for the capacitor under test is as follows:

[0082]

[0083] In equation (3), i a i b i c These are the inductor currents on the A-phase inverter side, the B-phase inverter side, and the C-phase inverter side.

[0084] X i It is a function relating to the state of the three-phase switch.

[0085] In one example, when the modulation method is sinusoidal pulse width modulation (SPWM), this embodiment divides one voltage modulation wave period into six intervals. Within interval I, according to the above formulas (1), (2), and (3), the capacitor voltage fluctuation rate within interval I is:

[0086]

[0087] The instantaneous fluctuation rate expressions for capacitor voltage in other intervals can be obtained using the same method, as shown in Table 1 below:

[0088] Table 1. Schematic diagram of capacitor voltage change rate.

[0089]

[0090]

[0091] In one example, when the modulation scheme is changed to SVPWM:

[0092] In SVPWM modulation, the SPWM modulated wave is injected into the third harmonic to obtain the modulated wave m. a m b m c for:

[0093]

[0094] According to equations (3) and (2), the modulated wave can be divided into twelve parts. Substituting equations (1), (2), and (4) into (3), the rate of change of the capacitor voltage in the first interval is:

[0095]

[0096] The remaining interval expressions are shown in Table 2 below:

[0097] Table 2. Schematic diagram of capacitor voltage change rate.

[0098]

[0099]

[0100] Step 203: Based on the voltage change rate information, determine two adjacent moments when the voltage change rate of the capacitor under test is zero; the current of the capacitor under test is zero at both the first and second moments, and the voltage change rate information includes the information on the change of the voltage change rate of the capacitor under test over time within the voltage modulation wave period.

[0101] For example, in this embodiment, based on the voltage change rate information, that is, the information on the change rate of the voltage of the capacitor under test over time within the voltage modulation wave period, the voltage change rate of the capacitor under test is zero, that is, the current is zero at two adjacent moments.

[0102] Since the measured capacitor voltage is the sum of the true capacitor voltage and the ESR voltage, in order to eliminate the influence of ESR as much as possible, this embodiment selects to monitor the capacitor voltage at the continuous zero-crossing points of the capacitor current. At this time, the voltage of the capacitor's ESR is 0, and the true capacitor voltage value can be obtained. Since the capacitor current can be derived from the modulation wave and the load current, the modulation wave can be used as the criterion for judging the zero-crossing point of the capacitor current.

[0103] Step 204: Take two adjacent moments as the first moment and the second moment, respectively.

[0104] For example, in this embodiment, two adjacent moments are respectively designated as the first moment and the second moment.

[0105] Within one voltage modulation wave cycle, there are multiple times when the current crosses zero. In this embodiment, two consecutive times are selected as the first time and the second time.

[0106] Step 205: Obtain the first voltage value of the capacitor under test at the first moment and the second voltage value of the capacitor under test at the second moment, and obtain the cumulative charge of the DC bus charging and discharging of the capacitor under test during the time period corresponding to the first moment and the second moment.

[0107] In one example, step 205 includes the following steps:

[0108] Step 1: Obtain the inductor current in the zero-vector state for each phase and determine the zero-vector duration for each phase.

[0109] In one example, this embodiment determines the ideal zero-vector action time of each phase within a switching cycle based on the magnitude between the modulated wave and the carrier wave; the ideal zero-vector action time of each phase is subtracted from the preset switching buffer time to obtain the zero-vector action time of each phase.

[0110] Step 2: Based on the inductor current of each phase in the zero vector state and the zero vector duration, determine the charge amount information of the DC bus charging and discharging of the capacitor under test within one switching cycle.

[0111] In one example, step 2 may include: multiplying the inductor current in the zero-vector state of each phase by the zero-vector duration of that phase to obtain the capacitance charge transfer amount corresponding to each phase; and adding the capacitance charge transfer amounts corresponding to each phase to obtain charge information.

[0112] Step 3: Determine the cumulative charge based on the charge information, the first time point, and the second time point.

[0113] For example, this embodiment obtains the first voltage value of the capacitor under test at a first moment and the second voltage value of the capacitor under test at a second moment. Meanwhile, this embodiment sets the sampling frequency to be equal to the switching frequency. To simplify calculations, it is assumed that the three-phase modulation wave and the sampling current magnitude remain constant within one switching cycle. Therefore, the amount of charge Q generated by the DC bus charging and discharging the capacitor within one switching cycle is approximately calculated using the sampled inductor current and the duration of action in the O state. n The duration of each switching cycle in state O can be deduced from the relationship between the modulated wave and the carrier wave:

[0114] Q n(n＝1,2,3…) =i a ×T a+i b ×T b +i c ×T c #(7)

[0115] In equation (7) above, T a T represents the time during which phase A is in the 0 state within one switching cycle. b T represents the time during which phase B is in the 0 state within one switching cycle. c The time that phase C is in the O state within one switching cycle.

[0116] Figure 3 This is a waveform diagram of a modulation wave and a carrier wave provided in an embodiment of the present invention. This embodiment further follows the example shown below. Figure 3 The relationship between the three-phase modulated wave and the carrier wave shown gives the duration T of phases A, B, and C being in the O state within one switching cycle. i(i＝a,b,c) :

[0117]

[0118] In equation (8), m i(i＝a,b,c) For three-phase modulated wave m a m b m c Size, T s The switching cycle.

[0119] To avoid direct connection between the upper and lower bridge arms in practice, this embodiment adds a dead time when the switch is turned on. This is generally achieved by delaying the rising edge of the switch signal. Since the delay of the switch signal reduces the turn-on time of the switch in the 0 state, it affects the charging and discharging process of the capacitor by the DC bus. This delay is artificially set in advance and is known. In equation (8), T i( i = a, b, c ) Subtract the dead time T from the base d The effect is that:

[0120]

[0121] Simplifying equation (9) yields:

[0122] T i( i = a, b, c ) =(1-|m i |)×T s -T d #(10)

[0123] Substituting equation (10) into equation (7) yields:

[0124] Q n(n＝1,2,3…) =(ia +i b +i c )×(1-T d )+[i a ×(-|m a |)+i b ×(-|m b |)+i c ×(-|m c |)]×T s #(11)

[0125] Under normal operating conditions, the three-phase currents are considered to be in balance, that is, the sum of the three-phase currents is 0. Simplifying equation (11) yields:

[0126] Q n(n＝1,2,3…) =[i a ×(-|m a |)+i b ×(-|m b |)+i c ×(-|m c |)]×T s #(12)

[0127] Step 206: Determine the capacitance value of the capacitor to be tested based on the first voltage value, the second voltage value, and the cumulative charge.

[0128] In one example, step 206 includes:

[0129] The voltage difference between the first voltage value and the second voltage value is calculated; the ratio of the cumulative charge to the voltage difference is taken as the capacitance value of the capacitor under test.

[0130] For example, in this embodiment, the voltage difference between the first voltage value and the second voltage value is calculated, and the ratio of the cumulative charge to the voltage difference is used as the capacitance value of the capacitor under test.

[0131] In high-power converters, due to the high power rating, multiple capacitors are often connected in parallel to meet energy storage, filtering, and stability requirements. The use of parallel capacitor banks increases the overall capacitance and distributes the current and thermal stress on individual capacitors, thereby improving the overall reliability and lifespan of the system. In this case, the upper and lower bridge arm capacitor banks can each be equivalent to a single total capacitance, where the capacitance of a single capacitor is:

[0132]

[0133] This embodiment is based on the relationship between capacitor voltage and current. The expression for the capacitance value is obtained as follows:

[0134]

[0135] Substituting the cumulative charge Q obtained from equation (12) and the capacitor voltage change ΔU obtained from equation (6) into equation (14), we obtain the monitored capacitor value C.

[0136] Step 207: Calculate the difference between the capacitance value and the initial value of the capacitor under test; if the difference is greater than a preset threshold, the capacitor under test is determined to be faulty and a prompt message is output; the prompt message is used to indicate that the capacitor under test has failed.

[0137] For example, in this embodiment, the difference between the capacitance value and the initial value of the capacitor under test is calculated. If the difference is greater than a preset threshold, the capacitor under test is determined to be faulty, and a prompt message is output, indicating that the capacitor has failed and needs to be replaced.

[0138] In one example, a T-type three-level inverter is used. Figure 4 A DC-side voltage main circuit topology diagram provided for an embodiment of the present invention, such as... Figure 4 As shown, S i1 S i3 The switching signals of (i = a, b, c) are complementary, S i2 S i4 The switching signals are complementary. DC side power supply voltage V in =800V, set the switching frequency f s =50 kHz. The inverter input-side capacitors C1 and C2 are 100 μF, and the sampling period is set to 50 kHz.

[0139] Figure 5 This is a schematic diagram of the voltage waveform across a capacitor provided in an embodiment of the present invention. During inverter operation, the DC-side capacitor charges and discharges, and the voltage waveform across the capacitor is as follows: Figure 5 As shown, the amount of charge stored or released by the capacitor in each switching cycle is calculated according to equation (11), and then the amount of charge in multiple switching cycles is accumulated. After multiple switching cycles, the capacitance value is calculated according to equation (4). The calculation result is as follows. Figure 6 As shown, Figure 6 This is a schematic diagram of capacitance value results provided in an embodiment of the present invention. Figure 6 It can be seen that the estimated capacitance value of the above capacitor is 99μF.

[0140] It should be understood that the sequence number of each step in the above embodiments does not imply the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of the present invention.

[0141] The following are device embodiments of the present invention. For details not described in detail, please refer to the corresponding method embodiments described above.

[0142] Figure 7 A schematic diagram of the capacitance detection device for capacitors in an inverter provided in an embodiment of the present invention is shown. For ease of explanation, only the parts related to the embodiment of the present invention are shown, and are described in detail below:

[0143] like Figure 7 As shown, the capacitance detection device for capacitors in the inverter includes:

[0144] The first processing unit 71 is used to determine the voltage recording time of the capacitor under test based on the pre-stored voltage change rate information of the capacitor under test; wherein the recording time includes at least a first time and a second time, the current of the capacitor under test is zero at both the first time and the second time, and the voltage change rate information includes information on the change of the voltage change rate of the capacitor under test over time within the voltage modulation wave period.

[0145] The acquisition unit 72 is used to acquire the first voltage value of the capacitor under test at the first moment and the second voltage value of the capacitor under test at the second moment, and to acquire the cumulative charge of the DC bus charging and discharging of the capacitor under test during the time period corresponding to the first moment and the second moment.

[0146] The second processing unit 73 is used to determine the capacitance value of the capacitor to be tested based on the first voltage value, the second voltage value, and the cumulative charge.

[0147] In one possible implementation, the first processing unit 71 is specifically used for:

[0148] Based on the voltage change rate information, determine two adjacent moments when the voltage change rate of the capacitor under test is zero.

[0149] Two adjacent moments are designated as the first moment and the second moment, respectively.

[0150] In one possible implementation, before the first processing unit 71, the apparatus further includes: a third processing unit, specifically used for:

[0151] Obtain the first expression information of the modulation wave voltage of each phase under the action of the modulation wave, and determine the second expression information when the output state of each phase is the zero vector state based on the first expression information.

[0152] Based on the second expression information, the inductor current expression information for each phase, and the current expression information of the capacitor under test, the voltage change rate information of the capacitor under test is determined; wherein, the current expression information includes the relationship between the current of the capacitor under test and the current and inductance of each phase.

[0153] In one possible implementation, the acquisition unit 72 is specifically used for:

[0154] Obtain the inductor current in the zero-vector state for each phase, and determine the zero-vector duration for each phase.

[0155] Based on the inductor current in the zero-vector state of each phase and the zero-vector duration, the charge amount of the DC bus charging and discharging of the capacitor under test within one switching cycle is determined.

[0156] The cumulative charge is determined based on the charge information, the first time point, and the second time point.

[0157] In one possible implementation, the acquisition unit 72 is specifically used for:

[0158] Based on the magnitude between the modulated wave and the carrier wave, the ideal zero vector action time for each phase is determined within a switching cycle.

[0159] The zero-vector action time of each phase is obtained by subtracting the preset switching buffer time from the ideal zero-vector action time of each phase.

[0160] In one possible implementation, the acquisition unit 72 is specifically used for:

[0161] Multiply the inductor current in the zero-vector state of each phase by the zero-vector duration of that phase to obtain the amount of charge transferred in the capacitor for each phase.

[0162] The amount of charge transferred by the capacitor corresponding to each phase is added together to obtain the charge information.

[0163] In one possible implementation, after the second processing unit 73, the apparatus further includes:

[0164] Calculate the difference between the capacitance value and the initial value of the capacitor under test.

[0165] If the difference is greater than the preset threshold, the capacitor under test is determined to be faulty, and a prompt message is output; the prompt message is used to indicate that the capacitor under test has failed.

[0166] In one possible implementation, the second processing unit 73 is specifically used for:

[0167] The voltage difference between the first voltage value and the second voltage value is calculated.

[0168] The ratio of the cumulative charge to the voltage difference is taken as the capacitance value of the capacitor under test.

[0169] In the above embodiments, the descriptions of each embodiment have different focuses. For parts that are not described in detail or recorded in a certain embodiment, please refer to the relevant descriptions of other embodiments.

[0170] Those skilled in the art will recognize that the templates, units, and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementations should not be considered beyond the scope of this invention.

[0171] If a module / unit is implemented as a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, all or part of the processes in the methods of the above embodiments of the present invention can also be implemented by a computer program instructing related hardware. The computer program can be stored in a computer-readable storage medium. When executed by a processor, the computer program can implement the steps of the capacitance value detection method embodiments of the capacitors in the various inverters described above. The computer program includes computer program code, which can be in the form of source code, object code, executable files, or certain intermediate forms. The computer-readable medium can include: any entity or device capable of carrying computer program code, recording media, USB flash drives, portable hard drives, magnetic disks, optical disks, computer memory, read-only memory, random access memory, electrical carrier signals, telecommunication signals, and software distribution media, etc.

[0172] The above embodiments are only used to illustrate the technical solutions of the present invention, and are not intended to limit it. Although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present invention, and should all be included within the protection scope of the present invention.

Claims

1. A method for detecting the capacitance value of a capacitor in an inverter, characterized in that, The method includes: Based on the pre-stored voltage change rate information of the capacitor under test, the voltage recording time of the capacitor under test is determined; wherein, the recording time includes at least a first time and a second time, the current of the capacitor under test is zero at both the first time and the second time, and the voltage change rate information includes information on the change of the voltage change rate of the capacitor under test over time within the voltage modulation wave period; The first voltage value of the capacitor under test at the first moment and the second voltage value of the capacitor under test at the second moment are obtained, and the cumulative charge of the DC bus charging and discharging the capacitor under test during the time period corresponding to the first moment and the second moment is obtained. The capacitance value of the capacitor under test is determined based on the first voltage value, the second voltage value, and the cumulative charge.

2. The method for detecting the capacitance value of a capacitor in an inverter according to claim 1, characterized in that, The process of determining the voltage recording time of the capacitor under test based on pre-stored voltage change rate information includes: Based on the voltage change rate information, determine two adjacent moments when the voltage change rate of the capacitor under test is zero; The two adjacent moments are respectively designated as the first moment and the second moment.

3. The method for detecting the capacitance value of a capacitor in an inverter according to claim 1, characterized in that, Before determining the voltage recording time of the capacitor under test based on the pre-stored voltage change rate information of the capacitor under test, the method further includes: Obtain the first expression information of the modulation wave voltage of each phase under the action of the modulation wave, and determine the second expression information when the output state of each phase is the zero vector state based on the first expression information; Based on the second expression information, the inductor current expression information for each phase, and the current expression information of the capacitor under test, the voltage change rate information of the capacitor under test is determined; wherein, the current expression information includes the relationship between the current of the capacitor under test and the current-inductance of each phase.

4. The method for detecting the capacitance value of a capacitor in an inverter according to any one of claims 1 to 3, characterized in that, The step of obtaining the cumulative charge of the DC bus charging and discharging the capacitor under test during the time periods corresponding to the first and second moments includes: Obtain the inductor current in the zero-vector state for each phase, and determine the zero-vector duration for each phase; Based on the inductor current in the zero-vector state of each phase and the zero-vector duration, the charge information of the DC bus charging and discharging of the capacitor under test within one switching cycle is determined. The cumulative charge is determined based on the charge information, the first time point, and the second time point.

5. The method for detecting the capacitance value of a capacitor in an inverter according to claim 4, characterized in that, Determining the zero vector action time for each phase includes: Based on the magnitude between the modulating wave and the carrier wave, determine the ideal zero vector action time for each phase within a switching cycle; The zero-vector action time of each phase is obtained by subtracting the preset switching buffer time from the ideal zero-vector action time of each phase.

6. The method for detecting the capacitance value of a capacitor in an inverter according to claim 4, characterized in that, The determination of the charge quantity information of the DC bus charging and discharging of the capacitor under test within one switching cycle based on the inductor current of each phase in the zero vector state and the zero vector duration includes: Multiply the inductor current in the zero-vector state of each phase by the zero-vector duration of that phase to obtain the amount of charge transferred in the capacitor for each phase. The charge transfer amounts corresponding to each phase are added together to obtain the charge information.

7. The method for detecting the capacitance value of a capacitor in an inverter according to any one of claims 1 to 3, characterized in that, After determining the capacitance value of the capacitor to be tested, the method further includes: Calculate the difference between the capacitance value and the initial value of the capacitor under test; If the difference is greater than a preset threshold, the capacitor under test is determined to be faulty, and a prompt message is output; wherein, the prompt message is used to indicate that the capacitor under test has failed.

8. The method for detecting the capacitance value of a capacitor in an inverter according to any one of claims 1 to 3, characterized in that, Determining the capacitance value of the capacitor under test based on the first voltage value, the second voltage value, and the cumulative charge includes: The voltage difference between the first voltage value and the second voltage value is calculated. The ratio of the accumulated charge to the voltage difference is used as the capacitance value of the capacitor under test.

9. A device for detecting the capacitance value of a capacitor in an inverter, characterized in that, The device includes: The first processing unit is used to determine the voltage recording time of the capacitor under test based on the pre-stored voltage change rate information of the capacitor under test; wherein the recording time includes at least a first time and a second time, the current of the capacitor under test is zero at both the first time and the second time, and the voltage change rate information includes information on the change of the voltage change rate of the capacitor under test over time within the voltage modulation wave period. The acquisition unit is used to acquire the first voltage value of the capacitor under test at the first moment and the second voltage value of the capacitor under test at the second moment, and to acquire the cumulative charge of the DC bus charging and discharging the capacitor under test during the time period corresponding to the first moment and the second moment. The second processing unit is used to determine the capacitance value of the capacitor under test based on the first voltage value, the second voltage value, and the cumulative charge.

10. The capacitor capacitance detection device in an inverter according to claim 9, characterized in that, The first processing unit is specifically used for: Based on the voltage change rate information, determine two adjacent moments when the voltage change rate of the capacitor under test is zero; The two adjacent moments are respectively designated as the first moment and the second moment.

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