Display device

Abstract

The present application provides a display device capable of applying overdrive with a lower cost and a simpler mechanism. The display device includes pixels, scan lines connected to a plurality of pixels arranged in a first direction, signal lines connected to a plurality of pixels arranged in a second direction intersecting the first direction, and a first circuit supplying a gate signal to the plurality of scan lines. A second circuit that supplies a pixel signal to the plurality of signal lines, and a third circuit that generates a pixel signal corresponding to the image data, the pixel being reset by a reset signal corresponding to a predetermined gradation value before the pixel signal is supplied, and the third circuit applying an overdrive to some or all of the pixels. The magnitude of the difference between the gradation value of the pixel signal generated by overdriving and the predetermined gradation value is larger as the pixel signal is supplied to the pixel connected to the scan line that is closer to the supply timing of the gate signal during scanning.

Description

Technical Field

[0001] This disclosure relates to display devices. Background Technology

[0002] Display devices that apply overdrive to the liquid crystal to further accelerate the response speed are known (e.g., Patent Document 1).

[0003] Patent Document 1: Japanese Patent Application Publication No. 2019-40036

[0004] In the overdrive described in Patent Document 1, it is necessary to provide each pixel with a grayscale value corresponding to the difference between the grayscale values ​​of the latest image displayed and those of each pixel in the previous image. Therefore, a display device employing the overdrive described in Patent Document 1 must have a storage area for storing the previous image, inevitably leading to high costs associated with the storage device used to secure this area. Furthermore, controlling the grayscale value corresponding to the difference between the grayscale values ​​of the latest image and those of each pixel in the previous image is complex; a display device capable of applying overdrive with a simpler mechanism is sought. Summary of the Invention

[0005] This disclosure was made in view of the above-mentioned technical problems, and its purpose is to provide a display device that can apply overdrive in a lower cost and simpler mechanism.

[0006] A display device according to one aspect of this disclosure includes: pixels, scan lines connected to a plurality of pixels arranged along a first direction, signal lines connected to a plurality of pixels arranged along a second direction intersecting the first direction, a first circuit supplying gate signals to the plurality of scan lines, a second circuit supplying pixel signals to the plurality of signal lines, and a third circuit generating pixel signals corresponding to image data. The pixels are supplied with pixel signals according to the driving timing of a switching element, and are reset by a reset signal corresponding to a predetermined grayscale value before being supplied with the pixel signal. The switching element is driven in response to the gate signal, and the first circuit performs operations to adjust the image data. The timing of the gate signal supply when the pixel signal is supplied varies between the multiple scan lines. The third circuit applies overdrive to some or all of the pixels. The overdrive is a process that generates a pixel signal corresponding to a gray value whose difference from the gray value shown in the pixel data contained in the image data is greater than the specified gray value, based on the difference between the gray value shown in the pixel data and the specified gray value. The pixel signal supplied to the pixel connected to the scan line where the gate signal is supplied later in the scan is larger, and the difference between the gray value of the pixel signal generated by the overdrive and the specified gray value is larger. Attached Figure Description

[0007] Figure 1 This is a configuration diagram illustrating an example of a display system according to an embodiment.

[0008] Figure 2 This is a schematic diagram illustrating an example of the relative relationship between the display panel and the user's eyes.

[0009] Figure 3 It is shown Figure 1 A block diagram illustrating an example of the configuration of an image generating device and a display device in the display system shown.

[0010] Figure 4 This is a circuit diagram representing the display area involved in the implementation method.

[0011] Figure 5 This is a schematic diagram illustrating an example of a display panel according to an embodiment.

[0012] Figure 6 It is a cross-sectional view schematically showing the cross-section of the display panel involved in the embodiment.

[0013] Figure 7 This is a diagram used to illustrate the scanning process performed to supply gate signals.

[0014] Figure 8 It is a timing diagram of the signal control involved in updating the frame image.

[0015] Figure 9 This is a diagram showing the situations where there is no control signal for P1.

[0016] Figure 10 It is a diagram used to illustrate the mechanism of overdrive.

[0017] Figure 11 It is a chart used to illustrate the relationship between the relative brightness difference before and after the driver update.

[0018] Figure 12 This indicates that when the temperature of the liquid crystal molecules (LM) is lower than the reference temperature... Figure 11 The diagram illustrates the response of the pixel Pix to the temperature of the liquid crystal molecule LM as described in the explanation.

[0019] Figure 13 This is a block diagram illustrating a simplified configuration used in a comparative example of applying overdrive that reflects the difference in brightness between the images before and after the update.

[0020] Figure 14 This is a table showing the response time of a pixel Pix, determined by the relationship between the grayscale values ​​shown by the pixel signal before the update and the grayscale values ​​shown by the pixel signal after the update.

[0021] Figure 15This is a graph showing an example of the grayscale values ​​of the updated pixel signal when overdriving is applied, in the case where the pixel Pix is ​​driven at its highest brightness before the pixel signal is updated.

[0022] Figure 16 This is a chart showing the relationship between "target grayscale" and "written grayscale" to illustrate the five lookup tables used as the benchmark for overdriven applications.

[0023] Figure 17 This is a block diagram showing the inputs and outputs of driver IC115 and the main functions contained in driver IC115.

[0024] Figure 18 This is a block diagram showing the main functional configuration of the grayscale correction circuit 115c.

[0025] Figure 19 It is shown Figure 18 A block diagram showing the processing performed by each component of the grayscale correction circuit 115c.

[0026] Figure 20 This is a graph illustrating an example of the grayscale values ​​of the updated pixel signal when overdriving is applied, provided that the pixel Pix is ​​driven at its lowest brightness before the pixel signal is updated.

[0027] Figure 21 This is a graph illustrating an example of the grayscale value of the updated pixel signal when overdriving is applied, where the pixel Pix is ​​driven at an intermediate grayscale between the lowest and highest brightness levels before the pixel signal is updated.

[0028] Figure 22 This is a diagram illustrating an example of looking up the contents of tables LUT1, LUT2, LUT3, LUT4, and LUT5 when a pixel signal representing a grayscale value of "0" is used as the specified pixel signal.

[0029] Figure 23 It is shown Figure 22 The diagram shows the lookup tables LUT1, LUT2, LUT3, LUT4, and LUT5.

[0030] Figure 24 This is a diagram showing "L out" in the range of 245 or more without any bit extension.

[0031] Figure 25 This is a diagram showing "L out" in the range of 245 or more when "L in" is extended to the nearest bit.

[0032] Figure 26It is a diagram showing the lookup table that reflects the "write grayscale" corresponding to the "target grayscale" as an overdrive ideal and the unified lookup table that prioritizes suppressing "L out".

[0033] Figure 27 It is shown Figure 26 The graph shows the relationship between "L in" and "L out" in the lookup tables LUA and LUB, where "L in" is in the range of 240 or higher and "L out" is the value of "L out".

[0034] Figure 28 This is a graph showing an example of the response when reset via midtones. Detailed Implementation

[0035] Hereinafter, various embodiments of the present disclosure will be described with reference to the accompanying drawings. It should be noted that the disclosure is merely an example, and appropriate modifications that can be readily conceived by those skilled in the art while maintaining the spirit of the disclosure are naturally included within the scope of this disclosure. Furthermore, to make the description clearer, the width, thickness, shape, etc., of various parts in the drawings are sometimes schematically shown compared to the actual aspects, but these are merely examples and do not limit the interpretation of this disclosure. Additionally, in this specification and the accompanying drawings, the same reference numerals are used for elements that are the same as those described in the previously mentioned drawings, and detailed descriptions are sometimes appropriately omitted.

[0036] Figure 1 This is a configuration diagram illustrating an example of a display system according to an embodiment. Figure 2 This is a schematic diagram illustrating an example of the relative relationship between the display panel and the user's eyes. In this embodiment, the display system 1 is a display system that changes the display according to the user's movements. For example, the display system 1 is a VR system that creates a virtual reality experience for the user by displaying VR (Virtual Reality) images representing three-dimensional objects in virtual space in stereoscopic form and changing the stereoscopic display according to the orientation (position) of the user's head.

[0037] like Figure 1 As shown, the display system 1 includes, for example, a display device 100 and an image generating device 200. The display device 100 and the image generating device 200 are connected via, for example, a cable 300. The cable 300 includes, for example, a USB (Universal Serial Bus) cable, an HDMI (High-Definition Multimedia Interface) cable, etc. The display device 100 and the image generating device 200 can also be configured to be connected wirelessly.

[0038] In this disclosure, the display device 100 is used, for example, as a head-mounted display device that is fixed to the wearing component 400 and worn on the user's head. The display device 100 includes a display panel 110 for displaying images generated by the image generating device 200. Hereinafter, the form in which the display device 100 is fixed to the wearing component 400 is also referred to as "HMD (Head Mounted Display)".

[0039] In this disclosure, the image generation apparatus 200 may be exemplified by electronic devices such as personal computers and gaming devices. The image generation apparatus 200 generates VR images corresponding to the position and posture of the user's head and outputs them to the display device 100. It should be noted that the images generated by the image generation apparatus 200 are not limited to VR images.

[0040] The display device 100 is fixed in a position where the display panel 110 is positioned in front of the user's eyes when the user wears the HMD. The display device 100 may also include, in addition to the display panel 110, a sound output device such as a speaker positioned corresponding to the user's ears when the user wears the HMD. Furthermore, as described later, the display device 100 may also include sensors (e.g., gyroscope, accelerometer, orientation sensor, etc.) for detecting the position and posture of the user's head. Additionally, the display device 100 may also include the functionality of an image generation device 200.

[0041] like Figure 2 As shown, the wearing component 400 has, for example, lenses 410 corresponding to the two eyes E. When the user wears the HMD, the lenses 410 magnify the image displayed on the display panel 110 and image it onto the user's eyes E. The user's visual recognition is displayed on the display panel 110 and magnified by the lenses 410. It should be noted that, in Figure 2 The example shown depicts a lens positioned between the user's eye E and the display panel 110, but it could also be composed of multiple lenses, each corresponding to one of the user's eyes. Alternatively, the display panel 110 could be positioned at a location different from the user's field of vision.

[0042] In this embodiment, the display panel 110 is envisioned as a liquid crystal display panel using image liquid crystal elements, including IPS (Integrated Panel Switching) and other transverse electric field modes such as FFS (Fringe Field Switching).

[0043] exist Figure 1 The VR system shown uses a display device 100, such as... Figure 2As shown, the image displayed on the display panel 110 is magnified and imaged at the user's eye E. Therefore, a display panel with higher resolution is required. Furthermore, when the image is magnified, the gaps between pixels can easily appear as a grid pattern. Therefore, by using a liquid crystal display panel with a high pixel aperture ratio, it is possible to display images with less grid-like appearance.

[0044] Figure 3 It is shown Figure 1 A block diagram illustrating an example of the configuration of an image generating device and a display device in the shown display system. (See diagram for example.) Figure 3 As shown, the display device 100 includes two display panels 110, a sensor 120, an image separation circuit 150, and an interface 160.

[0045] The display device 100 has two display panels 110. One of the two display panels 110 is used as a display panel 110 for the left eye, and the other is used as a display panel 110 for the right eye.

[0046] The two display panels 110 each have a display area 111 and a display control circuit 112. It should be noted that the display panel 110 has a light source device (not shown) that illuminates the display area 111 from behind.

[0047] In the display area 111, the pixels (Pix) are arranged in a two-dimensional matrix (row-column) of P0 × Q0 pixels (P0 in the row direction (X direction) and Q0 in the column direction (Y direction). In this embodiment, for example, the pixel density in the display area 111 is set to 806 ppi. Figure 3 The diagram illustrates the arrangement of multiple pixels (Pix), and the detailed arrangement of the pixels (Pix) will be described later.

[0048] The display panel 110 has scan lines extending in the X direction and signal lines extending in the Y direction intersecting the X direction. In the display panel 110, pixels Pix are arranged in an area surrounded by signal lines SL and scan lines GL. Each pixel Pix has a switching element (TFT: thin-film transistor) connected to the signal lines SL and GL, and a pixel electrode connected to the switching element. A scan line GL is connected to a plurality of pixels Pix arranged along the extension direction of the scan line GL. Furthermore, a signal line SL is connected to a plurality of pixels Pix arranged along the extension direction of the signal line SL.

[0049] One of the two display panels 110 has a display area 111 for the right eye, and the other display panel 110 has a display area 111 for the left eye. Here, the example illustrates a case where there are two display panels 110 for left and right eye use, but the display device 100 is not limited to a structure using two display panels 110. For example, the display panel 110 may also be a single display panel 110, with its display area divided in two to display an image for the right eye in the right half and an image for the left eye in the left half.

[0050] The display control circuit 112 includes a driver IC (Integrated Circuit) 115, a signal line connection circuit 113, and a scan line drive circuit 114. The signal line connection circuit 113 is electrically connected to the signal line SL. The driver IC 115 controls the on / off state of a switching element (e.g., a TFT) used to control the operation (transmittance) of the pixel Pix via the scan line drive circuit 114. The scan line drive circuit 114 is electrically connected to the scan line GL.

[0051] Sensor 120 detects information that can infer the orientation of the user's head. For example, sensor 120 detects information indicating the operation of display device 100, and display system 1 infers the orientation of the user's head when display device 100 is worn on the head based on the information indicating the operation of display device 100.

[0052] Sensor 120 uses, for example, at least one of the angle, acceleration, angular velocity, orientation, and distance of display device 100 to detect information that can estimate the orientation of the HMD. Sensor 120 can, for example, use a gyroscope sensor, an accelerometer, an orientation sensor, etc. Sensor 120 can, for example, use a gyroscope sensor to detect the angle and angular velocity of display device 100. Sensor 120 can, for example, use an accelerometer sensor to detect the direction and magnitude of the acceleration acting on display device 100.

[0053] Furthermore, sensor 120 can detect the orientation of display device 100, for example, using an orientation sensor. Sensor 120 can also detect movement of display device 100, for example, using a distance sensor, GPS (Global Positioning System) receiver, etc. Sensor 120 can be any sensor used to detect the user's head orientation, changes in gaze, movement, etc., and can also be other sensors such as light sensors; multiple sensors can also be used in combination. Sensor 120, for example, Figure 3 As shown, it is electrically connected to the control circuit 230. A signal representing the detection result of the sensor 120 is output to the control circuit 230.

[0054] The image separation circuit 150 receives left-eye image data and right-eye image data transmitted from the image generating device 200 via cable 300, and sends the left-eye image data to the display panel 110 displaying the left-eye image, and sends the right-eye image data to the display panel 110 displaying the right-eye image. As described later, the image data (e.g., described later) forms the basis of the pixel signals generated by the driver IC 115. Figure 17 The image data shown (DP3) is the image data for the left eye or the image data for the right eye.

[0055] Interface 160 includes a connecting cable 300 ( Figure 1 The connector is used for the image generating device 200. Interface 160 receives signals from the image generating device 200 via the connected cable 300. It should be noted that the signals input from the sensor 120 can be output to the control circuit 230 of the image generating device 200 via interface 160 and interface 240. Furthermore, interface 160 can, for example, function as a wireless communication device, enabling the transmission and reception of information between the image generating device 200 and the sensor 1200 via wireless communication.

[0056] The image generation apparatus 200 includes an operation unit 210, a storage unit 220, a control circuit 230, and an interface 240.

[0057] The operation unit 210 accepts user operations. The operation unit 210 can use input devices such as a keyboard, buttons, or a touchscreen. The operation unit 210 is electrically connected to the control circuit 230. The operation unit 210 outputs operation-related information to the control circuit 230.

[0058] Storage unit 220 stores programs and data. Storage unit 220 temporarily stores the processing results of control circuit 230. Storage unit 220 includes a storage medium. The storage medium includes, for example, ROM, RAM, memory card, optical disc, or magneto-optical disc. Storage unit 220 may also store data of images displayed on display device 100.

[0059] Storage unit 220 may store, for example, control program 211, VR application 212, etc. Control program 211 may provide functions related to various controls for operating image generation device 200. VR application 212 may provide functions for displaying VR images on display device 100. Storage unit 220 may store, for example, various information input from display device 100, such as data representing detection results from sensor 120.

[0060] The control circuit 230 includes, for example, an MCU (Micro Control Unit) and a CPU (Central Processing Unit). The control circuit 230 can uniformly control the operation of the image generating device 200. The various functions of the control circuit 230 are realized based on the control provided by the control circuit 230.

[0061] The control circuit 230 includes, for example, a GPU (Graphics Processing Unit) that generates the image to be displayed. The GPU generates the image to be displayed on the display device 100. The control circuit 230 outputs the image generated by the GPU to the display device 100 via the interface 240. In this embodiment, the case where the control circuit 230 of the image generation device 200 includes a GPU is described, but it is not limited thereto. For example, the GPU may also be provided in the display device 100 or the image separation circuit 150 of the display device 100. In this case, the display device 100 obtains data, for example, from the image generation device 200, external electronic devices, etc., and the GPU generates the image based on the data.

[0062] Interface 240 includes connection cable 300 (see reference) Figure 1 The interface 240 is a connector for the control circuit 230. Signals from the display device 100 are input via cable 300 through the interface 240. Signals input from the control circuit 230 are output to the display device 100 via cable 300 through the interface 240. The interface 240 can, for example, function as a wireless communication device, enabling the transmission and reception of information between the interface 240 and the display device 100 via wireless communication.

[0063] When executing VR application 212, control circuit 230 causes display device 100 to display an image corresponding to the user's (display device 100's) actions. If control circuit 230 detects a change in the user's (display device 100's) actions while displaying an image, it changes the image displayed on display device 100 to the image in the changed direction. When creating an image, control circuit 230 creates an image based on a reference viewpoint and reference line of sight in virtual space. Upon detecting a change in the user's (display device 100's) actions, it changes the viewpoint or line of sight used when creating the displayed image from the reference viewpoint or reference line of sight, and causes display device 100 to display an image based on the changed viewpoint or line of sight.

[0064] For example, based on the detection results from sensor 120, control circuit 230 detects that the user's head has moved to the right. In this case, control circuit 230 changes the currently displayed image to reflect the change in gaze to the right. The user can then visually identify the image displayed to the right of the image on display device 100.

[0065] For example, when the control circuit 230 detects movement of the display device 100 based on the detection result of the sensor 120, the control circuit 230 changes the image according to the detected movement. If the control circuit 230 detects that the display device 100 has moved forward, it changes the currently displayed image to the image shown when the display device 100 has moved forward. If the control circuit 230 detects that the display device 100 has moved backward, it changes the currently displayed image to the image shown when the display device 100 has moved backward. The user can visually identify their own direction of movement from the image displayed on the display device 100.

[0066] Figure 4 This is a circuit diagram showing the display area involved in the implementation method. Hereinafter, the scan line GL mentioned above is a collective term for multiple scan lines G1, G2, and G3. The signal line SL mentioned above is a collective term for multiple signal lines S1, S2, and S3. Figure 4 In the example shown, the scan line GL is orthogonal to the signal line SL, but this is not a limitation. For example, the scan line GL and the signal line SL may not be orthogonal.

[0067] like Figure 4 As shown, in this disclosure, a pixel Pix includes, for example, a pixel PixR for displaying red (first color: R), a pixel PixG for displaying green (second color: G), and a pixel PixB for displaying blue (third color: B). Switching elements TrD1, TrD2, TrD3, signal lines SL, scan lines GL, etc., for each pixel PixR, PixG, and PixB are formed in the display area 111. Signal lines S1, S2, and S3 are used to supply power to each pixel electrode PE1, PE2, PE3 (see reference PE3). Figure 6 The wiring supplies the pixel signals. Scan lines G1, G2, and G3 are used to supply the gate signals driving the switching elements TRD1, TRD2, and TRD3. It should be noted that the pixel signals are generated by the driver IC 115 based on the image data input to the display panel 110. The pixel signals determine the orientation of the liquid crystal molecules LM at the respective positions of pixels PixR, PixG, and PixB within each pixel Pix. That is, the pixel signals determine the transmittance of light from the backlight at the position of each pixel Pix. In other words, pixel signals are generated so that the image to be displayed based on the image data can be reproduced through the display output of the display panel 110.

[0068] Pixels PixR, PixG, and PixB each possess switching elements TrD1, TrD2, and TrD3, as well as a capacitor for the liquid crystal layer LC. The switching elements TrD1, TrD2, and TrD3 are constructed from thin-film transistors; in this example, they are constructed from n-channel MOS (Metal Oxide Semiconductor) type TFTs. A sixth insulating film 16 (see reference 16) is disposed between the pixel electrodes PE1, PE2, and PE3 (described later) and the common electrode COM. Figure 6 ), formed by them Figure 4 The holding capacitor Cs is shown.

[0069] Figure 4 The color filters CFR, CFG, and CFB shown are configured such that, for example, the color regions colored as red (first color: R), green (second color: G), and blue (third color: B) are arranged periodically. These three color regions (R, G, and B) form a group with the aforementioned... Figure 4 The pixels PixR, PixG, and PixB shown correspond to each other. Furthermore, pixels PixR, PixG, and PixB corresponding to the color regions of the three colors are grouped as a single pixel Pix. It should be noted that a color filter can also contain color regions of four or more colors.

[0070] Figure 5 This is a schematic diagram illustrating an example of a display panel according to an embodiment. Figure 6 It is a cross-sectional view schematically showing the cross-section of the display panel involved in the embodiment.

[0071] like Figure 5 As shown, the display panel 110 has edges 110e1, 110e2, 110e3, and 110e4 at the end of the substrate. The area between the edges 110e1, 110e2, 110e3, and 110e4 at the end of the substrate of the display panel and the display area 111 is called the peripheral area.

[0072] A scan line driving circuit 114 is disposed in the peripheral area between edge 110e1 of the substrate end of the display panel 110 and the display area 111. A signal line connection circuit 113 is disposed in the peripheral area between edge 110e4 of the substrate end of the display panel 110 and the display area 111. A driver IC 115 is disposed in the peripheral area between edge 110e4 of the substrate end of the display panel 110 and the display area 111. In this embodiment, edges 110e3 and 110e4 of the substrate end of the display panel 110 are parallel to the X direction. Edges 110e1 and 110e2 of the substrate end of the display panel 110 are parallel to the Y direction.

[0073] exist Figure 5In the example shown, the signal line SL extends parallel to the Y direction, and the scan line GL extends parallel to the X direction. Figure 5 As shown, in this disclosure, the direction in which the scan line GL extends is orthogonal to the direction in which the signal line SL extends; therefore, for example, each pixel PixR, PixG, and PixB is rectangular. Figure 5 In the example shown, pixels PixR, PixG, and PixB are depicted as rectangles, but they are not limited to rectangles. For example, pixels PixR, PixG, and PixB could also be parallelograms. It should be noted that pixels PixR, PixG, and PixB are sometimes also referred to as pixels PixS.

[0074] Next, refer to Figure 6 The cross-sectional structure of the display panel 110 will be described. Figure 6 In this design, the array substrate SUB1 uses a first insulating substrate 10, which is transparent and can be made of materials such as glass or resin, as its base. The array substrate SUB1 has a first insulating film 11, a second insulating film 12, a third insulating film 13, a fourth insulating film 14, a fifth insulating film 15, a sixth insulating film 16, signal lines S1-S3, pixel electrodes PE1-PE3, a common electrode COM, and a first alignment film AL1 on the side of the first insulating substrate 10 facing the opposing substrate SUB2. In the following description, the direction from the array substrate SUB1 towards the opposing substrate SUB2 will be referred to as "upper," or simply "up."

[0075] The first insulating film 11 is located on the first insulating substrate 10. The second insulating film 12 is located on the first insulating film 11. The third insulating film 13 is located on the second insulating film 12. Signal lines S1 to S3 are located on the third insulating film 13. The fourth insulating film 14 is located on the third insulating film 13 and covers the signal lines S1 to S3.

[0076] If necessary, wiring can also be disposed on the fourth insulating film 14. This wiring is covered by the fifth insulating film 15. In this embodiment, the wiring is omitted. The first insulating film 11, the second insulating film 12, the third insulating film 13, and the sixth insulating film 16 are formed, for example, of a light-transmitting inorganic material such as silicon oxide or silicon nitride. The fourth insulating film 14 and the fifth insulating film 15 are formed of a light-transmitting resin material and have a film thickness greater than other insulating films formed of inorganic materials. However, the fifth insulating film 15 may also be formed of an inorganic material.

[0077] The common electrode COM is located on the fifth insulating film 15. The common electrode COM is covered by the sixth insulating film 16. The sixth insulating film 16 is formed, for example, from a transparent inorganic material such as silicon oxide or silicon nitride.

[0078] Pixel electrodes PE1-PE3 are located on the sixth insulating film 16 and are positioned opposite the common electrode COM across the sixth insulating film 16. The pixel electrodes PE1-PE3 and the common electrode COM are formed of a transparent conductive material such as ITO (Indium Tin Oxide) or IZO (Indium Zinc Oxide). The pixel electrodes PE1-PE3 are covered by a first alignment film AL1. The first alignment film AL1 also covers the sixth insulating film 16.

[0079] The opposing substrate SUB2 uses a second insulating substrate 20, such as a glass substrate or a resin substrate, as its base. On the side of the second insulating substrate 20 opposite to the array substrate SUB1, the opposing substrate SUB2 includes: a light-shielding layer BM, color filters CFR, CFG, CFB, an outer coating OC, and a second alignment film AL2.

[0080] like Figure 6 As shown, the light-shielding layer BM is located on the side of the second insulating substrate 20 opposite to the array substrate SUB1. Furthermore, the light-shielding layer BM defines the size of the openings that face the pixel electrodes PE1 to PE3 respectively. The light-shielding layer BM is formed of a black resin material and a light-shielding metal material.

[0081] Color filters CFR, CFG, and CFB are located on the side of the second insulating substrate 20 opposite to the array substrate SUB1, with their respective ends overlapping the light-shielding layer BM. Color filter CFR is opposite to pixel electrode PE1. Color filter CFG is opposite to pixel electrode PE2. Color filter CFB is opposite to pixel electrode PE3. In one example, color filters CFR, CFG, and CFB are formed of resin materials colored red, green, and blue, respectively.

[0082] The outer coating OC covers color filters CFR, CFG, and CFB. The outer coating OC is formed of a light-transmitting resin material. The second alignment film AL2 covers the outer coating OC. The first alignment film AL1 and the second alignment film AL2 are formed, for example, of a material exhibiting horizontal orientation.

[0083] As explained above, the opposing substrate SUB2 includes a light-shielding layer BM, a color filter CFR, a color filter CFG, and a color filter CFB. The light-shielding layer BM is disposed in conjunction with... Figure 4 The areas opposite to the wiring sections shown are the scan lines G1, G2, G3, signal lines S1, S2, S3, contact parts PA1, PA2, PA3, and switching elements TrD1, TrD2, TrD3.

[0084] exist Figure 6In this configuration, the opposing substrate SUB2 has three color filters (CFR, CFG, and CFB), but it may also have four or more color filters, including colors other than blue, red, and green, such as white, clear, yellow, magenta, and cyan. Furthermore, these color filters (CFR, CFG, and CFB) may also be disposed on the array substrate SUB1.

[0085] In addition, Figure 6 In this case, the color filter CF is disposed on the opposing substrate SUB2, but it can also be a so-called COA (Color filter on Array) structure in which the array substrate SUB1 has the color filter CF.

[0086] The array substrate SUB1 and the opposing substrate SUB2 described above are arranged with the first alignment film AL1 and the second alignment film AL2 facing each other. The liquid crystal layer LC is sealed between the first alignment film AL1 and the second alignment film AL2. The liquid crystal layer LC is composed of a negative liquid crystal material with negative dielectric anisotropy or a positive liquid crystal material with positive dielectric anisotropy.

[0087] The array substrate SUB1 is positioned opposite the backlight unit IL, and the opposing substrate SUB2 is located on the display side. Various types of backlight units can be used as the backlight unit IL, but detailed structural descriptions are omitted.

[0088] A first optical element OD1, including a first polarizer PL1, is disposed on the outer surface of the first insulating substrate 10 or on the surface opposite to the backlight unit IL. A second optical element OD2, including a second polarizer PL2, is disposed on the outer surface of the second insulating substrate 20 or on the surface at the observation position. The first polarization axis of the first polarizer PL1 and the second polarizer PL2 are, for example, orthogonally Nicholl positions in the XY plane. It should be noted that the first optical element OD1 and the second optical element OD2 may also include other optical functional elements such as a phase retardation plate.

[0089] For example, when the liquid crystal layer LC is a negative liquid crystal material, without applying a voltage to the liquid crystal layer LC, the liquid crystal molecules LM are initially aligned in the XY plane with their long axis along the X direction. On the other hand, when a voltage is applied to the liquid crystal layer LC, that is, when an electric field is formed between the pixel electrodes PE1~PE3 and the common electrode COM, the orientation state of the liquid crystal molecules LM changes due to the influence of the electric field. During conduction, the polarization state of the incident linearly polarized light changes according to the orientation state of the liquid crystal molecules LM as it passes through the liquid crystal layer LC.

[0090] The following is for reference Figure 7More detailed information will be provided regarding the supply of gate signals and pixel signals in the relevant embodiments.

[0091] Figure 7 This is a diagram used to illustrate the scan performed to supply the gate signal. In Figure 7 In the following description of the figures, it is assumed that scan lines GL are arranged from one end of the Y direction to the other in the order of scan lines G1, G2, G3, ..., GB, ..., GC, ..., GD, ..., GE. Furthermore, the intervals DS between scan lines G1 and GB, GB and GC, GC and GD, and GD and GE can be considered equal. The number of scan lines GL arranged within interval DS is equal.

[0092] Unless otherwise specified, the term "scanning" hereafter refers to the supply of gate signals from the scan line drive circuit 114 for the display output of a frame image. The supply of gate signals during scanning is performed on a per-scan-line (GL) basis. Specifically, gate signals are supplied to each scan line (GL) at different times. More specifically, the scan lines (GL) to which gate signals are supplied are sequentially switched from one end to the other in the Y direction. That is, during scanning, the timing of supplying gate signals to scan line G1, scan line G2, scan line G3, ..., scan line GB, ..., scan line GC, ..., scan line GD, ..., scan line GE is generated sequentially. By supplying pixel signals from the signal line connection circuit 113 via the signal line SL when a gate signal is supplied to a certain scan line (GL), pixel signals are supplied to each of the multiple pixels (Pix) connected to that scan line (GL). That is, during scanning, the pixel signal supplied to the pixel Pix connected to the scan line GL to which the gate signal is supplied is supplied to each signal line SL.

[0093] Hereinafter, when referred to as a pixel row, it refers to multiple pixel Pixes that share the same scan line GL. Therefore, a pixel row is a group of pixel Pixes connected to a scan line GL. The multiple pixel Pixes contained in a pixel row are arranged in the X direction.

[0094] Next, refer to Figure 8 The signal control involved in updating the displayed frame image is explained.

[0095] Figure 8This is a timing diagram of the signal control involved in updating a frame image. Hereinafter, when referred to as the frame period FT, it refers to the period involved in the display output of a frame image. The frame period FT includes the update period of a single frame image and the display output period of the updated frame image. Specifically, as... Figure 8 As shown, the frame period FT includes a first period P1, a second period P2, a third period P3, and a fourth period P4. The first period P1, the second period P2, and the third period P3 correspond to the update period of one frame image. The fourth period P4 corresponds to the display output period of the updated frame image.

[0096] The first period, P1, is the period for resetting all pixels (Pix). Specifically, during the first period, P1, gate signals are supplied to all scan lines (GL), and predetermined pixel signals are supplied to all signal lines (SL). Here, the predetermined pixel signals function as reset signals. Details of the predetermined pixel signals will be described later.

[0097] Scanning is performed during the second period P2. Therefore, during the second period P2, the scan lines GL supplied with gate signals are switched sequentially from one end to the other in the Y direction, and the pixel signals supplied to the pixels Pix connected to the scan lines GL supplied with gate signals are supplied to each signal line SL.

[0098] It should be noted that the scan line drive circuit 114 is implemented to alternately perform the process of supplying gate signals to all scan lines GL simultaneously during a first period P1 and the process of scanning during a second period P2. The scanning in the second period P2 is implemented, for example, by a so-called shift register. The simultaneous supply of gate signals during the first period P1 is implemented, for example, not via a shift register but via a switch for connecting the gate signal supply line to all scan lines GL.

[0099] Furthermore, the reset signal supplied from the signal line connection circuit 113 during the first period P1 can be generated by the driver IC 115 and supplied to the signal line SL via the signal line connection circuit 113. Alternatively, the reset signal can be provided to the signal line SL by other methods. For example, a switch can be provided on the display panel 110 that can simultaneously switch the connection and non-connection of the potential line, which is provided with a potential that functions as a reset signal, and the signal line SL. During the first period P1, the switch is turned on to connect the potential line and the signal line SL, and during periods other than the first period P1, the switch is turned off to disconnect the potential line and the signal line SL.

[0100] exist Figure 8 In the diagram, the object to which the gate signal generated during the scan is supplied is shown vertically as the "scan object". Figure 8In the diagram, scan lines G1, GB, GC, GD, and GE within the multiple scan lines GL are representatively shown as the scan objects, but in reality, all scan lines GL arranged from one end to the other in the Y direction are included within the scan objects. Furthermore, in Figure 8 In the diagram, the switching of the gate signal supply target generated during scanning and its relationship to time are illustrated using the scan transition line SC. The gate signal is supplied to the scan target at the timing corresponding to the intersection of the scan target and the scan transition line SC. Therefore, the timing for supplying the gate signal to scan line G1 is immediately after the start of the second period P2. Furthermore, the timing for supplying the gate signal to scan line GB is immediately after the first response time T1B has elapsed since the start of the second period P2. Furthermore, the timing for supplying the gate signal to scan line GC is immediately after the first response time T1C has elapsed since the start of the second period P2. The first response time T1C is longer than the first response time T1B. Furthermore, the timing for supplying the gate signal to scan line GD is immediately after the first response time T1D has elapsed since the start of the second period P2. The first response time T1D is longer than the first response time T1C. Furthermore, the timing for supplying the gate signal to scan line GE is immediately after the first response time T1E has elapsed since the start of the second period P2. The first response time T1E is longer than the first response time T1D.

[0101] Hereinafter, when referred to as the first response time T1, the first response times T1B, T1C, T1D, and T1E are uniformly used to represent the time from the start of the second period P2 until the gate signal is supplied. As shown by the difference between the first response times T1B, T1C, T1D, and T1E, the length of the first response time T1 depends on the configuration of each scan line GL. The closer the scan line GL is to one end in the Y direction, the shorter the first response time T1; the closer the scan line GL is to the other end in the Y direction, the longer the first response time T1.

[0102] The third period P3 functions as a gap between the second period P2 and the fourth period P4. Since the response of the liquid crystal molecules LM in the pixel Pix corresponding to the supplied pixel signal requires a certain amount of time, the third period P3 is set in the frame period FT.

[0103] Here, as described above, the timing of supplying the gate signal to each scan line GL during the second period P2 is different. Therefore, the time from supplying the pixel signal to the pixel Pix connected to each scan line GL until the start of the fourth period P4 after the third period P3 is different for each pixel row.

[0104] Hereinafter, when referred to as the second response time T2, the time from the timing of the gate signal supply, i.e., the timing of the pixel signal supply, to the fourth period P4 is uniformly represented. Figure 8 In the diagram, as examples of the second response time T2, second response times T21, T2B, T2C, T2D, and T2E are shown. Second response time T21 is the second response time T2 for the pixel row of shared scan line G1. Second response time T2B is the second response time T2 for the pixel row of shared scan line GB. Second response time T2B is shorter than second response time T21. Second response time T2C is the second response time T2 for the pixel row of shared scan line GC. Second response time T2C is shorter than second response time T2B. Second response time T2D is the second response time T2 for the pixel row of shared scan line GD. Second response time T2D is shorter than second response time T2C. Second response time T2E is the second response time T2 for the pixel row of shared scan line GE. Second response time T2E is shorter than second response time T2D.

[0105] In the fourth period P4, the backlight is lit. That is, by completing the response of the liquid crystal molecules LM corresponding to the pixel signal supplied in the second period P2 through the third period P3, the transmittance of light from the backlight is individually controlled by each pixel Pix in the fourth period P4 to display and output the image.

[0106] It should be noted that, in Figure 8 In the diagram, the rectangular wave in the "BL" column represents the ON / OFF switching of the backlight, indicating whether it is on or off. As shown by the "OFF" position of the rectangular wave, the backlight is off during the first period P1, the second period P2, and the third period P3. As shown by the "ON" position of the rectangular wave, the backlight is on during the fourth period P4.

[0107] It should be noted that, Figure 8 The frame period FTb shown is Figure 8 The frame period shown is the period preceding the FT. Furthermore, Figure 8 The frame period FTa shown is Figure 8 The frame period FT is the next frame period after the frame period FT shown. The same signal control as the frame period FT is performed in frame period FTa and frame period FTb. In an implementation, frame periods are generated a predetermined number of times within a predetermined time (e.g., 1 second) according to a predetermined refresh rate. This predetermined number is arbitrary, for example, 90 times; if it is another number, it is preferably more than 90 times, suitable for the use of the HMD.

[0108] Here, the technical significance of the existence of a first period P1 before the second period P2 in the frame interval FT is explained. As a premise for this technical significance, refer to... Figure 10The overdrive process in LCD displays is explained.

[0109] Figure 10 It is a diagram used to illustrate the mechanism of overdrive. Figure 10 And the following Figure 11 and Figure 12 The horizontal axis represents the time elapsed after a pixel signal is supplied to a certain pixel Pix. Figure 10 And the following Figure 11 and Figure 12 The vertical axis represents the brightness of the display output at the location of pixel Pix, expressed as a percentage relative to the pixel signal supplied to pixel Pix. Figure 10 And the following Figure 11 and Figure 12 The graphs (e.g., graph LC1, etc.) in the graphs reflect the response speed of the pixel Pix corresponding to the brightness difference of the pixel Pix before and after the pixel signal is supplied. For example, in Figure 10 The graph shows the response speed of a pixel Pix when the brightness of the display output of the pixel Pix driven by the supplied pixel signal is taken as 100% and the brightness of the display output of the pixel Pix before the pixel signal is supplied is 0%.

[0110] Figure 9 This is a diagram showing the situations where the control signal P1 is not present. (See diagram for example.) Figure 9 As shown, in reference Figure 8 The description includes the following: If P1 is absent during the frame period FT, and the pixel voltage of the previous frame FTb remains unchanged even after the period of P4, the response time T2 of the previous frame FTb is extended, and the first response time T1 continues until the second response time T2 of the frame FT is about to arrive. Figure 9 In, and also with reference Figure 8 Similarly, the second response time T2 varies per pixel row. Therefore, the backlight illumination period, in terms of the timing of pixel signal supply, varies per pixel row. Specifically, the shorter the second response time T2 for a pixel row, the earlier the backlight illumination period occurs, in terms of the timing of pixel signal supply. Figure 10 In the example, the fourth periods P4E, P4D, and P4C are shown as such "the lighting periods regarded as backlights".

[0111] The fourth period, P4E, is the "apparent backlight illumination period" for the pixel row of the shared scan line GE. Therefore, after the second response time T2E (refer to...) from the moment the pixel signal is supplied... Figure 8The fourth period, P4E, is generated after the pixel line GD is shared. The fourth period, P4D, is the "apparent backlight illumination period" for the pixel row of the shared scan line GD. Therefore, after the second response time T2D (refer to...) from the moment the pixel signal is supplied... Figure 8 The fourth period, P4D, is generated after the pixel row of the shared scan line GC. The fourth period, P4C, is the "apparent backlight illumination period". Therefore, after the second response time T2C (refer to...) from the moment the pixel signal is supplied... Figure 8 This leads to the fourth period, P4C. It should be noted that the fourth periods P4E, P4D, and P4C are actually the same fourth period, P4.

[0112] Imagine a scenario where, as a frame of the image is updated, a pixel signal is supplied to update the brightness of a certain pixel (Pix) from 0% to 100%. In this case, the simplest signal processing is to supply the pixel signal representing 100% brightness to that pixel (Pix). Here, it is assumed that... Figure 10 The graph LC1 shown represents the response of pixel Pix caused by this simplest signal processing. In graph LC1, the moment of reaching 100% brightness occurs after the fourth period P4C, but the fourth periods P4E, P4D, and P4C all lag behind. Therefore, in this simplest signal processing, the response of pixel Pix cannot keep up with the end of the fourth period P4, and the pixel Pix cannot produce the 100% brightness intended by the pixel signal. That is, the reproduction of brightness in the display output becomes insufficient.

[0113] Therefore, overdriving is applied to LCD displays. Overdriving, as used here, refers to supplying a pixel signal with a relative brightness difference greater than the relative brightness difference between the pixel before and after the update. Generally, the shorter the second response time T2 of a pixel, the greater the degree of "relative brightness difference greater than the relative brightness difference between the pixel before and after the update" applied in the overdriving process.

[0114] For example, GC of shared scan lines via overdrive (see reference) Figure 7 , Figure 8 The pixel row contains pixels (Pix) that have a relative brightness difference applied to them by slightly more than 100%. By applying this relative brightness difference to a certain degree, the response of that pixel (Pix) becomes as follows: Figure 10 The curve LC2 is shown below. In curve LC2, the timing TM2 in the fourth period P4C generates the moment when 100% brightness is reached, coinciding with the start and end times of the fourth period P4C. Furthermore, timing TM2 roughly coincides with the midpoint between the start and end times of the fourth period P4C. As a result, the average brightness of pixel Pix presented in the fourth period P4C becomes approximately 100%, thereby enabling more precise brightness control.

[0115] In addition, GD of the shared scan line (reference) is applied via overdrive. Figure 7 , Figure 8 The pixel row contains pixels (Pix) that have a relative brightness difference of approximately 110%. The degree to which this relative brightness difference is applied affects the response of that pixel (Pix) as follows: Figure 10 The curve LC3 is shown below. In curve LC3, the timing TM3 in the fourth period of P4D generates the moment when 100% brightness is reached, coinciding with the start and end times of the fourth period of P4D. Furthermore, timing TM3 roughly coincides with the midpoint between the start and end times of the fourth period of P4D. As a result, the average brightness of the pixel Pix presented in the fourth period of P4D becomes approximately 100%, thereby enabling more precise brightness control.

[0116] In addition, the shared scan line GE (reference) is overdriven. Figure 7 , Figure 8 The pixel Pix within a pixel row is subjected to a relative brightness difference of 150%. By applying this relative brightness difference, the response of that pixel Pix becomes as follows: Figure 10 The curve LC4 is shown below. In curve LC4, the timing TM4 in the fourth period P4E generates the moment when the brightness reaches 100%, coinciding with the start and end times of the fourth period P4E. Furthermore, timing TM4 roughly coincides with the midpoint between the start and end times of the fourth period P4E. As a result, the average brightness of pixel Pix presented in the fourth period P4E becomes approximately 100%, thereby enabling more precise brightness control.

[0117] In this way, overdrive enables higher precision brightness reproduction. (See above for reference.) Figure 10 The basic idea of ​​overdrive has been explained, but in practice, applying overdrive requires considering more complex factors such as the difference in relative brightness before and after the update. See below for reference. Figure 11 The relationship between the relative brightness difference before and after the overdrive and update is explained.

[0118] Figure 11 This is a chart used to illustrate the difference in relative brightness before and after the driver update. (Refer to...) Figure 11 And the following Figure 12 The description envisions pixel Pix achieving 100% brightness, or luminance LU2, during the fourth period P4X after the pixel signal update. The fourth period P4X is the "apparent backlight illumination period" for a row of pixels sharing a certain scan line GL. The fourth period P4X occurs after a second response time T2X from the moment the pixel signal is supplied. The second response time T2X is the second response time T2 for that pixel row.

[0119] In addition, in reference Figure 11 And the following Figure 12 In the description, 0% of the brightness, represented by the vertical axis (relative brightness), is defined as brightness LU1. Furthermore, brightness LU3 is shown as an example of a high brightness significantly exceeding 100%. Brightness LU3 is a brightness exceeding 150% but less than 160%. Additionally, brightness LU21 is shown as an example of a brightness exceeding brightness LU2 but significantly lower than brightness LU3. Furthermore, brightness LU22 is shown as an example of a brightness less than brightness LU2 but significantly exceeding brightness LU1.

[0120] For example, if the brightness of pixel Pix before the pixel signal update is LU1, and the simplest signal processing without overdrive is applied, assuming the response of pixel Pix is... Figure 11 The curve LC51 shown illustrates this. In curve LC51, the moment when 100% brightness is reached occurs after the fourth period P4X, but not within the fourth period P4X. Therefore, in this case, overdrive is applied to supply the pixel signal corresponding to the brightness LU21 to the pixel Pix, so that the response of the pixel Pix becomes as shown in curve LC52. In curve LC52, the moment when 100% brightness is reached occurs during the fourth period P4X, at the moment TMX, catching up with the fourth period P4X.

[0121] Furthermore, when the brightness of pixel Pix before the pixel signal update is LU3, and the simplest signal processing without overdrive is applied, assuming the response of pixel Pix is... Figure 11 The curve LC53 illustrates this. In curve LC53, the moment when 100% brightness is reached occurs after the fourth period P4X, but not within the fourth period P4X. Therefore, in this case, overdrive is applied to supply the pixel signal corresponding to the brightness LU22 to the pixel Pix, so that the response of the pixel Pix becomes as shown in curve LC54. In curve LC54, the moment when 100% brightness is reached occurs during the fourth period P4X, at the moment TMX, catching up with the fourth period P4X.

[0122] In conclusion, if as Figure 9 In the example shown, where a first period P1 is absent, to achieve 100% brightness, the pixel signals corresponding to brightness LU22 and LU21, rather than the pixel signal corresponding to brightness LU2, need to be applied to pixel Pix. Whether the target brightness is brightness LU22, brightness LU21, or some other grayscale needs to be determined based on the brightness difference before and after the update (image data of TFb and TF) and the pixel's response speed, requiring a unit for this purpose. (See reference...) Figure 11As explained, when the brightness of pixel Pix before the pixel signal update is lower than brightness LU2 (brightness LU1), a brightness LU21 higher than brightness LU2 is supplied as the pixel signal for update. Furthermore, when the brightness of pixel Pix before the pixel signal update is higher than brightness LU2 (brightness LU3), a brightness LU22 lower than brightness LU2 is supplied as the pixel signal for update. Thus, when overdrive is applied, although the goal is the same—to generate brightness LU2 in pixel Pix during the fourth period P4X after the pixel signal update—the pixel signal supplied for update needs to differ depending on whether the brightness of pixel Pix before the pixel signal update is relatively higher or lower than brightness LU2.

[0123] Furthermore, the response of a pixel to an updated pixel signal is also related to factors other than the relative brightness before and after the update, such as the temperature of the liquid crystal.

[0124] Figure 12 This indicates that when the temperature of the liquid crystal molecules (LM) is lower than the reference temperature... Figure 11 The diagram illustrates the response of the pixel (Pix) to the temperature of the liquid crystal molecule (LM) as envisioned in the description. When the temperature of the liquid crystal molecule (LM) is lower, the response of the liquid crystal molecule (LM) is generally slower. That is, when the temperature of the liquid crystal molecule (LM) is lower, the response of the pixel (Pix) becomes slower.

[0125] exist Figure 12 The diagram illustrates how the application of a method related to the decreasing temperature of the liquid crystal molecules (LM) is beneficial. Figure 11 The response of pixel Pix changes as shown in curve LC61 when the same control is applied, as in curve LC51. Similarly, due to the decrease in temperature of the liquid crystal molecules LM, the same... Figure 11 When the same control is applied to the curve LC52 shown, the response of pixel Pix becomes as shown in curve LC62. Furthermore, due to the decrease in temperature of the liquid crystal molecules LM, a similar effect is applied... Figure 11 When the same control is applied to the curve LC53, the response of pixel Pix becomes as shown in curve LC63. Furthermore, due to the decrease in temperature of the liquid crystal molecules LM, a similar effect is applied... Figure 11 The response of pixel Pix changes as shown in curve LC64 when the same control is applied, as shown in curve LC54.

[0126] In curves LC62 and LC64, despite the application of overdrive, the moment when 100% brightness is reached still occurs during the TMY period after the fourth period P4X, not during the fourth period P4X. Thus, without correctly reflecting the temperature drop of the liquid crystal molecules (LM) in the overdrive application conditions, the response of the pixel (Pix) is sometimes too slow even when overdrive is applied.

[0127] Furthermore, even when overdrive is applied but the pixel Pix response is too slow, the impact on brightness depends on the brightness of the pixel Pix before the update. Specifically, when, for example, the brightness of a pixel Pix before the pixel signal update is lower than brightness LU2 (like brightness LU1), the brightness of the pixel Pix generated in the fourth period P4X becomes lower than the originally intended brightness. On the other hand, when, for example, the brightness of a pixel Pix before the pixel signal update is higher than brightness LU2 (like brightness LU3), the brightness of the pixel Pix generated in the fourth period P4X becomes higher than the originally intended brightness. This deviation in brightness reproduction, dependent on the relative brightness of the pixel Pix before and after the update, results in a brightness distribution deviation where the brightness is lower than intended in one part of the displayed output image and higher than intended in another part. It should be noted that this brightness distribution deviation is more pronounced if overdrive is not applied.

[0128] Thus, even with overdrive applied, the difficulty of achieving ideal brightness reproduction is by no means low if we take into account the changes in pixel response caused by external factors such as the temperature of the liquid crystal molecules (LM).

[0129] In addition, due to Figure 10 The overdrive is applied to reflect the difference in relative brightness between the image before and after the update, so a structure is needed to maintain information representing the brightness of pixel Pix before the update pixel signal.

[0130] Figure 13 This is a block diagram illustrating a simplified configuration used in a comparative example applying overdrive that reflects the difference in brightness between the images before and after the update. (See reference...) Figure 11 as well as Figure 12 As explained, if you want to apply overdrive that reflects the difference in relative brightness before and after the update, you need information about the brightness of the pixel Pix before the update. This information about the brightness of the pixel Pix before the update is relative to the frame period preceding the FT of the updated pixel signal (…). Figure 9 The image data corresponding to the image displayed in the frame (FTb) during the frame period. Therefore, as Figure 13 As shown in "Comparative Example 1" and "Comparative Example 2", a single-frame memory 1152 is provided within the driver IC 1151. It should be noted that when using... Figure 13 In the case of the configuration shown in "Comparative Example 1" and "Comparative Example 2", driver IC 1151 is provided instead of driver IC 115 of display panel 110.

[0131] In Comparative Examples 1 and 2, the lookup table for applying overdrive is stored in the grayscale conversion LUT 1153, and the overdriven pixel signal OPX is output by the grayscale conversion LUT 1153. The grayscale conversion LUT 1153 outputs the pixel signal OPX corresponding to the input pixel data PixD and the stored lookup table. It should be noted that the row number NL indicates which pixel row contains the pixel Pix that the input pixel data PixD corresponds to.

[0132] In Comparative Example 1, the input path of pixel data PixD is branched and stored in the single-frame memory 1152. The single-frame memory 1152 outputs past pixel data LBD1, representing the pixel signal at the time point of frame period FTb, to the grayscale conversion LUT 1153 during the next frame period FTb after the frame period storing pixel data PixD. The grayscale conversion LUT 1153 specifies the relative brightness of pixel Pix before and after the update by referring to the past pixel data LBD1 and the latest pixel data PixD. Therefore, in Comparative Example 1, the past pixel data LBD1 is a signal containing information representing the brightness of pixel Pix before the update of the pixel signal, and it constitutes the previous frame period FTb before the frame period FTb in which pixel signal OPX is provided to pixel Pix (…). Figure 8 The signal of the image data corresponding to the image displayed in the frame period FTb).

[0133] In Comparative Example 2, the output path of the pixel signal OPX is branched and stored in the single-frame memory 1152. The single-frame memory 1152 outputs the past pixel signal LBD2, representing the pixel signal at the time point of frame period FTb, to the grayscale conversion LUT 1153 during the next frame period FTb after the frame period (frame period FTb) of the output pixel signal OPX. The grayscale conversion LUT 1153 specifies the relative brightness of the pixel Pix before and after the update by referring to the past pixel signal LBD2 and the latest pixel data PixD. Therefore, in Comparative Example 2, the past pixel signal LBD2 is a signal containing information representing the brightness of the pixel Pix before the update of the pixel signal, and it constitutes the previous frame period (frame period FTb) before the frame period FTb in which the pixel signal OPX is provided to the pixel Pix. Figure 8 The signal of the image data corresponding to the image displayed in the frame period FTb).

[0134] Regardless of which configuration of "Comparative Example 1" or "Comparative Example 2" described above is used, the single-screen frame memory 1152 needs to have a storage capacity corresponding to the data capacity of one image data displayed during one frame.

[0135] In contrast, in the implementation method, such as Figure 8As shown, the first period P1 is included in the FT during the frame period, therefore no reference is needed. Figure 13 The single-frame memory 1152 is described. This is because, during the first period P1, all pixels Pix are reset by a predetermined pixel signal. This means that the pixel signal before the update required to determine the updated pixel signal provided to pixel Pix in the second period P2 following the first period P1 is unified by the predetermined pixel signal. Here, the predetermined pixel signal does not depend on the frame period FT preceding the frame period in which the updated pixel signal is provided to pixel Pix ( Figure 8 The image is displayed during the frame period (FTb) in the image. Therefore, in this implementation, a single-frame frame memory 1152 is not required.

[0136] Next, refer to Figure 14 An example of a predetermined pixel signal provided to all pixels Pix during the first period P1 in the embodiment will be described.

[0137] Figure 14 This is a table showing the response time of a pixel Pix, determined by the relationship between the grayscale values ​​shown by the pixel signal before the update and the grayscale values ​​shown by the pixel signal after the update. Figure 14 In this context, "Starting Grayscale" refers to the grayscale value of the pixel signal before the update. "Reaching Grayscale" refers to the grayscale value of the pixel signal after the update. The brightness of a pixel (Pix) corresponds to the grayscale value of its pixel signal. Therefore, the relationship between "Starting Grayscale" and "Reaching Grayscale" is equivalent to the brightness relationship of the pixel (Pix) before and after the update. It should be noted that, in reference... Figures 14 to 21 In the description, it is assumed that the pixel signal is an 8-bit signal and the gray value is any value in the range of 0 to 255. However, this is just an example and does not limit the number of bits of the pixel signal in the implementation to this.

[0138] exist Figure 14 In the table, the value at the intersection of "Starting Gray Level" and "Reaching Gray Level" represents the response time of the pixel Pix, determined by the relationship between the gray level values ​​shown by the pixel signal before the update and the gray level values ​​shown by the updated pixel signal. For example, when "Starting Gray Level" is "0" and "Reaching Gray Level" is "255", the value at the intersection of "Starting Gray Level" and "Reaching Gray Level" is 3.2. This means that the response time of the pixel Pix is ​​3.2 milliseconds (ms) when the gray level value shown by the pixel signal before the update is "0" and the gray level value shown by the updated pixel signal is "255". The values ​​at other intersections of "Starting Gray Level" and "Reaching Gray Level" can be interpreted similarly.

[0139] In this implementation, for example, a pixel signal representing a grayscale value of "255" is used as the specified pixel signal provided to all pixels Pix during the first period P1. Therefore, at the second period P2, the state is such that a pixel signal representing a grayscale value of "255" has been provided to all pixels Pix. Therefore, the pixel signal before the update, relative to the updated pixel signal provided in the second period P2, is a pixel signal representing a grayscale value of "255". Therefore, in this example, it is only necessary to consider... Figure 14 The response time of the pixel Pix represented within the attention area TAR with a "starting grayscale" of "255" is sufficient. It should be noted that in an 8-bit pixel signal, a grayscale value of 255 is synonymous with the pixel Pix supplied with that pixel signal being driven at maximum brightness. Therefore, using a pixel signal with a grayscale value of "255" as the specified pixel signal is equivalent to driving the pixel Pix at maximum brightness before updating the pixel signal.

[0140] Figure 15 This is a graph showing an example of the grayscale values ​​of the updated pixel signal when overdriving is applied, in the case where the pixel Pix is ​​driven at its highest brightness before the pixel signal is updated. Figure 15 And the following Figure 16 , Figure 20 , Figure 21 , Figure 23 as well as Figure 26 The "target grayscale" in the text refers to the grayscale value that should be reflected in pixel Pix in the fourth period P4. That is, the "target grayscale" is... Figures 10 to 12 The "100%" in "relative brightness" corresponds to this. Figure 11 as well as Figure 12 The brightness LU2 in the text is equivalent to the "target grayscale". In addition, "written grayscale" refers to the grayscale value actually provided to pixel Pix by the pixel signal through the overdrive used to make pixel Pix the "target grayscale" in the fourth period P4. Figure 11 as well as Figure 12 The brightness LU21 and brightness LU22 in the text are equivalent to "writing grayscale".

[0141] For reference Figure 14 As illustrated by the example, in the implementation, for example, a pixel signal representing a grayscale value of "255" is used as the specified pixel signal. Figure 15 as well as Figure 16 The specified grayscale value BE1 is marked for the purpose of indicating the grayscale value of "255" as the specified pixel signal.

[0142] First, if the pixel response is sufficient to keep up even without overdriving, the "target grayscale" and "write grayscale" can be the same. Therefore, in this case, the relationship between "target grayscale" and "write grayscale" is as follows: Figure 15 The curve shown is LC71.

[0143] On the other hand, in overdrive when a pixel signal representing a grayscale value of "255" is used as the specified pixel signal, pixel Pix is ​​driven in a manner that makes it the brightest during the first period P1. Therefore, the pixel signal supplied in the second period P2 becomes a pixel signal that drives pixel Pix to present a brightness lower than before the update. Therefore, as Figure 11 The relationship between luminance LU2 and luminance LU22 is such that the overdrive is applied in a way that makes "write grayscale" the "target grayscale". Specifically, for example, as... Figure 15 The curve LC75 shown indicates that, apart from the grayscale values ​​of "0" and "255", the updated pixel signal is determined by making the "written grayscale" lower than the "target grayscale".

[0144] Here, as shown in the reference Figure 8 As explained, during scanning, the timing of supplying pixel signals to pixel Pix and the second response time T2 are different for each pixel row. Therefore, by applying an overdrive corresponding to the second response time T2 of each pixel row, pixel Pix brightness control can be performed with higher precision compared to applying the same overdrive to all pixel rows. Therefore, in the implementation, a mechanism is provided to ensure that the relationship between "target grayscale" and "written grayscale" is separate for each pixel row. (Refer to...) Figures 16 to 19 Explain this mechanism.

[0145] Figure 16 This is a chart showing the relationship between "target grayscale" and "write grayscale" and the five lookup tables used as the application benchmark for overdrive. Hereinafter, when referred to as "LUT for pixel signal supplied to pixel Pix", it refers to the LUT referenced when overdrive is applied to the pixel signal supplied to pixel Pix in the second period P2 in order to derive "write grayscale" from "target grayscale".

[0146] exist Figure 16The diagram shows curves LC71, LC72, LC73, LC74, and LC75. Curve LC71 shows the relationship between "target grayscale" and "write grayscale" established using a LUT for the pixel signal supplied to the pixel Pix in the pixel row of shared scan line G1. Curve LC72 shows the relationship between "target grayscale" and "write grayscale" established using a LUT for the pixel signal supplied to the pixel Pix in the pixel row of shared scan line GB. Curve LC73 shows the relationship between "target grayscale" and "write grayscale" established using a LUT for the pixel signal supplied to the pixel Pix in the pixel row of shared scan line GC. Curve LC74 shows the relationship between "target grayscale" and "write grayscale" established using a LUT for the pixel signal supplied to the pixel Pix in the pixel row of shared scan line GD. The curve LC75 represents the relationship between the "target grayscale" and the "written grayscale" established by the LUT of the pixel signal supplied to the pixel signal of the pixel signal contained in the pixel row of the shared scan line GE.

[0147] Thus, in the implementation method, for the reference Figure 8 The second row of pixels with a shorter response time T2 is described as having a greater overdrive, where the "write grayscale" is lower than the "target grayscale". Figure 16 In the example shown, for a total of five scan lines GL (G1, GB, GC, GD, GE), the "written grayscale" can be derived from the "target grayscale" by referring to the directly corresponding LUT.

[0148] Here, the difference between the grayscale value "255" of the specified pixel signal and the grayscale value of the "target grayscale" is defined as the first difference. Furthermore, the difference between the grayscale value "255" of the specified pixel signal and the grayscale value of the "written grayscale" is defined as the second difference. Based on this, the relationship between the first and second differences is examined for each of the curves LC71, LU72, LU73, LU74, and LU75. However, this excludes the portions where the "target grayscale" is "0" or "255".

[0149] First, in curve LC71, which is essentially undriven, the first difference and the second difference are equal. Conversely, in curves LC72, LU73, LU74, and LU75, which are driven, the second difference is greater than the first difference. Here, the grayscale value of the "target grayscale" is the pixel data PixD (refer to...). Figure 18 , Figure 19The grayscale values ​​of pixel data contained in the image data are like those in the image data. Therefore, overdrive can be described as a process that takes the difference between the grayscale value shown in the pixel data contained in the image data and the grayscale value specified based on the reset signal as a reference, and regards grayscale values ​​whose difference from the specified grayscale value is greater than the reference as "written grayscale" and generates a pixel signal corresponding to the "written grayscale".

[0150] Furthermore, in curve LC75, the magnitude of the second difference based on the first difference is larger than that in curves LC72, LU73, and LU74. Similarly, in curve LC74, the magnitude of the second difference based on the first difference is larger than that in curves LC72 and LU73. Furthermore, in curve LC73, the magnitude of the second difference based on the first difference is larger than that in curve LC72. This relative relationship in the magnitude of the second difference corresponds to the delay in the timing of supplying the gate signal to the scan lines GL of curves LC72, LU73, LU74, and LU75, respectively, during the second period P2. The scan line GL corresponding to curve LC75 is scan line GE. The scan line GL corresponding to curve LC74 is scan line GD. The scan line GL corresponding to curve LC73 is scan line GC. The scan line GL corresponding to curve LC72 is scan line GB. The scan line GL corresponding to curve LC71 is scan line G1. The timing of supplying the gate signal to scan line GE during the second period P2 is later than that to scan lines GD, GC, GB, and G1. The gate signal supply timing for scan line GD in the second period P2 is later than that for scan lines GC, GB, and G1. The gate signal supply timing for scan line GC in the second period P2 is later than that for scan lines GB and G1. The gate signal supply timing for scan line GB in the second period P2 is later than that for scan line G1. Thus, the pixel signal supplied to a pixel Pix connected to a scan line GL whose gate signal supply timing is later during scanning, the larger the second difference is, namely, "the difference between the grayscale value of the pixel signal generated by overdrive and the grayscale value specified based on the reset signal".

[0151] In addition, graphs LC72, LU73, LU74, and LU75 show the relationship between the grayscale value shown in the pixel data (target grayscale) and the grayscale value of the pixel signal when overdrive is applied (written grayscale).

[0152] It should be noted that the pixel signal is supplied to the pixel Pix contained in the pixel row of the scan line GL that shares a LUT that is not prepared to be directly corresponding. The interpolation process refers to the process of deriving the "write grayscale" from the "target grayscale" and generating the pixel signal by referring to the LUTs directly corresponding to the two scan lines GL that are configured to be closer to the scan lines GL that are not prepared to be directly corresponding to the LUTs.

[0153] The following is for reference Figures 17 to 19 The driver IC115, which has a mechanism for performing interpolation processing and generating overdriven pixel signals based on the input image data, will be described.

[0154] Figure 17 This is a block diagram illustrating the inputs and outputs of driver IC115 and the main functions included in driver IC115. (See diagram below.) Figure 17 As shown, the driver IC 115 includes: an I / F circuit 115a, a line counter 115b, a grayscale correction circuit 115c, a DAC 115d, and a timing controller 115e. I / F stands for Interface. DAC stands for Digital-to-Analog Converter.

[0155] In response to the input of image data DP3, I / F circuit 115a generates pixel data PixD, a row count signal, and an action control signal for the timing controller. Pixel data PixD is the pixel data contained in image data DP3. The image data contains multiple pixel data corresponding to a matrix arrangement. By assigning pixel signals corresponding to each of the multiple pixel data to different pixel Pix, the display output of display panel 110 is established. The grayscale value shown by pixel data PixD represents the grayscale value as the "target grayscale". The row count signal is used to specify the pixel row of the pixel Pix that is the object of pixel data PixD. The row count signal is output whenever the pixel row of the pixel Pix that is the object of pixel data PixD changes. The action control signal for the timing controller is a signal used by timing controller 115e to synchronously control signal line connection circuit 113 and scan line drive circuit 114.

[0156] The line counter 115b counts the line count signal and outputs the line number NL. The line number NL indicates the scan line GL to which the pixel Pix of the assigned pixel data PixD is connected. That is, the line number NL specifies which scan line GL the pixel row containing the pixel Pix belongs to.

[0157] For example, when the row counter 115b receives only one row count signal, the row number NL is 1. A row number NL value of 1 means that the scan line GL connected to the pixel Pix of the assigned pixel data PixD is... Figure 7 as well as Figure 8 The scan line G1 is shown. Here, it is assumed that the number of scan lines GL is as follows: Figure 7 As shown, at the time point when Nv is provided to the line counter 115b, the line number NL is Nv, and the scan line GL connected to the pixel Pix of the assigned pixel data PixD is specified as Nv. Figure 7as well as Figure 8 The scan line GE is shown. Based on the same idea, at the time point when a (1 / 4) × Nv line count signal is provided to the line counter 115b, the value of the line number NL is (1 / 4) × Nv, and the scan line GL connected to the pixel Pix of the assigned pixel data PixD is specified as... Figure 7 as well as Figure 8 The scan line GB is shown. Furthermore, at the time point when a (1 / 2) × Nv line count signal is provided to the line counter 115b, the line number NL is (1 / 2) × Nv, and the scan line GL connected to the pixel Pix of the assigned pixel data PixD is specified as... Figure 7 as well as Figure 8 The scan line GC is shown. Furthermore, at the time point when a (3 / 4) × Nv line count signal is provided to the line counter 115b, the line number NL is (3 / 4) × Nv, and the scan line GL connected to the pixel Pix of the assigned pixel data PixD is specified as... Figure 7 as well as Figure 8 The scan line GD is shown.

[0158] It should be noted that the situation where a line count signal is further provided to the line counter 115b after the line number NL becomes Nv is when one frame period is completed and the next frame period begins. In this case, the line number NL is reset to its initial value STA. Figure 7 The initial value STA shown represents the value of 1.

[0159] The grayscale correction circuit 115c generates the pixel signal Ot based on the pixel data PixD and the row number NL. (See reference...) Figure 18 as well as Figure 19 A more detailed description of the grayscale correction circuit 115c is provided.

[0160] Figure 18 This is a block diagram showing the main functional configuration of the grayscale correction circuit 115c. Figure 19 It is shown Figure 18 The diagram shows the processing performed by each component of the grayscale correction circuit 115c. The grayscale correction circuit 115c includes a first arithmetic unit 115p, a LUT reference unit 115q, and a second arithmetic unit 115r.

[0161] The first arithmetic unit 115p calculates lutl using the following formula (1). As mentioned above, Nv in formula (1) is the number of scan lines GL. It should be noted that the minimum value of lutl calculated by formula (1) is lutl=1 when NL=1. Furthermore, the maximum value of lutl calculated by formula (1) is lutl=1+�4×(Nv-1) / Nv= when NL=Nv, which is 4 or more and less than 5.

[0162] lutl=1+{4×(NL-1) / Nv}…(1)

[0163] Furthermore, the first arithmetic unit 115p calculates i as shown in the following equation (2). In equation (2), floor() indicates the operation of discarding the value below the decimal point within the parentheses. As mentioned above, the lutl that can be calculated from equation (1) is greater than or equal to 1 and less than 5, therefore the value of i calculated from equation (2) is any one of 1, 2, 3, or 4.

[0164] i = floor(lutl) …(2)

[0165] Furthermore, the first arithmetic unit 115p calculates di as follows (3). di is a value greater than 0 and less than 1. When lutl is a natural number, lutl=i holds, and di=0. When lutl is not a natural number, di is a value greater than 0 and less than 1.

[0166] di=lutl-i …(3)

[0167] The first arithmetic unit 115p outputs information representing the value of i calculated via equation (1) and equation (2) and information representing the value (i+1) obtained by adding 1 to i to the LUT reference unit 115q. In addition, the first arithmetic unit 115p outputs information representing the value of di calculated via equation (1), equation (2) and equation (3) to the second arithmetic unit 115r.

[0168] The LUT reference section 115q maintains multiple lookup tables. Figure 19 The LUT reference unit 115q shown holds five lookup tables: LUT1, LUT2, LUT3, LUT4, and LUT5. Lookup table LUT1 is shown, for example, as shown in the reference... Figure 16 The curve LC71 illustrates the relationship between the "target grayscale" and the "written grayscale" using a lookup table (LUT). Specifically, lookup table LUT1 is the LUT for the pixel signals supplied to the pixel Pix contained in the pixel row of the shared scan line G1. Lookup table LUT2 is, for example, shown in reference... Figure 16 The curve LC72 illustrates the relationship between the "target grayscale" and the "written grayscale" using a lookup table (LUT). Specifically, lookup table LUT2 is a LUT for the pixel signals supplied to the pixel Pix contained in the pixel rows of the shared scan line GB. Lookup table LUT3 is, for example, shown in reference... Figure 16 The curve LC73 illustrates the relationship between the "target grayscale" and the "written grayscale" using a LUT. Specifically, lookup table LUT3 is a LUT for the pixel signals supplied to the pixel Pix contained in the pixel rows of the shared scan line GC. Lookup table LUT4 is, for example, shown as shown in reference... Figure 16 The curve LC74 illustrates the relationship between the "target grayscale" and the "written grayscale" using a lookup table (LUT). Specifically, lookup table LUT4 is a LUT for the pixel signals supplied to the pixel Pix contained in the pixel row of the shared scan line GD. Lookup table LUT5 is shown, for example, as shown in reference... Figure 16 The curve LC75 illustrates the relationship between the "target grayscale" and the "written grayscale" using a LUT. Specifically, lookup table LUT5 is a LUT for the pixel signals supplied to the pixel Pix contained in the pixel row of the shared scan line GE.

[0169] The LUT reference unit 115q refers to the lookup table (LUTi) corresponding to the value of i and the lookup table (LUTi+1) corresponding to the value of (i+1) held in the multiple lookup tables. For example, when i=1, the lookup table corresponding to the value of i is lookup table LUT1. Furthermore, in this case, the lookup table corresponding to the value of (i+1) is lookup table LUT2.

[0170] The LUT reference unit 115q specifies the "write grayscale" when the grayscale value shown by pixel data PixD is set to the "target grayscale" in the lookup table (LUTi) corresponding to the value of i, and sets the specified "write grayscale" value as the first candidate Ot1. Furthermore, the LUT reference unit 115q specifies the "write grayscale" when the grayscale value shown by pixel data PixD is set to the "target grayscale" in the lookup table (LUTi+1) corresponding to the value of (i+1), and sets the specified "write grayscale" value as the second candidate Ot2. The LUT reference unit 115q outputs the information representing the first candidate Ot1 and the information representing the second candidate Ot2 to the second calculation unit 115r.

[0171] The second arithmetic unit 115r calculates the pixel signal Ot based on the following equation (4). The pixel signal Ot is the value of the overdriven "write grayscale" of the pixel Pix in the configuration of the pixel row of the scan line GL containing the provided pixel data PixD, which is included in the configuration of the pixel row of the shared row number NL.

[0172] Ot={Ot1×(1-di)}+Ot2×di…(4)

[0173] It should be noted that when di is 0, the component of “Ot2×di” on the right side of equation (4) is 0, and it is calculated only by the component of “Ot1×(1-di)”. Therefore, in this case, no interpolation is actually performed, and the value of the pixel signal Ot is reflected in the lookup table (LUTi) corresponding to the value of i when the gray value shown by the pixel data PixD is set to the “target gray value” and the “written gray value” is written.

[0174] On the other hand, when di is not 0, the value of the pixel signal Ot reflects the components of "Ot2×di" and "Ot1×(1-di)". That is, in this case, the value of the pixel signal Ot is derived by interpolation based on both the "written grayscale" derived from the lookup table (LUTi) corresponding to the value of i and the "written grayscale" derived from the lookup table (LUTi+1) corresponding to the value of (i+1).

[0175] like Figure 17 As shown, the grayscale correction circuit 115c outputs the generated pixel signal Ot to the DAC 115d. The DAC 115d generates an analog electrical signal corresponding to the value shown by the pixel signal Ot and outputs it to the signal line connection circuit 113. The signal corresponding to this analog electrical signal provided from the signal line connection circuit 113 to the signal line SL functions as the pixel signal output in the second period P2. This pixel signal reflects the value of the overdriven "written grayscale".

[0176] The timing controller 115e, in response to the timing controller operation control signal provided from the I / F circuit 115a, controls the operation of the signal line connection circuit 113 and the scan line drive circuit 114 to synchronize the timing of the pixel signal corresponding to pixel data PixD being supplied to signal line SL and the timing of the gate signal being supplied to scan line GL of row number NL corresponding to pixel data PixD. Thus, pixel Pix can be driven with an overdriven pixel signal.

[0177] For reference Figures 17 to 19 As described, the driver IC115 maintains a lookup table (e.g., lookup tables LUT2, LUT3, LUT4, LUT5, etc.) that shows the relationship between the grayscale value (target grayscale) of the pixel data and the grayscale value (write grayscale) of the pixel signal when overdrive is applied, and generates a pixel signal supplied to the overdrive pixel by referring to the lookup table. Furthermore, the driver IC115 maintains multiple lookup tables (e.g., lookup tables LUT2, LUT3, LUT4, LUT5, etc.), each corresponding to multiple scan lines (e.g., scan lines GB, GC, GD, GE) where the gate signal is supplied at different times during scanning.

[0178] The above is for reference only. Figures 16 to 19 In the explanation, Figure 16 The curves shown are LC71, LC72, LC73, LC74, and LC75. Figure 19The lookup tables LUT1, LUT2, LUT3, LUT4, and LUT5 shown correspond to each other. That is, the lookup tables LUT1, LUT2, LUT3, LUT4, and LUT5 in this description assume that pixel signals representing a grayscale value of "255" are used as the specified pixel signals. On the other hand, the specified pixel signals that can be used in the embodiments are not limited to pixel signals representing a grayscale value of "255".

[0179] Figure 20 This is a graph illustrating an example of the grayscale values ​​of the updated pixel signal when overdriving is applied, after the pixel Pix is ​​driven at its lowest brightness before the pixel signal is updated. That is, Figure 20 This illustrates the case where the pixel signal representing the lowest grayscale value (0) is used as the specified pixel signal. Figure 20 In the example shown, the pixel signal representing the grayscale value of "0" is used as the specified pixel signal. Figure 20 The specified grayscale value BE2 is marked for the purpose of indicating the grayscale value of "0" as a specified pixel signal.

[0180] First, if the pixel response is sufficient to keep up even without overdriving, the "target grayscale" and "write grayscale" can be the same. Therefore, in this case, the relationship between "target grayscale" and "write grayscale" is as follows: Figure 20 The curve shown is LC81.

[0181] On the other hand, in overdrive when a pixel signal representing a grayscale value of "0" is used as the specified pixel signal, pixel Pix is ​​driven in a manner that results in the lowest brightness during the first period P1. Therefore, the pixel signal supplied during the second period P2 becomes a pixel signal that drives pixel Pix to exhibit a brightness higher than before the update. Therefore, as Figure 11 The relationship between brightness LU2 and brightness LU21 is similar to that in the text, so that the "written grayscale" is the "target grayscale" or higher, and the overdrive is applied at this time. Specifically, for example, as... Figure 20 The curve shown in LC85 determines the updated pixel signal by making the "written grayscale" exceed the "target grayscale," except for the grayscale values ​​of "0" and "255." Figure 20 The reset specified grayscale value is set to 0 or a grayscale value close to 0, which ensures that the liquid crystal reaches the lowest transmittance state intended to be achieved with grayscale 0 within the finite response time T2. Since a grayscale value of 0 cannot shorten the response by setting it to a lower grayscale value through overdrive, therefore... Figure 20The example shown is a suitable example of how to more easily achieve higher contrast. Here, the grayscale value of "0" can be considered the grayscale value with the lowest light transmittance in the pixel (e.g., pixel PixR, pixel PixG, pixel PixB) that provides the pixel signal corresponding to that grayscale value. It should be noted that if the lowest light transmittance is set to 0%, and the highest light transmittance is set to 100%, then by setting the grayscale value in that pixel with a light transmittance lower than 10% as the specified grayscale value, it is easier to ensure the pixel's response. This is because the pixel's response time has a logarithmic trend with respect to changes in transmittance. Typically, the contrast ratio of an LCD is around 1000:1, and the light transmittance in the pixel with the lowest transmittance is around 0.1%. Here, the time required for the light transmittance to transition between 0.1% and 1%, between 1% and 10%, and between 10% and 100% are approximately the same. However, from the perspective of ensuring the LCD's contrast ratio, the time spent transitioning to 0.1% is more important. Therefore, it can be said that by setting a grayscale value with a light transmittance of less than 10% in the pixel to a specified grayscale value, it is easier to ensure the pixel's response.

[0182] Figure 21 This is a graph illustrating an example of the grayscale value of the updated pixel signal when overdriving is applied, where the pixel Pix is ​​driven at an intermediate grayscale between the lowest and highest brightness levels before the pixel signal is updated. Figure 21 This illustrates, for example, the case where a pixel signal is used as the specified pixel signal, where the value of "127" in an 8-bit signal representing a maximum value of 255 is used. Figure 21 The specified grayscale value BE3 is marked for the purpose of indicating the grayscale value of the specified pixel signal.

[0183] First, if the pixel response is sufficient to keep up even without overdriving, the "target grayscale" and "write grayscale" can be the same. Therefore, in this case, the relationship between "target grayscale" and "write grayscale" is as follows: Figure 21 The curve shown is LC91.

[0184] On the other hand, in overdrive when a pixel signal representing a grayscale value of "127" is used as the specified pixel signal, pixel Pix is ​​driven in a manner that corresponds to the brightness of the intermediate grayscale during the first period P1. Therefore, the relationship between the "target grayscale" and the "written grayscale" changes depending on whether the pixel data PixD is a grayscale value greater than or less than "127". If the pixel data PixD is a grayscale value greater than "127", the pixel signal supplied in the second period P2 based on that pixel data PixD becomes a pixel signal that drives pixel Pix to present a brightness greater than before the update. If the pixel data PixD is a grayscale value less than "127", the pixel signal supplied in the second period P2 based on that pixel data PixD becomes a pixel signal that drives pixel Pix to present a brightness less than before the update. It should be noted that when the pixel data PixD is a grayscale value of "127", overdrive is not required. Therefore, when the pixel data PixD has a grayscale value of "127", the pixel signal becomes the pixel signal corresponding to the grayscale value of "127". Thus, applying this overdrive makes it possible to achieve the following in the range where the "target grayscale" is below "127": Figure 11 The relationship between brightness LU2 and brightness LU22 is such that "writing grayscale" is below the "target grayscale" and within the range where the "target grayscale" is above "127". Figure 11 The relationship between luminance LU2 and luminance LU21 is such that "writing grayscale" is above the "target grayscale". Specifically, for example, like... Figure 21 The curve LC95 shown determines the updated pixel signal in this way.

[0185] exist Figure 20 as well as Figure 21 The diagram only shows one graph corresponding to an overdriven application, but even when using a reference... Figure 20 , Figure 21 In the case of specified pixel signals, as described above, it can also be referred to Figures 16 to 19 The explanation is based on the fact that the timing of supplying pixel signals to pixel Pix during scanning and that the second response time T2 is different for each pixel row, thus applying overdrive corresponding to the second response time T2 for each pixel row. That is, referring to Figure 19 The lookup tables LUT1, LUT2, LUT3, LUT4, and LUT5 described herein only need to correspond to the specified pixel signals. See below for reference. Figures 22 to 27 Explanation as follows Figure 20 A more detailed example of this case where a pixel signal representing a grayscale value of "0" is used as the specified pixel signal.

[0186] Figure 22This is a diagram illustrating an example of the contents of lookup tables LUT1, LUT2, LUT3, LUT4, and LUT5 when a pixel signal representing a grayscale value of "0" is used as the specified pixel signal. Figure 22 as well as Figure 27 The “L in” in the text corresponds to the “target grayscale”. Figure 22 as well as Figure 27 The "L out" in the lookup table corresponds to the "write grayscale" of each of the LUT1, LUT2, LUT3, LUT4, and LUT5 lookup tables.

[0187] Figure 23 It is shown Figure 22 The diagram shows the lookup tables LUT1, LUT2, LUT3, LUT4, and LUT5. Figure 22 The lookup table LUT1 shown is plotted as a curve. Figure 23 The curve LC101 shown is... Figure 22 The LUT2 lookup table shown is plotted as a curve. Figure 23 The curve LC102 shown is... Figure 22 The LUT3 lookup table shown is plotted as a curve. Figure 23 The curve LC103 shown is... Figure 22 The LUT4 lookup table shown is plotted as a curve. Figure 23 The curve LC104 shown is... Figure 22 The LUT5 lookup table shown is plotted as a curve. Figure 23 The curve shown is LC105.

[0188] exist Figure 22 as well as Figure 23 In the example shown, compared with the reference Figure 16 The examples given differ; the number of bits used for "writing grayscale" is expanded compared to the number of bits used for "target grayscale." Specifically, in... Figure 22 as well as Figure 23 In the example shown, the "write grayscale" bit depth is 10 bits, taking any value from 0 to 1023. It should be noted that... Figure 22 as well as Figure 23 The number of bits for the "target grayscale" in the example shown is the same as the reference. Figure 16 The example given is also 8 bits. That is, in Figure 22 as well as Figure 23 In the example shown, bit extension is performed when applying an overdrive that derives the "write grayscale" from the "target grayscale". Hereinafter, when referred to as bit extension, it means that the number of bits in the "write grayscale" is extended compared to the number of bits in the "target grayscale".

[0189] Figure 24This is a graph showing "L out" in the range of 245 and above without bit extension. (See diagram.) Figure 24 As shown, without bit extension, overdrive applications can sometimes cause the apparent differences in grayscale values ​​to disappear. For example, in... Figure 24 In the example shown, in lookup table LUT5, "Lout" values ​​in the range of 245 to 247 for "Lin" are uniformly set to "253". Furthermore, in lookup table LUT5, "Lout" values ​​in the range of 248 to 251 for "Lin" are uniformly set to "254". Additionally, in lookup table LUT5, "Lout" values ​​in the range of 252 to 255 for "Lin" are uniformly set to "255". This is in the case of reference... Figure 12 In cases of response latency, as described, a uniform "L out" value can sometimes lead to loss of grayscale in the displayed output image. Figure 24 In the example shown, even though the uniformity of "L out" still occurs in lookup tables LUT2, LUT3, and LUT4, which are not as obvious as lookup table LUT5, "L out" still occurs.

[0190] Figure 25 This is a graph showing "L out" in the range of 245 and above when "L in" is extended. (See diagram below.) Figure 22 , Figure 23 as well as Figure 25 As shown, by performing bit expansion, the uniformity of "L out" across lookup tables can be suppressed. That is, by performing bit expansion, it is easier to suppress occurrences such as those seen in the reference table. Figure 24 The uniformity of the apparent grayscale values ​​described, and the possibility of grayscale loss due to this uniformity.

[0191] It should be noted that, in Figure 22 , Figure 23 as well as Figure 25 In the example shown, the uniformity of "L out" has been suppressed. However, if the uniformity of "L out" still occurs even with bit expansion, the relationship between "L in" and "L out" can be intentionally slightly modified to suppress the uniformity of "L out" instead of applying "write grayscale" which corresponds to "target grayscale" as the ideal overdrive.

[0192] Figure 26 It is a diagram showing the lookup table that reflects the "write grayscale" corresponding to the "target grayscale" as an overdrive ideal and the unified lookup table that prioritizes suppressing "L out". Figure 26The lookup table LUB shown reflects the "write grayscale" corresponding to the "target grayscale" as an overdrive ideal. Furthermore, the lookup table LUA represents a unified lookup table that prioritizes suppressing "L out".

[0193] Figure 27 It is shown Figure 26 The graph shown illustrates the relationship between "L in" and "L out" in lookup tables LUA and LUB, where "L in" is in the range of 240 or higher for "L out". Figure 27 As shown, in the lookup table LUB, "L out" values ​​within the range of 240 or 241 for "L in" are uniformly set to "1020". Furthermore, in the lookup table LUB, "L out" values ​​within the range of 242 to 245 for "L in" are uniformly set to "1021". Additionally, in the lookup table LUB, "L out" values ​​within the range of 246 to 254 for "L in" are uniformly set to "1022". Alternatively, instead of such a lookup table LUB, a lookup table like lookup table LUA could be used that intentionally ensures that the values ​​of "L out" are not repeated. This would more reliably suppress the occurrence of values ​​like those in the reference table. Figure 24 The uniformity of the apparent grayscale values ​​described, and the possibility of grayscale loss due to this uniformity.

[0194] Reference Figure 22 , Figure 23 , Figure 25 , Figure 26 , Figure 27 In the LUT described, the number of bits for the grayscale value (Lout) of the pixel signal is greater than the number of bits for the grayscale value (Lin) shown in the pixel data. Furthermore, refer to... Figure 22 , Figure 23 , Figure 27 The grayscale value (L out) of the pixel signal in the LUT described is different when the grayscale value (L in) shown in the pixel data is different.

[0195] As explained above, according to the embodiment, the system includes: a pixel (including pixel PixR, pixel PixG, and pixel PixB), a scan line (scan line GL) connected to a plurality of pixels arranged along a first direction (X direction), a signal line (signal line SL) connected to a plurality of pixels arranged along a second direction (Y direction) intersecting the first direction, a first circuit (scan line drive circuit 114) supplying gate signals to the plurality of scan lines, a second circuit (signal line connection circuit 113) supplying pixel signals to the plurality of signal lines, and a third circuit (driver IC 115) generating pixel signals corresponding to image data. Pixels are supplied with pixel signals according to the driving timing of switching elements (switching elements TrD1, TrD2, TrD3), and are reset by a reset signal corresponding to a predetermined grayscale value before being supplied with pixel signals. The switching elements (switching elements TrD1, TrD2, TrD3) are driven in response to the gate signals. The first circuit performs scans such that the timing of supplying the gate signals when supplying pixel signals to pixels differs between the plurality of scan lines. The third circuit applies overdrive to some or all of the pixels. Overdrive is a process that generates a pixel signal whose grayscale value is greater than the specified grayscale value, based on the difference between the grayscale value shown in the pixel data contained in the image data and the specified grayscale value. The pixel signal supplied to a pixel connected to a scan line where the gate signal is supplied later in the scan will have a larger difference between the grayscale value of the pixel signal generated by overdrive and the specified grayscale value.

[0196] Therefore, it is not necessary to refer to. Figure 13 The configuration of the single-frame memory 1152 described herein enables overdrive to be implemented at a lower cost. Furthermore, by resetting the pixel signal before supplying pixel signals to each pixel for display output corresponding to image data, the "previous pixel information (grayscale value)" required to generate the pixel signal for applying overdrive can be unified to the grayscale value of the reset signal. Therefore, compared to the complex mechanism caused by the "previous pixel information (grayscale value)" varying depending on the previous image, overdrive can be applied with a simpler mechanism.

[0197] In addition, the third circuit (driver IC115) maintains a lookup table (e.g., lookup tables LUT2, LUT3, LUT4, LUT5, etc.) showing the relationship between the gray values ​​shown in the pixel data and the gray values ​​of the pixel signal when overdrive is applied, and generates a pixel signal supplied to the overdrive pixel with reference to the lookup table, thereby enabling overdrive to be applied in a simpler mechanism.

[0198] In addition, the third circuit (driver IC115) maintains multiple lookup tables (e.g., lookup tables LUT2, LUT3, LUT4, LUT5, etc.), each of which corresponds to multiple scan lines (e.g., scan lines GB, GC, GD, GE) with different gate signal supply timings during scanning, thereby enabling high-precision overdrive corresponding to the gate signal supply timing during scanning.

[0199] In addition, as referenced Figure 22 As explained above, the number of bits in the grayscale value of the pixel signal in the lookup table is larger than the number of bits in the grayscale value shown in the pixel data, which makes it easier to suppress grayscale loss.

[0200] In addition, as referenced Figure 22 as well as Figure 27 As explained, the grayscale values ​​of the pixel signals in the lookup table differ depending on the grayscale values ​​shown in the pixel data, thereby more reliably suppressing grayscale loss.

[0201] Furthermore, in HMDs used for displaying VR images, as in the implementation, there is a tendency to demand a faster response from the display area 111. To address this tendency, according to the implementation, by applying overdrive, a high-speed response sufficient to meet the request can be achieved.

[0202] Furthermore, in reference Figure 16 In the reset described above, performed at the highest grayscale (e.g., 255), it is assumed that a reference is generated. Figure 12 The aforementioned response delay results in all pixels uniformly producing an output grayscale value higher than the desired grayscale value. Furthermore, in reference... Figure 20 In the reset described above, performed at the lowest gray level (e.g., 0), it is assumed that a reference is generated. Figure 12 The aforementioned response delay results in all pixels outputting grayscale values ​​lower than desired. Furthermore, in cases like... Figure 21 In this mid-tone reset, a grayscale that is brighter than the reset grayscale is compared with a grayscale that is darker than the reset grayscale. The grayscale difference caused by overdrive is in the opposite direction (brighter than the reset grayscale and darker than the reset grayscale). Therefore, even if there is a delay or advancement in response, the brightness difference caused by overdrive in different directions will not be mixed together, thereby suppressing the brightness deviation. Figure 28 This is a graph showing examples of responses when reset via midtones. Mode 1 shows an example where the response catches up with the fourth period P4. Mode 2 shows an example where the response does not catch up with the fourth period P4. As shown in Mode 2, even if there is a delay or advancement in the response, the brightness difference caused by overdrive in different directions will not be mixed together.

[0203] It should be noted that the number of lookup tables referenced by the overdrive is not limited to... Figure 19 The five LUTs shown are used, and two or more are sufficient. The value of “4” in equation (1) is obtained by subtracting 1 from the value (5) representing the number of five LUTs in the lookup table LUT1, LUT2, LUT3, LUT4, and LUT5. Therefore, if we assume that the number of LUTs used is n, we can replace “4” in equation (1) with (n-1).

[0204] Furthermore, two or more of the first, second, and third circuits can be packaged into a single circuit. For example, a circuit integrating the functions of two or more of the aforementioned signal line connection circuit 113, scan line drive circuit 114, and driver IC 115 can be used. That is, the first, second, and third circuits do not need to be physically independent of each other.

[0205] Furthermore, while an HMD for VR images is envisioned in this embodiment, the application of the display device according to this disclosure is not limited to this. For example, it could also be a display device that uses a single display panel 110 to display and output a single image.

[0206] Furthermore, the application of overdrive to which pixel row contains the pixels can be appropriately varied depending on factors such as the required response speed and the response characteristics of the display panel. For example, it may be determined that the LUT applies overdrive to all pixels, including scan line G1. Conversely, if the response is sufficient even without applying overdrive to scan lines GB, GC, and nearby scan lines, overdrive may be applied to pixels after scan line GC. In any case, during overdrive, the second difference tends to be larger than the first difference for pixel signals supplied to pixel lines connected to scan lines GL that are later in the scanning gate signal supply timing.

[0207] Furthermore, any other effects resulting from the methods described in this embodiment, as long as they are obvious from the description in this specification or can be reasonably conceived by those skilled in the art, should naturally be understood as being brought about by this disclosure.

[0208] Explanation of reference numerals in the attached figures

[0209] 100 Display device; 110 Display panel; 113 Signal line connection circuit; 114 Scan line drive circuit; 115 Driver IC; G1, G2, G3, GB, GC, GD, GE, GL scan lines; LUT1, LUT2, LUT3, LUT4, LUT5 lookup tables; Pix, PixB, PixG, PixR pixels; SL signal line.

Claims

1. A display device comprising: Pixel; Scan lines are connected to a plurality of said pixels arranged along a first direction; A signal line is connected to a plurality of said pixels arranged along a second direction, which intersects the first direction; The first circuit supplies gate signals to the multiple scan lines; The second circuit supplies pixel signals to the multiple signal lines; as well as The third circuit generates the pixel signal corresponding to the image data. The pixel is supplied with a pixel signal according to the driving timing of the switching element, and is reset by a reset signal corresponding to a predetermined grayscale value before being supplied with the pixel signal. The switching element is driven in response to the gate signal. The first circuit performs a scan in which the timing of supplying the gate signal when supplying the pixel signal to the pixel is different between each of the multiple scan lines. The third circuit applies overdrive to some or all of the pixels. The overdrive process generates a pixel signal corresponding to a gray value whose difference from the gray value shown in the pixel data contained in the image data is greater than the specified gray value, based on the difference between the gray value shown in the image data and the specified gray value. The more the pixel signal is supplied to the pixel connected to the scan line that is later in the scanning process, the greater the difference between the gray value of the pixel signal generated by the overdrive and the predetermined gray value.

2. The display device according to claim 1, wherein, The third circuit maintains a lookup table that shows the relationship between the grayscale value of the pixel data and the grayscale value of the pixel signal when the overdrive is applied. The third circuit refers to the lookup table to generate a pixel signal supplied to the pixel that is overdriven.

3. The display device according to claim 2, wherein, The third circuit maintains multiple lookup tables. Each of the multiple lookup tables corresponds to a multiple scan line in the scan where the gate signal is supplied at different times.

4. The display device according to claim 3, wherein, The number of bits in the grayscale value of the pixel signal in the lookup table is greater than the number of bits in the grayscale value shown in the pixel data.

5. The display device according to claim 4, wherein, The grayscale value of the pixel signal in the lookup table is different when the grayscale value shown in the pixel data is different.

6. The display device according to any one of claims 1 to 5, wherein, The specified grayscale value is a grayscale value in which the light transmittance in the pixel is less than 10%.

Images