High-reliability chip packaging structure

Abstract

The invention discloses a chip packaging structure with high reliability. The chip packaging structure comprises a first main surface and a second main surface, the second main surface is rectangular, and a plurality of solder balls are arranged on the periphery, close to the edge, of the second main surface; the electrical properties of the chip pins connected with all the solder balls distributed in the same corner area on the periphery of the second main surface are the same; wherein the corner area refers to a specified area corresponding to a corner formed by intersection of edges in the rectangular structure of the second main surface.

Description

Technical Field

[0001] This application relates to the field of semiconductor integrated circuit technology, and in particular to high-reliability chip packaging structures. Background Technology

[0002] With the rapid development of semiconductor technology, the integration density of semiconductor integrated circuits is increasing, and the functions they support are also expanding. This increase in functionality introduces a large number of signals into the semiconductor integrated circuit, leading to a continuous increase in the size of the semiconductor integrated circuit package. Furthermore, as the package size increases, controlling the coplanarity of the chip package becomes more difficult. This often results in solder ball adhesion problems in the chip package structure due to warping between the chip and the printed circuit board (PCB) during surface mount technology (SMT), leading to a decrease in chip yield.

[0003] When an object is subjected to external force or heat, the effect is transmitted to the object's interior, generating internal forces that resist the external force; these internal forces are also known as stress. Therefore, chips also experience stress when subjected to external force or heat, with relatively higher stress levels at the four corners of the chip.

[0004] Figure 1A The diagram illustrates the effects of SMT (Surface Mount Technology) heat on chips and PCBs in the prior art.

[0005] For example, such as Figure 1A As shown, the chip package structure is rectangular in shape, comprising a first main surface and a second main surface. The second main surface has multiple solder balls arranged in, for example, an array. When the chip is placed on the PCB and subjected to high temperatures in an SMT oven, the high stress at the four corners of the chip causes deformation in these areas, such as corner collapse. This collapse also causes deformation at the contact points on the PCB with the corners, leading to downward bending of the PCB. This deformation at the corners makes it easy for the solder balls at the four corners of the second main surface of the chip package to stick together. Figure 1B This diagram illustrates solder ball adhesion on a chip; for example... Figure 1C This diagram illustrates another instance of solder ball adhesion on a chip. (For example, in...) Figure 1B neutralization Figure 1C The location indicated by the middle arrow shows solder balls stuck together. Summary of the Invention

[0006] To electrically connect the chip to the PCB board, the connection points or pins on the chip are connected to the solder balls in the chip package structure via traces. Adjacent solder balls in the package structure may correspond to connection points or pins on the chip used to transmit different signals. When adjacent solder balls on the chip become stuck together, it may connect pins transmitting different signals together, affecting the chip's functionality and consequently its reliability.

[0007] According to a first aspect of this application, a first chip package structure according to the first aspect of this application is provided, comprising: the chip package structure including a first main surface and a second main surface, wherein the second main surface is rectangular, and a plurality of solder balls are disposed around the perimeter of the second main surface near its edge; all chip pins connected to the solder balls arranged in the same corner area around the perimeter of the second main surface have the same electrical properties; wherein the corner area refers to the designated area corresponding to the angle formed by the intersection of the sides in the rectangular structure of the second main surface.

[0008] According to the first chip packaging structure of the first aspect of this application, a second chip packaging structure according to the first aspect of this application is provided, wherein the corner region is a rectangular region or a right-angled triangular region.

[0009] According to the second chip packaging structure of the first aspect of this application, a third chip packaging structure according to the first aspect of this application is provided, wherein when the corner region is a rectangular region, a vertex of the rectangular region corresponding to the corner region corresponds to a vertex of the rectangle on the second main surface; or

[0010] When the corner region is a right-angled triangle region, the right-angle vertex of the right-angled triangle in the rectangular region corresponding to the corner region corresponds to a vertex of the rectangle on the second main surface.

[0011] According to the third chip package structure of the first aspect of this application, a fourth chip package structure according to the first aspect of this application is provided, wherein solder balls are arranged in rows and columns along the side parallel to the side of the rectangular region in the corner area; or arranged in the direction parallel to the right-angle vertex of the right triangle to form rows and columns.

[0012] According to one of the first to fourth chip package structures of the first aspect of this application, a fifth chip package structure according to the first aspect of this application is provided, wherein the electrical properties of the chip pins connected to the solder balls in different corner regions of the second main surface are different.

[0013] According to one of the first to fifth chip package structures of the first aspect of this application, a sixth chip package structure according to the first aspect of this application is provided, wherein the dimensions of different corner regions in the second main surface are the same or different.

[0014] According to one of the first to sixth chip package structures of the first aspect of this application, a seventh chip package structure according to the first aspect of this application is provided, wherein one or more solder balls not connected to any pin of the chip are provided in the corner area.

[0015] According to one of the first to seventh chip package structures of the first aspect of this application, the chip pins connected to the solder balls included in the same corner area of ​​the eighth chip package structure according to the first aspect of this application are all grounded or connected to a power supply with the same electrical properties.

[0016] According to one of the first to eighth chip package structures of the first aspect of this application, a ninth chip package structure according to the first aspect of this application is provided, said package structure being a BGA package.

[0017] According to a second aspect of this application, a chip according to the second aspect of this application is provided, which includes the packaging structure described in any one of the first to ninth claims of the first aspect.

[0018] According to a third aspect of this application, a method for arranging solder balls in a chip package structure according to the third aspect of this application is provided. The chip package structure includes a first main surface and a second main surface, wherein the second main surface is rectangular, and a plurality of solder balls are arranged around the perimeter of the second main surface near its edge. The method includes: all solder balls arranged around the perimeter of the second main surface in the same corner area are connected to chip pins with the same electrical properties; wherein the corner area refers to the designated area corresponding to the angle formed by the intersection of the sides in the rectangular structure of the second main surface. Attached Figure Description

[0019] Figure 1A A schematic diagram of a chip and PCB under the thermal effects of SMT is shown in the prior art;

[0020] Figure 1B A schematic diagram showing solder balls adhering to a chip is shown;

[0021] Figure 1C This diagram illustrates another instance of solder ball adhesion on a chip.

[0022] Figure 2A A schematic diagram of the second main surface in the chip packaging structure provided in the embodiments of this application is shown;

[0023] Figure 2B Showing Figure 2A A schematic diagram of the corner area in the chip packaging structure;

[0024] Figure 2C A schematic diagram showing right-angled triangular regions in a chip packaging structure is presented.

[0025] Figure 3A schematic diagram illustrating the packaging structure of yet another chip provided in an embodiment of this application is shown. Detailed Implementation

[0026] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of this application. All other embodiments obtained by those skilled in the art based on the embodiments of this application without creative effort are within the scope of protection of this application.

[0027] Figure 2A A schematic diagram of the second main surface in the chip packaging structure provided in the embodiments of this application is shown.

[0028] For example, such as Figure 2A As shown, the second main surface of the package structure 20 is rectangular. Solder balls are distributed in two regions on the second main surface: a central region and the surrounding areas of the second main surface. There are gaps between the central region and the surrounding areas of the second main surface where no solder balls are present. For example, the solder balls in the central region are arranged in a matrix; the solder balls in the surrounding areas are arranged in rows and columns.

[0029] Figure 2B Showing Figure 2A A schematic diagram of the corner area in the chip packaging structure.

[0030] As an example, the designated areas corresponding to the four corners of the rectangle on the second main surface are referred to as "corner areas." The "corner areas" are located within the second area. The corner areas are, for example, rectangular or right-angled triangles, where one vertex of the rectangle corresponds to one vertex of the rectangle on the second main surface, and the right-angled vertex of the right-angled triangle corresponds to one vertex of the rectangle on the second main surface. Within the "corner areas," the solder balls are arranged parallel to the right-angled sides constituting the aforementioned vertices, forming rows and columns. Each row or column within the "corner areas" has, for example, three or four solder balls. A row within the second area may have, for example, 30 or more solder balls.

[0031] For example Figure 2BAs shown, the package structure 20 includes corner regions 210, 220, 230, and 240; each of the corner regions 210, 220, 230, and 240 includes multiple solder balls. The connection points or pins of the chips connected to the solder balls located in the same corner region have the same electrical characteristics. For example, the connection points or pins of the chips connected to the multiple solder balls in corner region 210 have the same electrical characteristics, as do the connection points or pins of the chips connected to the multiple solder balls in corner region 220, corner region 230, and corner region 240. For example, the chip pins connected to the multiple solder balls in corner region 210 are either power supplies with the same electrical characteristics or all grounded.

[0032] It should be understood that the fact that multiple solder balls connected to chip pins with the same electrical polarity means that multiple solder balls for the same signal also have the same electrical polarity. For example, if the clock signal (denoted as clk) supplied to the chip is connected to three solder balls A, B, and C, and these three solder balls (A, B, and C) are all used to connect to the same clock signal clk, then these three solder balls A, B, and C have the same electrical polarity.

[0033] Optionally, one or more dumb solder balls that are not connected to any pins of the chip can be placed in the corner area. The other solder balls in the corner area, excluding the dumb solder balls, have the same electrical properties.

[0034] Optionally, the connection points or pins of the solder balls connected to the chips contained in different corner regions of the package structure 20 may have different electrical characteristics. For example, the connection points or pins of the multiple solder balls connected to the chips contained in corner regions 210 and 220 may have different electrical characteristics.

[0035] Optionally, the corner regions of the encapsulation structure 20 are rectangular or right-angled triangular regions. For example, corner regions 210, 220, 230, and 240 are rectangular or right-angled triangular regions. Figure 2C A schematic diagram showing a region with right-angled triangles at its corners is presented.

[0036] Alternatively, the number of solder balls contained in the corner regions of the package structure 20 may be the same or different. For example, corner regions 210 and 220 may contain the same number of solder balls, while corner regions 230 and 240 may contain different numbers of solder balls.

[0037] Optionally, each row and / or each column in the corner area of ​​the package structure 20 includes three solder balls.

[0038] Figure 3A schematic diagram illustrating the packaging structure of yet another chip provided in an embodiment of this application is shown.

[0039] For example, such as Figure 3 It is shown that Figure 2B The corner area 210 shown shows a situation where solder balls stick together. Figure 3 The corner area 210 includes solder balls 221 and 222. All chip pins connected to the solder balls in the corner area 210 are electrically grounded; therefore, the signal lines from solder balls 221 and 222 are also grounded. After the chip undergoes high-temperature processing in an SMT oven, solder balls 221 and 222 may stick together. Since the chip pins connected to solder balls 221 and 222 are electrically identical (e.g., both grounded), the sticking together of solder balls 221 and 222 is equivalent to connecting two grounded pins together. Therefore, even if solder balls 221 and 222 stick together, it will not affect the chip's function, thus improving the chip's reliability.

[0040] Although preferred embodiments of this application have been described, those skilled in the art, upon learning the basic inventive concept, can make other changes and modifications to these embodiments. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments as well as all changes and modifications falling within the scope of this application. Clearly, those skilled in the art can make various alterations and variations to this application without departing from its spirit and scope. Thus, if such modifications and variations fall within the scope of the claims of this application and their equivalents, this application also intends to include such modifications and variations.

Claims

1. A chip packaging structure, characterized in that, include: The chip package structure includes a first main surface and a second main surface. The second main surface is rectangular, and multiple solder balls are arranged around the perimeter of the second main surface near its edge. All the chip pins connected to the solder balls arranged in the same corner area around the second main surface have the same electrical properties. The corner area refers to the designated area corresponding to the angle formed by the intersection of the sides in the rectangular structure of the second main surface.

2. The packaging structure according to claim 1, characterized in that, in, The corner area is a rectangular area or a right-angled triangle area.

3. The packaging structure according to claim 2, characterized in that, in, When the corner region is a rectangular region, a vertex of the rectangular region corresponding to the corner region corresponds to a vertex of the rectangle on the second main surface; or When the corner region is a right-angled triangle region, the right-angle vertex of the right-angled triangle in the rectangular region corresponding to the corner region corresponds to a vertex of the rectangle on the second main surface.

4. The packaging structure according to claim 2 or 3, characterized in that, in, Within the corner area, the solder balls are arranged in rows and columns parallel to the sides of the rectangular area; or Arranged along the direction parallel to the right-angled vertex of the right triangle, forming rows and columns.

5. The packaging structure according to any one of claims 1-4, characterized in that, in, The electrical properties of the chip pins connected to the solder balls in different corner regions of the second main surface are different.

6. The packaging structure according to any one of claims 1-5, characterized in that, in, The dimensions of different corner areas in the second main surface are either the same or different.

7. The packaging structure according to any one of claims 1-6, characterized in that, in, One or more solder balls that are not connected to any pins of the chip are placed in the corner area.

8. The packaging structure according to any one of claims 1-7, characterized in that, in, The chip pins connected to the solder balls in the same corner area are all grounded or connected to a power supply with the same electrical polarity.

9. The packaging structure according to any one of claims 1-8, characterized in that, in, The packaging structure is a BGA package.

10. A chip, characterized in that, Includes the packaging structure as described in any one of claims 1-9.

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