Wide bandwidth Hall sensing circuitry with offset compensation and gain calibration

Abstract

The present disclosure describes methods, apparatus, systems, and articles of manufacture corresponding to wide bandwidth Hall sensing circuitry. An example circuit (500) includes a first Hall effect sensor (203, 506) configured to output a first voltage corresponding to a magnetic field; an amplifier (450) to output an amplified voltage by amplifying the first voltage; a second Hall effect sensor (208, 501) configured to output a second voltage corresponding to the magnetic field, the second Hall effect sensor operating using a rotation technique to switch a bias current between terminals of the second Hall effect sensor (208, 501), the rotation technique is used to remove a first offset corresponding to the second Hall effect sensor (208, 501); and offset reduction circuitry (221) configured to: determine a second offset corresponding to the first Hall effect sensor (203, 506) based on the first voltage and the second voltage; and generate an output based on the second offset, the amplifier (450) to adjust the amplified voltage based on the output.

Description

Technical Field

[0001] This specification generally relates to circuits, and more specifically, to wide-bandwidth Hall sensing circuit systems with offset compensation and gain calibration. Background Technology

[0002] A Hall effect sensor is a sensor that detects the presence and / or magnitude of a magnetic field. Because the flow of electric current generates a magnetic field, a Hall effect sensor can be used to determine the amount of current flowing through a system and / or component. To measure a magnetic field using a four-terminal Hall effect sensor, a bias current is applied to a first terminal and obtained via a second terminal. The magnetic field caused by the measured current affects the flow of the bias current, which is proportional to the strength of the magnetic field. The effect on the bias current can be measured between the third and fourth terminals of the Hall effect sensor. For example, if there is no magnetic field, the voltage between the third and fourth terminals is expected to be zero. However, if a magnetic field is present (e.g., due to current), the voltage between the third and fourth terminals is proportional to the magnetic field (e.g., the higher the magnetic field, the greater the voltage difference). Therefore, the voltage measured at the third and fourth terminals can be used to determine the amount of current flowing through the component and / or system. Summary of the Invention

[0003] In at least one example, a circuit includes: a first Hall effect sensor configured to output a first voltage corresponding to a magnetic field; an amplifier configured to output an amplified voltage by amplifying the first voltage; a second Hall effect sensor configured to output a second voltage corresponding to the magnetic field, the second Hall effect sensor operating using a rotation technique to switch a bias current between terminals of the second Hall effect sensor, the rotation technique being used to remove a first offset corresponding to the second Hall effect sensor; and an offset reduction circuit system configured to: determine a second offset corresponding to the first Hall effect sensor based on the first voltage and the second voltage; and generate an output based on the second offset, the amplifier being used to adjust the amplified voltage based on the output. Attached Figure Description

[0004] Figure 1A and 1B An example Hall effect sensor circuit system with offset compensation and gain calibration is shown.

[0005] Figure 2 It has offset compensation. Figure 1A The circuit diagram of an example Hall effect sensor circuit system.

[0006] Figure 3 It has offset compensation. Figure 1AAn alternative circuit diagram for an example Hall effect sensor circuit system.

[0007] Figure 4A It has gain calibration. Figure 1A The circuit diagram of an example Hall effect sensor circuit system.

[0008] Figure 4B It features offset compensation and gain calibration. Figure 1A The circuit diagram of an example Hall effect sensor circuit system.

[0009] Figure 5 It features offset compensation and gain calibration. Figure 1A An alternative circuit diagram for an example Hall effect sensor circuit system.

[0010] Figures 6 to 9 It indicates that it is executable and can be implemented. Figure 1A , 1B A flowchart of the method and / or operation of the Hall effect sensor circuit system of 1, 2, 3, 4A, 4B and / or 5.

[0011] Figure 10 Showing with Figure 1A , 1B Timing diagrams corresponding to Hall effect circuit systems 1, 2, 3, 4A, 4B and / or 5.

[0012] Figure 11 This is a graph showing the reduction in flicker noise corresponding to the example described in this article.

[0013] Figure 12A This is a diagram showing the frequency response of some Hall effect sensor circuit systems.

[0014] Figure 12B This is a diagram showing the bandwidth response of some Hall effect sensor circuit systems.

[0015] The drawings are not necessarily drawn to scale. The same reference numerals or other reference indicators are used in the drawings to indicate (functionally and / or structurally) the same or similar features. Although the drawings show areas with clearly defined lines and boundaries, some or all of these lines and / or boundaries may be idealized. In reality, boundaries and / or lines may be unobservable, mixed, and / or irregular. Detailed Implementation

[0016] Hall effect sensors are used to measure magnetic fields and / or currents in any system containing magnetic elements and / or circuits. For example, a Hall effect sensor can be used to determine the amount of current flowing through one or more components of a circuit and / or in mechanical devices to determine the speed of an electric motor with a magnet. A Hall effect sensor has two terminals that provide a path for bias current to flow to a ground node or terminal, and two other terminals for measuring a voltage difference that can be used to determine the magnetic field. For example, if there is no magnetic field, the voltage difference between the two terminals of the Hall effect sensor is 0 (or almost 0). If a magnetic field is present, the magnetic field affects the bias current flowing between the first two terminals, thus creating a voltage difference between the latter two terminals.

[0017] Some Hall effect sensors can generate signals, such as a small voltage difference between two terminals, even when no magnetic field is applied. This small voltage is called an offset voltage, and the unwanted and unintended signal from the Hall sensor when no magnetic field is applied is generally referred to herein as offset. Undesirable offset voltages can be attributed to unintended variations in the manufacturing process of the Hall effect sensor and / or temperature variations. In response to the Hall effect sensor being used to measure current, the magnetic field may be extremely small. Therefore, an amplifier can be used to amplify the voltage difference generated by the Hall effect sensor. However, even in response to an extremely small offset voltage, the offset voltage is amplified by the amplifier (e.g., amplified by 100 or 1,000). Therefore, a small offset results in a large offset at the amplifier's output terminals, thereby reducing the accuracy of the current measurement.

[0018] Some techniques for mitigating offset in Hall effect sensors involve Hall current rotation. Hall current rotation involves rotating the input terminals of the Hall effect sensor so that a bias current flow is applied to the different input terminals of the Hall effect sensor. By rotating the input terminals, an offset associated with each terminal is determined. And, in response to a change in the direction of the bias current (e.g., in response to the bias current first being input to the first terminal and output from the second terminal, and then, in a subsequent phase, the bias current is provided to the second terminal and output from the first terminal), the polarity of the offset is reversed. In this way, an output signal corresponding to each rotation can be added to remove the offset. For example, the first rotation produces a signal with an offset of 1 millivolt (mV), and the second rotation produces a signal with an offset of 2 mV. In such an example, the third rotation produces a signal with an offset of -1 mV (e.g., the opposite polarity of the first rotation), and the fourth rotation produces a signal with an offset of -2 mV. Therefore, in response to the signals from the four phases being added together, the offset is eliminated (e.g., 1 mV + 2 mV - 1 mV - 2 mV = 0 mV). Hall current rotation can generate high-frequency noise related to the frequency of phase modulation during Hall current rotation. Therefore, such techniques may incorporate a low-pass filter to filter out this high-frequency noise. However, the low-pass filter reduces the overall bandwidth of the Hall effect sensor. Lower bandwidth results in more time to obtain sensor measurements. The example described herein mitigates the offset voltage by eliminating the low-pass filter and utilizes the full bandwidth of the Hall effect sensor, thereby increasing the accuracy and bandwidth of the Hall effect sensor circuitry.

[0019] An ideal Hall effect sensor has a uniform gain. However, in reality, the gain of a Hall effect sensor can vary due to various factors. For example, stray magnetic fields from the Earth, time variations, and temperature can all affect the gain of a Hall effect sensor. If the gain of the Hall effect sensor varies, the output signal may be inaccurate. Therefore, the example described herein tracks the gain variation of the Hall effect sensor circuit system. In this way, the example described herein can adjust the gain of the Hall effect sensor by adjusting the bias current to compensate for gain variations, thereby increasing the accuracy of the Hall effect sensor circuit system.

[0020] Figure 1A and 1B Example Hall effect sensor circuit systems 100 and 101 are shown. Figure 1A The example Hall effect sensor circuit system 100 includes example input terminal 102 and example output terminals 104, 106, and 108. Figure 1B Example Hall effect sensor circuit system 101 includes Figure 1A Example output terminals 106 and 108.

[0021] Figure 1A The Hall effect sensor circuit system 100 is a circuit used to measure the amount of current drawn by the circuit. Current from the circuit is supplied to input terminal 102 and output via output terminal 104 to allow the current drawn by the circuit to flow from input terminal 102 to output terminal 104. As described above, the flow of current generates a magnetic field, and the Hall effect sensor in the Hall effect sensor circuit system 100 senses said magnetic field to generate an output voltage representing the amount of current passing through terminals 102, 104. Figure 1A In the example, the output voltage (also referred to as the output signal) is a differential output voltage output provided at output terminals 106, 108. However, the Hall effect sensor circuit system 100 may have a single output terminal (e.g., terminal 106) to output a single voltage representing the current, as further described below in conjunction with Figures 4 and 5. As further described below, the Hall effect sensor circuit system 100 can sense current across a wide bandwidth and mitigate the offset, flicker, and / or gain variations of the Hall effect sensor.

[0022] Figure 1B The Hall effect sensor circuit system 101 is a circuit used to measure magnetic fields. Figure 1B Hall effect sensor circuit system 101 includes and Figure 1A The Hall effect sensor circuit system 100 is identical to all other circuit systems. However, because the Hall effect circuit system 101 is not measuring current, terminals 102 and 104 are removed, and the Hall effect sensor in the Hall effect sensor circuit system 100 measures the magnetic field without conducting current in the vicinity of the Hall effect sensor. Although the example describes the Hall effect sensor circuit system in conjunction with... Figure 1A The Hall effect sensor circuit system 100 measures current, but some of the described examples can be combined. Figure 1B The Hall effect sensor circuit system 101 is utilized.

[0023] Figure 2 Showing what can be implemented Figure 1A Example Hall effect sensor circuit system 100 includes example Hall effect sensor circuit system 200. Example Hall effect circuit system 200 includes example high-frequency circuit system 201 and example low-offset circuit system 202. High-frequency circuit system 201 includes... Figure 1A The example includes a Hall effect sensor 203, an example bias current source 204, an example amplifier 206, and an example terminal 102. The example low-offset circuit system 202 includes an example Hall effect sensor 208, an example bias current source 210, an example switch (SW) network (NW) 211, an example amplifier 212, and an example residual offset trimming circuit system 214. The Hall effect sensor circuit system 200 further includes... Figure 1AExamples include resistors 215, 216, 218, 220; offset reduction circuitry 221; integrator circuitry 222; example output amplifier 224; and example terminals 106, 108. Although combined... Figure 1A The Hall effect sensor circuit system 100 describes an example Hall effect sensor circuit system 200, but it can be combined with... Figure 1B The Hall effect sensor circuit system 101 describes the Hall effect sensor circuit system 200. For example, terminals 102 and 104, and the connection between terminals 102 and 104, can be removed to implement... Figure 1B Hall effect sensor circuit system 101.

[0024] Figure 2 The example Hall effect sensor 203 is a four-terminal Hall effect sensor. The Hall effect sensor 203 is capable of sensing the magnetic field generated by a current flowing from the first terminal 102 to the second terminal 104. The Hall effect sensor 203 has four terminals. However, the Hall effect sensor 203 may have a different number of terminals. The Hall effect sensor 203 has a first terminal coupled to a bias current source 204, a second terminal coupled to ground (e.g., via a ground terminal), a third terminal coupled to a first input terminal of an amplifier 206, and a fourth terminal coupled to a second input terminal of an amplifier 206. In response to the bias current source 204 applying a bias current to the first terminal of the Hall effect sensor 203, the bias current flows to ground via the second terminal of the Hall effect sensor 203.

[0025] If there is no magnetic field (e.g., the current through terminals 102, 104 is zero) or the magnetic field is substantially small, then the effect on the flow of the bias current can be minimal or zero. Furthermore, if there is no magnetic field (e.g., the current through terminals 102, 104 is zero) or the magnetic field is substantially small, then the voltage difference between the third and fourth terminals of the Hall effect sensor 203 is zero. However, the higher the current flowing from the first terminal 102 to the second terminal 104, the higher the magnetic field near the Hall effect sensor 203. The higher the magnetic field, the greater the effect on the bias current, thereby generating a larger voltage difference between the third and fourth terminals of the Hall effect sensor 203.

[0026] No rotation technique is performed on the Hall effect sensor 203 (e.g., applying a bias current to the same terminal throughout operation). Therefore, a low-pass filter is not needed to filter out high-frequency noise caused by the rotation technique. Consequently, the Hall effect sensor 203 can operate across a wide bandwidth (e.g., from DC to high frequencies (e.g., 1 GHz)). However, as described above, the output signal of the Hall effect sensor 203 may contain offsets attributable to the temperature and / or manufacturing process of the Hall effect sensor 203.

[0027] Figure 2 The bias current source 204 is a circuit system that generates a bias current applied to the Hall effect sensor 203. The bias current source 204 has a first terminal coupled to a supply voltage terminal that receives the supply voltage and a second terminal coupled to the first terminal of the Hall effect sensor 203. As further described below in conjunction with Figures 4 and / or 5, the bias current source 204 can adjust the amount of bias current to compensate for gain variations in the Hall effect sensor 203.

[0028] Figure 2 Amplifier 206 is a fully differential amplifier that amplifies the voltage difference generated by Hall effect sensor 203 by a certain gain. Amplifier 206 has three input terminals and two output terminals. However, in some examples, amplifier 206 may have three input terminals and one output terminal (e.g., a differential amplifier), as further described below in conjunction with Figures 4 and 5. The first input terminal of amplifier 206 is coupled to the third terminal of Hall effect sensor 203. The second input terminal of amplifier 206 is coupled to the fourth terminal of Hall effect sensor 203. The third input terminal of amplifier 206 is coupled to the output terminal of offset reduction circuit system 221. The first output terminal (e.g., a non-inverting terminal) is coupled to resistor 218 and the first input terminal of output amplifier 224. The second output terminal (e.g., an inverting terminal) is coupled to resistor 220 and the second input terminal of output amplifier 224.

[0029] Amplifier 206 amplifies the voltage difference between the first two input terminals (e.g., the voltage difference generated by Hall effect sensor 203) by a gain. The input offset (also referred to as the input offset voltage) of amplifier 206 can be adjusted based on the output signal from the offset reduction circuitry 211 to eliminate and / or otherwise reduce the offset of Hall effect sensor 203, as further described below. Amplifier 206 provides a first voltage corresponding to the product of the voltage difference and the gain at the non-inverting output terminal. Furthermore, amplifier 206 provides a second voltage at the inverting output terminal that is opposite to (e.g., out of phase with) the first voltage.

[0030] Figure 2Example Hall effect sensor 208 is a four-terminal Hall effect sensor capable of sensing the magnetic field generated by a current flowing from the first terminal 102 to the second terminal 104. Hall effect sensor 208 has four terminals. However, Hall effect sensor 208 may have a different number of terminals. The four terminals of Hall effect sensor 208 are coupled to a switching network 211. Hall effect sensor 208 has the same characteristics as Hall effect sensor 203. However, switching network 211 utilizes current rotation technology and / or protocols (e.g., also referred to as rotation protocols, rotation modulation protocols, current rotation modulation protocols, etc.) to adjust which terminal the bias current from bias current source 210 is applied to. Therefore, Hall effect sensor 208 is referred to as a "rotating" Hall effect sensor or a "rotating" Hall. However, Hall effect sensor 203 is referred to as a "non-rotating" Hall effect sensor or a "non-rotating" Hall.

[0031] For example, during the first phase, the switching network 211 is configured such that a first terminal is coupled to a bias current source 210, a second terminal is coupled to ground (e.g., a ground terminal), a third terminal is coupled to a first input terminal of amplifier 212, and a fourth terminal is coupled to a second input terminal of amplifier 212. During the second phase, the switching network 211 is configured such that a second terminal is coupled to a bias current source 210, a third terminal is coupled to ground (e.g., a ground terminal), a fourth terminal is coupled to a first input terminal of amplifier 212, and a first terminal is coupled to a second input terminal of amplifier 212. During the third phase, the switching network 211 is configured such that a third terminal is coupled to a bias current source 210, a fourth terminal is coupled to ground (e.g., a ground terminal), a first terminal is coupled to a first input terminal of amplifier 212, and a second terminal is coupled to a second input terminal of amplifier 212. During the fourth phase, the switching network 211 is configured such that the fourth terminal is coupled to the bias current source 210, the first terminal is coupled to ground (e.g., a ground terminal), the second terminal is coupled to the first input terminal of the amplifier 212, and the third terminal is coupled to the second input terminal of the amplifier 212. Each phase produces a different offset, wherein the offsets from the first and third phases are opposite, and the offsets from the second and fourth phases are opposite. As further described below, the switching network 211 cancels out or otherwise reduces the offset of the Hall sensor 208 generated during the four phases.

[0032] Figure 2 The bias current source 210 is a circuit system that generates a bias current applied to the Hall effect sensor 208. The bias current source 210 has a first terminal coupled to a supply voltage terminal that receives the supply voltage and a second terminal coupled to the first terminal of the Hall effect sensor 208. (See the following description...) Figure 4A , 4BAs further described in section 5, the bias current source 210 can adjust the amount of bias current to compensate for gain variations in the Hall effect sensor 208.

[0033] Figure 2 Example switch network 211 facilitates the rotation protocol of Hall effect sensor 208. Switch network 211 has five input terminals and three output terminals. The first input terminal of switch network 211 is coupled to the first terminal of Hall effect sensor 208. The second input terminal of switch network 211 is coupled to the second terminal of Hall effect sensor 208. The third input terminal of switch network 211 is coupled to the third terminal of Hall effect sensor 208. The fourth input terminal of switch network 211 is coupled to the fourth terminal of Hall effect sensor 208. The fifth input terminal of switch network 211 is coupled to bias current source 210. The first output terminal of switch network 211 is coupled to ground (e.g., ground terminal). The second output terminal of switch network 211 is coupled to the first input terminal of amplifier 212. The third output terminal of switch network 211 is coupled to the second input terminal of amplifier 212. Switch network 211 includes a network of switches that can be opened or closed during the rotation protocol to rotate the coupling to the terminal of Hall effect sensor 208. Switching network 211 may include a controller, timing circuitry, state machine, etc., to control the timing of the rotation protocol and the opening (e.g., non-conductive) and closing (e.g., conductive) of the switches. Furthermore, switching network 211 may include adder circuitry to sum the signals output by the Hall sensor (e.g., voltage differences corresponding to the magnetic field) during the four phases of the rotation protocol to remove and / or otherwise reduce the offset of Hall effect sensor 208. Example: Switching network 211 provides the sum of voltage differences measured by the Hall effect sensor to amplifier 212.

[0034] Figure 2 Amplifier 212 is a fully differential amplifier that amplifies the voltage difference generated by Hall effect sensor 208 by a certain gain. Amplifier 212 has three input terminals and two output terminals. However, in some examples, amplifier 212 may have three input terminals and one output terminal (e.g., a differential amplifier), as further described below in conjunction with Figures 4 and 5. The first input terminal of amplifier 212 is coupled to the second output terminal of switching network 211. The second input terminal of amplifier 212 is coupled to the third output terminal of switching network 211. The third input terminal of amplifier 212 is coupled to the output terminal of residual offset trimming circuit system 214. The first output terminal (e.g., a non-inverting terminal) is coupled to resistor 215. The second output terminal (e.g., an inverting terminal) is coupled to resistor 216.

[0035] Amplifier 212 amplifies the voltage difference between the first two input terminals (e.g., the voltage difference generated by Hall effect sensor 208) by a gain. The input offset of amplifier 212 is adjusted based on the output signal from residual offset trimming circuitry 214 to eliminate and / or otherwise reduce the offset of Hall effect sensor 208, as further described below. Amplifier 212 provides a first voltage corresponding to the product of the voltage difference and the gain at the non-inverting output terminal. Furthermore, amplifier 212 provides a second voltage at the inverting output terminal that is opposite to (e.g., out of phase with) the first voltage. In this example, the gain of amplifier 212 is the same as or similar to the gain of amplifier 206.

[0036] Figure 2 The residual offset correction circuit system 214 adjusts the input offset of amplifier 212 to compensate for the residual offset after the Hall current rotation occurs. The residual offset correction circuit system 214 has an output terminal. The output terminal of the residual offset correction circuit system 214 is coupled to the third input terminal of amplifier 212. Due to the Hall current rotation defect, the rotating Hall effect sensor 208 has a residual offset after the rotation protocol occurs. The residual offset can be transmitted to the output signal of the high-frequency circuit system 201 based on the offset. Therefore, the residual offset correction circuit system 214 transmits the same residual offset value to amplifier 212 with opposite polarity, thereby achieving zero output offset at the output terminal of the Hall effect sensor circuit system 200. In some examples, the residual offset correction circuit system 214 is timed in phase synchronization with the Hall current rotation.

[0037] Figure 2 Example resistors 215, 216, 218, and 220 each have two terminals. The first terminal of resistor 215 is coupled to the second output terminal (e.g., inverting terminal) of amplifier 212. The second terminal of resistor 215 is coupled to the first input terminal of offset reduction circuitry system 221 and the second terminal of resistor 218. The first terminal of resistor 216 is coupled to the first output terminal (e.g., non-inverting terminal) of amplifier 212. The second terminal of resistor 216 is coupled to the second input terminal of offset reduction circuitry system 221 and the second terminal of resistor 220. The first terminal of resistor 218 is coupled to the first output terminal (e.g., non-inverting terminal) of amplifier 206 and the first input terminal of output amplifier 224. The second terminal of resistor 218 is coupled to the first terminal of offset reduction circuitry system 221 and the second terminal of resistor 215. The first terminal of resistor 220 is coupled to the second output terminal (e.g., inverting terminal) of amplifier 206 and the second input terminal of output amplifier 224. The second terminal of resistor 220 is coupled to the second terminal of offset reduction circuit system 221 and the second terminal of resistor 216.

[0038] Figure 2 The offset reduction circuit system 221 determines the offset of the Hall effect sensor 203 based on the output signal of the first amplifier 206 and the output signal of the second amplifier 212. Figure 2 In this circuit, the offset reduction circuit system 221 is implemented by the integrator circuit system 222. Therefore, the terminals of the offset reduction circuit system 221 correspond to or are the same as the terminals of the integrator circuit system 222. The integrator circuit system 222 has a first input terminal, a second input terminal, and an output terminal. The first input terminal of the integrator circuit system 222 is coupled to the second terminals of resistors 218 and 215. The second input terminal of the integrator circuit system 222 is coupled to the second terminals of resistors 220 and 216. The output terminal of the integrator circuit system 222 is coupled to the third input terminal of amplifier 206.

[0039] The offset reduction circuit system 221 generates a signal (e.g., an offset reduction signal) corresponding to the offset of the Hall effect sensor 203 based on a first amplified output signal from the Hall effect sensor 203 and a second amplified output signal from the Hall effect sensor 208. For example, because the Hall effect sensors 203 and 208 have the same or similar characteristics, the only difference between the first and second amplified output signals is that the first amplified output signal may have an offset due to a rotational technique, while the second amplified output signal may not have an offset. Therefore, the offset reduction circuit system 221 compares the output signal of amplifier 206 with the output signal of amplifier 212 to generate a signal corresponding to the offset of the Hall effect sensor 203. The offset reduction signal is an analog signal applied to the input terminal of amplifier 206. The offset reduction signal corresponds to the amount of offset generated by the non-rotating Hall effect sensor 203. Figure 2 In the example, the offset reduction circuit system 221 uses an integrator to integrate the output signals from amplifier 206 and amplifier 212 in the analog domain to generate an offset signal. However, as described below... Figure 3 Further description: the offset reduction circuitry 221 can be implemented using different circuitry to generate an offset signal (e.g., in the digital domain). As described above, the offset signal is used to adjust the output signal of amplifier 206 to reduce and / or eliminate the offset from sensor 203 without requiring rotation of sensor 203. Thus, after a threshold time amount used for circuit stabilization, amplifier 206 provides an offset-reduced and / or offset-free output signal over a wide frequency range without using filters to remove high-frequency noise attributed to the rotation protocol.

[0040] Figure 2Amplifier 224 is a fully differential amplifier that amplifies the voltage difference generated by amplifier 206 to a certain gain. Amplifier 224 has two input terminals and two output terminals. However, in some examples, amplifier 224 may have two input terminals and one output terminal (e.g., a differential amplifier), as described below. Figures 4A to 5 Further description. The first input terminal of amplifier 224 is coupled to the first output terminal of amplifier 206 and resistor 218. The second input terminal of amplifier 224 is coupled to the second output terminal of amplifier 206 and resistor 220. The first output terminal of amplifier 224 (e.g., the non-inverting terminal) is coupled to... Figure 1A The non-inverting output terminal 106. The second output terminal (e.g., the inverting terminal) is coupled to... Figure 1A The inverting output terminal 108. Amplifier 224 amplifies the voltage difference between the first two input terminals (e.g., the voltage difference generated by amplifier 206) by a gain. Amplifier 224 provides a first voltage corresponding to the product of the voltage difference and the gain at the non-inverting output terminal. In addition, amplifier 224 provides a second voltage at the inverting output terminal that is opposite to the first voltage (e.g., out of phase with the first voltage).

[0041] Figure 3 Showing what can be implemented Figure 1A An alternative example of the Hall effect sensor circuit system 100 is the Hall effect sensor circuit system 300. Figure 3 The Hall effect sensor circuit system 300 has Figure 1A Terminals 102, 104, 106, and 108. The Hall effect sensor circuit system 300 further includes... Figure 2 The circuit includes a high-frequency circuit system 201, a low-offset circuit system 202, Hall effect sensors 203 and 208, bias current sources 204 and 210, amplifiers 206, 212, and 224, a switching network 211, a residual offset trimming circuit system 214, resistors 215, 216, 218, and 220, and an offset reduction circuit system 221. Figure 3 In this example, the offset reduction circuit system 221 is implemented by the example analog-to-digital converter (ADC) 301, the example digital circuit system 302, and the example digital-to-analog converter (DAC) 304.

[0042] exist Figure 3In this circuit, offset reduction circuitry 221 converts the output signals of amplifiers 206 and 212 into the digital domain and processes the output signals in the digital domain. For example, ADC 301 (e.g., a multi-channel ADC or implemented by multiple ADCs) converts the analog signals from amplifiers 206 and 212 into digital signals (e.g., a DC voltage corresponding to the analog signal). ADC 301 has a first input terminal, a second input terminal, and an output terminal. The first input terminal of ADC 301 is coupled to resistors 215 and 218. The second input terminal of ADC 301 is coupled to resistors 216 and 220. The output terminal of ADC 301 is coupled to the input terminal of digital circuitry 302. The output signals of amplifiers 206 and 212 are shorted together via resistors 215, 216, 218, and 220. ADC 301 converts the output signals of the first amplifier 206 and the second amplifier 212 at the same time. The ADC 301 provides signal samples corresponding to the first amplifier 206 and / or the second amplifier 212 to the digital circuit system 302 over time.

[0043] Figure 3 The digital circuit system 302 determines a digital offset signal corresponding to the amount of offset of the Hall effect sensor 203 based on the obtained digital samples. The digital circuit system 302 has input terminals and output terminals. The input terminals of the digital circuit system 302 are coupled to the output terminals of the ADC 301. The output terminals of the digital circuit system 302 are coupled to the input terminals of the DAC 304. The digital circuit system 302 may include a storage device (e.g., a memory, lookup table, database, etc.) containing known output signal patterns corresponding to different offsets of the Hall effect sensor 203. In this way, the digital circuit system 302 can compare the digital signal from the ADC 301 (e.g., corresponding to the output signals of amplifiers 206 and 212) with the known patterns to generate a digital offset signal corresponding to the offset of the Hall effect sensor 203. The digital circuit system 302 provides the digital offset signal to the example DAC 304.

[0044] Figure 3 The DAC 304 converts the digital offset signal into an analog offset signal. The DAC 304 has input and output terminals. The input terminal of the DAC 304 is coupled to the output terminal of the digital circuit system 302. The output terminal of the DAC 304 is coupled to the third input terminal of the amplifier 206. The DAC 304 generates an analog offset signal corresponding to the offset of the Hall effect sensor 203 to reduce, eliminate, and / or compensate for the offset of the Hall effect sensor 203. For example, the input offset of the amplifier 206 is adjusted based on the output signal from the offset reduction circuit system 211 to reduce the effect of the offset of the Hall effect sensor 203.

[0045] Figure 4A An alternative example Hall effect sensor circuit system 400 is shown, which can be used for implementation. Figure 1A An example Hall effect sensor circuit system 100 is provided to continuously calibrate the gain changes of Hall effect sensors 203 and 208. Figure 4A The Hall effect sensor circuit system 400 has Figure 1A Terminals 102, 104, 106, and 108. The Hall effect sensor circuit system 400 further includes... Figure 2 The Hall effect sensor circuit system 400 includes a high-frequency circuit system 201, a low-offset circuit system 202, Hall effect sensors 203 and 208, a bias current source 204 and 210, a switching network 211, and a residual offset trimming circuit system 214. The Hall effect sensor circuit system 400 further includes an example coil 401, an example subtractor circuit system 402, an example gain calibration circuit system 404, an example ADC 406, an example digital circuit system 408, an example DAC 410, and example amplifiers 450, 452, and 454. In the example Hall effect sensor circuit system 400, amplifiers 450, 452, and 454 are differential amplifiers. However, the Hall effect sensor circuit system 400 may use... Figure 2 Fully differential amplifiers 206, 212, 224 and / or resistors 215, 216, 218, 220 are used.

[0046] As described above, the gain of Hall effect sensors 203 and 208 can vary due to factors such as aging, mechanical stress, and temperature. The greater the gain variation, the less accurate the Hall effect sensor circuitry becomes in determining the amount of current. Gain variations can be calibrated by adjusting the bias current used in Hall sensors 203 and 208. However, to compensate for gain variations, the amount of gain variation needs to be determined. Therefore, in Figure 4A In this circuit, the Hall effect sensor circuit system 400 includes a coil 401, a subtractor circuit system 402, and a gain calibration circuit system 404 to determine the amount of gain change and adjust the bias current based on the amount of gain change. The gain calibration process can be periodic or continuous in time.

[0047] As in Figure 4AAs shown in the Hall effect sensor circuit system 400, an example coil 401 is located near the Hall effect sensor 208 but not near the Hall effect sensor 203. The coil 401 has a first terminal and a second terminal. The first terminal can be coupled to ground, and the second terminal can be coupled to a voltage and / or current source. In response to a voltage and / or current applied to the coil 401, the coil generates a magnetic field amplified by the Hall effect sensor 208 and the amplifier 452. Therefore, the output signal of the amplifier 452 contains a voltage higher or lower than that of the amplifier 450, attributable to the amplified signal caused by the coil 401. If the gain of the Hall effect sensor 208 increases, then the output signal of the amplifier 452 also increases because the Hall effect sensor 208 amplifies the signal from the coil 401 with an increased gain. Furthermore, because there is no coil near the Hall effect sensor 203, the output signal of the amplifier 450 does not contain the amplified coil signal.

[0048] Figure 4A The example subtractor circuit system 402 subtracts the output signal of amplifier 450 from the output signal of amplifier 452. Subtractor circuit system 402 has a first input terminal, a second input terminal, and an output terminal. The first input terminal of subtractor circuit system 402 is coupled to the output terminal of amplifier 452. The second input terminal is coupled to the output signal of amplifier 450 and the input of output amplifier 454. The output of subtractor circuit system 402 is coupled to the input terminal of gain calibration circuit system 404. Because the signal from Hall sensor 208 amplifies the coil signal reflecting the gain change caused by coil 401, the output signal of amplifier 452 further amplifies the coil signal. Therefore, by subtracting the output signal of amplifier 450 from the output signal of amplifier 452, the result is a coil signal representing the gain. For example, subtractor circuit system 402 cancels the output signal common to the output signals of amplifiers 450 and 452 to recover the coil signal. Subtractor circuit system 402 provides the coil signal to example gain calibration circuit system 404.

[0049] Figure 4A The gain calibration circuit system 404 includes an ADC 406, a digital circuit system 408, and a DAC 410. The ADC 406 has input and output terminals. The input terminal of the ADC 406 is coupled to the output terminal of the subtractor circuit system 402. The output terminal of the ADC 406 is coupled to the input terminal of the digital circuit system 408. The ADC 406 converts the analog coil signal corresponding to the gain of the Hall effect sensors 203, 208 into one or more digital values ​​(e.g., at one or more time points).

[0050] Figure 4AThe digital circuit system 408 determines the amount of bias current to be applied to Hall effect sensors 203, 208 based on the digital value corresponding to the coil signal. The digital circuit system 408 has input terminals and output terminals. The input terminals are coupled to the output terminals of ADC 406. The output terminals of the digital circuit system 408 are coupled to the input terminals of DAC 410. The digital circuit system 408 determines the amount of bias current to be applied to Hall effect sensors 203, 208 to compensate for gain and / or gain variations in Hall effect sensors 203, 208 based on the obtained digital coil signal value. In some examples, the digital circuit system 408 includes a storage device (e.g., memory, database, lookup table, etc.) that associates the digital coil signal with the bias current value. In this way, in response to the obtained digital coil signal, the digital circuit system 408 can identify the corresponding current value based on a matching digital coil signal. The digital circuit system 408 can select the same value or different values ​​for the bias current (e.g., one for current source 204 and another for current source 210). The digital circuit system 408 provides a value corresponding to the determined amount of bias current to the example DAC 410.

[0051] Figure 4A Example DAC 410 converts digital values ​​into corresponding analog signals. DAC 410 has input terminals and two output terminals. The input terminals of DAC 410 are coupled to the output terminals of digital circuit system 408. The first output terminal of DAC 410 is coupled to current source 204. The second output terminal of DAC 410 is coupled to current source 210. In some examples, DAC 410 may have a single output terminal coupled to both current sources 204 and 210. DAC 410 provides one or more analog signals to current sources 204 and 210 to control the amount of bias current applied to the corresponding Hall effect sensors 203 and 208.

[0052] In operation, after startup, gain calibration 404 selects the bias current to be applied to Hall effect sensors 203, 208. If the gain of Hall effect sensors 203, 208 changes (e.g., increases), this change is reflected in the output of amplifier 452 due to the amplification of the gain via coil 401 and amplifier 452. Consequently, the output signal of subtractor circuit system 402 also changes. Gain calibration circuit system 404 adjusts the output value in response to the change in the output of subtractor circuit system 402. The adjusted output value changes the amount of bias current applied to Hall effect sensors 203, 208 based on the change in the output signal of subtractor circuit system 402. Therefore, gain calibration circuit system 404 can determine the change in gain and adjust the bias current of Hall effect sensors 203, 208 to compensate for the change in gain, thereby maintaining the accuracy of Hall effect sensor circuit system 400. The gain calibration process can be periodic or continuous in time.

[0053] Figure 4B An alternative example Hall effect sensor circuit system 460 is shown, which can be used for implementation. Figure 1A An example Hall effect sensor circuit system 100 is provided to compensate for gain variations in Hall effect sensors 203 and 208. Figure 4B The Hall effect sensor circuit system 460 has Figure 1A Terminals 102, 104, 106, and 108. The Hall effect sensor circuit system 460 further includes... Figure 2 The circuit includes a high-frequency circuit system 201, a low-offset circuit system 202, Hall effect sensors 203 and 208, a bias current source 204 and 210, a switching network 211, a residual offset trimming circuit system 214, and an offset reduction circuit system 221. The offset reduction circuit system 221 can be used... Figure 2 Integrator 222 or Figure 3 The Hall effect sensor circuit system 460 is implemented using an ADC 301, a digital circuit system 302, and a DAC 304. The Hall effect sensor circuit system 460 further includes an example coil 401, an example subtractor circuit system 402, an example gain calibration circuit system 404, an example ADC 406, an example digital circuit system 408, an example DAC 410, and example amplifiers 450, 452, and 454. In the example Hall effect sensor circuit system 460, amplifiers 450, 452, and 454 are differential amplifiers. However, the Hall effect sensor circuit system 460 can use... Figure 2 Fully differential amplifiers 206, 212, 224 and / or resistors 215, 216, 218, 220 are used.

[0054] Figure 4B The Hall effect sensor circuit system 460 includes Figure 2Example offset reduction circuitry 221 of type 3 is used to perform offset reduction, as further described above. In Hall effect sensor circuitry 460, the first input terminal of offset reduction circuitry 221 is coupled to the output terminal of amplifier 450 and the first input terminal of subtractor circuitry 402. The second input terminal of offset reduction circuitry 221 is coupled to the output terminal of amplifier 452 and the second input terminal of subtractor circuitry 402. The output terminal of offset reduction circuitry 221 is coupled to the third input terminal of amplifier 450.

[0055] According to the modulation scheme shown, the coil 401 is modulated using rotational modulation of the Hall effect sensor 208, so that the offset reduction circuitry 221 can perform offset reduction without the influence of the coil signal. For example, as described above, the rotational modulation protocol includes four phases for applying bias current to the four input terminals of the Hall effect sensor 208. Because flowing current in opposite directions in the Hall effect sensor 208 changes the polarity of the offset, the offset reduction circuitry 221 processes the output signal of the Hall effect sensor 208 across four phases to cancel and / or reduce the offset. However, applying current to the coil 401 affects the output signal of the Hall effect sensor 208 due to the increased magnetic field generated by the coil 401. Therefore, the current applied to the coil 401 is reversed after the first four phases for the subsequent four phases. Reversing the current changes the polarity of the magnetic field generated by the coil 401. Therefore, the offset reduction circuitry 221 can process the output signal of the Hall effect sensor 208 across eight phases to cancel and / or reduce the offset and influence of the coil 401.

[0056] Figure 5 An alternative example Hall effect sensor circuit system 500 is shown, which can be used for implementation. Figure 1A An example Hall effect sensor circuit system 100 is provided to compensate for gain variations in Hall effect sensors 203 and 208. Figure 5 The Hall effect sensor circuit system 500 has Figure 1A Terminals 102, 104, 106, and 108. The Hall effect sensor circuit system 500 further includes... Figure 2 The circuit includes a high-frequency circuit system 201, a low-offset circuit system 202, Hall effect sensors 203 and 208, a bias current source 204 and 210, a switching network 211, a residual offset trimming circuit system 214, and an offset reduction circuit system 221. The offset reduction circuit system 221 can be used... Figure 2 Integrator 222 or Figure 3 The Hall effect sensor circuit system 500 is implemented using ADC 301, digital circuit system 302, and DAC 304. Figure 4AExample coil 401, example subtractor circuit system 402, example gain calibration circuit system 404, example ADC 406, example digital circuit system 408, example DAC 410, and example amplifiers 450 and 452, and / or 4B. In the example Hall effect sensor circuit system 500, amplifiers 450 and 452 are differential amplifiers. However, the Hall effect sensor circuit system 500 may use... Figure 2 Fully differential amplifiers 206, 212, 224 and / or resistors 215, 216, 218, 220 are implemented. The example Hall effect sensor circuit system 500 further includes example Hall effect sensors 501, 506, example coils 502, 514, 516, example subtractor circuit systems 503, 505, 510, 512, example bias current sources 504, 507, example coil compensation circuit system 518, example precharge buffer 520, example temperature sensor 522, example overcurrent detection circuit system 524, example reference circuit system 526, and example output amplifier 528.

[0057] Figure 5 The example Hall effect sensor circuit system 500 includes two Hall effect sensors 203, 506 for the high-frequency circuit system and two Hall effect sensors 208, 501 for the low-offset circuit system. However, any number of Hall effect sensors can be implemented in the high-frequency circuit system and / or the low-offset circuit system. A second set of Hall effect sensors 501, 506 can be implemented to remove and / or reduce the effects of stray magnetic fields from the Earth by subtracting the corresponding output signals using the example subtractor circuit system 503, 505, 510, 512 before the corresponding output signals are received in the corresponding amplifiers 450, 452.

[0058] exist Figure 5 In the diagram, the switches coupled to the terminals of Hall effect sensors 208 and 511 represent the switch network 211 in Figure 1. However, the actual implementation of the switch network 211 may differ from the above-described embodiment. Figure 2 The described implementation scheme. Hall effect sensor 501 has a connection via a switching network (e.g., Figure 2 The switching network 211 is coupled to four terminals of the bias current source 504, subtractor circuit system 505, subtractor circuit system 503, and ground. The coil 502 operates in a manner similar to that of the coil 401 (e.g., to generate a magnetic field for identifying gain changes).

[0059] The subtractor circuit system 503 generates a difference based on the voltage at corresponding terminals of Hall effect sensors 208 and 501. The subtractor circuit system 503 has two input terminals and one output terminal. The first input terminal of the subtractor circuit system 503 is coupled to Hall effect sensor 208 via a switching network. The second input terminal of the subtractor circuit system 503 is coupled to Hall effect sensor 501 via a switching network. The output terminal of the subtractor circuit system 503 is coupled to the first input terminal of amplifier 452.

[0060] The bias current source 504 operates in a similar manner to the bias current source 210 (e.g., to provide a bias current to the Hall effect sensor 501). The bias current source 504 has two terminals. The first terminal of the bias current source 504 is coupled to the output signal of the current source 210 and the gain calibration circuit system 404. The second terminal of the bias current source 504 is coupled to the Hall effect sensor 501 via a switching network.

[0061] The subtractor circuit system 505 generates a difference based on the voltage at corresponding terminals of Hall effect sensors 208 and 501. The subtractor circuit system 505 has two input terminals and one output terminal. The first input terminal of the subtractor circuit system 505 is coupled to Hall effect sensor 208 via a switching network. The second input terminal of the subtractor circuit system 505 is coupled to Hall effect sensor 501 via a switching network. The output terminal of the subtractor circuit system 505 is coupled to the second input terminal of amplifier 452.

[0062] The Hall effect sensor 506 has four terminals. The first terminal of the Hall effect sensor 506 is coupled to the bias current source 507. The second terminal of the Hall effect sensor 506 is coupled to ground. The third terminal of the Hall effect sensor 506 is coupled to the second input terminal of the subtractor circuit system 510. The fourth terminal of the Hall effect sensor 506 is coupled to the second input terminal of the subtractor circuit system 512.

[0063] Bias current source 507 operates in a similar manner to bias current source 204 (e.g., to provide bias current to Hall effect sensor 506). Bias current source 507 has two terminals. The first terminal of bias current source 507 is coupled to the output signal of current source 204 and gain calibration circuit system 404. The second terminal of bias current source 507 is coupled to the first terminal of Hall effect sensor 506.

[0064] The subtractor circuit system 510 generates a difference based on the voltage at the third terminal of Hall effect sensors 203 and 506. The subtractor circuit system 510 has two input terminals and one output terminal. The first input terminal of the subtractor circuit system 510 is coupled to the third terminal of Hall effect sensor 203. The second input terminal of the subtractor circuit system 510 is coupled to the third terminal of Hall effect sensor 506. The output terminal of the subtractor circuit system 510 is coupled to the first input terminal of amplifier 450.

[0065] The subtractor circuit system 512 generates a difference based on the voltage at the fourth terminal of Hall effect sensors 203 and 506. The subtractor circuit system 512 has two input terminals and one output terminal. The first input terminal of the subtractor circuit system 512 is coupled to the fourth terminal of Hall effect sensor 203. The second input terminal of the subtractor circuit system 512 is coupled to the fourth terminal of Hall effect sensor 506. The output terminal of the subtractor circuit system 512 is coupled to the second input terminal of amplifier 450.

[0066] Although example coils 401 and 502 are implemented near Hall effect sensors 208 and 501 for the purpose of determining gain changes, the magnetic fields generated by coils 401 and 502 can have an effect and / or be sensed by Hall effect sensors 203 and 506. Therefore, example coils 514 and 516 have been implemented near Hall effect sensors 203 and 506 to generate a magnetic field opposite to the magnetic field leaking from coils 401 and 502, in order to compensate for, reduce, and / or eliminate the effect of the magnetic field generated by coils 401 and 502. The effect of the magnetic field generated by coils 401 and 502 on Hall effect sensors 203 and 506 will produce a square wave at the output signal of output amplifier 528.

[0067] Therefore, the example coil compensation circuit system 518 identifies the effect by sensing the amplitude of the square wave at the output signal of the output amplifier 528 and applying current to coils 514, 516 to mitigate the leakage magnetic field until the square wave at the output signal is eliminated and / or reduced by more than a threshold. The coil compensation circuit system 518 is coupled to the output signal of the amplifier 528 and to coils 514, 516. For example, the compensation circuit system 518 may determine the presence of a square wave at the output terminal of the amplifier 528 and may apply a bias current to coils 516, 514 based on the amplitude of the square wave. The compensation circuit system 518 may continue to measure the output voltage to adjust the bias current applied to coils 516, 514 sufficiently (e.g., within a threshold amount) to reduce the effect of the leakage magnetic field from coils 401, 502.

[0068] An on-chip heater circuit system 519 is implemented in the Hall effect sensor circuit system 500 to heat the silicon of the Hall effect sensor circuit system 500 for testing purposes.

[0069] Figure 5 A precharge buffer 520 isolates the ADC 406 from amplifiers 450 and 528. The precharge buffer 520 has input and output terminals. The input terminals of the precharge buffer 520 are coupled to amplifiers 450 and 528, offset reduction circuitry 221, and overcurrent detection circuitry 524. The output terminal of the precharge buffer 520 is coupled to a second input terminal of subtractor circuitry 402. The ADC 406 may have one or more sampling capacitors. Small ripple occurs in the time domain in response to the time spent charging and discharging such sampling capacitors. Therefore, the precharge buffer 520 isolates amplifiers 450 and 528 from the ADC 406 to reduce any possible ripple. In some examples, a precharge buffer can be added anywhere the ADC is implemented. For example, a precharge buffer can be added at the first input terminal of offset reduction circuitry 221 (e.g., if implemented with an ADC) to isolate the ADC of offset reduction circuitry 221 from other components of Hall effect sensor circuitry 500.

[0070] Figure 5 Temperature sensor 522 senses the temperature on and / or near the silicon of Hall effect sensor circuit system 500. Temperature sensor 522 has three terminals. The first terminal of temperature sensor 522 is coupled to residual offset trimming circuit system 214. The second terminal of temperature sensor 522 is coupled to ADC 406. The third terminal of temperature sensor 522 is coupled to digital circuit system 408. The temperature sensor provides temperature to residual offset trimming circuit system 214, ADC 406, and / or digital circuit system 408 to assist their respective functionalities. For example, the sensed temperature can be used to adjust the temperature coefficient of ADC 406 to compensate for thermal expansion of the package corresponding to Hall effect sensor circuit system 500. In this way, ADC 406 can use the sensed temperature to compensate for changes in the magnetic signal. Digital circuit system 408 can use the sensed temperature to identify potential faults in response to temperature and digital values ​​that do not correspond to expected results. If a fault is identified, digital circuit system 408 outputs a fault signal to the fault terminal of Hall effect sensor circuit system 500. Example residual offset trimming circuit system 214 can use the sensed temperature as a temperature coefficient, which is used to generate the output signal of offset trimming circuit system 214.

[0071] Figure 5The overcurrent detection circuit system 524 detects that the measured current is higher than a threshold. The measured current is the current from input terminal 102 to output terminal 104. The overcurrent detection circuit system 524 has a first input terminal, a second input terminal, and an output terminal. The first input terminal of the overcurrent detection circuit system 524 is coupled to the voltage overcurrent (VOC) terminal of the Hall effect sensor circuit system 500. The VOC terminal is a terminal that the customer and / or device can use to provide a signal (e.g., voltage) corresponding to a threshold (e.g., a threshold current amount used to trigger a warning). The second input terminal of the overcurrent detection circuit system 524 is coupled to the first input terminal of the offset reduction circuit system 221, the output terminal of the amplifier 450, the first input terminal of the amplifier 528, and the input terminal of the buffer 520. The output terminal of the overcurrent detection circuit system 524 is coupled to the OC terminal of the Hall effect sensor circuit system 500. The OC terminal can be used to trigger a warning in response to the measured current being higher than a threshold.

[0072] The overcurrent detection circuit system 524 can identify a measured current exceeding a threshold at a rate dependent on the bandwidth of the Hall effect sensor circuit system 500. Therefore, limiting the bandwidth of the Hall effect sensor circuit system 500 limits the rate at which it can identify an overcurrent (e.g., a measured current exceeding a threshold). However, because the Hall effect sensor circuit system 500 has full bandwidth, the speed of the overcurrent detection circuit system 524 is not limited. Because the offset reduction circuit system 221 mitigates the offset of the Hall effect sensors 203, 506, the overcurrent detection circuit system 524 can identify an overcurrent based on the output signal of the amplifier 450, since the output signal of the amplifier 450 is offset-free. Therefore, the overcurrent detection circuit system 524 can detect overcurrents independent of the bandwidth of the output amplifier 528. In response to detecting an overcurrent, the overcurrent detection circuit system 524 provides a signal indicating overcurrent detection to the OC terminal.

[0073] Figure 5 The reference circuit system 526 enables users, clients, and / or devices to program and / or set the reference voltage of the output amplifier 528. The reference circuit system 526 has input terminals and output terminals. The input terminals of the reference circuit system 526 are coupled to the VREF terminal of the Hall effect sensor circuit system 500. The output terminals of the reference circuit system 526 are coupled to a second input terminal of the output amplifier 528. Users, clients, and / or devices can transmit signals to the reference circuit system 526. The reference circuit system 526 provides signals in response to signals from users, clients, and / or devices to control the reference voltage of the output amplifier 528.

[0074] Figure 6This indicates that it can be implemented, instantiated, and / or executed by programmable circuit systems and / or Hall effect sensor circuit systems 200, 300, 400, 460, 500 to reduce Figures 2 to 5 The flowcharts include a method for offsetting Hall effect sensors 203 and / or 506, example machine-readable instructions, and / or example operation 600. Although combined with... Figure 5 Hall effect sensor circuit system 500 description Figure 6 However, it can be combined Figures 2 to 5 The flowchart describes any one of the Hall effect sensor circuit systems. Figure 6 Example methods and / or example operations 600 begin at box 602, where example current sources 204, 210, 504 and / or 507 apply bias current to Hall effect sensors 203, 208, 501 and / or 506.

[0075] At block 604, switch network 211 performs a current rotation protocol on low-offset Hall effect sensors 208 and / or 501. As described above, switch network 211 enables and / or deactivates multiple switches to adjust the input / output of Hall effect sensors 208, 501. An offset is applied with different polarities for each phase / rotation of the input / output. In this way, summing the outputs of the four phases produces a signal in which the offset is canceled out. At block 606, offset reduction circuitry 221 generates an offset reduction signal in response to the signal from the low-offset Hall effect sensor output (e.g., output by amplifiers 212, 452) and the output signal from the higher-offset Hall effect sensor output (e.g., output by amplifiers 206, 450). For example, as described above, the output signals of amplifiers 212, 452 are attributed to the current rotation technique applied to Hall effect sensors 208, 501 without offset or with limited offset. However, the outputs of amplifiers 206 and 405 contain an offset because no current rotation is applied to Hall effect sensors 203 and 506. Therefore, the offset reduction circuitry 221 uses the example integrator 222 and / or the example ADC 301, digital circuitry 302, and DAC 304 to determine the difference between the two signals over a period of time, as further described above. At block 608, the example offset reduction circuitry 221 adjusts the outputs of the high-frequency amplifiers 206 and 450 based on the offset reduction signal. For example, the offset reduction signal is provided to amplifiers 206 and 450 to adjust and / or compensate for the offset of Hall effect sensor 203 by adjusting the input offset voltage of amplifiers 206 and 450. As described above, the offset reduction signal is an analog signal corresponding to the amount of offset contained in the output signal of the non-rotating Hall sensors 203 and 506.

[0076] Figure 7This indicates that compensation can be implemented, instantiated, and / or executed by programmable circuit systems and / or Hall effect sensor circuit systems 200, 300, 400, 460, 500. Figures 2 to 5 The method for gain variation of Hall effect sensors 203, 208, 501, and 506, along with flowcharts of example machine-readable instructions and / or example operation 700, are provided. Although combined with... Figure 5 Hall effect sensor circuit system 500 description Figure 7 However, it can be combined Figures 2 to 5 The flowchart describes any one of the Hall effect sensor circuit systems. Figure 7 Example method and / or example operation 700 begins at block 702, where a bias current is applied to coils 401, 502 of the calibrating Hall effect sensors 208, 501. Voltage and / or current sources can be used to apply current to coils 401, 502. In some examples, as described above, the current applied through coils 401, 502 generates a magnetic field that affects Hall effect sensors 203, 506. In such examples, coil compensation circuitry 518 identifies the effect at the output signal of output amplifier 528 and applies current to coils 514, 516 to mitigate the effect.

[0077] At block 704, switch network 211 performs a current rotation protocol for low-offset Hall effect sensors 208 and / or 501. As described above, switch network 211 enables and / or deactivates multiple switches to adjust the input / output terminals of Hall effect sensors 208, 501. An offset is applied with a different polarity for each phase / rotation of the input / output terminals. In this way, summing the output signals of the four phases produces a signal in which the offsets are canceled out. Applying a bias current to coils 401, 502 amplifies the gain of Hall effect sensors 208, 501. Therefore, at block 706, a reverse bias current is applied to coils 401, 502. The reverse bias current is the same current applied at block 702 but in the opposite direction. The polarity of the amplified gain signal is reversed in response to the reversal of the bias current. In this way, the offset reduction circuitry 221 can process the output signal of amplifier 452 across two phases (e.g., applying a bias current and applying a reverse bias current) to counteract the effects of the gain signals generated by coils 401, 502 in response to determining the offset of Hall effect sensors 203, 506. In some examples, as described above, the current applied through coils 401, 502 generates a magnetic field that affects Hall effect sensors 203, 506. In such examples, coil compensation circuitry 518 identifies the effect at the output signal of output amplifier 528 and applies a reverse current to coils 514, 516 to mitigate the effect.

[0078] At block 708, when a reverse bias current is applied to coils 401, 502, switching network 211 performs a current rotation protocol on low-offset Hall effect sensors 208 and / or 501, such that offset reduction circuitry 221 can determine the offset without the gain signal generated by coils 401, 502. At block 710, subtractor circuitry 402 generates a calibration signal based on the output signals of amplifier 450 and amplifier 452 (e.g., the difference between these two output signals). Because Hall effect sensors 208, 501 sense the magnetic fields attributed to coils 401, 502, the output signal of amplifier 452 amplifies the magnetic fields attributed to coils 401, 502. However, the output signal of amplifier 450 does not amplify the magnetic fields attributed to coils 401, 502. Therefore, subtracting the output signal of amplifier 452 from the output signal of amplifier 452 produces a calibration coil signal corresponding to the gain of Hall effect sensors 203, 506, 208, 501.

[0079] At block 712, the ADC 406 of the gain calibration circuitry 404 converts the calibration coil signal into one or more digital values ​​(e.g., over a period of time). At block 714, the digital circuitry 408 determines whether the digital value corresponds to a fault. For example, the digital circuitry 408 determines that a fault exists in response to a digital value deviating from an expected pattern. In some examples, the digital circuitry 408 uses temperature information provided by the temperature sensor 522 to determine whether the digital value corresponds to a fault. If the digital circuitry 408 determines that the digital value corresponds to a fault (block 714: Yes), then the digital circuitry 408 provides a fault signal via a fault terminal (block 716). If the digital circuitry 408 determines that the digital value does not correspond to a fault (block 714: No), then the digital circuitry 280 determines the bias current value (e.g., the amount of bias current) to be applied to the Hall effect sensors 203, 208, 501, 506 based on the digital value and / or the temperature value (block 718).

[0080] At block 720, example DAC 410 converts a bias current value into one or more analog signals. In some examples, the analog signal is the bias current applied to Hall effect sensors 203, 208, 501, 506. In some examples, the analog signal is provided to current sources 204, 210, 504, 507 to generate corresponding bias currents to be applied to Hall effect sensors 203, 208, 501, 506. Therefore, at block 722, current sources 204, 210, 504, 507 apply bias currents to Hall effect sensors 203, 208, 501, 506 based on the analog signals. As further described above, gain changes are identified based on the output signal at the output terminal of subtractor circuit system 402, which is applied to gain calibration circuit system 404 to adjust the bias current to compensate for gain changes.

[0081] Figure 8 This means that it can be implemented, instantiated, and / or executed by the programmable circuit system and / or the overcurrent detection circuit system 524 to identify the overcurrent caused by Figures 2 to 5 The flowcharts for methods, example machine-readable instructions, and / or example operation 800 for measuring currents above a threshold using Hall effect sensors 203, 208, 501, and 506. Although combined with... Figure 5 Hall effect sensor circuit system 500 description Figure 8 However, it can be combined Figures 2 to 5 The flowchart describes any one of the Hall effect sensor circuit systems. Figure 8 Example method and / or example operation 800 begins at block 802, where the overcurrent detection circuitry 524 receives signals from a terminal (e.g., Figure 5 The current threshold is obtained from the signal received at the VOC terminal. The signal can be set by the user, manufacturer, and / or device.

[0082] At block 804, the overcurrent detection circuitry 524 determines the current measured by Hall effect sensors 203 and 506 based on the output voltages of amplifiers 206 and 450. At block 806, the overcurrent detection circuitry 524 compares the determined current with an acquired current threshold to determine if the determined current is above the threshold. If the overcurrent detection circuitry 524 determines that the current is not above the threshold (block 806: No), then control returns to block 804 to continue current measurement. If the overcurrent detection circuitry 524 determines that the current is above the threshold (block 806: Yes), then the overcurrent detection circuitry 524 provides an overcurrent indication signal (e.g., via an OC terminal) to indicate that the measured current is above the threshold (block 808). This indication can be used to perform mitigation actions to avoid damage associated with the overcurrent. After block 808, control returns to block 804.

[0083] Figure 9 This is a flowchart illustrating a method, example machine-readable instructions, and / or example operation 900 that can be implemented, instantiated, and / or executed by a programmable circuit system and / or a coil compensation circuit system 518 to identify and compensate for the magnetic fields affecting the Hall effect sensors 203 and 506 caused by coils 401 and 502. Although combined Figure 5 Hall effect sensor circuit system 500 description Figure 9 However, it can be combined Figures 2 to 5 The flowchart describes any one of the Hall effect sensor circuit systems. Figure 9 Example method and / or example operation 900 begins at block 902, where the coil compensation circuit system 518 obtains the output voltage at the output terminal of the output amplifier 528. As further described below, the magnetic field generated by coils 401, 502 can be sensed by Hall effect sensors 203, 506. Therefore, the leakage magnetic field is amplified by both amplifiers 450 and 528, thereby generating a square wave on top of the output signal. Thus, the coil compensation circuit system 518 can determine whether the Hall effect sensors are still sensing the magnetic field associated with coils 401, 502 based on whether the output signal contains a square wave corresponding to the modulation of the coils (e.g., in the first direction and the reverse direction).

[0084] If the example coil compensation circuit system 518 determines that the output voltage does not correspond to the magnetic field generated by coils 401, 502 (e.g., if the output voltage contains a square wave corresponding to a coil modulation scheme) (box 904: No), then control returns to box 902. If the example coil compensation circuit system 518 determines that the output voltage corresponds to the magnetic field generated by coils 401, 502 (e.g., if the output voltage contains a square wave corresponding to a coil modulation scheme) (box 904: Yes), then the coil compensation circuit system 518 adjusts the amount of current passing through coils 514, 516 to mitigate and / or otherwise reduce the effects of the magnetic field associated with coils 401, 502 (box 906). After box 906, the coil compensation circuit system 518 returns to box 902. If the coil compensation circuit system 518 over-compensates or under-compensates, the compensation amount can be adjusted during subsequent iterations of measuring the output voltage.

[0085] Figure 10Example graphs 1000, 1002, 1004, 1006, 1008, 1010, 1012, and 1014 are shown, illustrating the amount of offset in the frequency and / or time domains. Graphs 1000 and 1002 represent the non-rotational offset in the frequency and time domains at the output signals of Hall effect sensors 203 and 506. Graph 1000 shows the offset experienced by the output signals of Hall effect sensors 203 and 506 at 0 Hz (e.g., a DC frequency), where the output signals of Hall effect sensors 203 and 506 correspond to the full bandwidth (0 Hz to +1 MHz). Graph 1002 shows the offset of Hall effect sensors 203 and 506 relative to time. Graph 1002 includes a constant, unwanted offset contained in the output signals of Hall effect sensors 203 and 506.

[0086] Graphs 1004 and 1006 represent the rotational offsets in the frequency and time domains at the output terminals of Hall effect sensors 208 and 501. Graph 1004 shows the offset experienced by the output signals of Hall effect sensors 208 and 501 at a frequency of the current rotation protocol Hz, where the signal corresponds to the full bandwidth (0 Hz to +1 MHz). Graph 1006 shows the offsets of Hall effect sensors 208 and 501 relative to time when current rotation occurs for each of the eight phases. Graph 1006 shows the different offsets associated with different terminals of Hall effect sensors 208 and 501 to which current is applied. As shown in 1006, the offset for each phase is canceled out by offsets of opposite polarity.

[0087] Graphs 1008 and 1010 represent the output signal of the offset reduction circuitry system 221 in the frequency and / or time domains (e.g., it is applied to adjust the gain of the main amplifiers 206 and 450). Graph 1008 shows the offset produced by the output signal of the offset reduction circuitry system 221 at 0 Hz (e.g., a DC frequency). Graph 1010 shows the output signal of the offset reduction circuitry system 221 relative to time. As described above, the offset signal provided by the offset reduction circuitry system 221 is applied to amplifier 450 to reduce and / or otherwise eliminate the offset of the Hall effect sensors 203 and 506 by adjusting the total input offset of amplifiers 206 and 450.

[0088] Graphs 1012 and 1014 illustrate the effect of offset on the output signal of output amplifier 528 in the frequency and / or time domains. As shown in graph 1012, the output signal of amplifier 528 experiences almost no offset across the full bandwidth because the offset reduction circuitry 221 reduces and / or eliminates the offset by adjusting amplifier 450. Graph 1014 shows that the output offset decreases to 0 after a settling time (e.g., after the Hall effect sensor circuitry is first powered on). As shown in graph 1014, an offset is present at startup, but it decreases to zero or near zero after a settling time as the offset reduction circuitry 221 begins to mitigate it.

[0089] Figure 11 Additional benefits are shown in the examples described. Figure 11 Includes example noise shaping curve 1100 showing output noise relative to frequency. Figure 11 Example plot 1100 includes a first example noise plot 1102 for a Hall effect sensor circuit system that does not have current rotation and does not use offset reduction, and a second example noise plot 1104 corresponding to offset reduction as described. Figure 11 Further included is region 1106, which illustrates the reduction of flicker noise at low frequencies using the described example. High-frequency Hall effect sensors without current rotation contain flicker noise. Offset reduction circuitry 221 removes flicker noise attributable to auto-zeroing operation, as shown by flicker reduction region 1106 between the two plots 1102, 1104.

[0090] Figure 12A and 12B Frequency response and / or bandwidth measurements of alternative techniques that do not utilize the described offset reduction circuitry are illustrated. For example, alternative techniques may involve attempting to achieve full bandwidth by using a high-frequency path for high-frequency signals and a low-frequency path for low-frequency signals (also known as frequency splicing). Figure 12A Includes example frequency response plot 1200, and Figure 12B Includes example bandwidth plot 1210. Bandwidth plot 1210 includes example notch 1212.

[0091] As shown in frequency response plot 1200, the gain of alternative techniques experiences gain glitches that can cause gain errors of up to 25%. Furthermore, frequency response plot 1200 corresponds to a decrease in gain at higher frequencies. Therefore, alternative techniques are unreliable for higher frequency signals. As shown in bandwidth plot 1210, notch 1212 (e.g., in-band notch) occurs, resulting in a gain error of almost 100%. The examples in this paper eliminate in-band notches and have a more stable frequency response and less gain drop compared to such alternative techniques.

[0092] exist Figures 2 to 5 The implementation is shown in the figure. Figure 1A Example configurations of Hall effect sensor circuit system 100 and / or Hall effect sensor circuit system 101 of type 1B. However, Figures 2 to 5 One or more of the elements, processes and / or devices shown may be combined, divided, rearranged, omitted, eliminated and / or implemented in any other way.

[0093] In addition, bias current sources 204, 210, 504, 507, switching network 211, amplifiers 206, 212, 224, 450, 452, 454, 528, residual trimming offset circuit system 214, offset reduction circuit system 221, integrator 222, ADC 301, 406, digital circuit system 302, 408, DAC 304, 410, subtractor circuit system 402, 505, 512, gain calibration circuit system 404, coil compensation circuit system 518, on-chip heater 519, buffer 520, temperature sensor 522, overcurrent detection circuit system 524, reference circuit system 526 and / or more generally... Figures 2 to 5 One or more of the Hall effect sensor circuit systems 200, 300, 400, 460, and 500 can be implemented by hardware, software, firmware, and / or any combination of hardware, software, and / or firmware. Thus, for example, any of the following: bias current sources 204, 210, 504, and 507; switching network 211; amplifiers 206, 212, 224, 450, 452, 454, and 528; residual trimming offset circuit system 214; offset reduction circuit system 221; integrator 222; ADC 301 and 406; digital circuit systems 302 and 408; DAC 304 and 410; subtractor circuit systems 402, 505, and 512; gain calibration circuit system 404; coil compensation circuit system 518; on-chip heater 519; buffer 520; temperature sensor 522; overcurrent detection circuit system 524; and reference circuit system 526, and / or more generally... Figures 2 to 5 One or more of the Hall effect sensor circuit systems 200, 300, 400, 460, and 500 may be implemented by one or more analog or digital circuits, logic circuits, programmable processors, programmable controllers, graphics processing units (GPUs), digital signal processors (DSPs), application-specific integrated circuits (ASICs), programmable logic devices (PLDs), and / or field-programmable logic devices (FPLDs).

[0094] When any of the device or system claims in this patent is read to cover purely software and / or firmware implementations, one or more of the following are included: bias current sources 204, 210, 504, 507; switch network 211; amplifiers 206, 212, 224, 450, 452, 454, 528; residual trimming offset circuit system 214; offset reduction circuit system 221; integrator 222; ADC 301, 406; digital circuit systems 302, 408; DAC 304, 410; subtractor circuit systems 402, 505, 512; gain calibration circuit system 404; coil compensation circuit system 518; on-chip heater 519; buffer 520; temperature sensor 522; overcurrent detection circuit system 524; and reference circuit system 526, and / or more generally... Figures 2 to 5 One or more of the Hall effect sensor circuit systems 200, 300, 400, 460, and 500 are hereby expressly defined as comprising a non-transitory computer-readable storage device or storage disk, such as a memory, a digital universal disk (DVD), an optical disk (CD), a Blu-ray disc, etc., comprising software and / or firmware. Furthermore, bias current sources 204, 210, 504, 507, switching network 211, amplifiers 206, 212, 224, 450, 452, 454, 528, residual trimming offset circuit system 214, offset reduction circuit system 221, integrator 222, ADC 301, 406, digital circuit system 302, 408, DAC 304, 410, subtractor circuit system 402, 505, 512, gain calibration circuit system 404, coil compensation circuit system 518, on-chip heater 519, buffer 520, temperature sensor 522, overcurrent detection circuit system 524, reference circuit system 526, and / or more generally... Figures 2 to 5 One or more of the Hall effect sensor circuit systems 200, 300, 400, 460, and 500 may include as Figures 2 to 5 The elements, processes, and / or devices shown may be supplemented or replaced by one or more of the elements, processes, and devices shown, and / or may include more than one of any or all of the elements, processes, and devices shown. As used herein, the phrase “communication” (including variations thereof) covers direct communication and / or indirect communication through one or more intermediate components, and does not require direct physical (e.g., wired) communication and / or continuous communication, but also includes selective communication at periodic intervals, predetermined intervals, non-periodic intervals, and / or one-off events.

[0095] Flowcharts represent implementation Figures 2 to 5 The circuit operation, example hardware logic, machine-readable instructions, hardware-implemented state machine, and / or any combination thereof of one or more of the Hall effect sensor circuit systems 200, 300, 400, 460, and 500.

[0096] In addition, although reference Figures 6 to 9 The flowchart shown illustrates the operation of the example circuit, but an implementation can be used instead. Figures 2 to 5 Many other methods exist for Hall effect sensor circuit systems 200, 300, 400, 460, and 500. For example, the execution order of the blocks can be changed, and / or some of the described blocks can be changed, eliminated, or combined.

[0097] Based on the foregoing, example methods, apparatus, and articles have been described to improve the accuracy and / or efficiency of current-limiting circuit systems. The described methods, apparatus, and articles utilize diode-connected devices, current sources, and comparators to improve the accuracy and / or efficiency of current-limiting circuit systems.

[0098] Although certain example methods, apparatuses, and articles have been described, the scope of this patent is not limited thereto. Rather, this patent covers all methods, apparatuses, and articles that fall entirely within the scope of the claims of this patent.

[0099] When identifying multiple elements or components that can be individually mentioned, descriptive terms such as “first,” “second,” “third,” etc., are used herein. Unless otherwise specified or known based on the context of their use, such descriptive terms do not imply any priority, physical order, arrangement in a list, or chronological order, but are merely markers for individually mentioning multiple elements or components to facilitate understanding of the described examples. In some examples, the descriptive term “first” may be used to refer to an element in a particular embodiment, while the same element may be referred to in the claims by different descriptive terms such as “second” or “third.” In such cases, such descriptive terms are used solely for ease of reference to multiple elements or components.

[0100] In this specification and in the claims, unless otherwise stated, the terms "comprising" and "having," and their variations, are intended to be inclusive in a manner similar to the term "comprising." Unless otherwise stated, "about," "approximately," or "substantially" preceding a value means + / - 10% of the stated value. In another example, "about," "approximately," or "substantially" preceding a value means + / - 5% of the stated value. In yet another example, "about," "approximately," or "substantially" preceding a value means + / - 1% of the stated value.

[0101] As used herein, the terms “coupled,” “couples,” and variations thereof may cover connections, communication, or signaling paths that ensure functional relationships are consistent with this specification. For example, if device A generates a signal to control device B to perform an action, then: in a first example, device A is coupled to device B; or in a second example, device A is coupled to device B via an intermediate component C, provided that the intermediate component C substantially does not alter the functional relationship between device A and device B, such that device B is controlled by device A via a control signal generated by device A. Furthermore, the terms “coupled,” “couples,” and variations thereof include indirect or direct electrical or mechanical connections.

[0102] As used herein, the terms “calibration,” “calibrate,” “calibrates,” and their variations are interchangeable with the terms “compensation,” “compensate,” “compensates,” and their variations.

[0103] A device “configured” to perform a task or function may be configured (e.g., programmed and / or hardwired) to perform the function during manufacturing by the manufacturer, and / or may be configured (or reconfigurable) by the user after manufacturing to perform the function and / or other additional or alternative functions. The configuration may be achieved through firmware and / or software programming of the device, through the construction and / or layout of the device’s hardware components and interconnects, or a combination thereof.

[0104] Although not in Figures 1A to 5 All are individually labeled, but the components or elements of the systems and circuits shown herein have one or more conductors or ends that allow signals to enter or exit the component or element. Conductors or ends (or portions thereof) may be referred to herein as pins, pads, terminals (e.g., including input terminals, output terminals, reference terminals, and ground terminals), inputs, outputs, nodes, and interconnects.

[0105] As used herein, a “terminal” of a component, device, system, circuit, integrated circuit, or other electronic or semiconductor component is typically a conductor, such as a wire, trace, pin, pad, or other connector or interconnect, that enables the component, device, system, etc., to be electrically connected and / or mechanically connected to another component, device, system, etc. For example, a terminal may be used to receive or provide analog or digital electrical signals (or signals only), or to be electrically connected to a common or ground reference. Thus, an input terminal or input is used to receive signals from another component, device, system, etc. An output terminal or output is used to provide signals to another component, device, system, etc. Other terminals may be used to connect to a common, ground, or voltage reference, such as a reference terminal or ground terminal. Terminals on an IC or PCB may also be referred to as pins (vertical conductors) or pads (planar conductors). A node is a connection point or interconnect of two or more terminals. An example number of terminals and nodes may be shown. However, depending on the specific circuit or system topology, there may be more or fewer terminals and nodes. However, in some cases, the terms “terminal,” “node,” “interconnect,” “pad,” and “pin” are used interchangeably.

[0106] Modifications are possible in the described examples, and other examples are possible within the scope of the claims.

Claims

1. A circuit comprising: A first Hall effect sensor has a first terminal, a second terminal, and a third terminal; A first amplifier has a first input terminal, a second input terminal, a third input terminal, and an output terminal. The first input terminal of the first amplifier is coupled to the first terminal of the first Hall effect sensor, and the second input terminal of the first amplifier is coupled to the second terminal of the first Hall effect sensor. The second Hall effect sensor has a first terminal, a second terminal, and a third terminal; The second amplifier has a first input terminal, a second input terminal and an output terminal, wherein the first input terminal of the second amplifier is coupled to the first terminal of the second Hall effect sensor, and the second input terminal of the second amplifier is coupled to the second terminal of the second Hall effect sensor. A subtractor circuit system having a first input terminal, a second input terminal, and an output terminal, wherein the first input terminal of the subtractor circuit system is coupled to the output terminal of a first amplifier, and the second input terminal of the subtractor circuit system is coupled to the output terminal of a second amplifier; An offset reduction circuit system has a first input terminal, a second input terminal, and an output terminal. The first input terminal of the offset reduction circuit system is coupled to the output terminal of a first amplifier and the first input terminal of a subtractor circuit system. The second input terminal of the offset reduction circuit system is coupled to the output terminal of a second amplifier and the second input terminal of the subtractor circuit system. The output terminal of the offset reduction circuit system is coupled to the third input terminal of the first amplifier. as well as A gain calibration circuit system has an input terminal, a first output terminal, and a second output terminal. The input terminal of the gain calibration circuit system is coupled to the output terminal of the subtractor circuit system. The first output terminal of the gain calibration circuit system is coupled to the third terminal of the first Hall effect sensor. The second output terminal of the gain calibration circuit system is coupled to the third terminal of the second Hall effect sensor.

2. The circuit of claim 1, wherein the offset reduction circuit system is configured to reduce the offset of the first Hall effect sensor.

3. The circuit of claim 1, wherein the gain calibration circuit system is configured to determine a change in the gain of at least one of the first Hall effect sensor or the second Hall effect sensor.

4. The circuit of claim 3, wherein the gain calibration circuit system is configured to adjust the bias current for at least one of the first Hall effect sensor or the second Hall effect sensor based on the change in gain.

5. The circuit of claim 4, further comprising a switching network to adjust which terminal of the second Hall effect sensor the bias current is applied to.

6. The circuit of claim 1, further comprising a third amplifier having an input terminal and an output terminal, the input terminal of the third amplifier being coupled to the output terminal of the first amplifier.

7. The circuit of claim 1, further comprising an overcurrent detection circuit system having an input terminal coupled to the output terminal of the first amplifier.

8. The circuit of claim 1, further comprising a buffer, wherein the output terminal of the first amplifier is coupled via the buffer to the second input terminal of the subtractor circuit system.

9. The circuit of claim 1, wherein the gain calibration circuit system comprises: An analog-to-digital converter having an input terminal and an output terminal, wherein the input terminal of the analog-to-digital converter is coupled to the output terminal of the subtractor circuit system; A digital circuit system having input terminals and output terminals, wherein the input terminals of the digital circuit system are coupled to the output terminals of the analog-to-digital converter; as well as A digital-to-analog converter (DAC) having an input terminal, a first output terminal, and a second output terminal, wherein the input terminal of the DAC is coupled to the output terminal of the digital circuit system, the first output terminal of the DAC is coupled to the third terminal of the first Hall effect sensor, and the second output terminal of the DAC is coupled to the third terminal of the second Hall effect sensor.

10. A circuit comprising: A first Hall effect sensor has a first terminal, a second terminal, and a third terminal; A first amplifier has a first input terminal, a second input terminal, a third input terminal, and an output terminal. The first input terminal of the first amplifier is coupled to the first terminal of the first Hall effect sensor, and the second input terminal of the first amplifier is coupled to the second terminal of the first Hall effect sensor. The second Hall effect sensor has a first terminal, a second terminal, and a third terminal; The second amplifier has a first input terminal, a second input terminal and an output terminal, wherein the first input terminal of the second amplifier is coupled to the first terminal of the second Hall effect sensor, and the second input terminal of the second amplifier is coupled to the second terminal of the second Hall effect sensor. as well as An offset reduction circuit system has a first input terminal, a second input terminal, and an output terminal, wherein the first input terminal of the offset reduction circuit system is coupled to the output terminal of a first amplifier, the second input terminal of the offset reduction circuit system is coupled to the output terminal of a second amplifier, and the output terminal of the offset reduction circuit system is coupled to the third input terminal of the first amplifier.

11. The circuit of claim 10, wherein the offset reduction circuit system is configured to reduce the offset of the first Hall effect sensor.

12. The circuit of claim 10, wherein the offset reduction circuit system is configured to reduce flickering caused by rotating the second Hall effect sensor.

13. The circuit of claim 10, further comprising a third amplifier having an input terminal and an output terminal, the input terminal of the third amplifier being coupled to the output terminal of the first amplifier.

14. The circuit of claim 10, further comprising a first resistor and a second resistor, wherein the output terminal of the first amplifier is coupled to the first input terminal of the offset reduction circuit system via the first resistor, and the output terminal of the second amplifier is coupled to the second input terminal of the offset reduction circuit system via the second resistor.

15. The circuit of claim 10, wherein the offset reduction circuit system comprises an integrator circuit system.

16. The circuit of claim 10, wherein the offset reduction circuit system comprises: An analog-to-digital converter having a first input terminal, a second input terminal, and an output terminal, wherein the first input terminal of the analog-to-digital converter is coupled to the output terminal of a first amplifier, and the second input terminal of the analog-to-digital converter is coupled to the output terminal of a second amplifier; A digital circuit system having input terminals and output terminals, wherein the input terminals of the digital circuit system are coupled to the output terminals of the analog-to-digital converter; as well as A digital-to-analog converter having an input terminal and an output terminal, the input terminal of the digital-to-analog converter being coupled to the output terminal of the digital circuit system, and the output terminal of the digital-to-analog converter being coupled to the third input terminal of the first amplifier.

17. An apparatus comprising: A non-rotating Hall effect sensor with an output; A first amplifier has a first input coupled to the output of the non-rotating Hall effect sensor, and has a second input and an output; A rotating Hall effect sensor with an output; A second amplifier having an input coupled to the output of the rotating Hall effect sensor and having an output; and An offset reduction circuit system having a first input coupled to the output of a first amplifier, a second input coupled to the output of a second amplifier, and an output coupled to the second input of the first amplifier, and configured to: A first signal is received at the output of the first amplifier and a second signal is received at the output of the second amplifier, the first signal having an offset responsive to the offset of the non-rotating Hall effect sensor; and An offset reduction signal is generated at the output of the offset reduction circuit system.

18. The device of claim 17, further comprising: A coil configured to generate a magnetic signal near the rotating Hall effect sensor, the second signal including the effect from the magnetic signal; A subtractor circuit system configured to generate a coil signal by subtracting the first signal from the second signal, wherein the coil signal varies in response to a gain change of the rotating Hall effect sensor; and A gain calibration circuit system configured to adjust the bias current for at least one of the non-rotating Hall effect sensor or the rotating Hall effect sensor based on the coil signal.

19. The device of claim 17, wherein the offset reduction circuitry is configured to generate the offset reduction signal based on the integration of the first signal and the second signal with respect to time.

20. The device of claim 17, further comprising an overcurrent detection circuit system configured to detect a current higher than a threshold, wherein the current is based on the first signal.

21. The device of claim 17, wherein the offset reduction circuitry is configured to provide the offset reduction circuitry to the second input of the first amplifier such that the input offset voltage of the first amplifier is adjusted to reduce the offset of the first signal.

22. A circuit comprising: A first Hall effect sensor has a first terminal, a second terminal, and a third terminal; A first amplifier has a first input terminal, a second input terminal, and an output terminal, wherein the first input terminal of the first amplifier is coupled to the first terminal of the first Hall effect sensor, and the second input terminal of the first amplifier is coupled to the second terminal of the first Hall effect sensor. The second Hall effect sensor has a first terminal, a second terminal, and a third terminal; The second amplifier has a first input terminal, a second input terminal and an output terminal, wherein the first input terminal of the second amplifier is coupled to the first terminal of the second Hall effect sensor, and the second input terminal of the second amplifier is coupled to the second terminal of the second Hall effect sensor. A subtractor circuit system having a first input terminal, a second input terminal, and an output terminal, wherein the first input terminal of the subtractor circuit system is coupled to the output terminal of a first amplifier, and the second input terminal of the subtractor circuit system is coupled to the output terminal of a second amplifier; as well as A gain calibration circuit system has an input terminal, a first output terminal, and a second output terminal. The input terminal of the gain calibration circuit system is coupled to the output terminal of the subtractor circuit system. The first output terminal of the gain calibration circuit system is coupled to the third terminal of the first Hall effect sensor. The second output terminal of the gain calibration circuit system is coupled to the third terminal of the second Hall effect sensor.

23. The circuit according to claim 22, wherein: The first signal at the output terminal of the subtractor circuit system corresponds to the gain of at least one of the first Hall effect sensor or the second Hall effect sensor. The second signal at the first output terminal of the gain calibration circuit system corresponds to the amount of bias current to be applied to the first Hall effect sensor; and The third signal at the second output terminal of the gain calibration circuit system corresponds to the amount of bias current to be applied to the second Hall effect sensor, and the circuit further includes a switching network to adjust which terminal of the second Hall effect sensor the bias current is applied to.

24. The circuit of claim 22, further comprising a third amplifier having an input terminal and an output terminal, the input terminal of the third amplifier being coupled to the output terminal of the first amplifier.

25. The circuit of claim 22, further comprising an overcurrent detection circuit system, the overcurrent detection circuit system including an input terminal coupled to the output terminal of the first amplifier.

26. The circuit of claim 22, wherein the gain calibration circuit system comprises: An analog-to-digital converter having an input terminal and an output terminal, wherein the input terminal of the analog-to-digital converter is coupled to the output terminal of the subtractor circuit system; A digital circuit system having input terminals and output terminals, wherein the input terminals of the digital circuit system are coupled to the output terminals of the analog-to-digital converter; as well as A digital-to-analog converter (DAC) having an input terminal, a first output terminal, and a second output terminal, wherein the input terminal of the DAC is coupled to the output terminal of the digital circuit system, the first output terminal of the DAC is coupled to the third terminal of the first Hall effect sensor, and the second output terminal of the DAC is coupled to the third terminal of the second Hall effect sensor.

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