Photodetector and electronic device

Abstract

A photodetector according to an embodiment of the present disclosure includes a first photoelectric conversion element, a first readout circuit, a second photoelectric conversion element, a second readout circuit, and an electrical conductor. The first photoelectric conversion element photoelectrically converts light. The first readout circuit includes a first transistor disposed on a first surface side of the first semiconductor layer, and is configured to output a first signal based on a charge obtained by conversion by the first photoelectric conversion element. The second photoelectric conversion element photoelectrically converts light. The second readout circuit includes a second transistor disposed on a first surface side of the first semiconductor layer and adjacent to the first transistor, and is configured to output a second signal based on a charge obtained by conversion by the second photoelectric conversion element. An electrical conductor is disposed between the first transistor and the second transistor.

Description

Technical Field

[0001] This invention relates to photodetectors and electronic devices. Background Technology

[0002] An imaging device has been proposed, which includes a first substrate on which photodiodes are disposed and a second substrate on which pixel circuits are disposed (see Patent Document 1). Citation List Patent documents

[0003] Patent Document 1: International Publication No. W02022 / 138914 Summary of the Invention

[0004] For devices that detect light, it is necessary to minimize the degradation of signal quality.

[0005] The goal is to provide a photodetector that can suppress signal quality degradation.

[0006] A photodetector according to an embodiment of the present invention includes a first photoelectric conversion element, a first readout circuit, a second photoelectric conversion element, a second readout circuit, and an electrical conductor. The first photoelectric conversion element performs photoelectric conversion on light. The first readout circuit includes a first transistor disposed on a first surface side of a first semiconductor layer, and is configured to output a first signal based on the charge obtained by the conversion of the first photoelectric conversion element. The second photoelectric conversion element performs photoelectric conversion on light. The second readout circuit includes a second transistor disposed on the first surface side of the first semiconductor layer and adjacent to the first transistor, and is configured to output a second signal based on the charge obtained by the conversion of the second photoelectric conversion element. An electrical conductor is disposed between the first transistor and the second transistor. A photodetector according to an embodiment of the present disclosure includes a first photoelectric conversion element, a first readout circuit, a second photoelectric conversion element, a second readout circuit, and an insulator. The first photoelectric conversion element performs photoelectric conversion on light. The first readout circuit includes a first transistor disposed on a first surface side of a first semiconductor layer, configured to output a first signal based on a charge obtained by the conversion of the first photoelectric conversion element. The second photoelectric conversion element performs photoelectric conversion on light. The second readout circuit includes a second transistor disposed on a first surface side of the first semiconductor layer and adjacent to the first transistor, configured to output a second signal based on a charge obtained by the conversion of the second photoelectric conversion element. An insulator is disposed in the first semiconductor layer between the first transistor and the second transistor. An electronic device according to an embodiment of the present invention includes an optical system and a photodetector. The photodetector receives light transmitted through the optical system, wherein the photodetector includes: a first photoelectric conversion element that performs photoelectric conversion on the light; a first readout circuit including a first transistor disposed on a first surface side of a first semiconductor layer, the first readout circuit being configured to output a first signal based on a charge obtained by the conversion of the first photoelectric conversion element; a second photoelectric conversion element that performs photoelectric conversion on the light; a second readout circuit including a second transistor disposed on the first surface side of the first semiconductor layer and adjacent to the first transistor, the second readout circuit being configured to output a second signal based on a charge obtained by the conversion of the second photoelectric conversion element; and an electrical conductor disposed between the first transistor and the second transistor. Attached Figure Description

[0007] Figure 1 This is a block diagram illustrating a schematic construction example of an imaging apparatus that serves as an example of a photodetector according to a first embodiment of the present disclosure. Figure 2 This is a diagram showing an example of the pixel portion of an imaging apparatus according to a first embodiment of the present invention. Figure 3 This is a diagram illustrating an example of the circuit structure of a pixel in an imaging apparatus according to a first embodiment of the present disclosure. Figure 4 This is a diagram illustrating an example of the cross-sectional structure of an imaging apparatus according to a first embodiment of the present disclosure. Figure 5A This is a diagram illustrating an example of a planar structure of an imaging apparatus according to a first embodiment of the present disclosure. Figure 5B This is a diagram illustrating an example of a planar structure of an imaging apparatus according to a first embodiment of the present disclosure. Figure 5C This is a diagram illustrating an example of the cross-sectional structure of a pixel in an imaging apparatus according to a first embodiment of the present disclosure. Figure 5D This is a diagram illustrating another example of the cross-sectional structure of the pixels of the imaging apparatus according to the first embodiment of this disclosure. Figure 5E This is a diagram illustrating another example of the cross-sectional structure of the pixels of the imaging apparatus according to the first embodiment of this disclosure. Figure 5F This is a diagram illustrating another example of the cross-sectional structure of the pixels of the imaging apparatus according to the first embodiment of this disclosure. Figure 5G This is a diagram illustrating another example of the cross-sectional structure of the pixels of the imaging apparatus according to the first embodiment of this disclosure. Figure 6A This is a diagram illustrating an example of the construction of an imaging apparatus according to a variation of this disclosure, Example 1. Figure 6BThis is a diagram illustrating another construction example of the imaging apparatus according to Modification 1 of this disclosure. Figure 7 This is a diagram illustrating an example of the construction of an imaging apparatus according to a variation of this disclosure, Example 2. Figure 8A This is a diagram illustrating an example of the construction of an imaging apparatus according to a variation of this disclosure, Example 3. Figure 8B This is a diagram illustrating an example of the construction of the imaging device of Modification 3 of this disclosure. Figure 9 This is a diagram illustrating an example of the construction of an imaging apparatus according to a variation of this disclosure, Example 4. Figure 10 This is a diagram illustrating an example of the construction of an imaging apparatus according to Modification 5 of this disclosure. Figure 11 This is a diagram illustrating an example of the construction of an imaging apparatus according to a variation of this disclosure, Example 6. Figure 12 This is a diagram illustrating another construction example of the imaging apparatus according to Modification 6 of this disclosure. Figure 13 This is a diagram illustrating another construction example of the imaging apparatus according to Modification 6 of this disclosure. Figure 14 This is a diagram illustrating an example of the construction of an imaging apparatus according to a variation of this disclosure, Example 7. Figure 15 This is a diagram illustrating an example of the construction of an imaging apparatus according to Modification 8 of this disclosure. Figure 16 This is a diagram illustrating an example of the construction of an imaging apparatus according to a variation of this disclosure, Example 9. Figure 17 This is a diagram illustrating an example of the cross-sectional structure of an imaging apparatus according to a second embodiment of the present disclosure. Figure 18 This is a diagram illustrating an example of the construction of an imaging apparatus according to a second embodiment of the present disclosure. Figure 19 This is a diagram illustrating an example of the construction of an imaging apparatus according to a second embodiment of the present disclosure. Figure 20 This is a diagram illustrating an example of the construction of an imaging apparatus according to a second embodiment of the present disclosure. Figure 21 This is a diagram illustrating an example of the construction of an imaging apparatus according to a second embodiment of the present disclosure. Figure 22A This is a diagram illustrating an example of the construction of an imaging apparatus according to a variation of this disclosure, Example 10. Figure 22B This is a diagram illustrating an example of the construction of an imaging apparatus according to a variation of this disclosure, Example 10. Figure 23This is a diagram illustrating an example of the cross-sectional structure of an imaging apparatus according to a third embodiment of the present disclosure. Figure 24A This is a diagram illustrating an example of the construction of an imaging apparatus according to a third embodiment of the present disclosure. Figure 24B This is a diagram illustrating an example of the construction of an imaging apparatus according to a third embodiment of the present disclosure. Figure 25A This is a diagram illustrating another construction example of an imaging apparatus according to a third embodiment of the present disclosure. Figure 25B This is a diagram illustrating another construction example of an imaging apparatus according to a third embodiment of the present disclosure. Figure 26 This is a block diagram illustrating an example of the construction of an electronic device including an imaging apparatus. Figure 27 This is a block diagram illustrating a schematic example of the construction of a vehicle control system. Figure 28 This diagram illustrates the installation locations of the vehicle exterior information detection unit and the imaging unit. Figure 29 This is a diagram illustrating a schematic example of the construction of an endoscopic surgical system. Figure 30 This is a block diagram illustrating an example of the functional structure of a camera and camera control unit (CCU). Detailed Implementation

[0008] The embodiments of this disclosure will now be described in detail with reference to the accompanying drawings. Note that the description will proceed in the following order. 1. First Embodiment 2. Second Embodiment 3. Third Embodiment 4. Application Examples 5. Practical Application Examples <1. First Embodiment>

[0009] Figure 1 This is a block diagram illustrating a schematic example of the construction of an imaging apparatus as a photodetector according to a first embodiment of the present disclosure. Figure 2 This is a diagram illustrating an example of the pixel portion of an imaging apparatus according to a first embodiment of the present disclosure. The imaging apparatus 1 is a photodetector that includes a plurality of pixels P, each pixel P containing a photoelectric conversion unit (photoelectric conversion element) and configured to generate a signal by photoelectric conversion of incident light. The imaging apparatus 1 (photodetector) can receive light transmitted through an optical system (not shown) including an optical lens and generate a signal.

[0010] Imaging device 1 includes, for example, a semiconductor substrate (e.g., a silicon substrate) on which a plurality of pixels P are disposed. Each pixel P of imaging device 1 has a photoelectric conversion unit, for example, a photodiode (PD), configured to perform photoelectric conversion of light. Figure 2 As shown, the imaging device 1 includes an imaging region (pixel section 100), in which a plurality of pixels P are arranged in a two-dimensional matrix. The pixel section 100 is a pixel array in which a plurality of pixels P are arranged, and may also be referred to as a light receiving region. Imaging device 1 acquires incident light (image light) from a subject through an optical system including optical lenses. Imaging device 1 captures an image of the subject formed by the optical lenses. Imaging device 1 can generate pixel signals by photoelectric conversion of the received light. Imaging device 1 is, for example, a complementary metal-oxide-semiconductor (CMOS) image sensor. Imaging device 1 can be used in electronic devices such as digital cameras, video cameras, and mobile phones.

[0011] Note that, as Figure 2 As shown, the direction of light incident from the subject is the Z-axis, the left-right direction relative to the observer and orthogonal to the Z-axis is the X-axis, and the perpendicular direction relative to the observer and orthogonal to the Z-axis is the Y-axis. The relevant directions in the subsequent figures can be referenced. Figure 2 The arrows indicate the direction of the arrows.

[0012] like Figure 1 As shown in the example, the imaging apparatus 1 includes, for example, a pixel driving unit 111, a signal processing unit 112, a control unit 113, and a processing unit 114 located in the peripheral region of the pixel unit 100 (pixel array). The imaging apparatus 1 is also provided with multiple control lines Lread and multiple signal lines VSL.

[0013] The control line Lread is a signal line capable of transmitting signals for controlling pixel P, and is connected to pixel P in the pixel driver unit 111 and the pixel unit 100. Figure 1 In the example shown, in the pixel section 100, there are multiple control lines Lread for each pixel row wiring comprising a plurality of pixels P arranged in the horizontal direction (row direction). The control lines Lread are configured to transmit control signals for reading signals from the pixels P.

[0014] The imaging device 1 has multiple control lines Lread for each pixel row, including, for example, lines for transmitting signals to control transmission transistors, lines for transmitting signals to control selection transistors, and lines for transmitting signals to control reset transistors. The control lines Lread can also be referred to as drive lines (pixel drive lines) for transmitting signals to drive pixel P.

[0015] The signal line VSL is a signal line capable of transmitting signals from the pixel P and connected to the pixel P of the pixel unit 100 and the signal processing unit 112. In the pixel unit 100, for example, one or more signal lines VSL are provided for each pixel column line including a plurality of pixels P arranged in the vertical direction (column direction).

[0016] The signal line VSL is a vertical signal line configured to transmit the signal output from pixel P. In the imaging apparatus 1, multiple signal lines VSL can be provided for a single pixel column. The imaging apparatus 1 can include multiple signal lines VSL for each pixel column.

[0017] The pixel driving unit 111 is configured to drive each pixel P of the pixel unit 100. The pixel driving unit 111 is a driving circuit and includes multiple circuits, such as buffers, shift registers, and address decoders. The pixel driving unit 111 generates signals for driving the pixels P and outputs these signals to each pixel P of the pixel unit 100 via control lines Lread. The pixel driving unit 111 is controlled by the control unit 113 and controls the pixels P of the pixel unit 100.

[0018] The pixel driving unit 111 generates signals for controlling pixels P (e.g., signals for controlling the transmission transistor of pixel P, signals for controlling the selection transistor of pixel P, and signals for controlling the reset transistor of pixel P), and provides these signals to each pixel P via the control line Lread. The pixel driving unit 111 can control the pixel signal reading of each pixel P. The pixel driving unit 111 can also be referred to as a pixel control unit, and is configured to control each pixel P. Note that the pixel driving unit 111 and the control unit 113 can also be collectively referred to as the pixel control unit.

[0019] The signal processing unit 112 is configured to perform signal processing on the input pixel signal. The signal processing unit 112 is a signal processing circuit and includes, for example, a load circuit, an analog-to-digital (AD) converter, and a level selection switch. Note that the signal processing unit 112 may include an amplifier circuit configured to amplify the signal read from pixel P via signal line VSL.

[0020] The signal output from each pixel P by the selective scanning of the pixel driving unit 111 is input to the signal processing unit 112 via the signal line VSL. The signal processing unit 112 can perform signal processing on the signal from the pixel P, such as AD conversion and correlated double sampling (CDS). The signal transmitted from each pixel P via the corresponding signal line VSL is processed in the signal processing unit 112 and output to the processing unit 114.

[0021] Processing unit 114 is configured to perform signal processing on the input signal. Processing unit 114 is a signal processing circuit and includes, for example, circuitry for performing various signal processing operations on the pixel signal. Processing unit 114 may include a processor and a memory. Processing unit 114 processes the pixel signal input from signal processing unit 112 and outputs the processed pixel signal. Processing unit 114 may perform various types of signal processing, such as noise reduction processing or grayscale correction processing.

[0022] The control unit 113 is configured to control the various components of the imaging device 1. The control unit 113 can receive clock signals, data indicating operating modes, and other data provided from an external source, and output data such as internal information related to the imaging device 1. The control unit 113 is a control circuit and includes, for example, a timing generator configured to generate various timing signals.

[0023] The control unit 113 drives and controls the pixel driving unit 111 and the signal processing unit 112, etc., based on various timing signals (e.g., pulse signals and clock signals) generated by the timing generator. Note that the control unit 113 and the processing unit 114 can be constructed as a single unit.

[0024] The pixel driving unit 111, signal processing unit 112, control unit 113, and processing unit 114 may be disposed on a single semiconductor substrate, or may be disposed on multiple semiconductor substrates respectively. The imaging device 1 may have a structure formed by stacking multiple substrates (stacked structure).

[0025] Figure 3 This is a schematic diagram illustrating an example of the circuit structure of a pixel in the imaging apparatus according to the first embodiment. Each pixel P of the imaging apparatus 1 includes a photoelectric conversion unit 12 (photoelectric conversion element), a transmission transistor TRG, a floating diffuser FD, and a readout circuit 20. The photoelectric conversion unit 12 is configured to receive light and generate a signal. The photoelectric conversion unit 12 is a light receiver (light receiving element) and is configured to generate charge through photoelectric conversion.

[0026] The readout circuit 20 is configured to output a signal based on the charge obtained by photoelectric conversion. In the imaging device 1, the readout circuit 20 is provided for multiple pixels P. The imaging device 1 has a configuration that allows multiple pixels P to share a single readout circuit 20.

[0027] exist Figure 3 In the example shown, a readout circuit 20 is provided for each group of four pixels P (pixels Pa to Pd). Pixels Pa, Pb, Pc, and Pd share a single readout circuit 20. For example, 2×2 pixels including adjacent pixels Pa to Pd share a single readout circuit 20.

[0028] Imaging device 1 can read out the pixel signal of each of the 2×2 pixels by operating readout circuit 20 in a time-division manner. Imaging device 1 can also read out the pixel signal obtained by adding the signals of the 2×2 pixels together. Note that imaging device 1 can be configured to allow more than five pixels P (e.g., eight pixels P) to share a single readout circuit 20.

[0029] exist Figure 3 In the example shown, the photoelectric conversion unit 12 is a photodiode (PD) that converts incident light into electrical charge. The photoelectric conversion unit 12 ( Figure 3 In this process, the photodiode PD of pixel Pa to the photodiode PD of pixel Pd perform photoelectric conversion based on the amount of received light to generate charge.

[0030] Transmission transistor TRG ( Figure 3 In this configuration, the transfer transistors TRG1 (pixel Pa) to TRG4 (pixel Pd) are configured to transfer the charge obtained through photoelectric conversion in the photoelectric conversion unit 12 to the floating diffusion unit FD. The transfer transistors TRG are controlled by the signal STRG and electrically connect or disconnect the photoelectric conversion unit 12 from the floating diffusion unit FD. The transfer transistors TRG can transfer the charge obtained and accumulated through photoelectric conversion in the photoelectric conversion unit 12 to the floating diffusion unit FD.

[0031] exist Figure 3 In the example shown, the transfer transistors TRG for each pixel Pa to Pd are controlled by different signals. The transfer transistor TRG1 for pixel Pa is controlled by signal STRG1, and the transfer transistor TRG2 for pixel Pb is controlled by signal STRG2. The transfer transistor TRG3 for pixel Pc is controlled by signal STRG3, and the transfer transistor TRG4 for pixel Pd is controlled by signal STRG4.

[0032] The floating diffuser FD is an accumulator and is configured to accumulate the transferred charge. The floating diffuser FD can accumulate the charge obtained through photoelectric conversion in the photoelectric conversion unit 12. The floating diffuser FD can also be called a holder, and it is configured to hold the transferred charge. The floating diffuser FD accumulates the transferred charge and converts it into a voltage corresponding to the capacitance of the floating diffuser FD.

[0033] like Figure 3 As shown, the readout circuit 20 includes, for example, an amplifying transistor AMP, a selection transistor SEL, a transistor FDG, and a reset transistor RST. The amplifying transistor AMP is configured to generate and output a signal based on the charge accumulated in the floating diffuser FD. Figure 3 As shown, the gate of the amplifying transistor AMP is electrically connected to the floating diffuser FD and receives the voltage converted by the floating diffuser FD as input.

[0034] The drain of the amplifying transistor AMP is connected to the power supply line supplied with the power supply voltage VDD, and the source of the amplifying transistor AMP is connected to the signal line VSL through the select transistor SEL. The amplifying transistor AMP can generate a signal based on the charge accumulated in the floating diffuser FD, that is, a signal based on the voltage of the floating diffuser FD, and output it to the signal line VSL. The amplifying transistor AMP is configured to generate a signal based on the charge converted in the photoelectric conversion unit 12.

[0035] The selector transistor SEL is configured to control the signal output of the pixel. The selector transistor SEL is controlled by the signal SSEL and is configured to output the signal from the amplifying transistor AMP to the signal line VSL. The selector transistor SEL can control the output timing of the pixel signal. The selector transistor SEL is configured to output a signal based on the charge converted in the photoelectric conversion unit 12. The selector transistor SEL can be located between the power supply line to which the applied power supply voltage VDD is applied and the amplifying transistor AMP. The selector transistor SEL can be omitted if necessary.

[0036] Transistor FDG is configured, for example, to electrically connect the floating diffuser FD to the reset transistor RST. For instance, transistor FDG is controlled by signal SFDG, which electrically connects or disconnects the floating diffuser FD from the reset transistor RST.

[0037] When transistor FDG is turned on, the capacitance added to the floating diffuser FD of pixel P increases, and the conversion efficiency (gain) in converting charge to voltage is changed. Transistor FDG is a switching transistor that changes the conversion efficiency by switching the capacitance connected to the gate of amplifying transistor AMP.

[0038] The reset transistor RST is configured to reset the voltage of the floating diffuser FD. Figure 3 In the example shown, the reset transistor RST is electrically connected to the power line supplied with the power supply voltage VDD and is configured to reset the charge of pixel P.

[0039] The reset transistor RST is controlled by the signal SRST and can reset the charge accumulated in the floating diffuser FD and reset the voltage of the floating diffuser FD. Note that the reset transistor RST can release the charge accumulated in the photoelectric conversion section 12 through the transistor FDG and the transfer transistor TRG.

[0040] The aforementioned transfer transistor TRG, amplification transistor AMP, selection transistor SEL, transistor FDG (switching transistor), and reset transistor RST are all MOS transistors that include a gate terminal, a source terminal, and a drain terminal.

[0041] exist Figure 3In the example shown, the transfer transistor TRG, amplification transistor AMP, selection transistor SEL, transistor FDG, and reset transistor RST are NMOS transistors. The transistors of pixel P can be PMOS transistors. The transistors of pixel P (e.g., the transfer transistor TRG, amplification transistor AMP, selection transistor SEL, transistor FDG, and reset transistor RST) can be 3D transistors, such as FinFETs.

[0042] Pixel driver unit 111 (see Figure 1 The control line Lread provides control signals to the gates of the transfer transistor TRG, selection transistor SEL, transistor FDG, and reset transistor RST of each pixel P, thereby turning these transistors on (on state) or off (off state).

[0043] The imaging device 1 has multiple control lines Lread, including, for example, a line for transmitting a signal STRG for controlling the transmission transistor TRG, a line for transmitting a signal SSEL for controlling the selection transistor SEL, a line for transmitting a signal SFDG for controlling the transistor FDG, and a line for transmitting a signal SRST for controlling the reset transistor RST.

[0044] For example, the pixel driving unit 111 controls the on / off state of the transmission transistor TRG, the selection transistor SEL, the transistor FDG, and the reset transistor RST. The pixel driving unit 111 controls the readout circuit 20 of each pixel P to output the pixel signal from each pixel P to the signal line VSL. The pixel driving unit 111 can control the readout of the pixel signal of each pixel P to the signal line VSL.

[0045] Figure 4 This is a diagram illustrating an example of the cross-sectional structure of an imaging apparatus according to the first embodiment. Figure 5A and Figure 5B This is a diagram illustrating an example of a planar structure of an imaging apparatus according to the first embodiment. Figure 4 As shown, for example, the imaging device 1 includes a light guide 80, a semiconductor layer 101, a wiring layer 121, a semiconductor layer 102, a wiring layer 122, a wiring layer 123, and a semiconductor layer 103.

[0046] Figure 5A An example of the planar structure of the semiconductor layer 101 and wiring layer 121 of the imaging device 1 is shown. Figure 5BAn example planar structure of the semiconductor layer 102 and wiring layer 122 of the imaging device 1 is shown. Hereinafter, in two adjacent pixels, one pixel (e.g., the left pixel) and the other pixel (e.g., the right pixel) may be referred to as pixel P1 and pixel P2, respectively. Note that when multiple pixels (e.g., pixels Pa to Pd) share the readout circuit 20, pixel P1 (or pixel P2) corresponds to multiple pixels and may also be referred to as a pixel unit (or pixel block) containing multiple pixels.

[0047] like Figure 4 As shown, for example, the imaging device 1 has the following structure: a light guide 80, a semiconductor layer 101, a wiring layer 121, a semiconductor layer 102, a wiring layer 122, a wiring layer 123, and a semiconductor layer 103 are stacked along the Z-axis direction. Starting from the side where light is incident, the light guide 80, semiconductor layer 101, wiring layer 121, semiconductor layer 102, wiring layer 122, wiring layer 123, and semiconductor layer 103 are arranged sequentially.

[0048] Semiconductor layers 101, 102, and 103 are all semiconductor substrates (e.g., silicon substrates or silicon-on-insulator (SOI) substrates). For example, semiconductor layer 102 may be a silicon layer on a buried oxide (BOX) in an SOI substrate.

[0049] Semiconductor layer 101 and wiring layer 121 can also be referred to as the first substrate. Semiconductor layer 102 and wiring layer 122 can also be referred to as the second substrate. Semiconductor layer 103 and wiring layer 123 can also be referred to as the third substrate.

[0050] like Figure 4 As shown, semiconductor layer 101 includes a first surface 11S1 and a second surface 11S2 that are opposite to each other. The second surface 11S2 is the surface opposite to the first surface 11S1. The first surface 11S1 of semiconductor layer 101 is a light-receiving surface (light-incident surface). The second surface 11S2 of semiconductor layer 101 is a device forming surface on which devices such as transistors are formed.

[0051] For example, a gate electrode and a gate insulating film (e.g., a gate oxide film) can be disposed on the second surface 11S2 of the semiconductor layer 101. Figure 4 The transmission transistors TRG for pixels P1 and P2 are shown. The transmission transistors TRG are formed on the second surface 11S2 side of the semiconductor layer 101.

[0052] exist Figure 4In the example shown, the light guide portion 80 is disposed on the first surface 11S1 side of the semiconductor layer 101. The wiring layer 121 is disposed on the second surface 11S2 side of the semiconductor layer 101. The light guide portion 80 is disposed on the side where light is incident from the optical system, and the wiring layer 121 is disposed on the opposite side of the light incident side.

[0053] In the semiconductor layer 101, a plurality of photoelectric conversion units 12 (photoelectric conversion elements) are provided along the first surface 11S1 and the second surface 11S2 of the semiconductor layer 101. For example, the plurality of photoelectric conversion units 12 are embedded in the semiconductor layer 101.

[0054] Wiring layer 121, for example, has a conductor film and an insulating film, and includes multiple wirings and vertical interconnects (vias). Wiring layer 121 has a structure consisting of multiple wirings stacked with an insulating film in between. The insulating film of wiring layer 121 may also be referred to as an interlayer insulating film (interlayer insulating layer).

[0055] The wiring of wiring layer 121 may include, for example, metallic materials such as aluminum (Al), copper (Cu), or tungsten (W). The wiring of wiring layer 121 may include polysilicon (Poly-Si) or other conductive materials. The interlayer insulating film may include, for example, silicon oxide (SiO), silicon nitride (SiN), or silicon oxynitride (SiON).

[0056] A light guide portion 80 is stacked on the semiconductor layer 101 along a thickness direction orthogonal to the first surface 11S1 of the semiconductor layer 101. The light guide portion 80 includes a lens 81 and a filter 82, and guides incident light toward the semiconductor layer 101. The photoelectric conversion portion 12 performs photoelectric conversion on the light incident through the lens 81 and the filter 82.

[0057] Lens 81 is an optical component, also known as an on-chip lens. Lens 81 (lens section) is disposed, for example, on the first surface 11S1 side of semiconductor layer 101 for each pixel P or for each group of multiple pixels P. Light from the subject is incident on lens 81 through an optical system such as an imaging lens.

[0058] Pixel P may also include a filter 82. The filter 82 is configured to selectively transmit light within a specific wavelength range from the incident light. The filter 82 is, for example, an RGB color filter, a complementary color filter, or a filter that transmits infrared light, and is disposed between the lens 81 and the semiconductor layer 101. The filter 82 is disposed, for example, on the first surface 11S1 side of the semiconductor layer 101 for each pixel P or for each group of pixels P.

[0059] like Figure 4As shown, the semiconductor layer 102 includes a first surface 21S1 and a second surface 21S2 that are opposite to each other. The second surface 21S2 is the surface opposite to the first surface 21S1. A wiring layer 122 is disposed on the first surface 21S1 side of the semiconductor layer 102, and a wiring layer 121 is disposed on the second surface 21S2 side of the semiconductor layer 102.

[0060] The first surface 21S1 of the semiconductor layer 102 is a device formation surface on which devices such as transistors are formed. For example, a gate electrode and a gate insulating film are disposed on the first surface 21S1 of the semiconductor layer 102. Figure 4 The selection transistor SEL for pixel P1 and the amplification transistor AMP for pixel P2 are shown. The aforementioned pixel P can be disposed on the first surface 21S1 of semiconductor layer 102. Figure 4 The transistors (e.g., amplifying transistor AMP, selecting transistor SEL, transistor FDG, and reset transistor RST) of the readout circuit 20 for pixels P1 and P2 in the image.

[0061] Figure 5C This is a diagram illustrating an example of the cross-sectional structure of a pixel in an imaging apparatus according to the first embodiment. Figure 5C It shows along Figure 5B Example of pixel construction for the A-A' line. The transistors of pixel P (e.g., transmission transistor TRG, amplification transistor AMP, selection transistor SEL, transistor FDG, and reset transistor RST) have, for example, as shown below. Figure 5C The example in the diagram illustrates a planer structure. The transistors of pixel P (e.g., amplifying transistors AMP and transistor FDG) can be constructed as planar transistors, for example.

[0062] Figure 5D to 5G This is a diagram illustrating another cross-sectional construction example of the pixels of the imaging apparatus according to the first embodiment. (As shown in...) Figure 5D , 5E In the example shown in 5F, the transistor of pixel P can be constructed as a finned transistor. For example, the gate electrode 57 of the transistor of pixel P (in...) Figure 5D In this example, the gate electrode 57a of the amplifying transistor AMP and the gate electrode 57b of the transistor FDG are disposed on the first surface 21S1 side of the semiconductor layer 102 in such a way that a portion of the semiconductor layer 102 is sandwiched between them.

[0063] The gate electrode 57 of the transistor in pixel P can be configured to sandwich a portion of the semiconductor layer 102 serving as a transistor channel region, separated by a gate insulating film (not shown). For example, as in Figure 5D In the example shown, the gate electrode 57a of the amplifying transistor AMP and the gate electrode 57b of the transistor FDG can be respectively configured as the edge portion of the semiconductor layer 102.

[0064] As in Figure 5E In the example shown, the gate electrodes 57 (e.g., gate electrodes 57a and 57b) of the transistor of pixel P can be configured to be adjacent to the first surface 21S1 of the semiconductor layer 102. Furthermore, for example, as in... Figure 5F In the example shown, each of the gate electrodes 57a and 57b can be configured to reach the second surface 21S2 of the semiconductor layer 102, i.e., the wiring layer 121 side.

[0065] like Figure 5G As shown, the transistors of pixel P (e.g., transmission transistor TRG, amplification transistor AMP, selection transistor SEL, transistor FDG, and reset transistor RST) can have a structure in which the gate electrode is disposed around the channel region, i.e., a gate all around (GAA) structure.

[0066] For example, Figure 4 The wiring layers 122 and 123 shown each have, for example, a conductor film and an insulating film, and include, for example, multiple wirings and vertical interconnections. Wiring layers 122 and 123 include, for example, two or more wiring layers. Wiring layers 122 and 123 each have a structure formed by stacking multiple wirings separated by an insulating film (interlayer insulating film).

[0067] The wiring in wiring layers 122 and 123 may contain metallic materials such as aluminum (Al), copper (Cu), or tungsten (W). The wiring in wiring layers 122 and 123 may contain conductive materials such as polysilicon (Poly-Si). The interlayer insulating film may contain, for example, silicon oxide (SiO), silicon nitride (SiN), or silicon oxynitride (SiON).

[0068] Wiring layer 122 has a plurality of electrodes 95, and wiring layer 123 has a plurality of electrodes 96. Electrodes 95 and 96 are, for example, electrodes comprising copper (Cu). Electrodes 95 and 96 may also be referred to as bonding electrodes for bonding between metal electrodes. As an example, semiconductor layers 102 and 103 are bonded to each other by bonding between Cu metal electrodes (electrodes 95 and 96) (i.e., Cu-Cu bonding).

[0069] Electrodes 95 and 96 electrically connect the circuitry of semiconductor layer 102 to the circuitry of semiconductor layer 103. Semiconductor layer 103 and wiring layer 123 may, for example, house the pixel driving unit 111, signal processing unit 112, control unit 113, and processing unit 114 described above. Note that electrodes 95 and 96 may contain metal materials other than copper, such as nickel (Ni), cobalt (Co), or gold (Au). Furthermore, semiconductor layers 102 and 103 may be stacked using bumps.

[0070] Imaging device 1 includes an electrical conductor 70 disposed between the transistor of a pixel and the transistors of surrounding pixels. (As in...) Figure 4 and 5B In the example shown, the conductor 70 is disposed between the transistor of transistor P1 (one of two adjacent pixels P along the left-right (or up-down) direction) and the transistor of pixel P2 (the other pixel). For example, the conductor 70 is disposed in the semiconductor layer 102 between the transistor of the readout circuit 20 of pixel P1 and the transistor of the readout circuit 20 of pixel P2.

[0071] The electrical conductor 70 can be disposed between the transistor (selection transistor SEL or amplification transistor AMP) of pixel P1 connected to the signal line VSL and the transistor (e.g., amplification transistor AMP or transistor FDG) of pixel P2 connected to the floating diffuser FD. The electrical conductor 70 is a shielding area and is disposed in the semiconductor layer 102, for example, between the selection transistor SEL of pixel P1 and the amplification transistor AMP of pixel P2.

[0072] exist Figure 4 and 5B In the example shown, an electrical conductor 70 is formed in the semiconductor layer 102 between the semiconductor region 51 of the select transistor SEL of pixel P1 and the semiconductor region 55 of the amplifying transistor AMP of pixel P2. Semiconductor region 51 is, for example, the source region of the select transistor SEL and is electrically connected to the signal line VSL. Semiconductor region 55 is, for example, the drain region of the amplifying transistor AMP and is electrically connected to the power line supplied with the power supply voltage VDD.

[0073] The electrical conductor 70 is electrically connected, for example, to a wiring or terminal that allows a predetermined voltage to be supplied. The electrical conductor 70 can also be considered as a shielded area (shield). As an example, the electrical conductor 70 is electrically connected to a wiring that is supplied with a fixed voltage. For example, a ground voltage or power supply voltage, as a predetermined voltage (potential), can be supplied to the electrical conductor 70 through the wiring. The electrical conductor 70 is electrically connected to a grounding wire, which is, for example, a reference potential line supplied with a ground voltage (GND voltage).

[0074] The electrical conductor 70 may comprise, for example, a semiconductor material or a metallic material doped (added) with impurities. As an example, the electrical conductor 70 may comprise a single-crystal semiconductor (e.g., silicon) with a high concentration of impurities or a polycrystalline semiconductor (e.g., polycrystalline silicon) with a high concentration of impurities. Note that the electrical conductor 70 may comprise tungsten (W), titanium nitride (TiN), aluminum titanium (TiAl), tantalum nitride (TaN), copper (Cu), aluminum (Al), or other conductive materials.

[0075] If the imaging device 1 does not include the electrical conductor 70, the parasitic capacitance between adjacent pixels may increase, thereby exacerbating crosstalk. Noise caused by capacitive coupling between the floating diffuser FD and the signal line VSL may be mixed into the pixel signal, leading to a deterioration in the quality of the pixel signal. Therefore, the quality of the image generated using the pixel signal may be degraded. In particular, when the distance between pixels decreases due to pixel miniaturization, parasitic capacitance tends to increase, resulting in crosstalk and a deterioration in pixel signal quality.

[0076] Therefore, in the imaging apparatus 1 according to this embodiment, an electrical conductor 70 is provided as described above. The electrical conductor 70 is provided between the corresponding transistors of a plurality of adjacent pixels P. As a result, unnecessary parasitic capacitance formed between pixels can be reduced, thereby suppressing crosstalk. Noise entering the pixel signal can be suppressed.

[0077] [Functions and Effects] The photodetector according to this embodiment includes: a first photoelectric conversion element (photoelectric conversion section 12) that performs photoelectric conversion on light; a first readout circuit (e.g., readout circuit 20 for pixel P1) that includes a first transistor disposed on a first surface side of a first semiconductor layer, the first readout circuit being configured to output a first signal based on a charge obtained by conversion by the first photoelectric conversion element; a second photoelectric conversion element that performs photoelectric conversion on light; a second readout circuit (e.g., readout circuit 20 for pixel P2) that includes a second transistor disposed on a first surface side of a first semiconductor layer and adjacent to the first transistor, the second readout circuit being configured to output a second signal based on a charge obtained by conversion by the second photoelectric conversion element; and an electrical conductor (electrical conductor 70) disposed between the first transistor and the second transistor.

[0078] In the photodetector (imaging device 1) according to this embodiment, an electrical conductor 70 is disposed between the selection transistor SEL of pixel P1 and the amplification transistor AMP of pixel P2. This reduces unnecessary parasitic capacitance between the signal line VSL and the floating diffuser FD, thereby suppressing crosstalk. A photodetector capable of suppressing signal quality degradation can be realized.

[0079] Next, variations of this disclosure will be described. In the following, components similar to those in the above embodiments will be designated using the same reference numerals as those in the above embodiments, and their descriptions will be omitted as appropriate.

[0080] (1-1. Variation Example 1) Although the above embodiments illustrate examples of the construction of an imaging device, the construction of an imaging device is not limited to the above examples. Figure 6A and 6BThis is a schematic diagram illustrating an example of the construction of an imaging apparatus according to a variation of this disclosure, 1. The electrical conductor 70 may contain the same material as the source region (or drain region) of the transistor, or it may contain the same material as the gate electrode.

[0081] exist Figure 6A In the example shown, the electrical conductor 70 may contain the same material, such as silicon, as the source and drain regions of each transistor (e.g., an amplifying transistor AMP or a selection transistor SEL) in the readout circuit 20. The electrical conductor 70 includes impurity-doped semiconductor regions and is formed, for example, by ion implantation into the semiconductor layer 102 (silicon layer). Thus, the source and drain regions of the transistors and the electrical conductor 70 can be formed simultaneously in the manufacturing process, thereby reducing the number of steps. This can suppress increases in the manufacturing cost of the imaging device 1.

[0082] exist Figure 6B In the example shown, the electrical conductor 70 may contain the same material as the gate electrode of the transistor (e.g., the amplifying transistor AMP and the selection transistor SEL) of the readout circuit 20, such as polysilicon. Therefore, the gate electrode of the transistor and the electrical conductor 70 can be formed simultaneously in the manufacturing process, thereby reducing the number of steps. This can suppress any increase in the manufacturing cost of the imaging device 1.

[0083] (1-2. Variation Example 2) Figure 7 This is a schematic diagram illustrating an example of the construction of the imaging device according to Modification 2. For example... Figure 7 As shown in the example, the imaging device 1 may have an electrode 71 electrically connected to the electrical conductor 70. The electrode 71 is, for example, a contact disposed on the first surface 21S1 side of the semiconductor layer 102 and electrically connected to the electrical conductor 70.

[0084] exist Figure 7 In the example shown, electrode 71 (contact) is arranged on conductor 70 in wiring layer 122. Note that conductor 70 and electrode 71 can be integrally constructed. Conductor 70 and electrode 71 can be collectively referred to as conductor 70. In this variation, the shielding performance can be improved by providing electrode 71.

[0085] (1-3. Variation Example 3) Figure 8A This is a schematic diagram illustrating an example of the construction of the imaging device according to Modification 3. (As shown in...) Figure 8A In the example shown, a semiconductor region 72, an electrical conductor 70, and an electrode 71 can be provided in the semiconductor layer 102. In this case, a capacitor 75 (CI capacitor) can be arranged, which includes the semiconductor region 72, the electrical conductor 70, and an insulating film (e.g., an oxide film) between the semiconductor region 72 and the electrical conductor 70. Figure 8BAs shown, for example, capacitor 75 can be electrically connected to transistor FDG and used as a capacitor for switching conversion efficiency (gain).

[0086] (1-4. Variation Example 4) Figure 9 This is a schematic diagram illustrating an example of the construction of the imaging device according to Modification 4. (As shown in...) Figure 9 In the example shown, the electrode penetrating the semiconductor layer 102 can be used as an electrical conductor 70 serving as a shielding region (shielding portion). For example, a through electrode (through contact) that electrically connects the circuit of semiconductor layer 101 and the circuit of semiconductor layer 102 can be used as an electrical conductor 70.

[0087] (1-5. Variation Example 5) Figure 10 This is a schematic diagram illustrating an example of the construction of the imaging apparatus according to Modification 5. For example, the photoelectric conversion unit 12, the transmission transistor TRG, and the readout circuit 20 can be disposed in a single semiconductor layer (e.g., semiconductor layer 101). Figure 10 In the example shown, the transistor of the readout circuit 20 is disposed on the second surface 11S2 side of the semiconductor layer 101. Note that the transistor of the readout circuit 20 may be disposed on the first surface 11S1 side of the semiconductor layer 101.

[0088] As in Figure 10 In the example shown, the imaging device 1 may include a separation section 110. The separation section 110 is formed, for example, in the semiconductor layer 101 between a plurality of adjacent photoelectric conversion sections 12, and separates the photoelectric conversion sections 12. The separation section 110 includes a trench (recess) disposed at the boundary of adjacent pixels P. As in Figure 10 In the example shown, the electrical conductor 70 may be disposed on the separation portion 110. Note that the separation portion 110 may be disposed through the semiconductor layer 101.

[0089] (1-6. Variation Example 6) Figures 11 to 13 This is a schematic diagram illustrating an example of the construction of the imaging apparatus according to Modification 6. For example, although the above embodiments and modifications illustrate examples of the construction of the electrical conductor 70, the position and shape of the electrical conductor 70 are not limited to the examples described above. For example, as... Figure 11 As shown, the electrical conductor 70 can be positioned between the select transistor SEL and the amplification transistor AMP. Figure 11 In the example shown, an electrical conductor 70 is arranged between the semiconductor region 51 of the selection transistor SEL and the semiconductor region 55 of the amplification transistor AMP.

[0090] like Figure 12 As shown, the electrical conductor 70 can be disposed between the selection transistor SEL and the transistor FDG. Alternatively, as in Figure 13In the example shown, the electrical conductor 70 can be arranged between the selection transistor SEL and the floating diffusion section FD. For example, when the floating diffusion section FD includes a through electrode that penetrates the semiconductor layer 102, the electrical conductor 70 can be arranged around the through electrode.

[0091] (1-7. Variation Example 7) Figure 14 This is a schematic diagram illustrating an example of the construction of the imaging apparatus according to Modification 7. The electrical conductor 70 can be configured to surround the signal line VSL connected to the selection transistor SEL. (As shown in...) Figure 14 In the example shown, the conductor 70 can be U-shaped. The shape of the conductor 70 is not limited and can be rectangular, circular, or any other shape.

[0092] (1-8. Variation Example 8) Figure 15 This is a schematic diagram illustrating an example of the construction of the imaging device according to Modification 8. (As shown in...) Figure 15 In the example shown, the electrical conductor 70 can be configured to maintain symmetry in the layout. The electrical conductor 70 can also be positioned on both sides (at both ends) of the pixel P (or readout circuit 20). This prevents deterioration of optical symmetry and a decrease in photoelectric detection accuracy.

[0093] (1-9. Variation Example 9) Figure 16 This is a schematic diagram illustrating an example of the construction of the imaging device according to Modification 9. (As shown in...) Figure 16 In the example shown, the amplifying transistor AMP and the selecting transistor SEL can be arranged separately. Figure 16 In the example shown, the amplifying transistor AMP and the selecting transistor SEL can have separate source and drain regions. Note that the transistor FDG and the reset transistor RST can also be arranged separately. <2. Second Embodiment>

[0094] Next, a second embodiment of this disclosure will be described. In the following text, components similar to those in the above embodiments will be designated using the same reference numerals, and their descriptions will be appropriately omitted.

[0095] Figure 17 This is a diagram illustrating an example of the cross-sectional structure of an imaging apparatus according to a second embodiment of the present invention. In this embodiment, the electrical conductor 70 may include wiring provided with a predetermined potential. The electrical conductor 70 is disposed, for example, in the wiring layer 122 between the transistors of the readout circuit 20 of pixel P1 and the readout circuit 20 of pixel P2. The electrical conductor 70 may also be considered as shielding wiring.

[0096] An electrical conductor 70 is arranged, for example, between the signal line VSL connected to the readout circuit 20 of pixel P1 and the wiring that includes at least a portion of the floating diffuser FD of pixel P2. Figure 17 In the example shown, an electrical conductor 70 is disposed between a wiring 61 electrically connected to the semiconductor region 51 of the select transistor SEL of pixel P1 and a wiring 65 electrically connected to the semiconductor region 55 of the amplification transistor AMP of pixel P2. Wiring 61 is part of the signal line VSL.

[0097] The conductor 70 is electrically connected to a wiring or terminal, for example, that can be provided with a predetermined potential (voltage). A control line connected to the transistor of the readout circuit 20 can be used as the conductor 70 to be provided with a predetermined potential. Alternatively, a wiring that provides boost or buck voltage (e.g., a wiring connected to the transfer transistor TRG or the reset transistor RST) can be used as the conductor 70.

[0098] In the imaging device 1, by utilizing existing potential-fixed wiring to arrange the electrical conductors 70, unnecessary parasitic capacitance is reduced. Crosstalk is suppressed. Noise mixed into the pixel signal is reduced, preventing image quality degradation.

[0099] Figures 18 to 21 An example of the construction of a second type of imaging device is shown. For example, such as... Figure 18 As shown, the wiring for transmitting the signal STRG used to control the transmission transistor TRG can be arranged as an electrical conductor 70. The electrical conductor 70 serves as part of the wiring (control line) electrically connected to the transmission transistor TRG. Figure 19 As shown, the wiring for transmitting the signal SFDG used to control the transistor FDG can be arranged as an electrical conductor 70. The electrical conductor 70 serves as part of the wiring that is electrically connected to the transistor FDG.

[0100] like Figure 20 As shown, the wiring for transmitting the signal SRST used to control the reset transistor RST can be arranged as an electrical conductor 70. Electrical conductor 70 serves as part of the wiring electrically connected to the reset transistor RST. Figure 21 As shown, the wiring for transmitting the signal SSEL used to control the selection transistor SEL can be arranged as an electrical conductor 70. The electrical conductor 70 serves as part of the wiring that is electrically connected to the selection transistor SEL.

[0101] [Functions and Effects] The photodetector according to this embodiment includes: a first photoelectric conversion element (photoelectric conversion section 12) that performs photoelectric conversion on light; a first readout circuit (e.g., readout circuit 20 for pixel P1) including a first transistor disposed on a first surface side of a first semiconductor layer, the first readout circuit being configured to output a first signal based on the charge obtained by the conversion of the first photoelectric conversion element; a second photoelectric conversion element that performs photoelectric conversion on light; a second readout circuit (e.g., readout circuit 20 for pixel P2) including a second transistor disposed on a first surface side of the first semiconductor layer and adjacent to the first transistor, the second readout circuit being configured to output a second signal based on the charge obtained by the conversion of the second photoelectric conversion element; and an electrical conductor (electrical conductor 70) disposed between the first transistor and the second transistor. The electrical conductor is a wiring provided with a predetermined potential.

[0102] In this photodetector (imaging device 1), an electrical conductor 70 is disposed between the selection transistor SEL of pixel P1 and the amplification transistor AMP of pixel P2. The electrical conductor 70 is a wiring provided with a predetermined potential. This reduces unnecessary parasitic capacitance between the signal line VSL and the floating diffuser FD, thereby suppressing crosstalk. A photodetector capable of suppressing signal quality degradation can be realized.

[0103] Next, variations of this disclosure will be described. In the following, components similar to those in the above embodiments will be designated using the same reference numerals as those in the above embodiments, and their descriptions will be omitted as appropriate.

[0104] (2-1. Variation Example 10) Figure 22A and 22B This is a schematic diagram illustrating an example of the construction of the imaging device according to Modification 10. The electrical conductor 70 can be configured to penetrate the semiconductor layer 102. For example, as... Figure 22A As shown, the electrical conductor 70 can be configured to reach the second surface 11S2 of the semiconductor layer 101.

[0105] For example, such as Figure 22B As shown, the electrical conductor 70 can be disposed from the first surface 21S1 side of the semiconductor layer 102 into the interior of the wiring layer 121. This variation can produce effects similar to those in the embodiments described above. <3. Third Embodiment>

[0106] Next, a third embodiment of this disclosure will be described. In the following text, components similar to those in the above embodiments will be designated using the same reference numerals, and their descriptions will be appropriately omitted.

[0107] Figure 23This is a diagram illustrating an example of the cross-sectional structure of an imaging device according to a third embodiment of the present invention. The imaging device 1 according to this embodiment includes an insulator 90 disposed between the transistor of a pixel and the transistors of adjacent pixels. The dielectric constant of the insulator 90 is, for example, lower than the dielectric constant of the insulating film surrounding the transistors in the readout circuit 20.

[0108] As an example, insulator 90 is disposed on the first surface 21S1 side of semiconductor layer 102 and comprises a material having a lower dielectric constant than the insulating film of wiring layer 122. The dielectric constant of insulator 90 is lower than the dielectric constant of the insulating film (interlayer insulating film) of wiring layer 122. Furthermore, for example, insulator 90 may comprise a material having a lower dielectric constant than the insulating film (interlayer insulating film) of wiring layer 121, and may have a lower dielectric constant than the insulating film of wiring layer 121.

[0109] As an example, insulator 90 may comprise a low-k material, such as SiOC or SiOCH. Insulator 90 may comprise an insulating film having a lower dielectric constant than the silicon oxide film. Insulator 90 may also be considered as a low-k portion.

[0110] Insulator 90 may, for example, comprise a material with a relative permittivity greater than or equal to 1.5 and less than or equal to 3.8. Insulator 90 may, for example, comprise SiOC, SiOCH, porous silica, SiOF, inorganic SOG, organic SOG, or polyaryl ether. Note that insulator 90 may comprise a single-layer film comprising one of the above materials or a multilayer film comprising two or more of the above materials.

[0111] An insulator 90 is disposed, for example, in the semiconductor layer 102 between the transistors of the readout circuit 20 of pixel P1 and the readout circuit 20 of pixel P2. The insulator 90 is also disposed, for example, between the node of the signal line VSL connected to the readout circuit 20 of pixel P1 and the floating diffuser FD of pixel P2.

[0112] exist Figure 23 In the example shown, an insulator 90 is disposed between the semiconductor region 51 of the selection transistor SEL of pixel P1 and the semiconductor region 55 of the amplification transistor AMP of pixel P2. The insulator 90 is a low-k component as described above and is embedded. In this embodiment, by providing the insulator 90, unwanted parasitic capacitance can be reduced and crosstalk suppressed. This suppresses noise interference into the pixel signal and inhibits image quality degradation.

[0113] Figure 24A and Figure 24B This is a diagram illustrating an example of the construction of an imaging apparatus according to a third embodiment. For example, such as... Figure 24A or Figure 24BAs shown, the insulator 90 can be disposed between the select transistor SEL and the amplifying transistor AMP. Alternatively, the insulator 90 can also be disposed between the wiring of the select transistor SEL and the floating diffuser FD. (As shown in...) Figure 24B In the example shown, the insulator 90 can be positioned between the select transistor SEL and the amplifying transistor AMP, and between the select transistor SEL and the transistor FDG.

[0114] Figure 25A and Figure 25B This is a diagram illustrating other structural examples of the imaging apparatus according to the third embodiment. The insulator 90 may be configured to overlap with a portion of the semiconductor region 51 of the selection transistor SEL and a portion of the semiconductor region 55 of the amplification transistor AMP. (As...) Figure 25A As shown, the insulator 90 may be formed as part of the semiconductor region 51 covering the select transistor SEL and part of the semiconductor region 55 covering the amplifying transistor AMP.

[0115] Insulator 90 can be configured to overlap with a portion of the gate electrode of the select transistor SEL and a portion of the gate electrode of the amplify transistor AMP. For example, as Figure 25B As shown, the insulator 90 can be formed to also cover part of the gate electrode of the select transistor SEL and part of the gate electrode of the amplification transistor AMP.

[0116] Note that the insulator 90 may have an insulating film and an air gap (void). An air gap (cavity) may be provided in the insulator 90. Furthermore, the insulator 90 may be formed on the entire pixel P (or readout circuit 20). Alternatively, for example, the insulator 90 may be disposed on the entire first surface 21S1 of the semiconductor layer 102. Alternatively, the insulator 90 may be disposed on the entire second surface 21S2 of the semiconductor layer 102.

[0117] [Functions and Effects] The photodetector according to this embodiment includes: a first photoelectric conversion element (photoelectric conversion section 12) that performs photoelectric conversion on light; a first readout circuit (e.g., readout circuit 20 for pixel P1) that includes a first transistor disposed on a first surface side of a first semiconductor layer, the first readout circuit being configured to output a first signal based on a charge obtained by conversion by the first photoelectric conversion element; a second photoelectric conversion element that performs photoelectric conversion on light; a second readout circuit (e.g., readout circuit 20 for pixel P2) that includes a second transistor disposed on a first surface side of a first semiconductor layer and adjacent to the first transistor, the second readout circuit being configured to output a second signal based on a charge obtained by conversion by the second photoelectric conversion element; and an insulator (insulator 90) disposed in the first semiconductor layer between the first transistor and the second transistor.

[0118] In the photodetector (imaging apparatus 1) according to this embodiment, an insulator 90 is provided between the selection transistor SEL of pixel P1 and the amplification transistor AMP of pixel P2. This reduces unnecessary parasitic capacitance between the signal line VSL and the floating diffuser FD, thereby suppressing crosstalk. A photodetector capable of suppressing signal quality degradation can be realized. <4. Application Examples>

[0119] The aforementioned imaging device 1, etc., can be applied to any type of electronic device, such as a camera system like a digital camera or video camera, or a mobile phone with imaging capabilities. Figure 26 A schematic structure of electronic device 1000 is shown.

[0120] Electronic device 1000 includes, for example, a lens group 1001, an imaging device 1, a DSP (digital signal processor) circuit 1002, a frame memory 1003, a display unit 1004, a recording unit 1005, an operation unit 1006, and a power supply unit 1007. They are interconnected via a bus 1008.

[0121] The lens group 1001 receives incident light (image light) from the subject and forms an image on the imaging surface of the imaging device 1. The imaging device 1 converts the amount of incident light that forms an image on the imaging surface through the lens group 1001 into an electrical signal pixel by pixel, and provides the electrical signal as a pixel signal to the DSP circuit 1002.

[0122] The DSP circuit 1002 is a signal processing circuit that processes signals provided from the imaging device 1. The DSP circuit 1002 outputs image data obtained by processing signals from the imaging device 1. The frame memory 1003 temporarily stores the image data processed by the DSP circuit 1002 frame by frame.

[0123] The display unit 1004 includes, for example, a panel-type display device such as a liquid crystal panel or an organic EL (electroluminescent) panel, and records image data of moving or still images captured by the imaging device 1 in a recording medium such as a semiconductor memory or a hard disk.

[0124] The operation unit 1006 outputs operation signals for various functions of the electronic device 1000 according to the user's operation. The power supply unit 1007 appropriately provides various power supplies for the operation of the DSP circuit 1002, frame memory 1003, display unit 1004, recording unit 1005, and operation unit 1006. <5. Practical Application Examples> (Practical application examples on moving bodies)

[0125] The technology disclosed herein (the Technology) can be applied to a variety of products. For example, the Technology disclosed herein can be implemented as a device mounted on any type of mobile body, such as a car, electric car, hybrid electric car, motorcycle, bicycle, any personal mobility device, airplane, drone, ship, and robot.

[0126] Figure 27 This is a block diagram illustrating a schematic construction example of a vehicle control system, which is an example of a mobile body control system to which the technology according to embodiments of the present disclosure can be applied.

[0127] The vehicle control system 12000 includes multiple electronic control units interconnected via a communication network 12001. Figure 26 In the example shown, the vehicle control system 12000 includes a drive system control unit 12010, a body system control unit 12020, an external information detection unit 12030, an internal information detection unit 12040, and an integrated control unit 12050. Furthermore, a microcomputer 12051, an audio / image output unit 12052, and an in-vehicle network interface (I / F) 12053 are shown as functional components of the integrated control unit 12050.

[0128] The drive system control unit 12010 controls the operation of devices related to the vehicle's drive system according to various programs. For example, the drive system control unit 12010 acts as a control device for devices such as: a drive force generating device (e.g., an internal combustion engine, drive motor, etc.) for generating vehicle driving force, a drive force transmission mechanism for transmitting driving force to the wheels, a steering mechanism for adjusting the vehicle's steering angle, and a braking device for generating vehicle braking force.

[0129] The body system control unit 12020 controls the operation of various devices installed on the vehicle body according to various programs. For example, the body system control unit 12020 acts as a control device for devices such as keyless entry systems, smart key systems, power windows, or various lights such as headlights, reversing lights, brake lights, turn signals, or fog lights. In this case, radio waves or signals from various switches transmitted from a portable device that serves as a key alternative can be input to the body system control unit 12020. The body system control unit 12020 receives these input radio waves or signals and controls the vehicle's door locking devices, power windows, or lights, etc.

[0130] The exterior information detection unit 12030 detects external information about the vehicle, including the vehicle control system 12000. For example, the exterior information detection unit 12030 is connected to the imaging unit 12031. The exterior information detection unit 12030 causes the imaging unit 12031 to image the exterior of the vehicle and receives the captured images. Based on the received images, the exterior information detection unit 12030 can perform processing for detecting objects such as people, vehicles, obstacles, signs, or characters on the road surface, or processing for detecting their distances.

[0131] The imaging unit 12031 is an optical sensor that receives light and outputs an electrical signal corresponding to the amount of light received. The imaging unit 12031 may also output an electrical signal as an image, or an electrical signal as distance measurement information. Furthermore, the light received by the imaging unit 12031 can be visible light, or it may be invisible light such as infrared light.

[0132] The in-vehicle information detection unit 12040 detects information about the interior of the vehicle. For example, the in-vehicle information detection unit 12040 is connected to a driver state detection unit 12041 for detecting the driver's state. The driver state detection unit 12041 includes, for example, a camera for imaging the driver. Based on the detection information input from the driver state detection unit 12041, the in-vehicle information detection unit 12040 can calculate the driver's fatigue level or the driver's concentration level, or it can determine whether the driver is dozing off.

[0133] The microcomputer 12051 can calculate target control values ​​for the drive force generating device, steering mechanism, or braking device based on information about the vehicle's interior and exterior obtained by the external information detection unit 12030 or the internal information detection unit 12040, and output control commands to the drive system control unit 12010. For example, the microcomputer 12051 can perform coordinated control to realize functions of advanced driver assistance systems (ADAS), including collision avoidance or shock absorption, following distance-based driving, speed maintenance driving, collision warning, or lane departure warning.

[0134] In addition, based on the environmental information about the vehicle obtained by the external information detection unit 12030 or the internal information detection unit 12040, the microcomputer 12051 can perform coordinated control for autonomous driving by controlling the drive force generating device, steering mechanism or braking device, etc., which enables the vehicle to drive automatically without relying on the driver's operation.

[0135] Furthermore, the microcomputer 12051 can output control commands to the body system control unit 12030 based on external information about the vehicle acquired by the external information detection unit 12030. For example, the microcomputer 12051 can perform coordinated control aimed at preventing glare by controlling the headlights to switch from high beams to low beams, for example, based on the position of the vehicle in front or oncoming vehicles detected by the external information detection unit 12030.

[0136] The sound / image output unit 12052 transmits an output signal of at least one of sound and image to an output device capable of visually or audibly notifying vehicle occupants or the outside of the vehicle. Figure 27 In the example, audio speaker 12061, display unit 12062, and instrument panel 12063 are shown as output devices. Display unit 12062 may include, for example, at least one of a vehicle display and a head-up display.

[0137] Figure 28 This is a diagram showing an example of the mounting position of the imaging unit 12031.

[0138] exist Figure 28 In the imaging unit 12031, there are imaging units 12101, 12102, 12103, 12104 and 12105.

[0139] Imaging units 12101, 12102, 12103, 12104, and 12105 are installed in locations such as the front nose, rearview mirrors, rear bumper, rear door, and upper part of the interior windshield of vehicle 12100. Imaging unit 12101 at the front nose and imaging unit 12105 at the upper part of the interior windshield primarily acquire images of the front of vehicle 12100. Imaging units 12102 and 12103 at the rearview mirrors primarily acquire images of the sides of vehicle 12100. Imaging unit 12104 at the rear bumper or rear door primarily acquires images of the rear of vehicle 12100. Imaging unit 12105 at the upper part of the interior windshield is primarily used to detect vehicles, pedestrians, obstacles, traffic lights, traffic signs, or lanes ahead.

[0140] Notice, Figure 28 Examples of the imaging ranges of imaging units 12101 to 12104 are shown. Imaging range 12111 represents the imaging range of imaging unit 12101 located at the front nose. Imaging ranges 12112 and 12113 represent the imaging ranges of imaging units 12102 and 12103 located at the rearview mirrors, respectively. Imaging range 12114 represents the imaging range of imaging unit 12104 located at the rear bumper or rear door. For example, a bird's-eye view image of vehicle 12100 is obtained by overlaying image data captured by imaging units 12101 to 12104.

[0141] At least one of the imaging units 12101 to 12104 may have the function of obtaining distance information. For example, at least one of the imaging units 12101 to 12104 may be a stereo camera composed of multiple imaging elements, or may be an imaging element having pixels for phase difference detection.

[0142] For example, the microcomputer 12051 can determine the distance and time-varying distance (relative speed to the vehicle 12100) of each three-dimensional object within the imaging range 12111 to 12114 based on distance information obtained from the imaging units 12101 to 12104, and extract the nearest three-dimensional object as the preceding vehicle, specifically existing on the driving path of the vehicle 12100 and traveling in approximately the same direction as the vehicle 12100 at a predetermined speed (e.g., equal to or greater than 0 km / h). Furthermore, the microcomputer 12051 can pre-set a following distance to be maintained in front of the preceding vehicle and execute automatic braking control (including follow-stop control), automatic acceleration control (including follow-start control), etc. Therefore, coordinated control for autonomous driving can be performed, enabling the vehicle to drive automatically without relying on driver operation, etc.

[0143] For example, microcomputer 12051 can classify three-dimensional object data of three-dimensional objects into two-wheeled vehicles, standard-sized vehicles, large vehicles, pedestrians, utility poles, and other three-dimensional objects based on distance information obtained from imaging units 12101 to 12104, extract the classified three-dimensional object data, and use the extracted three-dimensional object data for automatic obstacle avoidance. For example, microcomputer 12051 identifies obstacles around vehicle 12100 as obstacles that can be visually recognized by the driver of vehicle 12100 and obstacles that are difficult to visually recognize by the driver of vehicle 12100. Then, microcomputer 12051 determines a collision risk to indicate the risk of collision with each obstacle. If the collision risk is equal to or higher than a set value and therefore there is a possibility of collision, microcomputer 12051 outputs a warning to the driver through audio speaker 12061 or display unit 12062, and executes forced deceleration or evasive steering through driving system control unit 12010. Microcomputer 12051 can thus assist driving to avoid collisions.

[0144] At least one of the imaging units 12101 to 12104 can be an infrared camera that detects infrared light. For example, the microcomputer 12051 can identify a pedestrian by determining whether a pedestrian exists in the images captured by the imaging units 12101 to 12104. This pedestrian identification is performed, for example, by extracting feature points from the images captured by the imaging units 12101 to 12104, which are infrared cameras; and by performing pattern matching processing on a series of feature points representing the outline of an object to determine whether it is a pedestrian. When the microcomputer 12051 determines that a pedestrian exists in the images captured by the imaging units 12101 to 12104 and thus identifies the pedestrian, the sound / image output unit 12052 controls the display unit 12062 to overlay a square outline for emphasis on the identified pedestrian. In addition, the sound / image output unit 12052 can control the display unit 12062 to display icons or the like for indicating pedestrians at a desired location.

[0145] The above describes a mobile body control system to which the technology according to embodiments of the present invention can be applied. The technology according to embodiments of the present invention can be applied to, for example, the imaging unit 12031 in the above-described configuration. Specifically, for example, the imaging device 1 or the like can be applied to the imaging unit 12031. By applying the technology according to embodiments of the present invention to the imaging unit 12031, high-definition captured images can be obtained. Therefore, high-precision control can be performed using the captured images in the mobile body control system. (Practical application examples of endoscopic surgical systems)

[0146] The technology according to embodiments of this disclosure (the technology) can be applied to various products. For example, the technology according to embodiments of this disclosure can be applied to endoscopic surgical systems.

[0147] Figure 29 This is a diagram illustrating a schematic example of the construction of an endoscopic surgical system to which the technology (the technology) according to embodiments of this disclosure can be applied.

[0148] exist Figure 29 The image shows a surgeon (physician) 11131 using an endoscopic surgical system 11000 to perform surgery on a patient 11132 on a bed 11133. As shown, the endoscopic surgical system 11000 includes an endoscope 11100, other surgical instruments 11110 such as a pneumoperitoneum tube 11111 and an energy device 11112, a support arm device 11120 for supporting the endoscope 11100 thereon, and a trolley 11200 on which various endoscopic surgical instruments are mounted.

[0149] Endoscope 11100 includes a tube 11101 and a camera 11102 connected to the proximal end of the tube 11101. A region of the tube 11101 having a predetermined length starting from its distal end is inserted into a body cavity of a patient 11132. In the illustrated example, endoscope 11100 is shown as a rigid endoscope including a rigid tube 11101. However, endoscope 11100 can also be a flexible endoscope including a flexible tube 11101.

[0150] The endoscope tube 11101 has an opening at its distal end, into which an objective lens is fitted. A light source device 11203 is connected to the endoscope 11100 such that light generated by the light source device 11203 is introduced to the distal end of the endoscope tube 11101 via a light guide extending inside the endoscope tube 11101, and illuminates the target for observation in the body cavity of the patient 11132 via the objective lens. It should be noted that the endoscope 11100 may be a forward-looking endoscope, or it may be a slant-looking endoscope or a lateral-looking endoscope.

[0151] An optical system and an imaging element are installed inside the camera 11102, so that reflected light from the observed target (observation light) is converged onto the imaging element by the optical system. The imaging element performs photoelectric conversion on the observation light to generate an electrical signal corresponding to the observation light, that is, an image signal corresponding to the observed image. The image signal is transmitted to CCU11201 as raw data.

[0152] The CCU 11201 includes a central processing unit (CPU), a graphics processing unit (GPU), etc., and controls the operation of the endoscope 11100 and the display device 11202 as a whole. In addition, the CCU 11201 receives image signals from the camera 11102 and performs various image processing such as developing processing (de-mosaic processing) on ​​the image signals to display images based on the image signals.

[0153] Under the control of CCU 11201, display device 11202 displays an image on itself based on the image signal that has been image processed by CCU 11201.

[0154] The light source device 11203 includes, for example, a light source such as a light-emitting diode (LED) and provides illumination light to the endoscope 11100 when imaging the surgical area.

[0155] Input device 11204 is the input interface of endoscopic surgical system 11000. Users can input various types of information or commands into endoscopic surgical system 11000 through input device 11204. For example, users can input commands to change the image acquisition conditions of endoscope 11100 (type of illumination light, magnification, focal length, etc.).

[0156] The treatment tool control device 11205 controls the drive of the energy device 11112 used for cauterizing, cutting, and sealing blood vessels. The pneumoperitoneum device 11206 feeds gas into the patient's body cavity 11132 through the pneumoperitoneum tube 11111 to inflate the cavity, thereby ensuring the field of vision of the endoscope 11100 and ensuring the working space for the surgical procedure. The recorder 11207 is a device capable of recording various information related to the surgery. The printer 11208 is a device capable of... - A device capable of printing various information related to surgery in various forms such as text, images, and charts.

[0157] It should be noted that, for example, the light source device 11203 that provides illumination light to the endoscope 11100 when imaging the surgical area may include a white light source, such as an LED, a laser light source, or a combination thereof. When the white light source includes a combination of red, green, and blue (RGB) laser light sources, the white balance of the captured image can be adjusted by the light source device 11203 because the output intensity and timing of each color (each wavelength) can be controlled with high precision. Furthermore, in this case, if a laser beam from an RGB laser light source is irradiated onto the target of observation in a time-division manner and the driving of the imaging element of the camera 11102 is controlled in a manner synchronized with the emission timing, images corresponding to RGB can be captured in a time-division manner. According to this method, color images can be acquired even without setting a color filter for the imaging element.

[0158] Additionally, the light source device 11203 can be controlled to change the intensity of the output light at predetermined intervals. By controlling the driving of the imaging element of the camera 11102 in a manner synchronized with the timing of the light intensity changes, and by acquiring and synthesizing images in a time-division manner, high dynamic range images without underexposed shadows and overexposed highlights can be produced.

[0159] Furthermore, the light source device 11203 can be configured to provide light having a predetermined wavelength region prepared for specific light observation. In specific light observation, for example, imaging (narrow-band imaging) of a predetermined tissue, such as blood vessels in a mucosal layer with high contrast, can be performed by irradiating with light having a narrow band compared to the irradiation light used in normal observation (i.e., white light) by utilizing the wavelength dependence of light absorption in body tissue. Alternatively, in specific light observation, fluorescence observation can be performed to obtain an image based on the fluorescence generated by irradiation with excitation light. In fluorescence observation, the observation of fluorescence from body tissue can be performed by irradiating body tissue (autofluorescence observation), or a fluorescence image can be obtained by locally injecting a reagent such as indocyanine green (ICG) into body tissue and irradiating the body tissue with excitation light corresponding to the fluorescence wavelength of the reagent. The light source device 11203 can be configured to provide narrow-band light and / or excitation light suitable for specific light observation as described above.

[0160] Figure 30 It is shown Figure 29 A block diagram illustrating the functional configuration example of camera 11102 and CCU 11201.

[0161] Camera 11102 includes a lens unit 11401, an imaging unit 11402, a driving unit 11403, a communication unit 11404, and a camera control unit 11405. CCU 11201 includes a communication unit 11411, an image processing unit 11412, and a control unit 11413. Camera 11102 and CCU 11201 are connected to each other via a transmission cable 11400 for communication.

[0162] Lens unit 11401 is an optical system disposed at a position connected to lens barrel 11101. Observation light obtained from the distal end of lens barrel 11101 is guided to camera 11102 and introduced into lens unit 11401. Lens unit 11401 includes a combination of multiple lenses, including zoom lenses and focusing lenses.

[0163] The imaging unit 11402 can include one (single-plate type) or multiple (multi-plate type). When the imaging unit 11402 is configured as a multi-plate type, for example, image signals corresponding to R, G, and B are generated by the imaging elements, and a color image can be obtained by synthesizing these image signals. The imaging unit 11402 can also be configured to have a pair of imaging elements for acquiring right-eye and left-eye image signals for three-dimensional (3D) display. If 3D display is performed, the surgical operator 11131 can more accurately perceive the depth of body tissue at the surgical site. It should be noted that when the imaging unit 11402 is configured as a multi-plate type, multiple system lens units 11401 can be arranged in a manner corresponding to each imaging element.

[0164] Alternatively, the imaging unit 11402 may not need to be located within the camera 11102. For example, the imaging unit 11402 may be located immediately after the objective lens inside the lens barrel 11101.

[0165] The drive unit 11403 includes an actuator, and under the control of the camera control unit 11405, the drive unit 11403 moves the zoom lens and focusing lens of the lens unit 11401 a predetermined distance along the optical axis. Therefore, the magnification and focus of the image captured by the imaging unit 11402 can be appropriately adjusted.

[0166] Communication unit 11404 includes communication means for transmitting / receiving various information to / from CCU 11201. Communication unit 11404 transmits image signals obtained from imaging unit 11402 as raw data to CCU 11201 via transmission cable 11400.

[0167] Additionally, the communication unit 11404 receives control signals from the CCU 11201 for controlling the camera 11102 and provides these control signals to the camera control unit 11405. For example, the control signals include information related to imaging conditions, such as information specifying the frame rate for capturing images, information specifying the exposure value for capturing images, and / or information specifying the magnification and focus of the captured images.

[0168] It should be noted that image capture conditions such as frame rate, exposure value, magnification, and focus can be appropriately specified by the user or automatically set by the control unit 11413 of CCU 11201 based on the acquired image signal. In the latter case, the endoscope 11100 combines automatic exposure (AE), automatic focus (AF), and automatic white balance (AWB) functions.

[0169] The camera control unit 11405 controls the driving of the camera 11102 based on the control signals received from the CCU 11201 by the communication unit 11404.

[0170] The communication unit 11411 includes a communication device for transmitting / receiving various types of information to / from the camera 11102. The communication unit 11411 receives image signals transmitted from the camera 11102 via a transmission cable 11400.

[0171] In addition, the communication unit 11411 transmits control signals for controlling the camera 11102 to the camera 11102. Image signals and control signals can be transmitted via electrical communication, optical communication, etc.

[0172] The image processing unit 11412 performs various image processing operations on the image signals transmitted from the camera 11102 in the form of raw data.

[0173] The control unit 11413 performs various types of control related to image capture of the surgical area, etc., performed by the endoscope 11100, and the display of the captured images obtained through image capture of the surgical area. For example, the control unit 11413 generates control signals for controlling the drive of the camera 11102.

[0174] Furthermore, the control unit 11413 controls the display device 11202 to display captured images used to depict the surgical area, etc., based on image signals that have been processed by the image processing unit 11412. At this time, the control unit 11413 can identify various objects in the captured images using various image recognition technologies. For example, the control unit 11413 can identify surgical tools such as forceps, specific living body parts, bleeding, fog when using the energy device 11112, etc., by detecting the shape and color of the edges of objects included in the captured images. When the control unit 11413 controls the display device 11202 to display the captured images, the control unit 11413 can display various surgical assistance information by overlaying the recognition results onto the image of the surgical area. By displaying and presenting the surgical assistance information in an overlay manner to the surgeon 11131, the burden on the surgeon 11131 can be reduced, or the surgeon 11131 can perform the surgery more reliably.

[0175] The transmission cable 11400 that connects the camera 11102 and the CCU 11201 to each other is an electrical signal cable for electrical signal communication, an optical fiber for optical communication, or a composite cable for both electrical and optical communication.

[0176] Here, in the example shown, although communication is performed via wired communication using transmission cable 11400, communication between camera 11102 and CCU 11201 can be performed wirelessly.

[0177] The above describes an example of an endoscopic surgical system to which the technology according to embodiments of the present disclosure can be applied. The technology according to embodiments of the present disclosure can, for example, be suitably applied to the imaging unit 11402 disposed in the camera 11102 of the endoscope 11100 of the above configuration. Applying the technology according to embodiments of the present disclosure to the imaging unit 11402 can provide an endoscope 11100 with high definition.

[0178] Although the present disclosure has been described above with reference to embodiments, modifications, application examples, and practical applications, the technology is not limited to the foregoing embodiments and can be modified in various ways. For example, although the foregoing modifications have been described as modifications of the foregoing embodiments, the constructions of the various modifications can be combined as needed. For example, the present disclosure is not limited to back-illuminated image sensors, but is also applicable to front-illuminated image sensors.

[0179] In the above embodiments, an imaging device has been used as an example. However, the photodetector of this disclosure may be, for example, a device that receives incident light and converts it into electrical charge. The output signal may be an image information signal or a distance measurement information signal. The photodetector (imaging device) can be applied to image sensors, distance sensors, etc.

[0180] The photodetector according to this disclosure can also be used as a distance measurement sensor capable of measuring distance using the TOF (Time-of-Flight) method. The photodetector (imaging device) can also be used as a sensor capable of detecting events, such as an event-driven sensor (referred to as EVS (Event Vision Sensor), EDS (Event-Driven Sensor), DVS (Dynamic Vision Sensor), etc.).

[0181] A photodetector according to an embodiment of the present invention includes: a first photoelectric conversion element for photoelectric conversion of light; a first readout circuit including a first transistor disposed on a first surface side of a first semiconductor layer, the first readout circuit being configured to output a first signal based on the charge obtained by the conversion of the first photoelectric conversion element; a second photoelectric conversion element for photoelectric conversion of light; a second readout circuit including a second transistor disposed on the first surface side of the first semiconductor layer and adjacent to the first transistor, the second readout circuit being configured to output a second signal based on the charge obtained by the conversion of the second photoelectric conversion element; and an electrical conductor disposed between the first transistor and the second transistor. Thus, a photodetector capable of suppressing signal quality degradation can be realized.

[0182] A photodetector according to an embodiment of the present invention includes: a first photoelectric conversion element for photoelectric conversion of light; a first readout circuit including a first transistor disposed on a first surface side of a first semiconductor layer, the first readout circuit being configured to output a first signal based on a charge obtained by the conversion of the first photoelectric conversion element; a second photoelectric conversion element for photoelectric conversion of light; a second readout circuit including a second transistor disposed on the first surface side of the first semiconductor layer and adjacent to the first transistor, the second readout circuit being configured to output a second signal based on a charge obtained by the conversion of the second photoelectric conversion element; and an insulator disposed in the first semiconductor layer between the first transistor and the second transistor. Thus, a photodetector capable of suppressing signal quality degradation can be realized.

[0183] Note that the effects described herein are merely illustrative and are not limited thereto, and may include other effects. Furthermore, this disclosure may also have the following constructions. (1) A photodetector comprising: The first photoelectric conversion element converts light into photoelectric value; A first readout circuit includes a first transistor disposed on a first surface side of a first semiconductor layer, the first readout circuit being configured to output a first signal based on a charge obtained by conversion by the first photoelectric conversion element; The second photoelectric conversion element performs photoelectric conversion on light; A second readout circuit includes a second transistor disposed on the first surface side of the first semiconductor layer and adjacent to the first transistor, the second readout circuit being configured to output a second signal based on the charge obtained by the conversion of the second photoelectric conversion element; and An electrical conductor is disposed between the first transistor and the second transistor. (2) The photodetector according to (1), wherein the electrical conductor is disposed in the first semiconductor layer between the first transistor and the second transistor. (3) The photodetector according to (1) or (2) further includes an electrode disposed on the first surface side of the first semiconductor layer, the electrode being electrically connected to the electrical conductor. (4) The photodetector according to any one of (1) to (3), comprising a second semiconductor layer, the second semiconductor layer comprising the first photoelectric conversion element and the second photoelectric conversion element, wherein, The first semiconductor layer is stacked on the second semiconductor layer. (5) The photodetector according to any one of (1) to (4) further includes a first floating diffuser, wherein, The first transistor is configured to output the first signal based on the charge accumulated in the first floating diffuser. (6) The photodetector according to any one of (1) to (5) further includes a signal line configured to transmit the first signal, wherein, The first transistor includes a first semiconductor region disposed on the first surface side of the first semiconductor layer, the first semiconductor region being electrically connected to the signal line, and The electrical conductor is disposed between the first semiconductor region and the second transistor. (7) The photodetector according to any one of (1) to (6) further includes a second floating diffuser, wherein, The second transistor is electrically connected to the second floating diffusion section. (8) A photodetector according to any one of (1) to (7), wherein the electrical conductor is made of a semiconductor material doped with impurities or of a metallic material. (9) The optical detector according to any one of (1) to (8), wherein, The first readout circuit includes an amplifying transistor and a first transistor, wherein the amplifying transistor is configured to generate the first signal, and the first transistor is configured to output the first signal. The second readout circuit includes a second transistor and a selection transistor, wherein the second transistor is configured to generate the second signal, and the selection transistor is configured to output the second signal. The amplifying transistor, the first transistor, the second transistor, and the selection transistor are arranged side by side in a first direction, and The electrical conductor is positioned between the first transistor and the second transistor in the plan view. (10) The photodetector according to (1), wherein the electrical conductor includes wiring provided with a predetermined potential. (11) The photodetector according to (10) further includes: A first wiring connection is electrically connected to the first transistor; and The second wiring is electrically connected to the second transistor, wherein... The first transistor is configured to output the first signal to the first wiring, and The electrical conductor is disposed between the first wiring and the second wiring. (12) The photodetector according to (11) further includes a second floating diffuser, wherein, The second wiring is electrically connected to the second floating diffuser. (13) The photodetector according to any one of (10) to (12) further includes: The second floating diffuser; and The transmission transistor is configured to transfer the charge obtained by conversion through the second photoelectric conversion element to the second floating diffusion section, wherein... The electrical conductor includes wiring that is electrically connected to the gate of the transmission transistor. (14) A photodetector based on any one of (10) to (13), wherein, The second readout circuit includes a select transistor and a reset transistor, and The electrical conductor includes wiring electrically connected to the gate of the select transistor or wiring electrically connected to the gate of the reset transistor. (15) A photodetector according to any one of (10) to (14), wherein, The first semiconductor layer has a first surface and a second surface located on the opposite side of the first surface, and The electrical conductor is configured to reach at least the second surface of the first semiconductor layer. (16) A photodetector comprising: The first photoelectric conversion element converts light into photoelectric value; A first readout circuit includes a first transistor disposed on a first surface side of a first semiconductor layer, the first readout circuit being configured to output a first signal based on a charge obtained by conversion by the first photoelectric conversion element; The second photoelectric conversion element performs photoelectric conversion on light; A second readout circuit includes a second transistor disposed on the first surface side of the first semiconductor layer and adjacent to the first transistor, the second readout circuit being configured to output a second signal based on the charge obtained by the conversion of the second photoelectric conversion element; and An insulator disposed in the first semiconductor layer between the first transistor and the second transistor. (17) The photodetector according to (16) further includes: Signal lines, configured to transmit the first signal; and The second floating diffusion section, wherein... The first transistor is electrically connected to the signal line, and The second transistor is electrically connected to the second floating diffusion section. (18) The photodetector according to (16) or (17) further includes an insulating film disposed around the first transistor and the second transistor, wherein, The dielectric constant of the insulator is lower than that of the insulating film. (19) A photodetector according to any one of (16) to (18), comprising a second semiconductor layer, the second semiconductor layer comprising the first photoelectric conversion element and the second photoelectric conversion element, wherein, The first semiconductor layer is stacked on the second semiconductor layer. (20) An electronic device comprising: Optical systems; and A photodetector that receives light transmitted through the optical system, wherein the photodetector comprises: The first photoelectric conversion element converts light into photoelectric value; A first readout circuit includes a first transistor disposed on a first surface side of a first semiconductor layer, the first readout circuit being configured to output a first signal based on a charge obtained by conversion by the first photoelectric conversion element; The second photoelectric conversion element performs photoelectric conversion on light; A second readout circuit includes a second transistor disposed on the first surface side of the first semiconductor layer and adjacent to the first transistor, the second readout circuit being configured to output a second signal based on the charge obtained by the conversion of the second photoelectric conversion element; and An electrical conductor is disposed between the first transistor and the second transistor.

[0184] This application claims the benefit of Japanese priority patent application JP2023-058821, filed with the Japan Patent Office on March 31, 2023, the entire contents of which are incorporated herein by reference.

[0185] Those skilled in the art will understand that various modifications, combinations, sub-combinations and alterations can be made according to design requirements and other factors, as long as they are within the scope of the appended claims or their equivalents.

Claims

1. A photodetector, comprising: The first photoelectric conversion element converts light into photoelectric value; A first readout circuit includes a first transistor disposed on a first surface side of a first semiconductor layer, the first readout circuit being configured to output a first signal based on a charge obtained by conversion by the first photoelectric conversion element; The second photoelectric conversion element performs photoelectric conversion on light; The second readout circuit includes a second transistor disposed on the first surface side of the first semiconductor layer and adjacent to the first transistor, the second readout circuit being configured to output a second signal based on the charge obtained by the conversion of the second photoelectric conversion element; as well as An electrical conductor is disposed between the first transistor and the second transistor.

2. The photodetector according to claim 1, wherein, The electrical conductor is disposed in the first semiconductor layer between the first transistor and the second transistor.

3. The photodetector according to claim 1, further comprising an electrode disposed on the first surface side of the first semiconductor layer, the electrode being electrically connected to the electrical conductor.

4. The photodetector according to claim 1, comprising a second semiconductor layer, the second semiconductor layer comprising the first photoelectric conversion element and the second photoelectric conversion element, wherein, The first semiconductor layer is stacked on the second semiconductor layer.

5. The photodetector according to claim 1, further comprising a first floating diffuser, wherein, The first transistor is configured to output the first signal based on the charge accumulated in the first floating diffuser.

6. The photodetector of claim 1, further comprising a signal line configured to transmit the first signal, wherein, The first transistor includes a first semiconductor region disposed on the first surface side of the first semiconductor layer, the first semiconductor region being electrically connected to the signal line, and The electrical conductor is disposed between the first semiconductor region and the second transistor.

7. The photodetector according to claim 1, further comprising a second floating diffuser, wherein, The second transistor is electrically connected to the second floating diffusion section.

8. The photodetector according to claim 1, wherein, The electrical conductor is made of semiconductor material doped with impurities or of metallic material.

9. The photodetector according to claim 1, wherein, The first readout circuit includes an amplifying transistor and a first transistor, wherein the amplifying transistor is configured to generate the first signal, and the first transistor is configured to output the first signal. The second readout circuit includes a second transistor and a selection transistor, wherein the second transistor is configured to generate the second signal, and the selection transistor is configured to output the second signal. The amplifying transistor, the first transistor, the second transistor, and the selection transistor are arranged side by side in a first direction, and The electrical conductor is positioned between the first transistor and the second transistor in the plan view.

10. The photodetector according to claim 1, wherein, The electrical conductor includes wiring that is provided with a predetermined potential.

11. The photodetector of claim 10, further comprising: The first wiring is electrically connected to the first transistor; as well as The second wiring is electrically connected to the second transistor, wherein... The first transistor is configured to output the first signal to the first wiring, and The electrical conductor is disposed between the first wiring and the second wiring.

12. The photodetector according to claim 11, further comprising a second floating diffuser, wherein, The second wiring is electrically connected to the second floating diffuser.

13. The photodetector according to claim 10, further comprising: Second floating diffusion section; as well as The transmission transistor is configured to transfer the charge obtained by conversion through the second photoelectric conversion element to the second floating diffusion section, wherein... The electrical conductor includes wiring that is electrically connected to the gate of the transmission transistor.

14. The photodetector according to claim 10, wherein, The second readout circuit includes a select transistor and a reset transistor, and The electrical conductor includes wiring electrically connected to the gate of the select transistor or wiring electrically connected to the gate of the reset transistor.

15. The photodetector according to claim 10, wherein, The first semiconductor layer has a first surface and a second surface located on the opposite side of the first surface, and The electrical conductor is configured to reach at least the second surface of the first semiconductor layer.

16. A photodetector comprising: The first photoelectric conversion element converts light into photoelectric value; A first readout circuit includes a first transistor disposed on a first surface side of a first semiconductor layer, the first readout circuit being configured to output a first signal based on a charge obtained by conversion by the first photoelectric conversion element; The second photoelectric conversion element performs photoelectric conversion on light; The second readout circuit includes a second transistor disposed on the first surface side of the first semiconductor layer and adjacent to the first transistor, the second readout circuit being configured to output a second signal based on the charge obtained by the conversion of the second photoelectric conversion element; as well as An insulator disposed in the first semiconductor layer between the first transistor and the second transistor.

17. The photodetector of claim 16, further comprising: A signal line configured to transmit the first signal; as well as The second floating diffusion section, wherein... The first transistor is electrically connected to the signal line, and The second transistor is electrically connected to the second floating diffusion section.

18. The photodetector of claim 16, further comprising an insulating film disposed around the first transistor and the second transistor, wherein, The dielectric constant of the insulator is lower than that of the insulating film.

19. The photodetector of claim 16, further comprising a second semiconductor layer, the second semiconductor layer comprising the first photoelectric conversion element and the second photoelectric conversion element, wherein, The first semiconductor layer is stacked on the second semiconductor layer.

20. An electronic device comprising: Optical system; as well as A photodetector that receives light transmitted through the optical system, wherein the photodetector comprises: The first photoelectric conversion element converts light into photoelectric value; A first readout circuit includes a first transistor disposed on a first surface side of a first semiconductor layer, the first readout circuit being configured to output a first signal based on a charge obtained by conversion by the first photoelectric conversion element; The second photoelectric conversion element performs photoelectric conversion on light; A second readout circuit includes a second transistor disposed on the first surface side of the first semiconductor layer and adjacent to the first transistor, the second readout circuit being configured to output a second signal based on the charge obtained by the conversion of the second photoelectric conversion element; and An electrical conductor is disposed between the first transistor and the second transistor.

Images