Storage control system and storage control method

Abstract

The invention discloses a storage control system and a storage control method, and relates to the technical field of computers, and cold and hot data identification work in a computer fast interconnection memory heterogeneous system is executed in a storage controller of a storage device. The identification precision of the data access popularity of the data unit in the storage controller is remarkably improved, the storage controller reports the candidate data unit according to the data access popularity, and the management controller determines the source device and the target device from the storage device according to the information of the candidate data unit reported by the storage controller. The method comprises the following steps: acquiring a source device, determining a to-be-migrated data unit in the source device, controlling the to-be-migrated data unit to be migrated from the source device to a target device, and updating an address mapping table in an exchange controller between a storage device and a computing node, thereby realizing a host-unperceived cold and hot data identification and data migration scheme. And the cold and hot data migration performance of the computer fast interconnection memory heterogeneous system is obviously improved.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of computer, and in particular, to a storage control system and a storage control method. BACKGROUND

[0002] With the development of computer interconnection technology, the memory expansion technology based on Compute Express Link (CXL) enables high-performance computing nodes to flexibly connect CXL memories through CXL switches, thereby realizing a flexible memory connection mode. In a CXL memory heterogeneous system, there are storage devices with different read-write performance, and it is necessary to reasonably allocate matching storage media according to the frequency of data access in the storage device, so as to improve system performance and resource utilization. However, the target depends on the low precision of the hot and cold data identification work of the host operating system, and the performance of the CXL memory heterogeneous system is limited after controlling data migration.

[0003] How to improve the hot and cold data migration performance of the CXL memory heterogeneous system is a technical problem to be solved by those skilled in the art. SUMMARY

[0004] The present application provides a storage control system and a storage control method to at least solve the problem of low precision of hot and cold data identification work of the host operating system in the related art, which leads to poor hot and cold data migration performance.

[0005] The present application provides a storage control system, comprising: a management controller and a storage controller. The storage controller is configured to monitor the data access heat of the storage device, determine a candidate data unit according to the data access heat, and report the information of the candidate data unit to the management controller. The management controller is configured to determine a source device and a target device from the storage device according to the information of the candidate data unit reported by the storage controller, determine a data unit to be migrated in the source device, control the migration of the data unit to be migrated from the source device to the target device, and update an address mapping table in an exchange controller between the storage device and a computing node. The exchange controller is a CXL exchange controller, the storage device is a CXL storage device, and the address mapping table is a mapping table of the system physical address of the computing node and the device physical address of the storage device.

[0006] The present application also provides a storage control method applied to a management controller, comprising: receiving a candidate data unit monitored by a storage controller and reported by a storage device; determine a source device and a target device from the storage device according to the information of the candidate data unit reported by the storage controller, and determine a data unit to be migrated in the source device; control migration of the data unit to be migrated from the source device to the target device; update an address mapping table in a switch controller between the storage device and the computing node; The switch controller is a computer fast interconnection switch controller, and the storage device is a computer fast interconnection storage device. The address mapping table is a mapping table of a system physical address of the computing node and a device physical address of the storage device.

[0007] According to the application, the hot and cold data recognition in the computer fast interconnection memory heterogeneous system is executed in the storage controller of the storage device, compared with the traditional hot and cold data monitoring scheme based on the host operating system, the recognition accuracy of the data access heat of the data unit in the storage controller can be improved, the candidate data unit is reported by the storage controller according to the data access heat, the source device and the target device are determined from the storage device according to the information of the candidate data unit reported by the storage controller, the data unit to be migrated in the source device is determined, the data unit to be migrated is controlled to be migrated from the source device to the target device, and the address mapping table in the switch controller between the storage device and the computing node is updated, so that a host-agnostic hot and cold data recognition and data migration scheme is realized. By improving the recognition accuracy of the hot and cold data, the hot and cold data migration performance of the computer fast interconnection memory heterogeneous system is improved. BRIEF DESCRIPTION OF DRAWINGS

[0008] In order to more clearly illustrate the embodiments of the application, the drawings needed in the embodiments will be briefly introduced. Obviously, the drawings in the following description are only some embodiments of the application, and other drawings can be obtained by those skilled in the art without creative labor.

[0009] Figure 1 An architecture diagram of a storage control system is provided for the embodiments of the application. Figure 2 A flowchart of a storage control method is provided for the embodiments of the application. DETAILED DESCRIPTION

[0010] With reference to the drawings of the embodiments of the present application, the technical solutions in the embodiments of the present application will be clearly and completely described, obviously, the described embodiments are only part of the embodiments of the present application, rather than all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative work fall within the protection scope of the present application.

[0011] It should be noted that, in the description of the present application, the term "comprising", "containing" or any other variant thereof is intended to cover the non-exclusive inclusion, so that the process, method, article or device including a series of elements not only includes those elements, but also includes other elements not explicitly listed, or includes the elements inherent to such process, method, article or device. The terms "first", "second" and the like in the present application are used to distinguish similar objects, and are not used to describe a specific order or sequence.

[0012] In order to make the technical personnel in the technical field better understand the present application scheme, the present application will be further described in detail below in combination with the drawings and specific embodiments.

[0013] Some key terms used in the embodiments of the present application will be explained first.

[0014] In the traditional operating system, the data migration across media is usually scheduled by the kernel thread, which is realized by locking the page table, suspending access, copying data and updating the mapping. This kind of mechanism has obvious defects: on the one hand, the host needs to participate in each page migration operation, which increases the system complexity and scheduling overhead; on the other hand, in order to ensure data consistency, the access to the target page by the upper layer application is often blocked, which affects the response time delay, especially in the high concurrency and real-time requirement scene. And this problem is particularly serious in the high concurrency and low delay requirement scene of the computer fast interconnection system. Therefore, there is an urgent need for a cross-media data migration mechanism which is transparent to host access, does not need to modify the page table, does not cause interruption, and considers how to sink the control logic to the device side to realize asynchronous, automatic and transparent data transfer through hardware.

[0015] To solve the above problems, the application provides a storage control system, method, storage medium and computer program product, which sinks the hot and cold data identification work in a computer fast interconnection memory heterogeneous system to the storage controller of the storage device for execution, compared with the traditional hot and cold data monitoring scheme based on the host operating system, the identification accuracy of the data access heat of the data unit in the storage controller can be significantly improved, the candidate data unit is reported by the storage controller according to the data access heat, the source device and the target device are determined from the storage device by the management controller according to the information of the candidate data unit reported by the storage controller, and the data unit to be migrated in the source device is determined, the data unit to be migrated is controlled to be migrated from the source device to the target device, and the address mapping table in the exchange controller between the storage device and the computing node is updated, a host-agnostic hot and cold data identification and data migration scheme is realized, and the hot and cold data migration performance of the computer fast interconnection memory heterogeneous system is significantly improved by improving the accuracy of hot and cold data identification.

[0016] Figure 1 A storage control system architecture diagram is provided for the embodiments of the application.

[0017] As shown in Figure 1 The storage control system provided by the embodiments of the application can include a management controller and a storage controller, wherein the storage controller is used to monitor the data access heat of the storage device, determine the candidate data unit according to the data access heat, the management controller is used to determine the source device and the target device from the storage device according to the information of the candidate data unit reported by the storage controller, determine the data unit to be migrated in the source device, control the data unit to be migrated to be migrated from the source device to the target device, and update the address mapping table in the exchange controller between the storage device and the computing node, the exchange controller is a computer fast interconnection exchange controller, the storage device is a computer fast interconnection storage device, and the address mapping table is a mapping table of the system physical address of the computing node and the device physical address of the storage device.

[0018] The computer fast interconnection (CXL) is an open standard supporting cache consistency, high bandwidth and low delay interconnection, which can be used to build a system architecture of power pooling, memory pooling and resource decoupling. Through the computer fast interconnection protocol, the system can access the remote computer fast interconnection memory device (CXL Type 3 memory device) into the host system, realizing the cross-node sharing and on-demand dynamic expansion of memory resources.

[0019] As shown in Figure 1As shown, in the computer fast interconnection system, the first port of the switch controller is connected to the computing node, and the second port of the switch controller is connected to the storage device. At the hardware level, the computing node and the switch controller and the switch controller and the storage device can be connected based on the high-speed serial computer expansion bus (Peripheral Component Interconnect Express, PCIe). At the protocol level, the computing node and the switch controller and the switch controller and the storage device are connected based on the computer fast interconnection protocol.

[0020] The number of computing nodes can be one or more. The type of computing node can include a general-purpose computing node and an accelerated computing node. The general-purpose computing node is a host with a central processing unit (CPU) as the computing core. The accelerated computing node uses an acceleration card as the computing core, which can include but is not limited to a graphics processing unit (GPU) and a field programmable gate array (FPGA).

[0021] The number of storage devices can be one or more, which are configured as computer fast interconnection memories. The type of storage device can be one or more, which can include but is not limited to dynamic random access memory (DRAM) and solid state drive (SSD). Due to the significant differences in delay, bandwidth, cost, and energy efficiency of different types of storage devices, for example, dynamic random access memory has lower delay and higher bandwidth, which is suitable for hot data; solid state drive has larger capacity but higher delay, which is suitable for cold data. Therefore, it is necessary to accurately identify the cold data and hot data in the memory medium, and reasonably allocate them to the matching memory medium to ensure system performance and resource utilization.

[0022] The switch controller is used to forward data between the computing node and the storage device, i.e. to forward the memory access task of the computing node to the storage device, the type of memory access task includes reading data task and writing data task, and to forward the data read from the storage device or the write completion information feedback to the computing node.

[0023] The number of switch controllers can be one or more. If the number of switch controllers is more than one, the switch controllers can be in full interconnection form, i.e. there is a direct connection between any two switch controllers, to realize that the access path length is the same when any computing node in the computer fast interconnection memory heterogeneous system accesses any storage device.

[0024] The management controller provided in the embodiments of the present application can be implemented based on a management controller in a switch (CXL Switch). The management controller in the switch is an upper controller for managing the switch controller, and can be implemented by using a microprocessor (mCPU). The management controller provided in the embodiments of the present application can also be implemented in another device other than the devices described above.

[0025] As shown in FIG. 1, in the management controller, a scheduling control module, a hybrid media-aware mapping module, a migration control module and a remapping unit can be deployed. Figure 1

[0026] The computing node sends a memory access task based on a system physical address to the storage device, and the switch controller queries a local address mapping table to determine the corresponding storage device and the target device physical address, so as to forward the memory access task to the corresponding storage device. In this process, the management controller accesses the switch controller to obtain the information of the memory access task and the address mapping table, so as to realize the hot and cold data identification of the data units in the storage device and the data migration control.

[0027] The data hotness identification module of the storage controller deployed in the storage device monitors the access hotness of the data units in the storage device, so as to determine candidate cold data and candidate hot data as candidate data units.

[0028] In the embodiments of the present application, the data units for monitoring can be pages (Page), which are the basic units for memory management of an operating system. The operating system divides a virtual memory space into blocks of fixed size, and each block is called a page. Common page sizes include 4KB, 8KB, etc. The system physical address of a page is a physical memory address of the page maintained by a host operating system, i.e., a physical memory address seen by the host. Each page is allocated a fixed-size continuous memory region in the physical memory. Assuming that the size of the page in the system is 4KB, and the physical memory is allocated from address 0, the 0th page has a physical address range of 0 to 4095 (0x0000 to 0x0FFF), the 1st page has a physical address range of 4096 to 8191 (0x1000 to 0x1FFF), and so on. The device physical address is the actual address of the page in the storage device. In the embodiments of the present application, the data hotness identification module can use the initial address of the page and the size of the page as the address information for monitoring the page.

[0029] ​The management controller deploys a scheduling control module for realizing scheduling coordination management of memory data migration in a computer fast interconnection memory heterogeneous system. If the management controller is in a switch, the scheduling control module can be a structured management (FM) module deployed in the management controller in the switch. If the management controller is in a device other than the switch, after initialization of the storage device is performed by the structured management module, the scheduling control module interacts with the structured management module to realize subsequent functions.

[0030] Based on the structured management module, the management controller uniformly schedules and coordinately manages the computing nodes and the storage devices of multiple storage medium types accessing the computer fast interconnection memory heterogeneous system, and can be specifically used for performing initialization of the storage device, resource scheduling, data migration task instruction issuing, migration state tracking and the like, and is a control logic core of the memory data migration task. In the system initialization stage of the computer fast interconnection memory heterogeneous system, the structured management module performs discovery and registration operations on the storage devices accessing the computer fast interconnection memory heterogeneous system, and can specifically include recording the capacity, bandwidth, delay and the like of each storage device, and establishing a system topology map to clearly show the connection relationship, routing path and load distribution situation between the devices. The structured management module can also support the hot plug capability of the device, and update the memory pool topology and configuration table in real time to provide dynamic support for subsequent resource allocation and migration.

[0031] In the system running stage, the data hotness identification module monitors the access hotness of the data units in the storage devices of the computer fast interconnection memory heterogeneous system according to the system topology map.

[0032] The data hotness identification module in the storage controller can include a hot data identification module and / or a cold data identification module, which is configured to screen out candidate data units from the data units according to a preconfigured screening condition of the data units needing to be migrated, and report the candidate data units to the scheduling control module of the management controller, so that the scheduling control module determines the data units to be migrated from the candidate data units.

[0033] Then, the management controller determines the data units to be migrated and the target devices thereof according to the information of the candidate data units reported by the storage controller.

[0034] Specifically, for the candidate hot data reported by the data hotness identification module, the scheduling control module can check the idle condition of the storage device with higher performance than the source device in the computer fast interconnection memory heterogeneous system, and if available, select the target device and allocate the target physical address, and coordinate the source device and the target device to initiate migration. For the candidate cold data reported by the data hotness identification module, the scheduling control module can check the idle condition of the storage device with lower performance than the source device in the computer fast interconnection memory heterogeneous system, and if available, select the target device and allocate the target physical address, and coordinate the source device and the target device to initiate migration. That is, the scheduling control module is used to pair the source address in the source device and the target address in the target device, access arbitration, etc. before data migration, and monitor the migration process to ensure that the migration action is complete, error-free and timely clean up the old data in the source device.

[0035] In addition, the structured management module can also be used to interface with the system-level topology configuration interface (such as Advanced Configuration and Power Interface (ACPI), System Resource Affinity Table (SRAT), etc.), to support device hot plug, multi-host sharing, or optimize host scheduling strategy when the migration scale is large. The structured management module can selectively update the system description table (in addition to ACPI, SRAT, it can also include Heterogeneous Memory Attribute Table (HMAT), Cache Hierarchy Discovery Table (CDAT), etc.), to assist the host operating system to perceive the macro changes of topology or resource state, but this does not affect the access transparency of the single page migration process.

[0036] The address mapping controller is used to maintain the mapping relationship between the system physical address of the host system and the device physical address of the storage device, and works with each CXL Type 3 memory device. In the embodiment of the present application, the address mapping controller needs to realize the address transparency guarantee in the cross-media page migration process, to ensure that the logical address (i.e. system physical address) of the host remains unchanged, and the actual physical location of the data unit (i.e. device physical address) is dynamically adjusted according to the system strategy, thereby realizing the data migration capability without awareness of the application program.

[0037] In the system running, the address mapping controller is used to maintain the address mapping table between the system physical address and the device physical address, each table entry records a system physical address corresponding device physical address and medium information. When the computing node initiates a memory access request, the request first reaches the switch, and the address mapping controller queries the mapping relationship of the target data unit in the memory access request, analyzes the target storage device to be accessed and its device physical address in the target storage device, and forwards the memory access request to the target storage device to execute the operation. This process is completely transparent to the host (computing node), without modifying the page table or virtual address mapping, ensuring that the operating system level is not aware.

[0038] In the process of data migration, the address mapping controller is used to redirect the address of the to-be-migrated data unit after the to-be-migrated data unit is successfully migrated to the target device, and update the device physical address of the source device pointed by the system physical address of the to-be-migrated data unit to the device physical address in the target device.

[0039] To improve the resource awareness ability and cross-media scheduling efficiency of the hot and cold data migration process, the embodiment of the present application can use the mixed media awareness decision module to coordinate the scheduling control module and the address mapping controller to comprehensively evaluate the state parameters of each storage device in the computer fast interconnection memory heterogeneous system, combine the access parameters of the candidate data unit, intelligently judge the target device most suitable for storing the candidate data unit, and achieve the dual goals of optimal performance and maximum resource utilization, and realize the efficient memory migration strategy.

[0040] In the process of controlling data migration, the migration control module deployed in advance in the storage controller calls the direct memory access (Direct Memory Access, DMA) channel between the source device and the target device to realize the data migration from the source device to the target device without the awareness of the host.

[0041] The storage control system provided by the embodiment of the present application can significantly improve the identification accuracy of the data access hotness of the data unit in the storage controller by sinking the hot and cold data identification work in the computer fast interconnection memory heterogeneous system to the storage controller of the storage device for execution compared with the traditional hot and cold data monitoring scheme based on the host operating system. The storage controller reports the candidate data unit according to the data access hotness. The management controller determines the source device and the target device from the storage device according to the information of the candidate data unit reported by the storage controller, and determines the to-be-migrated data unit in the source device. The to-be-migrated data unit is controlled to be migrated from the source device to the target device, and the address mapping table in the exchange controller between the storage device and the computing node is updated. A host-agnostic hot and cold data identification and data migration scheme is implemented, and the hot and cold data migration performance of the computer fast interconnection memory heterogeneous system is significantly improved by improving the accuracy of the hot and cold data identification.

[0042] On the basis of the above-mentioned embodiment, the storage controller in the storage control system is further introduced in the embodiment of the present application.

[0043] In the embodiment of the present application, the storage device can implement hot and cold identification of the locally stored data by deploying a data hotness identification module.

[0044] In some optional embodiments of the embodiment of the present application, the storage device can include two types corresponding to different read-write rates. The storage controller in the storage device with a higher read-write rate is used to identify the candidate cold data in the storage device, and the storage controller in the storage device with a lower read-write rate is used to identify the candidate hot data in the storage device. The candidate cold data and the candidate hot data are candidate data units.

[0045] The storage device with a higher read-write rate can be CXL-DRAM, and the storage device with a lower read-write rate can be CXL-SSD.

[0046] That is to say, when monitoring the cold data in the storage device of the high-performance storage medium, the access frequency of all data units in the storage device needs to be monitored because the data unit with the highest hotness needs to be selected. When monitoring the cold data in the storage device of the low-performance storage medium, only the data unit with high hotness needs to be monitored, and the access hotness of all data units does not need to be mastered, so the access frequency of the data unit with high access frequency can be recorded.

[0047] In some optional embodiments of the present application, the storage device can include three or more types corresponding to different read-write speeds; the storage controller in the storage device with the highest read-write speed is configured to identify candidate cold data in the storage device, the storage controller in the storage device with the lowest read-write speed is configured to identify candidate hot data in the storage device, and the storage controllers in the other types of storage devices are configured to identify candidate cold data and candidate hot data in the storage devices; the candidate cold data and the candidate hot data are candidate data units.

[0048] In the embodiments of the present application, the storage controller identifying candidate hot data in the storage device can include: sampling read-write operations from the computer fast interconnection link, and storing the corresponding data unit address and the corresponding access frequency into a first record table; every first preset time, scanning the first record table, and recording data units with an access frequency greater than a first access frequency as candidate hot data.

[0049] Specifically, a two-dimensional array table can be created in the storage controller, all remote read / write operations from the computer fast interconnection link to the local are sampled, the destination data unit address thereof is obtained as a key input into the two-dimensional array table, and the corresponding access count in the table is incremented by 1. Every first preset time (which can be 10 seconds), the two-dimensional array table is scanned, and a threshold judgment is performed on all count estimates. If the access frequency of a certain data unit exceeds the first access frequency, the data unit is marked as candidate hot data, and the information (which can be a page number) of the candidate hot data is saved in a special hot page candidate cache for subsequent calling by a migration control module to use a direct memory access module.

[0050] In the embodiments of the present application, the storage controller identifying candidate cold data in the storage device can include: two bitmap registers are deployed in advance, the bitmap registers record the access state of the data address in the storage device; one of the bitmap registers is used as a current period register, and when a read-write operation from the computer fast interconnection link is received, the access state of the corresponding data unit address in the current period register is set to a first access state; after a second preset time interval, the other bitmap register is switched to the current period register, and the access states in the two bitmap registers are compared. If there is a data unit address with no access record for two consecutive periods, the data unit address is determined as candidate cold data.

[0051] Specifically, two bitmap registers (Bitmap_A and Bitmap_B) can be created in the storage controller, and the size of each bitmap register corresponds to the total number N of data units in the storage device, one of which is used as the current period register, and each time a local access task is received, the corresponding target data unit address is recorded as 1, and the other bit is recorded as 0. The bitmap registers are exchanged every second preset time interval, that is, the other bitmap register is used as the current period register, and by comparing the access records of the corresponding bit positions in the two bitmap registers, it is determined whether there is cold data (for example, data units without access records for two consecutive periods). The information (which can be a page number) of the candidate cold data is saved in a special cold page candidate cache, which is subsequently called by the migration control module to use the direct memory access module.

[0052] The embodiment of the application adopts different cold and hot data monitoring strategies for storage devices with different read and write rates, which is beneficial to the targeted optimization of cold and hot data identification in different storage devices with different read and write rates.

[0053] In the embodiment of the application, the management controller can also be used to send the information of the candidate hot data to the exchange controller, so that the exchange controller caches the mapping information of the system physical address and the device physical address corresponding to the candidate hot data. In this way, the table lookup delay of the exchange controller can be improved, and the performance of the exchange controller in executing access tasks can be improved.

[0054] The embodiment of the application further introduces the way of determining the data unit to be migrated.

[0055] In some optional embodiments of the embodiment of the application, the management controller determines the source device and the target device from the storage device according to the information of the candidate data unit reported by the storage controller, and determines the data unit to be migrated in the source device, which can include: if there is a candidate data unit, detecting the state information of the storage device; for the candidate hot data in the candidate data unit, if a first storage device satisfying a first load condition is detected, the storage device where the candidate hot data is located is determined as the source device, and the first storage device is determined as the target device; for the candidate cold data in the candidate data unit, if a second storage device satisfying a second load condition is detected, the storage device where the candidate cold data is located is determined as the source device, and the second storage device is determined as the target device; wherein the read and write rate of the first storage device is higher than that of the second storage device.

[0056] In some other optional implementation of the embodiments of the present application, the management controller is configured to determine the source device and the target device from the storage device according to the information of the candidate data unit reported by the storage controller, and determine the data unit to be migrated in the source device, which can include: calculating a performance score of the candidate data unit stored in the storage device according to the access parameter of the candidate data unit and the state parameter of the storage device; and determining the data unit to be migrated and the target device according to the performance score.

[0057] Specifically, the calculating of the performance score of the candidate data unit stored in the storage device according to the access parameter of the candidate data unit and the state parameter of the storage device can include: determining a first matching degree parameter between the candidate data unit and the storage device according to the access parameter of the candidate data unit and the performance attribute parameter of the storage device; and calculating the performance score of the candidate data unit stored in the storage device according to the first matching degree parameter and the state parameter of the storage device.

[0058] In a specific implementation, the determining of the first matching degree parameter between the candidate data unit and the storage device according to the access parameter of the candidate data unit and the performance attribute parameter of the storage device can include: pre-establishing a first corresponding table of the matching degree parameter between the access parameter of the data unit and the performance attribute parameter of the storage device; and querying the first corresponding table according to the access parameter of the candidate data unit and the performance attribute parameter of the storage device to determine the first matching degree parameter.

[0059] The type of the access parameter of the candidate data unit can include at least one of the access frequency corresponding to the candidate data unit, the read-write ratio, the sequential parameter, and the random parameter. Specifically, one or more types of access parameters can be set to multiple gears according to the range, and for one type of storage device, one matching degree parameter can be corresponded to each gear. For example, high-frequency random access is more suitable for DRAM, and sequential read-write is more suitable for SSD. The higher the matching degree parameter is, the more suitable the data unit is for being stored in the storage medium.

[0060] The calculating of the performance score of the candidate data unit stored in the storage device according to the first matching degree parameter and the state parameter of the storage device can include: obtaining a first weight corresponding to the first matching degree parameter and a second weight corresponding to the state parameter of the storage device; and performing weighted summation calculation on the first matching degree parameter and the state parameter of the storage device by using the first weight and the second weight to obtain the performance score.

[0061] The state parameter of the storage device includes at least one of the bandwidth usage of the storage device, the average access delay of the storage device, and the remaining capacity of the storage device.

[0062] In other words, by collecting the access parameters of candidate data units and the status parameters of each storage device during the current scheduling cycle, and substituting them into a preset performance scoring model, the performance score of the candidate data units after storage on the storage device can be obtained. This performance scoring model can be expressed by the following formula: ; in, For the first The candidate data unit is stored in the first... Performance ratings after each storage device; For the first The candidate data unit and the first Matching parameters for each storage device The weights for the matching degree parameter; For the first The bandwidth evaluation parameter of the first storage device can be used to represent the bandwidth evaluation parameter of the second storage device. The bandwidth usage of the storage device reflects the bandwidth usage of the first storage device. The current bandwidth availability of each storage device The weights for bandwidth evaluation parameters; For the first Average access latency per storage device Weights for average access latency; For the first Remaining available capacity of each storage device The weight of the remaining available capacity.

[0063] In the above performance scoring model, That is, the first weight. , , This is the second weight.

[0064] The aforementioned performance scoring model can be implemented based on the software module of the management controller. The memory data migration method provided in this embodiment of the invention may further include: obtaining system operating status parameters of the host computer rapid interconnect system; and updating the first weight and the second weight based on the system operating status parameters. That is, the first weight and the second weight can be dynamically adjusted and adaptively updated based on system operating feedback.

[0065] The performance scoring model described above can also be embedded as hardware logic, meaning it can be implemented using the logic circuitry of a programmable controller. Programmable controllers can be, but are not limited to, field-programmable gate arrays (FPGAs) and complex programmable logic devices (CPLDs).

[0066] In the embodiment of the present application, according to the performance score, the to-be-migrated data unit and the target device are determined, which can include: determining a first migration quantity of the to-be-migrated data unit corresponding to the current scheduling period; sorting the performance scores from high to low, determining a combination of a candidate data unit and a source device of a non-candidate data unit of the corresponding storage device in the first migration quantity, taking the candidate data unit as the to-be-migrated data unit of the current scheduling period, and taking the corresponding storage device as the target device.

[0067] The traditional data migration scheme directly migrates cold data to a low-performance storage medium and hot data to a high-performance storage medium, which is easy to cause resource mismatch. The method for determining the to-be-migrated data unit and the corresponding target device provided in the embodiment of the present application considers the adaptation relationship between the access characteristics of the data unit and the medium attribute, constructs an access-aware, storage medium modeling, and learning scoring mechanism, so that the data unit can fall into the most suitable storage medium, which further reduces the overall memory cost while ensuring performance improvement. The hybrid medium-aware decision module provided in the embodiment of the present application has good scalability and evolution capability. With the diversification of memory media (such as the introduction of new types of storage such as NVDIMM, ReRAM, PCM, etc.), the performance score model only needs to expand the medium attribute dimension and matching rules to support scheduling decisions for new types of devices. The entire scheduling strategy can be embedded as hardware logic or realized in the form of software and hardware cooperation, and is suitable for various deployment modes and computing platforms.

[0068] The embodiment of the present application further introduces the process of controlling memory data migration.

[0069] In the embodiment of the present application, the management controller controls the migration of the to-be-migrated data unit from the source device to the target device, and updates the address mapping table in the exchange controller between the storage device and the computing node, which can include: after the management controller controls the exchange controller to freeze the mapping table item of the system physical address corresponding to the to-be-migrated data unit, the management controller controls the migration of the to-be-migrated data unit from the source device to the target device; after the migration is completed, the management controller controls the exchange controller to update the device physical address corresponding to the system physical address corresponding to the to-be-migrated data unit in the address mapping table to the device physical address in the target device.

[0070] In the embodiment of the present application, the management controller updates the address mapping table in the exchange controller between the storage device and the computing node, which can include: after performing the migration of each to-be-migrated data unit, a corresponding migration completion message is sent to the exchange controller, so that the exchange controller performs an atomic level operation to update the address mapping table, and updates the device physical address corresponding to the system physical address corresponding to the to-be-migrated data unit in the address mapping table to the device physical address in the target device.

[0071] Specifically, when the scheduling control module issues the migration instruction, the address mapping controller first freezes the mapping table item corresponding to the system physical address, preventing new access requests from entering the page under migration; then, after the direct memory access module completes data transfer, it immediately performs an atomic-level system physical address mapping update operation, which points the system physical address originally mapped to the device physical address of the source device to the new device physical address in the target device.

[0072] In a specific implementation, the migration control module first cooperates with the local direct memory access engine to initialize the source address (DPA_src) and the target address (DPA_dst), and starts the data transfer process. The direct memory access channel writes the content of the data unit to be migrated from the source device to the target device through the computer express interconnect memory (CXL.mem) path in units of page granularity (usually 4KB) or larger block granularity (such as 2MB large page), realizing end-to-end data transmission.

[0073] Since the entire migration process is performed asynchronously within the device, and host access requests may continue to occur before the direct memory access is completed, it is necessary to solve the problems of "read-write conflict during migration" and "data consistency". To this end, the embodiment of the present application adopts a lightweight dual-path buffering mechanism. The basic principle is to maintain a pair of mirror buffer structures between the source address and the target address. During the data transfer process of direct memory access, the source device still serves as the server for host access requests, and all read and write requests are normally responded.

[0074] In some optional embodiments of the embodiment of the present application, the management controller controlling the migration of the data unit to be migrated from the source device to the target device can include: during the process of reading the data unit to be migrated from the source device and writing it to the target address of the target device, if it is detected that the exchange controller executes a write request of the computing node to the data unit to be migrated, the data of the write request is cached to the target buffer of the target device at the same time as the exchange controller executes the write request, so that after the migration of the data unit to be migrated is completed, the target device updates the data of the target address according to the data in the target buffer.

[0075] In some optional embodiments of the embodiment of the present application, the management controller controlling the migration of the data unit to be migrated from the source device to the target device can include: during the process of reading the data unit to be migrated from the source device and writing it to the target address of the target device, if it is detected that the exchange controller executes a write request of the computing node to the data unit to be migrated, the information of the write request is recorded in the write replay log of the target device, so that after the migration of the data unit to be migrated is completed, the target device updates the data of the target address according to the write replay log.

[0076] That is to say, the host can ensure that the page data seen by the host always remains consistent by synchronizing the write receipt of the source device to the target buffer of the target device or rewriting into the target page after the migration is completed. After the entire data transfer process is completed, the migration control module triggers a consistency verification process to confirm that the target page has been completely overwritten and is consistent with the source page state. At this time, the module sends a mapping switching request to the address mapping controller in the management controller, and the latter completes the atomic level SPA system physical address to device physical address mapping update. The host side is completely unaware of this process, and the update of the access path is automatically redirected to the new address of the target device by the address mapping controller or the address mapping table, without causing any application interruption.

[0077] In the embodiment of the present application, the management controller controls the migration of the data unit to be migrated from the source device to the target device, which can include: calling the direct memory access module of the source device and the direct memory access module of the target memory to write the data unit to be migrated from the source device to the target device.

[0078] The embodiment of the present application provides a storage control method, and the method is described in detail in combination with the execution flow of the storage control method.

[0079] Figure 2 A flowchart of a storage control method provided by the embodiment of the present application.

[0080] As shown in Figure 2 the storage control method provided by the embodiment of the present application applied to the management controller can include: S201: receiving a candidate data unit reported by a storage controller monitoring a data access heat of a storage device.

[0081] S202: determining a source device and a target device from the storage device according to the information of the candidate data unit reported by the storage controller, and determining a data unit to be migrated in the source device.

[0082] S203: controlling the migration of the data unit to be migrated from the source device to the target device.

[0083] S204: updating an address mapping table in an exchange controller between the storage device and a computing node.

[0084] The exchange controller is a computer fast interconnection exchange controller, and the storage device is a computer fast interconnection storage device; the address mapping table is a mapping table of a system physical address of the computing node and a device physical address of the storage device.

[0085] The embodiment of the application also provides a memory data migration method, which is based on a computer fast interconnection system that can be deployed in a CXL switch architecture cabinet with multi-host capability, and comprises the following key hardware units: at least one computing node, which can run a general x86 architecture server operating system; a management controller, which deploys a scheduling control module, a hybrid medium awareness decision module and an address mapping controller provided by the embodiment of the application, and the management controller can be realized based on a management controller implementer in the switch; at least two CXL Type 3 memory expansion devices, which can be high-performance CXL-DRAM and large-capacity CXL-SSD respectively; and a storage controller of each storage device, which deploys a migration control module and a data hotness identification module, and can be a hot data identification module and / or a cold data identification module.

[0086] The implementation steps can comprise: step 1: system initialization and topology awareness.

[0087] In the system power-on starting phase, the structured management module in the management controller is first started to identify and initialize all connected computing nodes and storage devices as CXL Type 3 memories, including: enumerating the CXL Type 3 devices existing in the system; identifying the device types (DRAM or SSD), capacities, bandwidths, time delays and other key performance indicators; constructing a system topology graph and registering a resource table to identify the link paths between devices, NUMA attributes and the like; initializing the mapping table structure of the address mapping controller to establish an initial system physical address→device physical address mapping relationship; and interfacing with the ACPI / SRAT and other topology management tables of the host operating system to complete system awareness.

[0088] Step 2: page access behavior collection and hot / cold page identification.

[0089] During the system running, the computing nodes continuously initiate read / write requests to the CXL memory pool, and the storage controller of each storage device deploys a data hotness identification module to monitor the access behavior.

[0090] Specifically, a hot data identification module can be deployed on the CXL-SSD, which continuously samples the read / write requests from the host, counts the access frequency of the page address, and performs scanning at a fixed period (for example, every 10 ms) to filter out data units with an access frequency exceeding a first access frequency as candidate hot data.

[0091] A cold data identification module can be deployed on the CXL-DRAM device, which periodically (for example, every 20 ms) rotates the active bitmap and compares the data units that are not accessed in the two periods to identify candidate cold data.

[0092] The data hotness identification module reports the address information of the candidate data units to the scheduling control module for scheduling decision.

[0093] Step 3: Scheduling decision and target media evaluation.

[0094] After receiving the information of the candidate data unit, the scheduling control module calls the hybrid media awareness module to select the target device. The hybrid media awareness module collects the access parameters (such as frequency, read-write ratio, randomness) of the candidate data unit, and evaluates the state parameters (such as remaining capacity, bandwidth occupancy, average access delay, etc.) of all storage devices in the system, calls the performance scoring model to calculate the performance score of the candidate data unit on each storage device, selects the optimal combination of the candidate data unit and its corresponding storage device as the data unit to be migrated and its corresponding target device, and returns the address information of the data unit to be migrated and the information of the target device (which can be the device number).

[0095] Step 4: Migration preparation and address mapping freezing.

[0096] The scheduling control module generates a migration instruction based on the address information of the data unit to be migrated and the information of the target device, which can include the source device physical address, the target device physical address, and the corresponding system physical address. The migration instruction is sent to the source device and the target device respectively to start the direct memory access data transfer process. In addition, the host's access to the data unit to be migrated still points to the source device physical address, which is responded by the source device.

[0097] Step 5: Page data transfer and consistency guarantee.

[0098] The migration control modules inside the source device and the target device start the direct memory access engine, and copy the content of the data unit to be migrated from the source device to the target device along the computer fast interconnect link at the granularity of data units (which can be pages). To ensure data consistency during the transfer process, the following mechanisms can be used: during the migration, the source device continues to respond to host requests; for write operations, a bijective cache or write log mechanism is used to synchronize data updates to the target buffer; after the transfer is completed, consistency verification is performed to ensure that the target page content is consistent with the source page.

[0099] Step 6: Address mapping switching and resource update.

[0100] When the data transfer is completed and the target address consistency verification is passed, the migration control module sends a "mapping switching request" to the address mapping controller, which performs the following operations: atomically updates the system physical address → device physical address mapping item, sets the target address as the new mapping address; updates the device physical address corresponding item in the address mapping controller for subsequent fast table lookup; notifies the scheduling control module to release the source address resources and recycle the old device physical address. This switching is completely transparent to the host operating system, the access path is automatically updated, and there is no need to modify the page table or interrupt service.

[0101] Step 7: Migration completion and state cleanup.

[0102] After the migration is completed, the scheduling control module updates the system topology resource table and the device load state, and the system can continue to identify the cold and hot data and perform the migration scheduling, thereby forming a continuous dynamic optimization resource management cycle.

[0103] Through the description of the above embodiments, those skilled in the art can clearly understand that the method according to the above embodiments can be realized by means of software and the necessary general hardware platform, and of course, it can also be realized by hardware, but in many cases, the former is a better embodiment.

[0104] The embodiment of the present application also provides a storage control device, which can comprise: a scheduling control module, configured to receive candidate data units reported by a storage controller monitoring data access hotness of a storage device. A hybrid media awareness decision module, configured to determine a source device and a target device from the storage device according to information of the candidate data units reported by the storage controller, and determine a to-be-migrated data unit in the source device. A migration control module, configured to control migration of the to-be-migrated data unit from the source device to the target device. An address mapping controller, configured to update an address mapping table in a switch controller between the storage device and a computing node. The switch controller is a computer fast interconnection switch controller, and the storage device is a computer fast interconnection storage device; and the address mapping table is a mapping table of a system physical address of the computing node and a device physical address of the storage device.

[0105] The description of the features in the embodiment of the storage control device can refer to the related description of the embodiment of the storage control method, which will not be repeated here.

[0106] The embodiment of the present application also provides an electronic device, comprising a memory and a processor, the memory stores a computer program, and the processor is configured to run the computer program to execute the steps in any one of the above storage control method embodiments.

[0107] The embodiment of the present application also provides a non-volatile storage medium, which stores a computer program, wherein the computer program is configured to execute the steps in any one of the above storage control method embodiments when running.

[0108] In an exemplary embodiment, the above non-volatile storage medium can include but is not limited to: a U disk, a read-only memory (ROM), a random access memory (RAM), a mobile hard disk, a magnetic disk or an optical disk, and various media that can store computer programs.

[0109] Embodiments of the present application also provide a computer program product comprising a computer program which, when executed by a processor, implements the steps of any of the above-mentioned storage control method embodiments.

[0110] Embodiments of the present application also provide another computer program product comprising a non-transitory storage medium storing a computer program which, when executed by a processor, implements the steps of any of the above-mentioned storage control method embodiments.

[0111] Those skilled in the art will further appreciate that the units and algorithm steps of the examples described in connection with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or both. In order to clearly illustrate the interchangeability of hardware and software, and to avoid obscuring the disclosure, the aforementioned examples have been described in general terms above with reference to the drawings. Whether the functions are performed in hardware or software depends on the particular application and design constraints. Those skilled in the art can implement the described functions in different ways for each particular application, but such implementation should not be considered to be beyond the scope of the present application.

[0112] The above describes in detail a storage control system and a storage control method provided by the present application. The principles and implementation modes of the present application are described by applying specific examples in this document. The above description of the examples is only applicable to help understand the method of the present application and its core idea. It should be noted that, for those skilled in the art, without departing from the principles of the present application, a number of improvements and modifications can be made to the present application. These improvements and modifications also fall within the scope of protection of the present application.

Claims

1. A storage control system characterized by comprising: The application relates to a computer fast interconnection system, comprising: a management controller and a storage controller; wherein the storage controller is used for monitoring data access heat of a storage device where the storage controller is located, and determining candidate data units according to the data access heat; the management controller is used for determining a source device and a target device from the storage device according to information of the candidate data units reported by the storage controller, determining to-be-migrated data units in the source device, controlling migration of the to-be-migrated data units from the source device to the target device, and updating an address mapping table in an exchange controller between the storage device and a computing node; the exchange controller is a computer fast interconnection exchange controller, the storage device is a computer fast interconnection storage device, and the address mapping table is a mapping table of system physical addresses of the computing node and device physical addresses of the storage device.

2. The storage control system of claim 1, wherein, The storage device comprises two types corresponding to different read-write rates. Wherein the storage controller in the storage device with a higher read-write rate is used for identifying candidate cold data in the storage device, and the storage controller in the storage device with a lower read-write rate is used for identifying candidate hot data in the storage device. The candidate cold data and the candidate hot data are the candidate data units.

3. The storage control system of claim 1, wherein, The storage device comprises three types or more corresponding to different read-write rates. Wherein the storage controller in the storage device with the highest read-write rate is used for identifying candidate cold data in the storage device, the storage controller in the storage device with the lowest read-write rate is used for identifying candidate hot data in the storage device, and the other types of storage devices are used for identifying the candidate cold data and the candidate hot data in the storage devices. The candidate cold data and the candidate hot data are the candidate data units.

4. The storage control system according to claim 2 or 3, characterized by, The storage controller identifying the candidate hot data in the storage device comprises: sampling read-write operations from a computer fast interconnection link, and storing corresponding data unit addresses and corresponding access frequencies into a first record table; every first preset time, scanning the first record table, and recording data units with access frequencies greater than a first access frequency as the candidate hot data.

5. The storage control system according to claim 2 or 3, characterized by, The storage controller identifying the candidate cold data in the storage device comprises: pre-deploying two bitmap registers, wherein the bitmap registers record access states of data addresses in the storage device; taking one of the bitmap registers as a current period register, setting an access state of a corresponding data unit address in the current period register to a first access state when a read-write operation from a computer fast interconnection link is received; after a second preset time, switching to another bitmap register as the current period register, and comparing the access states in the two bitmap registers, if there are data unit addresses without access records in two continuous periods, the data unit addresses are determined as the candidate cold data.

6. The storage control system of claim 1, wherein, The management controller determines a source device and a target device from the storage devices according to information of the candidate data unit reported by the storage controller, and determines a data unit to be migrated in the source device, including: If the candidate data unit exists, detecting state information of the storage device; For candidate hot data in the candidate data unit, if a first storage device satisfying a first load condition is detected, the storage device where the candidate hot data is located is determined as the source device, and the first storage device is the target device; For candidate cold data in the candidate data unit, if a second storage device satisfying a second load condition is detected, the storage device where the candidate cold data is located is determined as the source device, and the second storage device is the target device; Wherein, the read-write rate of the first storage device is higher than that of the second storage device.

7. The storage control system of claim 1, wherein, The management controller controls migration of the data unit to be migrated from the source device to the target device, and updates an address mapping table in a switching controller between the storage device and the computing node, including: The management controller controls the switching controller to freeze a mapping table item of a system physical address corresponding to the data unit to be migrated, and then controls migration of the data unit to be migrated from the source device to the target device; After the migration is completed, the switching controller updates a device physical address corresponding to the system physical address corresponding to the data unit to be migrated in the address mapping table to a device physical address in the target device.

8. The storage control system of claim 1, wherein, The management controller controls migration of the data unit to be migrated from the source device to the target device, including: In the process of reading the data unit to be migrated from the source device and writing it to a target address of the target device, if the switching controller is detected to execute a write request of the computing node to the data unit to be migrated, the management controller caches data of the write request to a target buffer of the target device while the switching controller executes the write request, so that the target device updates data of the target address according to the data in the target buffer after the migration of the data unit to be migrated is completed.

9. The storage control system of claim 1, wherein, The management controller controls migration of the data unit to be migrated from the source device to the target device, including: In the process of reading the data unit to be migrated from the source device and writing it to a target address of the target device, if the switching controller is detected to execute a write request of the computing node to the data unit to be migrated, the management controller records information of the write request in a write replay log of the target device, so that the target device updates data of the target address according to the write replay log after the migration of the data unit to be migrated is completed.

10. A storage control method characterized by comprising: Applied to a management controller, including: Receiving a candidate data unit reported by a storage controller monitoring data access heat of a storage device; According to information of the candidate data unit reported by the storage controller, determining a source device and a target device from the storage devices, and determining a data unit to be migrated in the source device; controlling migration of the to-be-migrated data units from the source device to the target device; updating an address mapping table in a switch controller between the storage device and the computing node; wherein the switch controller is a computer fast interconnection switch controller, the storage device is a computer fast interconnection storage device, and the address mapping table is a mapping table of system physical addresses of the computing node and device physical addresses of the storage device.

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