Hardware interrupt control method and electronic device

Abstract

The application discloses a hardware interrupt control method and electronic equipment, and relates to the technical field of computers. The application adjusts the fault threshold of triggering a hardware interrupt and the preset time length of a timer in a polling mode. After polling is completed, the fault threshold of triggering a hardware interrupt and the preset time length of a timer in the polling mode are adjusted according to the fault threshold of triggering a hardware interrupt last time, the preset time length of a timer, the fluctuation of each polling cycle in polling and the hardware error count, and the adjustment is repeatedly performed until the fault threshold of triggering a hardware interrupt and the preset time length of a timer in the polling mode are stabilized at a fixed value, so that balanced storage performance and fault positioning performance are achieved.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of computers, and particularly relates to a hardware interrupt control method and an electronic device. BACKGROUND

[0002] When a storage device stores data, correctable errors (CE) and uncorrectable errors (UCE) may exist, and when an error occurs, the error position needs to be located for fault repair for uncorrectable errors. In the fault locatability of a storage device, the CPU part is the most complex, and the hardware fault classification includes CE / UCE errors of the CPU itself, CE / UCE errors of the memory, and CE / UCE errors of a PCIe device. When a hardware fault occurs, it is needed to judge whether to start a hardware interrupt (SMI interrupt) of the CPU, and after the fault type and position are analyzed in the hardware interrupt, the hardware interrupt is sent to a BMC, and the BMC is recorded in a SEL log. However, frequent hardware interrupts will affect the storage service performance. Therefore, the storage performance and the fault locatability are contradictory, and need to be balanced. SUMMARY

[0003] The present application provides a hardware interrupt control method and an electronic device, to at least solve the problem that the storage performance and the fault locatability of a storage device are contradictory in the related art, and frequent hardware interrupts will affect the storage service performance.

[0004] The present application provides a hardware interrupt control method, comprising:

[0005] In response to a hardware error of a target hardware of a storage device, triggering a hardware interrupt, and monitoring whether the hardware interrupt is closed;

[0006] In response to the hardware interrupt being closed, obtaining a current fault threshold triggering the hardware interrupt, starting a timer, and starting a polling task to query hardware error counts in each polling period within a preset time length of the timer;

[0007] Obtaining a fluctuation of the error count in a current polling period relative to an error count in a first polling period, and sequentially judging whether the fluctuation of each polling period within the preset time length is greater than or equal to a first threshold;

[0008] In response to the fluctuation of any polling period within the preset time length being greater than or equal to the first threshold, stopping the polling task, clearing the timer, keeping the preset time length unchanged, and adjusting the current fault threshold according to the hardware error count;

[0009] In response to the fluctuation of each polling period within the preset time length being less than the first threshold, stopping the polling task, clearing the timer, keeping the current fault threshold unchanged, and adjusting the preset time length according to the hardware error count.

[0010] In response to completion of adjustment of the current fault threshold or the preset time length, it is determined again whether the hardware interrupt is triggered.

[0011] The application further provides an electronic device, comprising a memory for storing a computer program and a processor for executing the computer program to implement the steps of any of the hardware interrupt control methods.

[0012] In response to triggering of the hardware interrupt in response to generation of a hardware error by a target hardware of the storage device, it is monitored whether the hardware interrupt is closed;

[0013] In response to the hardware interrupt being closed, a current fault threshold triggering the hardware interrupt is obtained, a timer is started, and a polling task is started to query hardware error counts in each polling period within a preset time length of the timer;

[0014] A fluctuation of the error count in a current polling period relative to an error count in a first polling period is obtained, and it is sequentially determined whether the fluctuation of each polling period within the preset time length is greater than or equal to a first threshold;

[0015] In response to the fluctuation of any polling period within the preset time length being greater than or equal to the first threshold, the polling task is stopped, the timer is cleared, the preset time length is kept unchanged, and the current fault threshold is adjusted according to the hardware error count;

[0016] In response to the fluctuation of each polling period within the preset time length being less than the first threshold, the polling task is stopped, the timer is cleared, the current fault threshold is kept unchanged, and the preset time length is adjusted according to the hardware error count;

[0017] In response to completion of adjustment of the current fault threshold or the preset time length, it is determined again whether the hardware interrupt is triggered.

[0018] According to the application, the fault threshold triggering the hardware interrupt and the preset time length of the timer in the polling mode are adjusted by the polling mode, the fault threshold triggering the hardware interrupt, the preset time length of the timer in the polling mode, the fluctuation of each polling period in the polling mode, and the hardware error count are adjusted to adjust the fault threshold triggering the hardware interrupt and the preset time length of the timer in the polling mode in the next time after the polling is completed, and the adjustment is repeatedly performed, so that the fault threshold triggering the hardware interrupt and the preset time length of the timer in the polling mode are finally stabilized at a fixed value, and balanced storage performance and fault localizability are achieved. BRIEF DESCRIPTION OF DRAWINGS

[0019] In order to more clearly illustrate the embodiments of the present application, the following will briefly introduce the drawings needed to be used in the embodiments. Obviously, the drawings described below only illustrate some of the embodiments of the present application, and other drawings can be obtained by those skilled in the art without any creative effort on the basis of these drawings.

[0020] Figure 1 Flowchart of the first hardware fault processing in the prior art;

[0021] Figure 2 Flowchart of the second hardware fault processing in the prior art;

[0022] Figure 3 Application environment diagram of the hardware interrupt control method in one embodiment of the present application;

[0023] Figure 4 Flowchart of the hardware interrupt control method in one embodiment of the present application;

[0024] Figure 5 Structural block diagram of the hardware interrupt control device in one embodiment of the present application;

[0025] Figure 6 Internal structure diagram of the computer device in one embodiment of the present application. DETAILED DESCRIPTION

[0026] The technical solutions in the embodiments of the present application will be described clearly and completely below with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are only some of the embodiments of the present application, rather than all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without any creative effort fall within the protection scope of the present application.

[0027] It should be noted that, in the description of the present application, the terms “include”, “contain” or any other variants thereof are intended to cover non-exclusive inclusion, so that the process, method, article or device including a series of elements not only includes those elements, but also includes other elements not explicitly listed or inherent to such process, method, article or device. The terms “first”, “second” and the like in the present application are used to distinguish similar objects, and are not used to describe a specific order or sequence.

[0028] In order to make the skilled in the art better understand the present application, the present application will be further described in detail below with reference to the drawings and specific embodiments.

[0029] RAS: Reliability, Availability, Serviceability, which is the three core indicators of measuring the reliability of storage systems. Reliability refers to the ability of the system to self-repair or isolate faults when facing minor faults, avoiding unexpected crashes. Availability emphasizes the continuous operation ability of the system, which can quickly recover even if a fault occurs, reducing system downtime. Maintainability refers to the system providing diagnostic tools and logs to facilitate quick problem location. Reliability and availability require overall consideration from system design, which is technically difficult. Storage device manufacturers usually start with maintainability, first increasing the problem location.

[0030] As shown in Figure 1 , the HYGON platform CPU is similar to X86, and also has RSA related mechanisms, and the RAS fault reporting process is basically the same. The SMI interrupt (hardware interrupt) of the CPU is enabled, the CPU detects the fault and triggers the SMI interrupt, notifies the BIOS, and in the SMI interrupt service program (belonging to the BIOS firmware), the error type is analyzed and then the IPMI-SEL message is packaged and sent to the BMC, which is recorded in the SEL log (system event log). At the same time, it can also be selected whether to notify the operating system OS through the NMI interrupt mode. This brings very high RAS fault location (because the SEL log can accurately locate the memory fault type and location, PCIe device fault type and corresponding BDF number, CPU fault type) to the storage system. But it also brings a problem, that is, frequent interrupts will affect the performance of storage business. According to the actual test, if there is a continuous CE / UCE fault, if 1S generates an SMI interrupt, the performance will decrease by 96%, and if 5S generates an SMI interrupt, the performance will decrease by 20%. As can be seen, fault location and performance are contradictory, and a balance needs to be found.

[0031] As shown in Figure 2 , if a fixed CE / UCE error threshold is set before the CE or UCE error count generates an interrupt, the SMI interrupt is triggered only when the error threshold is exceeded. When the CE / UCE error threshold is too large, the BIOS cannot report the fault to the BMC or OS in time, affecting the location and OS level fault handling, especially for UCE errors. When the CE / UCE error threshold is too small, the SMI interrupt may still be frequent, and if the business volume is large at this time, the impact on performance will also be great.

[0032] The hardware interrupt control method provided by the present application can be applied to, for example Figure 3In the application environment shown, by dynamically switching between SMI interrupts and polling, and dynamically adjusting CE / UCE error thresholds based on business performance status, a dynamic balance can be found between storage performance and fault localization. This mainly consists of the following parts: the initial fault trigger interrupt part (i.e., the default configuration); triggering the interrupt, reporting the CE / UCE fault to the BMC, and reconfiguring the CE / UCE threshold and timer parts; switching CE / UCE error handling from interrupt to polling; the timer processing part; and readjusting the CE / UCE threshold and timer parts based on business performance.

[0033] like Figure 4 As shown, an embodiment of this application provides a hardware interrupt control method, including the following steps:

[0034] Step S1: In response to a hardware error occurring in the target hardware of the storage device, a hardware interrupt is triggered, and the system monitors whether the hardware interrupt is disabled.

[0035] Step S2: In response to the hardware interrupt being disabled, the current fault threshold that triggered the hardware interrupt is obtained, a timer is started, and a polling task is initiated within the preset timeout period to query the hardware error count in each polling cycle.

[0036] Step S3: Obtain the fluctuation of the error count in the current polling cycle relative to the error count in the first polling cycle, and sequentially determine whether the fluctuation of each polling cycle within the preset time period is greater than or equal to the first threshold.

[0037] Step S4: In response to the fluctuation amount of any polling cycle within the preset time period being greater than or equal to the first threshold, stop the polling task, clear the timer, keep the preset time period unchanged, and adjust the current fault threshold according to the hardware error count.

[0038] Step S5: In response to the fact that the fluctuation amount of each polling cycle within the preset time period is less than the first threshold, the polling task is stopped, the timer is cleared, the current fault threshold is kept unchanged, and the preset time period is adjusted according to the hardware error count.

[0039] Step S6: In response to the completion of the current fault threshold or preset timer duration adjustment, re-determine whether to trigger a hardware interrupt.

[0040] Among them, the fault threshold is a critical value used to define the change in the state of a system or component.

[0041] This application achieves a balance between storage performance and fault location by adjusting the fault threshold that triggers hardware interrupts and the preset timing duration of the timer in the polling method.

[0042] In the embodiment, the hardware interrupt is triggered in response to the target hardware of the storage device generating a hardware error, and whether the hardware interrupt is closed is monitored, comprising:

[0043] Obtaining a fault type of the target hardware of the storage device, the fault type comprising a correctable error and an uncorrectable error, and default fault thresholds are set for the correctable error and the uncorrectable error of the target hardware;

[0044] Monitoring whether the target hardware generates a hardware error;

[0045] In response to the target hardware generating a hardware error, a hardware interrupt is performed, fault information is parsed to obtain a fault type and a fault position of the target hardware, and the fault type and the fault position are encapsulated as the fault information and sent to a manager to be recorded in a system event log;

[0046] In response to the fault information being recorded in the system event log, the hardware interrupt is closed.

[0047] In the initial state, the SMI interrupt is enabled, the threshold for triggering the SMI interrupt by the CE / UCE is 1, and the timer is not needed at this time. Therefore, when the hardware generates the CE / UCE, the SMI interrupt is triggered. After the SMI interrupt is triggered, the BIOS enters the SMM state. In the interrupt service processing of the SMI, the error information (CPU-CE / UCE or PCIe-CE / UCE or MEM-CE / UCE) is first parsed, then the fault information is encapsulated into the IPMI-SEL data field and sent to the BMC. After the BMC receives the message, the SEL log is recorded according to the SEL format, so as to facilitate subsequent export of the SEL log to locate the problem. Finally, the SMI interrupt is closed, the threshold is reconfigured (consistent with the default value when triggered for the first time), the timer is started (the timing time is the base value), the polling mode of the CE / UCE is started, and the count thereof is queried.

[0048] In the embodiment, the fluctuation of the error count in the current polling period relative to the error count in the first polling period is obtained, and whether the fluctuation of each polling period in a preset time length is greater than or equal to a first threshold is sequentially judged, comprising:

[0049] Classifying the errors in the current polling period into correctable errors and uncorrectable errors;

[0050] Recording a first correctable error count value and a first uncorrectable error count value of the target hardware in the first polling period;

[0051] Recording a current correctable error count value and a current uncorrectable error count value of the target hardware in the next polling period;

[0052] The difference between the current correctable error count value and the first correctable error count value is taken as the fluctuation of correctable errors in the current polling period, and it is determined whether the fluctuation of correctable errors is greater than or equal to the first threshold value.

[0053] The difference between the current uncorrectable error count value and the first uncorrectable error count value is taken as the fluctuation of uncorrectable errors in the current polling period, and it is determined whether the fluctuation of uncorrectable errors is greater than or equal to the first threshold value.

[0054] In the embodiment, in response to the fluctuation of any polling period within the preset time duration being greater than or equal to the first threshold value, the polling task is stopped, the timer is cleared, the preset time duration is kept unchanged, and the current fault threshold is adjusted according to the hardware error count, including:

[0055] In response to the fluctuation of correctable errors or uncorrectable errors in any polling period within the preset time duration being greater than or equal to the first threshold value, the polling task is stopped, the timer corresponding to the correctable errors or uncorrectable errors is cleared, and the preset time duration of the timer corresponding to the correctable errors or uncorrectable errors is kept unchanged.

[0056] In response to the current correctable error count value being greater than or equal to the second threshold value, the current fault threshold of the correctable errors is increased;

[0057] In response to the current uncorrectable error count value being greater than or equal to the second threshold value, the current fault threshold of the uncorrectable errors is increased;

[0058] In response to the current correctable error count value being less than the second threshold value, the current fault threshold of the correctable errors is kept unchanged;

[0059] In response to the current uncorrectable error count value being less than the second threshold value, the current fault threshold of the uncorrectable errors is kept unchanged.

[0060] Wherein, when the fluctuation of error count within the preset time duration of the timer exceeds the preset fluctuation range, only the current fault threshold is adjusted to increase, so as to reduce the number of triggering hardware interrupts, and balance the storage performance and fault localizability.

[0061] In the embodiment, when the current fault threshold of the correctable errors is increased or the current fault threshold of the uncorrectable errors is increased, including:

[0062] The fault threshold of the correctable errors or uncorrectable errors is set to 10 x , x is a positive integer;

[0063] When setting the default fault threshold, the value of x is zero;

[0064] When the current fault threshold of the correctable errors or uncorrectable errors is increased, the adjusted fault threshold is 10x +1 .

[0065] wherein, when the default fault threshold is x=0, the default fault threshold is 10 0 =1; when the current fault threshold is increased, the adjusted fault threshold is 10 x+1 , i.e. 10 1 =10; that is, the current fault threshold is increased from 1 to 10 for the first time.

[0066] In this embodiment, in response to the fluctuation of each polling cycle being less than the first threshold within the preset time duration, the polling task is stopped, the timer is cleared, the current fault threshold is kept unchanged, and the preset time duration is adjusted according to the hardware error count, which includes:

[0067] In response to the fluctuation of each polling cycle being less than the first threshold within the preset time duration, the polling task is stopped, the timer is cleared, the current fault threshold is kept unchanged, and the preset time duration is adjusted according to the hardware error count, which includes:

[0068] In response to the current correctable error count value being greater than or equal to the second threshold, the preset time duration of the correctable error corresponding timer is increased;

[0069] In response to the current uncorrectable error count value being greater than or equal to the second threshold, the preset time duration of the uncorrectable error corresponding timer is increased;

[0070] In response to the current correctable error count value being less than or equal to the second threshold, the preset time duration of the correctable error corresponding timer is kept unchanged;

[0071] In response to the current uncorrectable error count value being less than or equal to the second threshold, the preset time duration of the uncorrectable error corresponding timer is kept unchanged.

[0072] Wherein, when the fluctuation of the error count within the preset time duration of the timer exceeds the preset fluctuation range, only the preset time duration needs to be adjusted to increase, that is, the accuracy of the fault localization is improved to balance the storage performance and the fault localization.

[0073] In this embodiment, when the preset time duration of the correctable error corresponding timer is increased or the preset time duration of the uncorrectable error corresponding timer is increased, it includes:

[0074] The preset time duration of the correctable error or uncorrectable error corresponding timer is set to 2 y , y is a positive integer;

[0075] When setting the starting value of the preset time duration, the value of y is one;

[0076] When the preset time duration is increased, the adjusted preset time duration is 2 y+1 .

[0077] When the preset time duration is increased, the adjusted preset time duration is 2 1 =2 seconds; when the preset time duration is increased, the adjusted preset time duration is 2 y+1 =4 seconds; that is, the preset time duration is increased from 2 seconds to 4 seconds for the first time. 2

[0078] In this embodiment, the hardware interrupt control method further comprises:

[0079] Obtaining the hardware type of the storage device, wherein the hardware type of the storage device includes a processor, a memory and a plug-in device;

[0080] Obtaining the storage performance of the storage device, and dividing the performance level of the storage device into idle, typical and busy according to the storage performance of the storage device;

[0081] Obtaining the fault type of the target hardware when triggering the hardware interrupt;

[0082] According to the hardware type of the storage device and the current performance level, the preset time duration of the timer or the current fault threshold corresponding to each fault type is adjusted respectively.

[0083] The RAS fault of the CPU includes three categories: PCIe-CE / PCIe-UCE, CPU-CE / CPU-UCE and MEM-CE / MEM-UCE, and the thresholds of each category of errors can be different. CE is a correctable error, which has little effect on the system, but UCE is an uncorrectable error, which has a relatively large effect on the system, so the CE threshold can be different from the UCE threshold. The CE fault threshold can be defined to be larger, and the UCE fault threshold can be defined to be smaller. However, for convenience of description, the fault thresholds of CE and UCE are defined to be exactly the same in this application, and PCIe / CPU / MEM categories are not distinguished.

[0084] In this embodiment, in response to the fluctuation amount of any polling cycle within the preset time duration being greater than or equal to the first threshold, the polling task is stopped, the timer is cleared, the preset time duration is kept unchanged, the current fault threshold is adjusted according to the hardware error count, and the corresponding strategy is shown in Table 1.

[0085] Table 1

[0086]

[0087] ​In the embodiment, in response to the fluctuation of each polling cycle being less than the first threshold value within the preset time duration, the polling task is stopped, the timer is cleared, the current fault threshold is kept unchanged, the preset time duration is adjusted according to the hardware error count, and the corresponding strategy is shown in Table 2.

[0088] Table 2

[0089]

[0090] In Table 1 and Table 2, the second threshold value is different for different performance levels. When the performance level is typical, the second threshold value is 10% of the maximum typical hardware error count. When the performance level is busy, the second threshold value is 5% of the maximum typical hardware error count.

[0091] It can be understood that the hardware interrupt control method further includes:

[0092] The second threshold value is set according to the performance level of the storage device. The second threshold value corresponding to the performance level divided into busy is less than the second threshold value corresponding to the performance level divided into typical, and the second threshold value corresponding to the performance level divided into typical is less than the second threshold value corresponding to the performance level divided into idle.

[0093] By setting different second threshold values corresponding to different performance levels, the fluctuation of the error count of each polling cycle is adapted to the storage performance, and the preset time duration of the timer is adjusted more accurately when the storage performance is busy than when it is typical, so that the hardware interrupt is triggered more accurately.

[0094] In the embodiment, in response to the current fault threshold or the preset time duration adjustment being completed, the hardware interrupt is re-judged to be triggered, including:

[0095] When adjusting the current fault threshold, it is detected whether the target hardware is executing the hardware interrupt. If yes, a new fault threshold is configured after the hardware interrupt is closed. If no, a new fault threshold is directly configured.

[0096] When adjusting the preset time duration, it is detected whether the timer is running. If yes, a new preset time duration is configured after the timer is cleared. If no, a new preset time duration is directly configured.

[0097] In response to the configuration of the new fault threshold or the preset time duration being completed, a new timer is started, and a new hardware error count generated by the target hardware of the storage device is re-detected.

[0098] It is judged whether the new hardware error count is greater than the new fault threshold. If yes, the hardware interrupt is triggered.

[0099] Wherein, by controlling the current fault threshold or the preset time length adjustment to complete in the same thread, re-determining whether to trigger the hardware interrupt, the fault threshold or the preset time length update can be completed before the next hardware interrupt.

[0100] In the embodiment, the re-determining whether to trigger the hardware interrupt after the current fault threshold or the preset time length adjustment to complete includes:

[0101] After the current fault threshold or the preset time length adjustment to complete, based on the performance level of the storage device, the fault threshold and the preset time length of the timer in the polling mode for triggering the hardware interrupt next time are adjusted according to the fault threshold of the last time triggering the hardware interrupt, the preset time length of the timer, the fluctuation of each polling period in the polling, and the hardware error count.

[0102] After the fault threshold and the preset time length of the timer in the polling mode for triggering the hardware interrupt next time are adjusted to complete, a new thread is started to detect the new hardware error count generated by the target hardware of the storage device, and it is determined whether the new hardware error count is greater than the adjusted fault threshold. If yes, the hardware interrupt is triggered.

[0103] Wherein, by controlling the triggering of the hardware interrupt through multiple different threads, the current fault threshold or the preset time length can be adjusted and updated in time, and the new thread is used to determine whether to trigger the hardware interrupt, thereby improving the speed of achieving balanced storage performance and fault localizability.

[0104] In the above hardware interrupt control method, the fault threshold for triggering the hardware interrupt and the preset time length of the timer in the polling mode are adjusted through the polling mode. After the polling ends, the fault threshold and the preset time length of the timer in the polling mode for triggering the hardware interrupt next time are adjusted according to the fault threshold of the last time triggering the hardware interrupt, the preset time length of the timer, the fluctuation of each polling period in the polling, and the hardware error count. The adjustment is repeatedly adjusted, and finally the fault threshold for triggering the hardware interrupt and the preset time length of the timer in the polling mode are stabilized at a fixed value, thereby achieving balanced storage performance and fault localizability.

[0105] Through the above description of the embodiments, those skilled in the art can clearly understand that the method according to the above embodiments can be realized by means of software and the necessary general hardware platform, of course, it can also be realized by hardware, but in many cases the former is a better embodiment.

[0106] In one embodiment, as shown in Figure 5 a hardware interrupt control device 10 is provided, which includes a hardware interrupt monitoring module 1, a polling management module 2, a fluctuation detection module 3, a fault threshold adjustment module 4, a timing length adjustment module 5, and a reset interrupt module 6.

[0107] The hardware interrupt monitoring module 1 is configured to monitor whether the hardware interrupt is closed in response to the hardware interrupt being triggered when the target hardware of the storage device generates a hardware error.

[0108] The polling management module 2 is configured to obtain a current fault threshold triggering the hardware interrupt, start a timer, and start a polling task to query the hardware error count in each polling period within a preset time length of the timer in response to the hardware interrupt being closed.

[0109] The fluctuation amount detection module 3 is configured to obtain a fluctuation amount of the error count in the current polling period relative to the error count in the first polling period, and in turn determine whether the fluctuation amount of each polling period within the preset time length is greater than or equal to a first threshold.

[0110] The fault threshold adjustment module 4 is configured to stop the polling task, clear the timer, keep the preset time length unchanged, and adjust the current fault threshold according to the hardware error count in response to the fluctuation amount of any polling period within the preset time length being greater than or equal to the first threshold.

[0111] The timing length adjustment module 5 is configured to stop the polling task, clear the timer, keep the current fault threshold unchanged, and adjust the preset time length according to the hardware error count in response to the fluctuation amount of each polling period within the preset time length being less than the first threshold.

[0112] The reset interrupt module 6 is configured to re-determine whether the hardware interrupt is triggered after the current fault threshold or the preset time length is adjusted.

[0113] In the embodiment, the hardware interrupt is triggered in response to the target hardware of the storage device generating a hardware error, and whether the hardware interrupt is closed is monitored, including:

[0114] The fault type of the target hardware of the storage device is obtained, the fault type including correctable errors and uncorrectable errors, and default fault thresholds are set for the correctable errors and the uncorrectable errors of the target hardware respectively;

[0115] Whether the target hardware generates a hardware error is monitored;

[0116] In response to the target hardware generating a hardware error, the hardware interrupt is triggered, the fault information is parsed to obtain the fault type and the fault position of the target hardware, the fault type and the fault position are encapsulated as the fault information, and the fault information is sent to a manager to be recorded in a system event log;

[0117] In response to the fault information being recorded in the system event log, the hardware interrupt is closed.

[0118] In the embodiment, the fluctuation of the error count in the current polling period relative to the error count in the first polling period is obtained, and it is sequentially determined whether the fluctuation of each polling period in the preset time duration is greater than or equal to the first threshold value, including:

[0119] The errors in the current polling period are classified into correctable errors and uncorrectable errors;

[0120] The first correctable error count value and the first uncorrectable error count value of the target hardware in the first polling period are recorded;

[0121] The current correctable error count value and the current uncorrectable error count value of the target hardware in the next polling period are recorded;

[0122] The difference between the current correctable error count value and the first correctable error count value is taken as the fluctuation of the correctable errors in the current polling period, and it is determined whether the fluctuation is greater than or equal to the first threshold value;

[0123] The difference between the current uncorrectable error count value and the first uncorrectable error count is taken as the fluctuation of the uncorrectable errors in the current polling period, and it is determined whether the fluctuation is greater than or equal to the first threshold value.

[0124] In the embodiment, in response to the fluctuation of any polling period in the preset time duration being greater than or equal to the first threshold value, the polling task is stopped, the timer is cleared, the preset time duration is kept unchanged, and the current fault threshold of the hardware error count is adjusted, including:

[0125] In response to the fluctuation of the correctable errors or the uncorrectable errors in any polling period in the preset time duration being greater than or equal to the first threshold value, the polling task is stopped, the timer corresponding to the correctable errors or the uncorrectable errors is cleared, and the preset time duration of the timer corresponding to the correctable errors or the uncorrectable errors is kept unchanged;

[0126] In response to the current correctable error count value being greater than or equal to the second threshold value, the current fault threshold of the correctable errors is increased;

[0127] In response to the current uncorrectable error count value being greater than or equal to the second threshold value, the current fault threshold of the uncorrectable errors is increased;

[0128] In response to the current correctable error count value being less than the second threshold value, the current fault threshold of the correctable errors is kept unchanged;

[0129] In response to the current uncorrectable error count value being less than the second threshold value, the current fault threshold of the uncorrectable errors is kept unchanged.

[0130] In the embodiment, when the current fault threshold of the correctable errors is increased or the current fault threshold of the uncorrectable errors is increased, it includes:

[0131] The fault threshold of correctable error or uncorrectable error is set to 10 x , x is a positive integer;

[0132] When setting the default fault threshold, the value of x is 0;

[0133] When increasing the current fault threshold of correctable error or uncorrectable error, the adjusted fault threshold is 10 x +1 .

[0134] Wherein, when the default fault threshold, x = 0, the default fault threshold is 10 0 = 1; When increasing the current fault threshold, the adjusted fault threshold is 10 x+1 , that is, 10 1 = 10; That is, the first time the current fault threshold is increased from 1 to 10.

[0135] In this embodiment, in response to the fluctuation of each polling period being less than the first threshold within the preset time duration, the polling task is stopped, the timer is cleared, the current fault threshold is kept unchanged, and the preset time duration is adjusted according to the hardware error count, including:

[0136] In response to the fluctuation of each polling period being less than the first threshold within the preset time duration, the polling task is stopped, the timer is cleared, the current fault threshold is kept unchanged, and the preset time duration is adjusted according to the hardware error count, including:

[0137] In response to the current correctable error count value being greater than or equal to the second threshold, the preset time duration of the correctable error corresponding timer is increased;

[0138] In response to the current uncorrectable error count value being greater than or equal to the second threshold, the preset time duration of the uncorrectable error corresponding timer is increased;

[0139] In response to the current correctable error count value being less than or equal to the second threshold, the preset time duration of the correctable error corresponding timer is kept unchanged;

[0140] In response to the current uncorrectable error count value being less than or equal to the second threshold, the preset time duration of the uncorrectable error corresponding timer is kept unchanged.

[0141] In this embodiment, when increasing the preset time duration of the correctable error corresponding timer or increasing the preset time duration of the uncorrectable error corresponding timer, including:

[0142] The preset time duration of the correctable error or uncorrectable error corresponding timer is set to 2y y is a positive integer;

[0143] In setting the starting value of the preset time duration, the value of y is one;

[0144] When the preset time duration is increased, the adjusted preset time duration is 2 y+1 .

[0145] Wherein, when setting the starting value of the preset time duration of the timer, y = 1, and the starting value of the preset time duration is 2 1 = 2 seconds; when the preset time duration is increased, the adjusted preset time duration is 2 y+1 , i.e. 2 2 = 4 seconds; that is, the preset time duration is increased from 2 seconds to 4 seconds for the first time.

[0146] In this embodiment, as shown in Figure 5 , the hardware interrupt control device 10 further comprises a classification management module 7. The classification management module 7 is configured to:

[0147] Obtain the hardware type of the storage device, wherein the hardware type of the storage device includes a processor, a memory and a plug-in device;

[0148] Obtain the storage performance of the storage device, and divide the performance level of the storage device into idle, typical and busy according to the storage performance of the storage device;

[0149] Obtain the fault type of the target hardware when triggering the hardware interrupt;

[0150] According to the hardware type of the storage device and the current performance level, adjust the preset time duration of the timer or the current fault threshold corresponding to each fault type, respectively.

[0151] In this embodiment, after the current fault threshold or the preset time duration is adjusted, the hardware interrupt is re-judged to be triggered, including:

[0152] When adjusting the current fault threshold, it is detected whether the target hardware is executing the hardware interrupt, if yes, a new fault threshold is configured after the hardware interrupt is closed, and if not, a new fault threshold is directly configured;

[0153] When adjusting the preset time duration, it is detected whether the timer is running, if yes, a new preset time duration is configured after the timer is cleared, and if not, a new preset time duration is directly configured;

[0154] After the new fault threshold or the preset time duration is configured, a new timer is started, and a new hardware error count generated by the target hardware of the storage device is re-detected;

[0155] determining whether the new hardware error count is greater than the new failure threshold, and triggering a hardware interrupt if so.

[0156] In the hardware interrupt control device, the failure threshold for triggering the hardware interrupt and the preset time length of the timer in the polling mode are adjusted by the polling mode, and after the polling is completed, the failure threshold for triggering the hardware interrupt and the preset time length of the timer in the polling mode of the next time are adjusted according to the failure threshold for triggering the hardware interrupt of the last time, the preset time length of the timer, the fluctuation of each polling cycle of the polling and the hardware error count, and the adjustment is repeatedly adjusted, so that the failure threshold for triggering the hardware interrupt and the preset time length of the timer in the polling mode are finally stabilized at a fixed value, and the storage performance and the failure positioning are balanced.

[0157] The features of the embodiments of the hardware interrupt control device can be referred to the related descriptions of the embodiments of the hardware interrupt control method, which will not be repeated here.

[0158] The embodiments of the present application also provide an electronic device, which comprises a memory and a processor, the memory stores a computer program, and the processor is configured to run the computer program to execute the steps in any of the above-mentioned hardware interrupt control method embodiments.

[0159] In an embodiment, the electronic device can be a server, and its internal structure diagram can be as shown in Figure 6 The electronic device comprises a processor, a memory, a network interface and a database connected through a system bus. The processor of the electronic device is used to provide computing and control capabilities. The memory of the electronic device comprises a non-volatile storage medium and an internal memory. The non-volatile storage medium stores an operating system, a computer program and a database. The internal memory provides an environment for the operating system and the computer program in the non-volatile storage medium. The database of the electronic device is used to store hardware interrupt control data. The network interface of the electronic device is used to communicate with external terminals through network connection. The computer program is executed by the processor to implement a hardware interrupt control method.

[0160] The embodiments of the present application also provide a computer readable storage medium, which stores a computer program, wherein the computer program is configured to execute the steps in any of the above-mentioned hardware interrupt control method embodiments when running.

[0161] In an exemplary embodiment, the above-mentioned computer readable storage medium can include but is not limited to a variety of media that can store computer programs, such as a U disk, a read-only memory (ROM), a random access memory (RAM), a mobile hard disk, a magnetic disk or an optical disk.

[0162] An embodiment of the present application further provides a computer program product comprising a computer program which, when executed by a processor, implements the steps in any of the above-mentioned hardware interrupt control method embodiments:

[0163] In response to triggering a hardware interrupt when a target hardware of a storage device generates a hardware error, monitoring whether the hardware interrupt is closed;

[0164] In response to the hardware interrupt being closed, obtaining a current fault threshold triggering the hardware interrupt, starting a timer, and starting a polling task to query hardware error counts in each polling period within a preset time length of the timer;

[0165] Obtaining a fluctuation of the error count in a current polling period relative to an error count in a first polling period, and sequentially judging whether the fluctuation of each polling period within the preset time length is greater than or equal to a first threshold;

[0166] In response to the fluctuation of any polling period within the preset time length being greater than or equal to the first threshold, stopping the polling task, clearing the timer, keeping the preset time length unchanged, and adjusting the current fault threshold according to the hardware error count;

[0167] In response to the fluctuation of each polling period within the preset time length being less than the first threshold, stopping the polling task, clearing the timer, keeping the current fault threshold unchanged, and adjusting the preset time length according to the hardware error count;

[0168] In response to the current fault threshold or the preset time length being adjusted, re-judging whether the hardware interrupt is triggered.

[0169] An embodiment of the present application further provides another computer program product comprising a non-volatile computer readable storage medium storing a computer program which, when executed by a processor, implements the steps in any of the above-mentioned hardware interrupt control method embodiments:

[0170] In response to triggering a hardware interrupt when a target hardware of a storage device generates a hardware error, monitoring whether the hardware interrupt is closed;

[0171] In response to the hardware interrupt being closed, obtaining a current fault threshold triggering the hardware interrupt, starting a timer, and starting a polling task to query hardware error counts in each polling period within a preset time length of the timer;

[0172] Obtaining a fluctuation of the error count in a current polling period relative to an error count in a first polling period, and sequentially judging whether the fluctuation of each polling period within the preset time length is greater than or equal to a first threshold;

[0173] In response to the fluctuation of any polling cycle within the preset time duration being greater than or equal to the first threshold, the polling task is stopped, the timer is cleared, the preset time duration is kept unchanged, and the current fault threshold is adjusted according to the hardware error count;

[0174] In response to the fluctuation of each polling cycle within the preset time duration being less than the first threshold, the polling task is stopped, the timer is cleared, the current fault threshold is kept unchanged, and the preset time duration is adjusted according to the hardware error count.

[0175] In response to the current fault threshold or the preset time duration adjustment being completed, it is determined again whether the hardware interrupt is triggered.

[0176] Those skilled in the art will further appreciate that the functions of the example described herein can be implemented using electronic hardware, computer software, or any combination thereof. To clearly illustrate this interchangeability of hardware and software, various examples have been described herein in terms of their functional processing. Whether such functions are implemented as hardware or software depends on the particular application and design constraints imposed on the overall system. Skilled artisans can implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present application.

[0177] The above provides a detailed introduction to the hardware interrupt control method and the electronic device. The principles and implementation manners of the present application are described by applying specific examples. The above description of the examples is only applicable to help understand the method of the present application and its core idea. It should be pointed out that, for those skilled in the art, without departing from the principles of the present application, some improvements and modifications can be made to the present application, and these improvements and modifications also fall within the protection scope of the present application.

Claims

1. A hardware interrupt control method, characterized in that, include: A hardware interrupt is triggered in response to a hardware error occurring in the target hardware of the storage device, and the status of the hardware interrupt is monitored. In response to the hardware interrupt being disabled, the current fault threshold that triggered the hardware interrupt is obtained, a timer is started, and a polling task is initiated within the preset timeout period of the timer to query the hardware error count in each polling cycle. Obtain the fluctuation of the error count in the current polling period relative to the error count in the first polling period, and sequentially determine whether the fluctuation of each polling period within the preset time period is greater than or equal to the first threshold. If the fluctuation amount of any polling cycle within the preset time period is greater than or equal to the first threshold, the polling task is stopped, the timer is cleared, the preset time period is kept unchanged, and the current fault threshold is adjusted according to the hardware error count. In response to the fact that the fluctuation of each polling cycle within the preset time period is less than the first threshold, the polling task is stopped, the timer is cleared, the current fault threshold is kept unchanged, and the preset time period is adjusted according to the hardware error count. In response to the completion of the current fault threshold or preset timer duration adjustment, a new determination is made as to whether to trigger a hardware interrupt. Wherein, the response that the fluctuation amount of each polling cycle within the preset time interval is less than the first threshold, stopping the polling task, clearing the timer, keeping the current fault threshold unchanged, and adjusting the preset time interval according to the hardware error count includes: If the fluctuation of correctable or uncorrectable errors in each polling cycle within the preset time period is less than the first threshold, then the polling task is stopped, the timer corresponding to the correctable or uncorrectable error is cleared, and the current fault threshold corresponding to the correctable or uncorrectable error remains unchanged. In response to the current correctable error count being greater than or equal to the second threshold, the preset timing duration of the timer corresponding to the correctable error is increased; When the current uncorrectable error count is greater than or equal to the second threshold, the preset timing duration of the timer corresponding to the uncorrectable error is increased; When the current correctable error count is less than or equal to the second threshold, the preset timing duration of the timer corresponding to the correctable error remains unchanged; When the current uncorrectable error count is less than or equal to the second threshold, the preset timing duration of the timer corresponding to the uncorrectable error remains unchanged.

2. The hardware interrupt control method according to claim 1, characterized in that, The step of triggering a hardware interrupt in response to a hardware error in the target hardware of the storage device, and monitoring whether the hardware interrupt is disabled, includes: Obtain the fault type of the target hardware of the storage device, the fault type includes correctable errors and uncorrectable errors, and set default fault thresholds for correctable errors and uncorrectable errors of the target hardware respectively; Monitor whether the target hardware has generated a hardware error; In response to a hardware error occurring in the target hardware, a hardware interrupt is initiated, the fault information is parsed to obtain the fault type and location of the target hardware, and the fault type and location are encapsulated as fault information and sent to the manager to be recorded in the system event log. In response to the completion of recording the fault information in the system event log, the hardware interrupt is disabled.

3. The hardware interrupt control method according to claim 2, characterized in that, The step of obtaining the fluctuation of the error count in the current polling period relative to the error count in the first polling period, and sequentially determining whether the fluctuation of each polling period within the preset time interval is greater than or equal to the first threshold includes: Errors within the current polling cycle are classified into correctable errors and uncorrectable errors. Record the first correctable error count and the first uncorrectable error count of the target hardware within the first polling cycle; Record the current correctable error count and the current uncorrectable error count of the target hardware in the next query cycle; The difference between the current correctable error count and the first correctable error count is used as the fluctuation of correctable errors in the current polling period, and it is determined whether the fluctuation of correctable errors is greater than or equal to the first threshold. The difference between the current uncorrectable error count and the initial uncorrectable error count is used as the fluctuation of uncorrectable errors in the current polling period, and it is determined whether the fluctuation of uncorrectable errors is greater than or equal to the first threshold.

4. The hardware interrupt control method according to claim 3, characterized in that, The response that the fluctuation amount in any polling cycle within the preset time interval is greater than or equal to a first threshold, stops the polling task, clears the timer, keeps the preset time interval unchanged, and adjusts the current fault threshold according to the hardware error count includes: If the fluctuation of correctable or uncorrectable errors in any polling cycle within the preset time interval is greater than or equal to a first threshold, the polling task is stopped, the timer corresponding to the correctable or uncorrectable error is cleared, and the preset time interval of the timer corresponding to the correctable or uncorrectable error remains unchanged. When the current correctable error count is greater than or equal to the second threshold, the current fault threshold of the correctable error is increased. When the current uncorrectable error count is greater than or equal to the second threshold, the current fault threshold of the uncorrectable error is increased. When the current correctable error count is less than the second threshold, the current fault threshold of the correctable error remains unchanged; When the current uncorrectable error count is less than the second threshold, the current fault threshold of the uncorrectable error remains unchanged.

5. The hardware interrupt control method according to claim 4, characterized in that, Increasing the current fault threshold for the correctable error or increasing the current fault threshold for the uncorrectable error includes: The fault threshold for the correctable or uncorrectable error is set to 10. x x is a positive integer; When setting the default fault threshold, the value of x is zero; When the current fault threshold for the correctable or uncorrectable error is increased, the adjusted fault threshold is 10. x +1 .

6. The hardware interrupt control method according to claim 1, characterized in that, Increasing the preset timing duration of the timer corresponding to the correctable error or increasing the preset timing duration of the timer corresponding to the uncorrectable error includes: The preset timing duration for the timer corresponding to the correctable or uncorrectable error is set to 2. y y is a positive integer; When setting the initial value of the preset time duration, the value of y is one; When the preset timing duration is increased, the adjusted preset timing duration is 2. y+1 .

7. The hardware interrupt control method according to claim 1, characterized in that, The method further includes: Obtain the hardware type of the storage device, wherein the hardware type of the storage device includes processor, memory, and pluggable devices; The storage performance of the storage device is obtained, and the performance level of the storage device is divided into idle, typical, and busy based on the storage performance. Obtain the fault type of the target hardware when a hardware interrupt is triggered; Based on the hardware type and current performance level of the storage device, adjust the preset timing duration of the timer or the current fault threshold corresponding to each fault type.

8. The hardware interrupt control method according to claim 1, characterized in that, The response to re-determine whether to trigger a hardware interrupt after the current fault threshold or preset timeout duration adjustment is completed includes: When adjusting the current fault threshold, it is detected whether the target hardware is executing a hardware interrupt. If so, a new fault threshold is configured after disabling the hardware interrupt; otherwise, a new fault threshold is configured directly. When adjusting the preset timing duration, it is detected whether the timer is running. If so, the timer is cleared and a new preset timing duration is configured. Otherwise, a new preset timing duration is configured directly. In response to the completion of configuring a new fault threshold or a preset timeout period, a new timer is started to re-detect the new hardware error count generated by the target hardware of the storage device; Determine whether the new hardware error count is greater than the new fault threshold; if so, trigger a hardware interrupt.

9. An electronic device, characterized in that, include: Memory, used to store computer programs; A processor, configured to implement the steps of the hardware interrupt control method as described in any one of claims 1 to 8 when executing the computer program.

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