High-efficiency overvoltage and undervoltage surge suppression circuit

Abstract

The invention relates to a high-efficiency overvoltage and undervoltage surge suppression circuit. The circuit comprises an input filtering unit, a power conversion unit, an output filtering unit, a sampling feedback unit, a pulse width control unit, a power driving unit and a power supply unit. According to the invention, the voltage is output constantly when overvoltage and undervoltage surge voltage occurs, so that the purpose of protecting a post-stage circuit is achieved. The circuit is mainly applied to avionics equipment and an airborne power supply system, and the input overvoltage surge and undervoltage surge suppression effect is achieved. The circuit is based on a four-switch BUCK-BOOST topological design, and when overvoltage surge occurs, the circuit works in a voltage reduction mode; when an undervoltage surge occurs, the circuit works in a boost mode, so that the output voltage is stable when the input overvoltage surge and the undervoltage surge occur. The output voltage of the circuit can be adjusted by adjusting the external adjusting resistor RSET, so that a post-stage direct-current power supply works in a high-efficiency interval, and the conversion efficiency of a power supply system is improved.

Description

Technical Field

[0001] This invention relates to the field of high voltage and low voltage resistance technology for secondary power supply systems, specifically to a high-efficiency overvoltage and undervoltage surge suppression circuit. Background Technology

[0002] Due to the requirements of avionics equipment and airborne systems, in order to ensure the reliable operation of the power supply system, it is necessary to reliably provide power and ensure the power supply when surge voltage occurs. Therefore, there are usually surge voltage requirements in avionics equipment and airborne power supply systems.

[0003] Currently, conventional input overvoltage and undervoltage surge suppression can be divided into two categories: the first is a floating topology high-voltage surge voltage suppressor, which can only achieve overvoltage surge suppression but not undervoltage suppression; the second is to shut down the original power supply path through a logic switching circuit when a surge voltage occurs, and replace it with an external energy storage capacitor to provide energy. Both of these solutions can only achieve short-term surge voltage suppression capabilities, but cannot meet the requirements of repeated surge voltage impacts and long-term surge voltage conditions under complex operating conditions, and have low conversion efficiency, making it impossible to expand the module's output power through parallel connection or other methods.

[0004] Therefore, there is an urgent need to implement a high-efficiency overvoltage and undervoltage surge suppression circuit. Summary of the Invention

[0005] The purpose of this invention is to provide a high-efficiency overvoltage and undervoltage surge suppression circuit. This surge suppression circuit can overcome the shortcomings of the prior art, improve the efficiency of overvoltage and undervoltage surge voltage suppression, and thus improve the overall conversion efficiency of the power supply system.

[0006] To achieve the above objectives, the present invention adopts the following technical solution: A high-efficiency overvoltage and undervoltage surge suppression circuit includes: an input filtering unit, a power conversion unit, an output filtering unit, a sampling feedback unit, a pulse width control unit, a power drive unit, and a power supply unit.

[0007] The input voltage Vin is connected to the input filter unit and the power supply unit of the high-efficiency overvoltage and undervoltage surge suppression circuit. The output of the input filter unit is connected to the input of the power conversion unit, and the output of the power conversion unit is connected to the input of the output filter unit. The output of the output filter unit is the output of the high-efficiency overvoltage and undervoltage surge suppression circuit and is connected to the input of the sampling feedback unit. The output of the sampling feedback unit is connected to the input of the pulse width control unit. The output of the pulse width control unit is connected to the input of the power drive unit. The output of the power drive unit is connected to the control input of the power conversion unit. The input of the power supply unit is connected to the input voltage Vin. The output of the power supply unit is connected to the input of the power drive unit and the pulse width control unit. The power supply unit provides appropriate power supply voltage for the power drive unit and the pulse width control unit.

[0008] The power conversion unit includes power switch tubes VH1, VH2, VL1, and VL2. The output filter unit includes inductor L1 and capacitor C0.

[0009] The first power drive unit includes high-side and low-side driver N1, bootstrap Schottky diode V1, diode V3, diode V4, resistor R1, resistor R2, capacitor C1, and capacitor C2. One end of the capacitor C1 is connected to the input power supply pin VDD of the high-side and low-side driver N1, and the other end is connected to the power ground GND of the circuit. The anode of the bootstrap Schottky diode V1 is connected to one end of the capacitor C1 and the input power supply voltage, and the cathode is connected to the high-side bootstrap pin HB of the high-side and low-side driver N1. One end of the bootstrap capacitor C2 is connected to the high-side bootstrap pin HB of the high-side and low-side driver N1, and the other end is connected to the input power supply pin VDD. The ground pin VSS of the high-side and low-side driver N1 is connected to the power ground GND. The high-side drive pin HO of the high-side and low-side driver N1 is connected to the drive resistor R1 and the cathode of the diode V3. The anode of the diode V3 is connected to the other end of the drive resistor R1. The low-side drive pin LO of the high-side and low-side driver N1 is connected to the drive resistor R2 and the cathode of the diode V4. The anode of the diode V4 is connected to the other end of the drive resistor R2. The high-side input pin HI and the low-side input pin LI of the high-side and low-side driver N1 are connected to the drive output HO and LO of the pulse width control unit. The power ground GND is the reference ground for power devices such as power switch tubes and inductors. The output ground GNDO is the reference ground for the output filter unit and the subsequent load.

[0010] The second power driving unit comprises a high-side and low-side driver N2, a bootstrap Schottky diode V2, a diode V5, a diode V6, a resistor R3, a resistor R4, a capacitor C3 and a capacitor C4. One end of the capacitor C3 is connected with an input power supply pin VDD of the high-side and low-side driver N2, and the other end is connected with a power ground GND; an anode of the bootstrap Schottky diode V2 is connected with one end of the capacitor C3 and a power supply input voltage Vin, and a cathode is connected with a high-side bootstrap pin HB of the high-side and low-side driver N2; one end of the bootstrap capacitor C4 is connected with the high-side bootstrap pin HB of the high-side and low-side driver N2, and the other end is connected with the input power supply pin VDD; a ground pin VSS of the high-side and low-side driver N2 is connected with the power ground GND; a high-side driving pin HO of the high-side and low-side driver N2 is connected with a driving resistor R3 and a cathode of the diode V5; an anode of the diode V5 is connected with the other end of the driving resistor R3; a low-side driving pin LO of the high-side and low-side driver N2 is connected with a driving resistor R4 and a cathode of the diode V6; an anode of the diode V6 is connected with the other end of the driving resistor R4; a high-side input pin HI and a low-side input pin LI of the high-side and low-side driver N2 are connected with driving output pins HO2 and LO2 of the pulse width control unit.

[0011] As a further improvement of the above technical solution, the high-efficiency overvoltage and undervoltage surge suppression circuit further comprises an external adjustable resistor RSET; a first end of the adjustable resistor RSET is connected with a circuit Trim end, a second end is connected with a circuit output ground end GNDO to increase the circuit output voltage, and a third end is connected with a circuit output end to decrease the circuit output voltage; by adjusting the connection and resistance value of the adjustable resistor RSET, the output voltage of the circuit is adjusted according to the different performances of the secondary power supply, and the system conversion efficiency is obviously improved. The adjustable resistor RSET is a variable resistor; the Trim end of the adjustable resistor RSET is a common connection end of resistors R5 and R6 in the sampling feedback unit. By adjusting the resistance value of the adjustable resistor RSET, the output voltage Vo meets the input voltage requirement of the secondary circuit, and the conversion efficiency of the surge suppression circuit can reach more than 93%.

[0012] As a further improvement of the above technical solution, the power conversion unit converts the input voltage Vin into a constant voltage which is output through the output filter unit, and the sampling feedback unit sends the collected output voltage signal as a feedback signal to the pulse width control unit; the pulse width control unit adjusts the duty cycle of power switch tubes VH1, VH2, VL1 and VL2 in the power conversion unit according to the feedback signal to realize the overvoltage and undervoltage surge suppression function.

[0013] As a further improvement of the above technical solution, when the overvoltage surge condition occurs, the input voltage Vin of the high-efficiency overvoltage and undervoltage surge suppression circuit is greater than the output voltage Vo, the overvoltage and undervoltage surge suppression circuit works in a step-down condition, the pulse width control unit controls the power switch tube VH2 to keep on through the power drive unit, the power switch tube VL2 keeps off, and the complementary conduction of the power switch tube VH1 and VL1 is controlled to realize the stable output of the output voltage Vo when the overvoltage surge occurs.

[0014] As a further improvement of the above technical solution, when the overvoltage surge condition occurs, the input voltage Vin of the high-efficiency overvoltage and undervoltage surge suppression circuit is greater than the output voltage Vo, the overvoltage and undervoltage surge suppression circuit works in a step-down condition, the pulse width control unit controls the power switch tube VH2 to keep on through the power drive unit, the power switch tube VL2 keeps off, and the complementary conduction of the power switch tube VH1 and VL1 is controlled to realize the stable output of the output voltage Vo when the overvoltage surge occurs.

[0015] Compared with the prior art, the application has the following advantages: (1) The high-efficiency overvoltage and undervoltage surge suppression circuit is actually a high-efficiency constant-voltage output power supply with adjustable output voltage, which has a step-up and step-down function and can output constant voltage when overvoltage and undervoltage surges occur. The circuit is mainly applied to aviation electronic equipment and airborne power supply systems and is connected to the front end of a DC / DC converter to realize input high-voltage surge and low-voltage surge suppression. The circuit is designed based on a four-switch BUCK-BOOST topology, and when overvoltage surges occur, the circuit works in a step-down mode; when undervoltage surges occur, the circuit works in a step-up mode, so that the output voltage is stable when input high-voltage surges and low-voltage surges occur. According to the DC power supply system, the output voltage of the circuit can be adjusted by adjusting the external adjustment resistor RSET, so that the rear-stage DC power supply works in a high-efficiency interval and the conversion efficiency of the power supply system is improved.

[0016] (2) The high-efficiency overvoltage and undervoltage surge suppression circuit is mainly designed based on the DC power supply characteristics of aviation and aircraft airborne equipment, can realize high-power and high-efficiency output in a small size package, and achieve overvoltage and undervoltage surge voltage suppression. The power conversion unit in the application is realized based on a four-switch BUCK-BOOST topology, the control signal output by the pulse width control unit controls the on-off of the MOS tube in the power conversion unit, and the power drive circuit is improved so that it can be applied to 80V or even higher overvoltage surge voltage suppression. In the overvoltage surge voltage condition, the power conversion unit works in a Buck mode, and in the low-voltage surge voltage condition, the power conversion unit works in a Boost mode, so that the overvoltage and undervoltage surge voltage suppression is realized.

[0017] (3) The high-efficiency overvoltage and undervoltage surge suppression circuit provided by the application solves the problem of overvoltage and undervoltage surge suppression in voltage transient in aviation and airplane direct current power supply systems by converting input high-voltage and low-voltage surge voltage into voltage output within the voltage range of the secondary power supply input voltage. Compared with the scheme of shutting off the original power supply path by a logic switch circuit and providing energy by an external energy storage capacitor, the circuit does not need a complex logic switch circuit inside and does not need an external Schottky and large-volume energy storage capacitor when used. Compared with the high-voltage surge voltage suppressor based on a floating topology, the circuit solves the problems of large heat generation and cooling time under long-time and repeated high-voltage surge voltage impact, has better overvoltage suppression capacity, and also has low-voltage surge voltage suppression capacity. BRIEF DESCRIPTION OF DRAWINGS

[0018] Figure 1 is the principle diagram of the high-efficiency overvoltage and undervoltage surge suppression circuit in the application; Figure 2 is the principle diagram of the power conversion unit in the high-efficiency overvoltage and undervoltage surge suppression circuit in the application; Figure 3 is the principle diagram of the power drive unit in the high-efficiency overvoltage and undervoltage surge suppression circuit in the application Figure 1 ; Figure 4 is the principle diagram of the power drive unit in the high-efficiency overvoltage and undervoltage surge suppression circuit in the application Figure 2 ; Figure 5 is the principle diagram of the power supply unit in the high-efficiency overvoltage and undervoltage surge suppression circuit in the application; Figure 6 is the principle diagram of the sampling feedback unit in the high-efficiency overvoltage and undervoltage surge suppression circuit in the application.

[0019] wherein: 1, input filter unit, 2, power conversion unit, 3, output filter unit, 4, sampling feedback unit, 5, pulse width control unit, 6, power drive unit, 7, power supply unit. DETAILED DESCRIPTION

[0020] The application will be further described below in combination with the drawings: As Figure 1 shown in a high-efficiency overvoltage and undervoltage surge suppression circuit, the circuit includes: input filter unit 1, power conversion unit 2, output filter unit 3, sampling feedback unit 4, pulse width control unit 5, power drive unit 6 and power supply unit 7. The output filter unit 3, the sampling feedback unit 4 and the pulse width control unit 5 can adopt conventional circuits.

[0021] The input voltage Vin is connected to the input filter unit 3 and the power supply unit 7 of the high-efficiency overvoltage and undervoltage surge suppression circuit. The output of the input filter unit 3 is connected to the input of the power conversion unit 2, and the output of the power conversion unit 2 is connected to the input of the output filter unit 3. The output of the output filter unit 3 is the output of the high-efficiency overvoltage and undervoltage surge suppression circuit and is connected to the input of the sampling feedback unit 4. The output of the sampling feedback unit 4 is connected to the input of the pulse width control unit 5. The output of the pulse width control unit 5 is connected to the input of the power drive unit 6. The output of the power drive unit 6 is connected to the control input of the power conversion unit 2. The input of the power supply unit 7 is connected to the input voltage Vin. The output of the power supply unit 7 is connected to the input of the power drive unit 6 and the pulse width control unit 5. The power supply unit 7 provides appropriate power supply voltage for the power drive unit 6 and the pulse width control unit 5.

[0022] Specifically, the power supply unit 7 is used to step down and stabilize the input voltage to an appropriate voltage and provide appropriate isolated driving power supply voltage for the pulse width control unit 5 and the power drive unit 6. The power supply unit 7 is implemented using the FlyBuck topology with wide input. The input filter unit 1 is used to filter the input voltage to provide stable DC voltage output for the subsequent stage and reduce the influence of power conversion unit noise on the input. The power conversion unit 2 is used to convert the input voltage, input high voltage, and low voltage surge according to the modulation signal output by the pulse width control unit 5. The output filter unit 3 is used to filter the output voltage of the power conversion unit 2 to provide stable DC voltage output for the subsequent stage. The sampling feedback unit 4 is used to sample the output voltage and current and compare them with the reference voltage to output a feedback control signal, which is used as the input of the pulse width control unit 5. The pulse width control unit 5 is used to generate the switching control signal of the power conversion unit 2 according to the feedback control signal. The power drive unit 6 is used to provide appropriate driving voltage and current for the power conversion unit 2 according to the switching control signal generated by the pulse width control unit 5. The input voltage refers to Vin in the following figure. Figure 1

[0023] In the high-efficiency overvoltage and undervoltage surge suppression circuit, the power conversion unit 2 converts the input voltage into a constant voltage output through the output filter unit 3, and the sampling feedback unit 4 sends the collected output voltage signal as a feedback signal to the pulse width control unit 5. The pulse width control unit 5 adjusts the duty cycle of the power switch tube VH1, the power switch tube VH2, the power switch tube VL1, and the power switch tube VL2 in the power conversion unit 2 according to the feedback signal, thereby realizing the overvoltage and undervoltage surge suppression function.​

[0024] As a further improvement of the above technical solution, as shown in Figure 1 The high-efficiency overvoltage and undervoltage surge suppression circuit also has an adjustment end Trim. The first end of the adjustable resistor RSET is connected to the adjustment end Trim, the second end of the adjustable resistor RSET is connected to the circuit output ground end GNDO, which can make the circuit output voltage rise. The third end of the adjustable resistor RSET is connected to the output end of the high-efficiency overvoltage and undervoltage surge suppression circuit, which can make the circuit output voltage drop. Through the connection and resistance value adjustment of the adjustable resistor RSET, the output voltage of the circuit can be adjusted according to the different performance of the secondary power supply, thereby significantly improving the conversion efficiency of the system.

[0025] As a further improvement of the above technical solution, the power conversion unit topology adopts a four-switch BUCK-BOOST topology structure, and can use an analog pulse width control chip or a digital controller suitable for the four-switch BUCK-BOOST topology, which is realized by software algorithm configuration.

[0026] As shown in Figure 2 The power conversion unit 6 includes power switch tubes VH1, VH2, VL1, VL2, an inductor L1, and a capacitor C o The drain of the power switch tube VH1 is connected to the positive end of the input voltage Vin, the source of the power switch tube VH1 is connected to the drain of the power switch tube VL1, and the source of the power switch tube VL1 is connected to the negative end of the input voltage Vin; the source of the power switch tube VH2 is connected to the drain of the power switch tube VL2, and the drain of the power switch tube VH2 is connected to the drain of the power switch tube VH1 as the positive end of the output voltage Vo, and the source of the power switch tube VL1 is connected to the source of the power switch tube VL2 as the negative end of the output voltage Vo; one end of the inductor L1 is connected to the node between the source of the power switch tube VH1 and the drain of the power switch tube VL1, and the other end of the inductor L1 is connected to the node between the source of the power switch tube VH2 and the drain of the power switch tube VL2; one end of the capacitor Co is connected to the drain of the power switch tube VH2, and the other end is connected to the source of the power switch tube VL2.

[0027] When the overvoltage surge condition occurs, the input voltage Vin of the high-efficiency overvoltage and undervoltage surge suppression circuit is greater than the output voltage Vo, the overvoltage and undervoltage surge suppression circuit works in the step-down condition, the pulse width control unit 5 controls the power switch tube VH2 to keep on through the power drive unit 6, the power switch tube VL2 keeps off, the power switch tube VH1 and VL1 are controlled to be complementary on, so as to realize the stable output of the output voltage Vo when the overvoltage surge occurs. When the undervoltage surge condition occurs, the input voltage Vin of the surge suppression circuit is less than Vo, the overvoltage and undervoltage surge suppression circuit works in the step-up condition, the pulse width control unit 5 controls the power switch tube VH1 to keep on through the power drive unit 6, the power switch tube VL1 keeps off, the power switch tube VH2 and the power switch tube VL1 are controlled to be complementary on, so as to realize the stable output of the output voltage Vo when the overvoltage surge occurs.

[0028] As shown in Figure 3 and Figure 4 , the power drive unit includes two groups of high-side and low-side drivers. The power drive unit 6 includes high-side and low-side driver N1, high-side and low-side driver N2, bootstrap Schottky diode V1, bootstrap Schottky diode V2, diode V3, diode V4, diode V5, diode V6, resistor R1, resistor R2, resistor R3, resistor R4, capacitor C1, capacitor C2, capacitor C3 and capacitor C4. The power drive unit 6 is divided into a first power drive unit and a second power drive unit.

[0029] As shown in Figure 3As shown, the first power drive unit includes a high-side and low-side driver N1, a bootstrap Schottky diode V1, a diode V3, a diode V4, a resistor R1, a resistor R2, a capacitor C1, and a capacitor C2. The output voltage VCC of the power supply unit 7 serves as the input, connected to one end of capacitor C1 and the input power supply pin VDD of the high-side and low-side driver N1, and the other end is connected to power ground GND. The anode of the bootstrap Schottky diode V1 is connected to one end of capacitor C1 and the power supply input voltage VCC, and the cathode is connected to the high-side bootstrap pin HB of the high-side and low-side driver N1. One end of the bootstrap capacitor C2 is connected to the high-side bootstrap pin HB of the high-side and low-side driver N1, and the other end is connected to the input power supply pin VDD. The bootstrap Schottky diode V1 and the capacitor C2 are used to implement floating ground drive of the high-side and low-side driver N1. The ground pin VSS of the high-side and low-side driver N1 is connected to power ground GND. The drive output HO1 of the pulse width control unit 5 is connected to LO... 1 serves as the input to the high-side input pin HI and the low-side input pin LI of the high-side and low-side driver N1, respectively; the high-side drive pin HO of the high-side and low-side driver N1 is connected to one end of the drive resistor R1 and the cathode of the diode V3; the anode of the diode V3 is connected to the other end of the drive resistor R1, serving as the drive input signal for the power switch VH1; the low-side drive pin LO of the high-side and low-side driver N1 is connected to one end of the drive resistor R2 and the cathode of the diode V4; the anode of the diode V4 is connected to the other end of the drive resistor R2, serving as the drive input signal for the power switch VL1; the diode V3, the diode V4, the resistor R1, and the resistor R2 are used to adjust the switching speed of the power conversion units VH1 and VL1, thereby improving the overall performance of the conversion units.

[0030] like Figure 4 As shown, the second power drive unit includes high-side and low-side drivers N2, bootstrap Schottky diodes V2, V5, and V6, resistors R3 and R4, and capacitors C3 and C4. Figure 4In this circuit, GH2 serves as the drive input signal for power switch VH2, and GL2 serves as the drive input signal for power switch VL2. The output voltage VCC of the power supply unit 7 is used as an input, connected to one end of capacitor C3 and the input power supply pin VDD of the high-side and low-side driver N2, and the other end is connected to power ground GND. The anode of the bootstrap Schottky diode V2 is connected to one end of capacitor C3 and the power supply input voltage VCC, and the cathode is connected to the high-side bootstrap pin HB of the high-side and low-side driver N2. One end of the bootstrap capacitor C4 is connected to the high-side bootstrap pin HB of the high-side and low-side driver N2, and the other end is connected to the input power supply pin VDD. The bootstrap Schottky diode V2 and the capacitor C4 are used to implement the floating drive of the high-side and low-side driver N2. The ground pin VSS of the high-side and low-side driver N2 is connected to power ground GND. The drive output HO2 of the pulse width control unit 5 is connected to LO... 2 serves as the input to the high-side input pin HI and the low-side input pin LI of the high-side and low-side drivers N2, respectively. The high-side drive pin HO of the high-side and low-side drivers N2 is connected to one end of the drive resistor R3 and the cathode of the diode V5. The anode of the diode V5 is connected to the other end of the drive resistor R3, serving as the drive input signal for the power switch VH2. The low-side drive pin LO of the high-side and low-side drivers N2 is connected to one end of the drive resistor R4 and the cathode of the diode V6. The anode of the diode V6 is connected to the other end of the drive resistor R4, serving as the drive input signal for the power switch VL2. The diodes V5, V6, R3, and R4 are used to adjust the switching speed of the power conversion units VH2 and VL2, thereby improving the overall performance of the conversion units.

[0031] like Figure 5 As shown, the power supply unit 7 includes a power switch V3, a power switch V4, a Schottky diode V5, a Schottky diode V6, an inductor L2, a capacitor C5, a capacitor C6, and a capacitor C7. Figure 5In this circuit, the power supply unit 7 is implemented using a Flyback circuit with two auxiliary windings. This circuit is implemented using a low-voltage turn-on wide-input synchronous Buck controller. The synchronous Buck output voltage is used to power the pulse width control unit 5, and the auxiliary winding outputs power the first power drive unit and the second power drive unit respectively. The drain of the power switch V3 is connected to the positive terminal of the power supply Vin. The source of the power switch V3 shares a common node with one end of the inductor L2 and the drain of the power switch V4. The source of the power switch V4 is connected to the negative terminal of the power supply Vin. The other end of the inductor L2 is connected to the pulse width control unit. One end of the capacitor C5 is connected to the other end of the inductor L2, and the other end of the capacitor C5 is connected to the negative terminal of the power supply Vin. The anode of the Schottky diode V5 is connected to the same-name terminal of the first secondary winding of the transformer. The opposite-name terminal of the first secondary winding of the transformer is connected to one end of the capacitor C6. The other end of the capacitor C6 is connected to the cathode of the Schottky diode V5. The other end of the capacitor C6 is also connected to the first power drive unit to provide drive power. The same-name terminal of the second secondary winding of the transformer is connected to the anode of Schottky diode V6, the cathode of Schottky diode V6 is connected to one end of capacitor C7, and the other end of capacitor C7 is connected to the opposite-name terminal of the second secondary winding of the transformer. The cathode of Schottky diode V6 is also connected to the second power drive unit, providing drive power.

[0032] like Figure 6 As shown in the schematic diagram, the sampling feedback unit 4 includes an operational amplifier N3, resistors R5 and R6, and an external adjustable resistor RSET.

[0033] exist Figure 6 In this circuit, one end of resistor R5 is connected to the output voltage Vo of the overvoltage and undervoltage surge suppression circuit described in this invention, and the other end is connected to one end of resistor R6; the other end of resistor R6 is connected to the output ground of the overvoltage and undervoltage surge suppression circuit described in this invention; the end where resistor R5 and resistor R6 are connected is connected to the non-inverting input of operational amplifier N3. Resistors R5 and R6 sample the output voltage Vo of the overvoltage and undervoltage surge suppression circuit described in this invention, and the inverting input of operational amplifier N3 is connected to the reference voltage VREF. Resistors R5, R6, and the reference voltage VREF together determine the output voltage Vo of the overvoltage and undervoltage surge suppression circuit. One end of the adjustable resistor RSET is connected to the connection point of resistors R5 and R6. By setting different resistance values ​​of resistor RSET and connecting it to Vo or GND... O Connecting them together can reduce or increase the output voltage.

[0034] When the other end of resistor RSET is connected to the output voltage Vo of the overvoltage and undervoltage surge suppression circuit described in this invention, the output voltage can be lowered. The adjusted output voltage... The value is determined by the following formula.

[0035] ; wherein, , Rup is the equivalent up-sampling resistance of the sampling feedback circuit after connecting the resistance RSET, Vout is the adjusted output voltage value; When the other end of the resistance RSET is connected to GND O , the output voltage can be increased, and the adjusted output voltage value is determined by the following formula.

[0036] ; wherein, , Rdown is the equivalent down-sampling resistance of the sampling feedback circuit after connecting the resistance RSET, Vout is the adjusted output voltage value.

[0037] The above-described embodiments are merely preferred embodiments of the present application, and are not intended to limit the scope of the present application. Various modifications and improvements to the technical solutions of the present application made by those of ordinary skill in the art without departing from the design spirit of the present application shall fall within the scope of protection of the present application as defined by the claims.

Claims

1. A high-efficiency overvoltage and undervoltage surge suppression circuit, characterized in that, The circuit includes: an input filtering unit (1), a power conversion unit (2), an output filtering unit (3), a sampling feedback unit (4), a pulse width control unit (5), a power drive unit (6), and a power supply unit (7). The input voltage Vin is connected to the input filter unit (1) and the power supply unit (7) of the high-efficiency overvoltage and undervoltage surge suppression circuit, respectively. The output terminal of the input filter unit (1) is connected to the input terminal of the power conversion unit (2), and the output terminal of the power conversion unit (2) is connected to the input terminal of the output filter unit (3). The output terminal of the output filter unit (3) serves as the output of the high-efficiency overvoltage and undervoltage surge suppression circuit and is connected to the input terminal of the sampling feedback unit (4). The output terminal of the sampling feedback unit (4) is connected to the input terminal of the power supply unit (7). The input terminal of the pulse width control unit (5) is connected to the input terminal of the power drive unit (6), the output terminal of the power drive unit (6) is connected to the control input terminal of the power conversion unit (2), the input terminal of the power supply unit (7) is connected to the input voltage Vin, and the output terminal of the power supply unit (7) is connected to the input terminals of the power drive unit (6) and the pulse width control unit (5). The power supply unit (7) is used to provide power supply voltage for the power drive unit (6) and the pulse width control unit (5).

2. The high-efficiency overvoltage and undervoltage surge suppression circuit according to claim 1, characterized in that, The power conversion unit (2) includes power switching transistors VH1, VH2, VL1, and VL2; the output filtering unit (3) includes inductor L1 and capacitor C0; capacitor C0 and inductor L1 together constitute the output filtering unit; The drain of power switch VH1 is connected to the positive terminal of the input voltage Vin, the source of power switch VH1 is connected to the drain of power switch VL1, and the source of power switch VL1 is connected to the negative terminal of the input voltage Vin. The source of power switch VH2 is connected to the drain of power switch VL2, and the connection between the drain of power switch VH2 and the drain of power switch VH1 forms the positive terminal of the output voltage Vo. The electrode is connected to the source of the power switch VL2 and serves as the negative terminal of the output voltage Vo; one end of the inductor L1 is connected to the node between the source and drain of the power switch VH1 and the power switch VL1, and the other end of the inductor L1 is connected to the node between the source and drain of the power switch VH2 and the power switch VL2; one end of the capacitor C0 is connected to the drain of the power switch VH2 and the other end is connected to the source of the power switch VL2.

3. The high-efficiency overvoltage and undervoltage surge suppression circuit according to claim 2, characterized in that, The power drive unit (6) includes high-side and low-side drivers N1 and N2, bootstrap Schottky diodes V1, V2, V3, V4, V5, and V6, resistors R1, R2, R3, and R4, and capacitors C1, C2, C3, and C4; the power drive unit (6) is divided into a first power drive unit and a second power drive unit.

4. The high-efficiency overvoltage and undervoltage surge suppression circuit according to claim 3, characterized in that, The first power drive unit includes a high-side and low-side driver N1, a bootstrap Schottky diode V1, a diode V3, a diode V4, a resistor R1, a resistor R2, a capacitor C1, and a capacitor C2; One end of capacitor C1 is connected to the input power supply pin VDD of the high-side and low-side driver N1, and the other end is connected to the power ground GND of the circuit; the anode of the bootstrap Schottky diode V1 is connected to one end of capacitor C1 and the power supply input voltage, and the cathode is connected to the high-side bootstrap pin HB of the high-side and low-side driver N1; one end of bootstrap capacitor C2 is connected to the high-side bootstrap pin HB of the high-side and low-side driver N1, and the other end is connected to the input power supply pin VDD; the ground pin VSS of the high-side and low-side driver N1 is connected to the power ground. GND is connected; the high-side drive pin HO of the high-side and low-side driver N1 is connected to the drive resistor R1 and the cathode of diode V3; the anode of diode V3 is connected to the other end of drive resistor R1; the low-side drive pin LO of the high-side and low-side driver N1 is connected to the drive resistor R2 and the cathode of diode V4; the anode of diode V4 is connected to the other end of drive resistor R2; the high-side input pin HI and the low-side input pin LI of the high-side and low-side driver N1 are connected to the drive outputs HO and LO of the pulse width control unit.

5. The high-efficiency overvoltage and undervoltage surge suppression circuit according to claim 4, characterized in that, The second power drive unit includes a high-side and low-side driver N2, a bootstrap Schottky diode V2, a diode V5, a diode V6, a resistor R3, a resistor R4, a capacitor C3, and a capacitor C4; One end of capacitor C3 is connected to the input power supply pin VDD of the high-side and low-side driver N2, and the other end is connected to power ground GND; the anode of the bootstrap Schottky diode V2 is connected to one end of capacitor C3 and the power supply input voltage Vin, and the cathode is connected to the high-side bootstrap pin HB of the high-side and low-side driver N2; one end of bootstrap capacitor C4 is connected to the high-side bootstrap pin HB of the high-side and low-side driver N2, and the other end is connected to the input power supply pin VDD; the ground pin VSS of the high-side and low-side driver N2 is connected to power ground GND. D is connected; the high-side drive pin HO of the high-side and low-side driver N2 is connected to the drive resistor R3 and the cathode of diode V5; the anode of diode V5 is connected to the other end of drive resistor R3; the low-side drive pin LO of the high-side and low-side driver N2 is connected to the drive resistor R4 and the cathode of diode V6; the anode of diode V6 is connected to the other end of drive resistor R4; the high-side input pin HI and the low-side input pin LI of the high-side and low-side driver N2 are connected to the drive outputs HO2 and LO2 of the pulse width control unit.

6. The high-efficiency overvoltage and undervoltage surge suppression circuit according to claim 5, characterized in that, The high-efficiency overvoltage and undervoltage surge suppression circuit also includes an external adjustable resistor RSET; The first end of the adjustable resistor RSET is connected to the Trim terminal of the circuit, the second end is connected to the circuit output ground GNDO to increase the circuit output voltage, and the third end is connected to the circuit output terminal to decrease the circuit output voltage.

7. The high-efficiency overvoltage and undervoltage surge suppression circuit according to claim 6, characterized in that, By adjusting the connection method and resistance value of the adjustable resistor RSET, the output voltage of the circuit can be adjusted according to the different performance of the subsequent secondary power supply, thus significantly improving the system conversion efficiency.

8. The high-efficiency overvoltage and undervoltage surge suppression circuit according to claim 2, characterized in that, The power conversion unit (2) converts the input voltage Vin into a constant voltage and outputs it through the output filtering unit (3). The sampling feedback unit (4) sends the collected output voltage signal as a feedback signal to the pulse width control unit (5). The pulse width control unit (5) adjusts the duty cycle of the power switching transistors VH1, VH2, VL1, and VL2 in the power conversion unit (2) according to the feedback signal to achieve overvoltage and undervoltage surge suppression functions.

9. The high-efficiency overvoltage and undervoltage surge suppression circuit according to claim 5 or 8, characterized in that, When an overvoltage surge occurs, the input voltage Vin of the high-efficiency overvoltage and undervoltage surge suppression circuit is greater than the output voltage Vo. The overvoltage and undervoltage surge suppression circuit operates in a step-down mode. The pulse width control unit (5) controls the power switch VH2 to remain on and the power switch VL2 to remain off through the power drive unit (6). By controlling the power switches VH1 and VL1 to be complementary, the output voltage Vo is stably output when an overvoltage surge occurs.

10. The high-efficiency overvoltage and undervoltage surge suppression circuit according to claim 5 or 8, characterized in that, When an undervoltage surge occurs, the input voltage Vin of the high-efficiency overvoltage and undervoltage surge suppression circuit is less than the output voltage Vo. The overvoltage and undervoltage surge suppression circuit operates under boost conditions. The pulse width control unit (5) controls the power switch VH1 to remain on and the power switch VL1 to remain off through the power drive unit (6). By controlling the power switch VH2 and the power switch VL2 to be complementary and conducting, the output voltage Vo is stably output when an overvoltage surge occurs.

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