Photoelectric packaging structure

Abstract

A photoelectric packaging structure disclosed by the present invention comprises a packaging substrate, an optical chip, an electric chip, a lens and a micro connector, the packaging substrate is provided with a first upper surface, the first upper surface is provided with a groove, the optical chip is installed in the groove, the optical chip is provided with a second upper surface, the second upper surface is flush with the first upper surface, and the optical chip is installed in the groove. The electric chip is electrically connected with the second upper surface and the first upper surface at the same time; the lens is arranged on the packaging substrate, is positioned on one side of the optical chip and is optically coupled with the optical chip; the micro connector is installed on the packaging substrate, the micro connector is connected with an optical fiber, and the optical chip is optically coupled with the optical fiber through the lens and the micro connector. According to the photoelectric packaging structure, the signal transmission path is shortened, the possibility of impedance mismatching and signal crosstalk is reduced, the high-frequency performance and signal integrity of packaging are improved, efficient optical coupling of the optical chip and the optical fiber is achieved, the stability and efficiency of optical signal transmission are improved, and the cost is reduced. And the aspects of compactness, connection efficiency, optical coupling performance and the like are remarkably improved.

Description

TECHNICAL FIELD

[0001] The present application relates to the field of optoelectronics, and in particular to an optoelectronic packaging structure. BACKGROUND

[0002] With the development of artificial intelligence, cloud computing and other technologies, data centers have an increasing demand for high-speed, low-latency optical interconnections. In this context, optical input / output (OIO) technology has emerged, which packages optical modules and processors (XPU, such as CPU, GPU, etc.) together into an optoelectronic packaging structure, typically including optical chips, electrical chips, packaging substrates, and optical fibers, to achieve lower power consumption and higher bandwidth optical interconnections.

[0003] However, the commonly used packaging scheme faces challenges when applied to OIO, for example: optical chips and electrical chips are usually packaged separately or arranged in a simple plane, resulting in a large overall volume of the package, which is difficult to adapt to the trend of device miniaturization and high integration. There are problems of optical coupling efficiency between the optical chip and the optical fiber, and impedance mismatch and signal crosstalk problems in high-frequency signal transmission between the electrical chip and the optical chip, the packaging substrate, which all limit the further improvement of the performance of the optoelectronic packaging structure and the development of the OIO technology. SUMMARY

[0004] To solve the problems of low integration, poor optical coupling, and poor connection performance of the commonly used technology in OIO applications, the purpose of the present application is to provide a new optoelectronic packaging structure that has been significantly improved in compactness, connection efficiency, and optical coupling performance.

[0005] To achieve the above-mentioned application purpose, an embodiment of the present application provides an optoelectronic packaging structure, comprising: a packaging substrate having a first upper surface and a first lower surface, the first upper surface being provided with a recess; an optical chip mounted in the recess, the optical chip having a second upper surface flush with the first upper surface; an electrical chip electrically connected to the first upper surface and the second upper surface; a lens mounted on the packaging substrate and located on one side of the optical chip, optically coupled to the optical chip; a micro connector mounted on the packaging substrate and located on the side of the lens away from the optical chip, the micro connector connected to an optical fiber, the optical chip optically coupled to the optical fiber through the lens and the micro connector.

[0006] As a further improvement of the application, the electric chip has a second lower surface, which is electrically connected to the first upper surface and the second upper surface simultaneously through the first ball grid array.

[0007] As a further improvement of the application, the optoelectronic packaging structure further comprises a circuit board; the packaging substrate has an electric interconnection structure, and the electric signal of the electric chip is transmitted to the first lower surface through the electric interconnection structure, and then transmitted to the circuit board through the second ball grid array on the first lower surface.

[0008] As a further improvement of the application, the optoelectronic packaging structure further comprises a processor unit, which is packaged together with the packaging substrate on the circuit board, and the processor unit is electrically connected to the optoelectronic packaging structure through the circuit board.

[0009] As a further improvement of the application, the recess has a side opening; the lens and the micro connector are arranged in the recess in sequence, and the lens guides the light signal emitted by the optical chip out through the side opening.

[0010] As a further improvement of the application, a plurality of electric chips are arranged, and the plurality of electric chips are arranged around the optical chip along the two sides of the width direction of the recess and / or along the side bottom wall edge opposite to the side opening.

[0011] As a further improvement of the application, the electric chip comprises at least one of a transimpedance amplifier, a driver and a digital signal processor.

[0012] As a further improvement of the application, the optical chip is a silicon optical chip, a lithium niobate chip, an electro-absorption modulated laser or a vertical cavity surface emitting laser chip.

[0013] As a further improvement of the application, the micro connector comprises a chip connecting part and a fiber connecting part, the chip connecting part is fixed on the packaging substrate, and the fiber connecting part is detachably connected to the chip connecting part through a plug structure.

[0014] As a further improvement of the application, the plug structure comprises a first guide pin and a first guide hole arranged on the chip connecting part, and a second guide pin and a second guide hole arranged on the fiber connecting part; When the chip connecting part is connected to the fiber connecting part, the first guide pin is inserted into the second guide hole, and the second guide pin is inserted into the first guide hole.

[0015] Compared with the common technology, the photoelectric packaging structure has the following beneficial effects: the optical chip is mounted in the groove of the packaging substrate, the pads of the electrical chip are directly connected with the pads of the second upper surface of the optical chip and the pads of the first upper surface of the packaging substrate, the signal transmission path is shortened, the possibility of impedance mismatch and signal crosstalk is reduced, and the high-frequency performance and signal integrity of the packaging are improved. In addition, the structure realizes efficient optical coupling of the optical chip and the optical fiber, improves the stability and efficiency of optical signal transmission, and significantly improves compactness, connection efficiency and optical coupling performance. BRIEF DESCRIPTION OF DRAWINGS

[0016] Figure 1 is a side view of a part of the photoelectric packaging structure of an embodiment of the present application; Figure 2 is a top view of the photoelectric packaging structure of an embodiment of the present application; Figure 3 is a sectional view of the packaging substrate of an embodiment of the present application; Figure 4 is a structural schematic diagram of the packaging substrate of an embodiment of the present application; Figure 5 is a schematic diagram of the mounting process of the photoelectric packaging structure of an embodiment of the present application; Figure 6 is a structural schematic diagram of the photoelectric packaging structure of an embodiment of the present application; wherein, 100, photoelectric packaging structure; 10, packaging substrate; 11, groove; 111, upper opening; 112, side opening; 113, side bottom wall; 114, side wall; 12, second ball grid array; 13, first upper surface; 14, first lower surface; 15, electrical interconnection structure; 20, optical chip; 21, second upper surface; 30, electrical chip; 31, first ball grid array; 32, electrical chip wafer; 33, second lower surface; 40, lens; 50, micro connector; 51, chip connecting part; 52, optical fiber connecting part; 60, optical fiber; 70, processor unit; 80, circuit board; 101, first photoelectric packaging unit; 102, second photoelectric packaging unit; L1, length direction; W1, width direction. DETAILED DESCRIPTION

[0017] The present application will be described in detail below with reference to the specific embodiments shown in the drawings. However, these embodiments do not limit the present application, and the changes in structure, method or function made by those of ordinary skill in the art based on these embodiments are included in the protection scope of the present application.

[0018] It should be understood that terms such as "upper", "above", "lower", "below", and the like that are used herein for ease of description to describe the relationship of one element or feature to another element(s) or feature(s) as shown in the figures are not limiting and are used in conjunction with the spatially relative terms only. The spatially relative terms can be intended to encompass different orientations of the device in use or operation in addition to the orientation depicted in the figures.

[0019] An embodiment of the present application provides an optoelectronic packaging structure, aiming to realize compact packaging design, high performance and optimized optical signal transmission capacity through innovative component layout and connection mode. The packaging structure is suitable for high-speed optical communication, high-density integrated circuits and other fields.

[0020] The optoelectronic packaging structure of the embodiment, as shown in Figure 1 and 2 , comprises a packaging substrate 10, an optical chip 20, an electrical chip 30, a lens 40 and a micro connector 50.

[0021] The packaging substrate 10 has a first upper surface 13 and a first lower surface 14, and the first upper surface 13 is provided with a recess 11.

[0022] The packaging substrate 10 carries and protects other functional components and provides support for interconnection between components.

[0023] The area outside the recess 11 of the first upper surface 13 reserves a pad area for connection, providing convenience for subsequent installation of the electrical chip 30.

[0024] The optical chip 20 is installed in the recess 11. After the optical chip 20 is installed in the recess 11, the optical chip 20 has a second upper surface 21 which is flush with the first upper surface 13.

[0025] The optical chip 20 is a silicon optical integrated chip. The optical chip 20 realizes mutual conversion between electrical signals and optical signals, and can be integrated with one or more of a detector, a wavelength division multiplexer, a laser, a modulator and a coupler.

[0026] The optical chip 20 is fixed in the recess 11 of the packaging substrate 10 by an adhesive. After the optical chip 20 is installed, the adhesive solidifies to form a firm bond, ensuring that the optical chip 20 will not displace under vibration or temperature change.

[0027] The second upper surface 21 is kept flush with the first upper surface 13 by precisely controlling the depth of the recess 11, the thickness of the optical chip 20 and the thickness of the adhesive.

[0028] The second upper surface 21 is also provided with a pad, ready for connection with the electrical chip 30.

[0029] The electrical chip 30 has a second lower surface 33 which is electrically connected to both the first upper surface 13 and the second upper surface 21 via the first ball grid array 31.

[0030] The electrical chip 30 can be a trans-impedance amplifier or a driver. It is responsible for processing or amplifying electrical signals, cooperating with the optical chip 20 to achieve modulation or demodulation of signals.

[0031] In this embodiment, the pads of the electrical chip 30 are connected to both the second upper surface 21 and the first upper surface 13 via the first ball grid array 31 (BGA).

[0032] The electrical chip 30 is directly and simultaneously connected to the optical chip 20 and the packaging substrate 10, avoiding the complexity of traditional wire bonding connection, significantly shortening the transmission distance of electrical signals, reducing parasitic inductance and capacitance in signal transmission, reducing signal loss and crosstalk phenomenon, thereby improving the high-frequency performance and signal integrity of the packaging structure.

[0033] The lens 40 is mounted in the groove 11 of the packaging substrate 10, and the lens 40 serves as an optical element to couple the optical signals emitted by the optical chip 20 to the micro connector 50. The lens 40 is fixed in the groove 11 of the packaging substrate 10 by an adhesive.

[0034] The micro connector 50 is mounted in the groove 11 of the packaging substrate 10, and the micro connector 50 connects the optical fiber 60. The optical chip 20 is optically coupled to the optical fiber 60 through the lens 40 and the micro connector 50. The micro connector 50 transmits optical signals from the lens 40 to the optical fiber 60. The micro connector 50 contains optical structures such as integrated waveguides and optical coupling lenses inside for optical signal transmission.

[0035] One end of the micro connector 50 is aligned with the lens 40, and the other end is provided with an optical fiber connection interface. The optical signals emitted by the optical chip 20 are collimated by the lens 40 and coupled to the optical fiber 60 through the optical structure of the micro connector 50, achieving stable transmission of optical signals.

[0036] As shown in Figure 5 In the production process, the packaging substrate 10 with the groove 11 is first obtained. The groove 11 can be formed on the first upper surface 13 by etching or mechanical processing, etc.

[0037] Then the optical chip 20 (such as a silicon optical chip 20) is fixed in the groove 11 by an adhesive, ensuring that the second upper surface 21 is flush with the first upper surface 13. After the adhesive is cured, a stable bond is provided.

[0038] Then the electrical chip 30 is placed above the optical chip 20 and the packaging substrate 10, and the pads of the electrical chip 30 are simultaneously connected to the pads of the optical chip 20 and the substrate using the first ball grid array 31 (BGA) through a reflow soldering process, forming an interconnection structure.

[0039] Figure 5 In this process, the electrical chip 30 can be packaged using a wafer-level packaging process. A redistribution layer (RDL) is formed on the electrical chip wafer 32, a bump is implanted, forming the interconnect structure of the first ball grid array 31 (BGA), and then it is diced into discrete electrical chips 30.

[0040] Next, a lens 40 and a micro-connector 50 are installed in the groove 11 of the packaging substrate 10 on one side of the optical chip 20, and are fixed by adhesive bonding. The position of the lens 40 is consistent with the light emission direction of the optical chip 20, and the fiber optic interface of the micro-connector 50 is aligned with the fiber optic cable 60 to ensure that the optical signal is coupled from the optical chip 20 to the fiber optic cable 60 through the lens 40.

[0041] Finally, optical and electrical tests are performed on the package structure to verify optical coupling efficiency and signal integrity. After passing the tests, the package structure can be further integrated with circuit boards 80 to form a complete system.

[0042] Furthermore, such as Figure 6 As shown, the optoelectronic packaging structure 100 is provided in two sets, namely the first optoelectronic packaging unit 101 and the second optoelectronic packaging unit 102. The two have the same structure. The first optoelectronic packaging unit 101 and the second optoelectronic packaging unit 102 realize the transmission of optical signals through optical fiber 60.

[0043] The two ends of the optical fiber 60 are respectively inserted into the optical fiber connection interfaces of the micro connectors 50 of the first optoelectronic packaging unit 101 and the second optoelectronic packaging unit 102, and the optical signal is efficiently coupled through precise optical alignment technology.

[0044] The optical signal is emitted from the optical chip 20 of the first optoelectronic packaging unit 101, collimated by the lens 40, coupled to the optical fiber 60 through the optical structure of the micro connector 50, and transmitted to the second optoelectronic packaging unit 102. The micro connector 50 and the lens 40 then transmit the optical signal back to the optical chip 20 for reception and processing.

[0045] Furthermore, the first optoelectronic packaging unit 101 and the second optoelectronic packaging unit 102 are connected by multiple optical fibers 60.

[0046] The optical chip 20 is designed with a multi-channel structure, which can process multiple independent optical signals simultaneously. The optical chip 20 integrates multiple optical modulators or photodetectors, and each channel outputs an independent optical signal through a waveguide splitter.

[0047] Lens 40 is an array lens. Each lens in the array lens corresponds to one optical channel, ensuring accurate collimation of the optical signal.

[0048] The micro connector 50 is built-in with multi-path optical structure (such as multi-channel waveguide or beam splitter) to couple the multiple optical signals outputted by the array lens 40 to the corresponding optical fibers 60.

[0049] As shown in Figure 3 , the groove 11 has an upper opening 111 and a side opening 112. The optical chip 20 is connected to the electrical chip 30 at the upper opening 111. The lens 40 and the micro connector 50 are sequentially arranged in the groove 11, and the optical signals emitted by the optical chip 20 are finally guided out to the external optical fiber through the side opening 112 via the lens 40 and the micro connector 50.

[0050] That is, the upper opening 111 is used to mount the optical chip 20 and the electrical chip 30, and the side opening 112 provides a channel for the transmission of optical signals.

[0051] As shown in Figure 4 , on the plane where the upper opening 111 is located, the width of the groove 11 is the same as the width of the optical chip 20, and the length of the groove 11 is longer than the length of the optical chip 20. The side bottom wall 113 opposite to the side opening 112 of the groove 11 is adjacent to the optical chip 20, and the two side walls 114 opposite to each other in the groove 11 are both adjacent to the optical chip 20.

[0052] As referred to herein, the width of the groove is the same as the width of the optical chip, which should be understood as that the two are matched in design, allowing a reasonable gap due to manufacturing tolerance or mounting process (such as adhesive layer). The width direction W1 where the width is located, and the length direction L1 where the length is located, as shown in Figure 4 , the length direction L1 is the direction from the side bottom wall 113 to the side opening 112, and the width direction W1 is the direction between the two side walls 114.

[0053] The width of the groove 11 is consistent with the width of the optical chip 20, which on the one hand ensures that the optical chip 20 closely fits the side walls 114 of the groove 11 in the width direction W1, avoiding deviation. On the other hand, it is convenient to mount the electrical chip 30 on both sides of the width direction W1.

[0054] The length of the groove 11 is designed to be longer than the length of the optical chip 20, specifically the length of the optical chip 20 plus the mounting space of the lens 40 and the micro connector 50.

[0055] The optical chip 20 is mounted in the groove 11, adjacent to the side bottom wall 113 opposite to the side opening 112, so as to mount the optical chip 20 at the corresponding position of the side bottom wall 113.

[0056] The electrical chip 30 of the embodiment is provided in plurality, and the plurality of electrical chips 30 are arranged around the optical chip 20 along the two sides of the width direction W1 of the groove 11, and / or along the edge of the side bottom wall 113 opposite to the side opening 112.

[0057] In Figure 2In the upper opening 111, at least one electrical chip 30 is arranged on both sides of the width direction W1 of the groove 11 to connect the optical chip 20 and the packaging substrate 10.

[0058] In the upper opening 111, at least one electrical chip 30 is arranged on both sides of the width direction W1 of the groove 11 to connect the optical chip 20 and the packaging substrate 10. Figure 2 As shown, two electrical chips 30 are arranged at the position aligned with the side bottom wall 113.

[0059] In this way, one optical chip 20 and packaging substrate 10 are connected with four electrical chips 30, which can be the same or different types of chips, and these electrical chips 30 can be connected to the optical chip 20 and the packaging substrate 10 through BGA.

[0060] The electrical chips 30 of the embodiment include at least one of a transimpedance amplifier (TIA), a driver, and a digital signal processor (DSP). These electrical chips 30 are respectively used for amplification, modulation, and processing of optical signals.

[0061] In the multi-channel optical coupling of the embodiment, each channel corresponds to one or more electrical chips 30. For example, a receiving channel is connected to a transimpedance amplifier, and a transmitting channel is connected to a driver.

[0062] Further, the optical chip 20 can be a silicon optical chip, a lithium niobate chip, an electro-absorption modulated laser, or a vertical cavity surface emitting laser chip.

[0063] The micro connector 50 of the embodiment includes a chip connecting part 51 and a fiber connecting part 52. The chip connecting part 51 and the fiber connecting part 52 are detachably connected through a plug-in structure.

[0064] The chip connecting part 51 is fixed to the packaging substrate 10 and aligned with the lens 40. The fiber connecting part 52 is connected to the optical fiber 60 and is mated with the chip connecting part 51 through the plug-in structure.

[0065] The plug-in structure of the chip connecting part 51 and the fiber connecting part 52 not only facilitates the installation and maintenance of the optical fiber 60, but also is particularly suitable for the high-temperature process requirements in optoelectronic co-packaging, such as reflow soldering process, to ensure that the optical fiber 60 is not damaged in a high-temperature environment while maintaining high-efficiency optical coupling performance.

[0066] To ensure that the chip connecting part 51 and the fiber connecting part 52 can achieve high-precision optical alignment when mated, the plug-in structure can specifically adopt a self-aligning cross-guiding matching mode. For example, the plug-in structure includes a first guide pin and a first guide hole arranged on the chip connecting part 51, and a second guide pin and a second guide hole arranged on the fiber connecting part 52.

[0067] Specifically, on the mating surface of the chip connecting part 51, a first guide pin and a first guide hole are respectively arranged along the diagonal line or a predetermined position. Correspondingly, on the mating surface of the optical fiber connecting part 52, a second guide pin and a second guide hole are also arranged at positions accurately matched with the first guide pin and the first guide hole.

[0068] When the connection is made, the first guide pin on the chip connecting part 51 is inserted into the second guide hole on the optical fiber connecting part 52, and at the same time, the second guide pin on the optical fiber connecting part 52 is inserted into the first guide hole on the chip connecting part 51. Through this double and cross "pin-hole" plug-in cooperation, not only the accurate positioning in the horizontal and vertical directions can be achieved, but also the rotation deviation during the connection can be effectively prevented, ensuring the alignment of the optical path between the two components.

[0069] In an embodiment thereof, the optoelectronic packaging structure 100 further comprises a circuit board 80; the packaging substrate 10 has an electrical interconnection structure 15, and the electrical signals of the electrical chip 30 are transmitted to the first lower surface 14 of the packaging substrate 10 through the electrical interconnection structure 15, and then transmitted to the circuit board 80 through the second ball grid array 12 on the first lower surface 14.

[0070] The electrical interconnection structure 15 realizes the efficient transmission of electrical signals between the electrical chip 30 and the circuit board 80, as shown in the following. Figure 1 As shown, the electrical interconnection structure 15 can be a structure perpendicular to the first upper surface 13 and the first lower surface 14, for example, a through silicon via (TSV). When the electrical chip 30 is simultaneously soldered to the optical chip 20 and the upper surface of the packaging substrate 10 through the first ball grid array 31, the electrical signals from the electrical chip 30 are first transmitted to the corresponding pads on the first upper surface 13 of the packaging substrate 10 through the first ball grid array 31. Then, the electrical signals are directly guided to the first lower surface 14 of the packaging substrate 10 through the through silicon via penetrating the packaging substrate 10. On the first lower surface 14 of the packaging substrate 10, a pad array for connecting external circuits is provided in advance, and the second ball grid array 12 (BGA) or the planar grid array (LGA) is packaged on the pads. Finally, the entire optoelectronic packaging structure 100 is integrally mounted and electrically connected to the circuit board 80 through the second ball grid array 12.

[0071] The electrical interconnection structure 15 provides a shortest transmission path for the electrical signals from the electrical chip 30 to the circuit board 80, greatly shortens the signal delay, significantly reduces the parasitic inductance and capacitance in the signal transmission process compared with the traditional planar lead or wire connection, improves the high-frequency performance and signal integrity of the packaging structure, and realizes the stable operation of the optoelectronic packaging structure 100 at high speed.

[0072] In an embodiment, the optoelectronic packaging structure 100 further comprises a processor unit 70, the packaging substrate 10 and the processor unit 70 are collectively packaged on a circuit board 80, and the processor unit 70 is electrically connected with the optoelectronic packaging structure 100 through the circuit board 80.

[0073] The processor unit 70 can be one or more, such as a CPU, a GPU, an IPU, and the like, and the processor unit 70 is electrically and mechanically connected with the circuit board 80 through a ball grid array (BGA) or the like.

[0074] The processor unit 70 and the optoelectronic packaging structure 100 are collectively integrated on the same circuit board 80 to form a highly integrated optoelectronic co-packaging system. The high-speed electrical signals processed or emitted by the processor unit 70 are transmitted to the circuit board 80 through the BGA packaging of the processor unit 70, and then transmitted to the second ball grid array 12 below the optoelectronic packaging structure 100 through the high-speed transmission lines on the circuit board 80, and finally reach the electrical chip 30 for optoelectronic conversion or signal processing. Similarly, the electrical signals received from the optical fiber 60 and converted by the optoelectronic packaging structure 100 are also transmitted back to the processor unit 70 through the same path.

[0075] The layout greatly shortens the physical distance between the processor unit 70 and the optoelectronic packaging structure 100, significantly reduces the delay of data transmission, reduces power consumption, and achieves higher data bandwidth. The integration of the entire system is higher, the size is more compact, and the signal transmission efficiency and reliability are also essentially improved.

[0076] Compared with the conventional technology, the embodiment has the following beneficial effects: The optoelectronic packaging structure 100 installs the optical chip 20 in the groove 11 of the packaging substrate 10, and the pads of the electrical chip 30 are directly connected with the pads of the second upper surface 21 and the pads of the first upper surface 13, which shortens the signal transmission path, reduces the possibility of impedance mismatch and signal crosstalk, improves the high-frequency performance and signal integrity of the packaging, is suitable for high-speed optical communication scenarios, and realizes efficient optical coupling between the optical chip 20 and the optical fiber 60, improves the stability and efficiency of optical signal transmission, and significantly improves the compactness, connection efficiency, and optical coupling performance, providing an efficient and reliable solution for modern optoelectronic applications.

[0077] It should be understood that although the present specification is described in terms of embodiments, not every embodiment contains only one independent technical solution, and the description of the specification is only for the sake of clarity, and those skilled in the art should consider the specification as a whole, and the technical solutions in each embodiment can be appropriately combined to form other embodiments that those skilled in the art can understand.

[0078] The above detailed description merely illustrates preferred and possible non-limiting implementations of the application, and is not intended to limit the scope of the application. Other equally effective embodiments and modifications will be apparent to those skilled in the art, and are intended to be included within the scope of the application.

Claims

1. An optoelectronic package structure, comprising: include: The packaging substrate has a first upper surface and a first lower surface, and the first upper surface is provided with a groove; An optical chip is installed in the groove, and the optical chip has a second upper surface that is flush with the first upper surface. An electrical chip that is electrically connected to both the first upper surface and the second upper surface; A lens is mounted on the packaging substrate and located on one side of the optical chip, and is optically coupled to the optical chip; A micro-connector is mounted on the packaging substrate and located on the side of the lens away from the optical chip. The micro-connector is connected to an optical fiber, and the optical chip is optically coupled to the optical fiber through the lens and the micro-connector.

2. The optoelectronic package structure of claim 1, wherein, The electrical chip has a second lower surface, which is electrically connected to both the first upper surface and the second upper surface simultaneously via a first ball grid array.

3. The optoelectronic package structure of claim 2, wherein, The optoelectronic packaging structure also includes a circuit board; the packaging substrate has an electrical interconnection structure, and the electrical signal of the electrical chip is transmitted to the first lower surface through the electrical interconnection structure, and then transmitted to the circuit board through the second ball grid array on the first lower surface.

4. The optoelectronic package structure of claim 3, wherein, The optoelectronic packaging structure also includes a processor unit. The packaging substrate and the processor unit are jointly packaged on the circuit board, and the processor unit is electrically connected to the optoelectronic packaging structure through the circuit board.

5. The optoelectronic package structure of claim 1, wherein, The groove has a side opening; the lens and the micro connector are sequentially disposed in the groove, and the lens outputs the light signal emitted by the optical chip through the side opening.

6. The optoelectronic package structure of claim 5, wherein, The electrical chips are arranged in multiple ways, and the multiple electrical chips are arranged around the optical chip along both sides of the groove in the width direction and / or along the edge of the side bottom wall opposite to the side opening.

7. The optoelectronic package structure of claim 6, wherein, The electrical chip includes at least one of a transimpedance amplifier, a driver, and a digital signal processor.

8. The optoelectronic package structure of claim 1, wherein, The optical chip is configured as a silicon photonic chip, a lithium niobate chip, an electro-absorption modulated laser, or a vertical cavity surface-emitting laser chip.

9. The optoelectronic package structure of claim 1, wherein, The micro connector includes a chip connection part and an optical fiber connection part. The chip connection part is fixed on the packaging substrate, and the optical fiber connection part is detachably connected to the chip connection part through a plug-in structure.

10. The optoelectronic package structure of claim 9, wherein, The insertion and removal structure includes a first guide pin and a first guide hole disposed on the chip connection portion, and a second guide pin and a second guide hole disposed on the optical fiber connection portion. When the chip connection part is connected to the optical fiber connection part, the first guide pin is inserted into the second guide hole, and the second guide pin is inserted into the first guide hole.

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