Data retention method of solid state disk, solid state disk, equipment and storage medium

Abstract

The invention discloses a data retention method of a solid state disk, the solid state disk, equipment and a storage medium, and relates to the technical field of data storage, and the data retention method of the solid state disk comprises the following steps: judging whether a main control unit is in a power-off state or not; if the main control unit is in the power-off state, timing is started, and the power-off duration is obtained; when the power-off duration reaches a preset period, power is supplied to the main control unit; the main control unit performs data reading and writing operation on the NAND unit; and stopping supplying power to the main control unit. Through the steps, the risk of irreversible data offset caused by NAND floating gate electron leakage due to long-time power failure can be reduced.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of data storage, and particularly relates to a data retention method of a solid state disk, a solid state disk, equipment and a storage medium. BACKGROUND

[0002] In the field of data storage, solid state disks, as a high-performance storage solution, have been widely used in many scenarios such as personal computers, data centers and embedded systems. The core storage components of the solid state disks are mostly NAND units, which are a kind of non-volatile semiconductor storage medium based on floating gate transistors, capable of retaining data for a long time without power supply, greatly improving the reliability and portability of data storage.

[0003] The working principle of the NAND unit uses the amount of charge stored in the floating gate to represent the data state. In an ideal state, these charges should be able to be stably retained, even if the device is powered off, the data can be retained for a long time. However, in actual application, the leakage of NAND floating gate electrons will cause irreversible data drift. SUMMARY

[0004] The purpose of the present application is to provide a data retention method of a solid state disk, a solid state disk, equipment and a storage medium, which reduces the risk of irreversible data drift caused by the leakage of NAND floating gate electrons due to long power failure.

[0005] The present application discloses a data retention method of a solid state disk, which comprises the following steps:

[0006] determining whether the master control unit is in a power-off state;

[0007] if the master control unit is in a power-off state, start timing to obtain a power-off duration;

[0008] when the power-off duration reaches a preset period, power the master control unit;

[0009] the master control unit performs read and write data operations on the NAND unit;

[0010] stop powering the master control unit.

[0011] Optionally, the step of powering the master control unit when the power-off duration reaches the preset period comprises:

[0012] obtain the ambient temperature;

[0013] when the ambient temperature is within a first preset ambient temperature range, power the master control unit when the power-off duration reaches a first preset period;

[0014] When the ambient temperature is in the second preset ambient temperature range, the main control unit is powered when the power-off duration reaches the second preset period.

[0015] The temperature in the first preset ambient temperature range is higher than the temperature in the second preset ambient temperature range, and the first preset period is shorter than the second preset period.

[0016] Optionally, between the step of the main control unit performing read-write data operation on the NAND unit and the step of stopping power supply to the main control unit, further comprises:

[0017] calculating the health score of each block in the NAND unit performing read-write data operation to obtain the health score corresponding to each block;

[0018] sorting the blocks in ascending order of health score to obtain a block read-write sequence table;

[0019] After the step of stopping power supply to the main control unit, further comprises:

[0020] determining whether the main control unit is in a power-off state;

[0021] If the main control unit is in a power-off state, start timing to obtain the power-off duration;

[0022] When the power-off duration reaches a preset period, power the main control unit, and the main control unit performs read-write data operation on the blocks in the NAND unit according to the order of the block read-write sequence table;

[0023] stop power supply to the main control unit.

[0024] Optionally, the step of powering the main control unit when the power-off duration reaches a preset period comprises:

[0025] When the power-off duration reaches a preset period, detect the remaining battery capacity;

[0026] When the remaining capacity is less than a first preset capacity, power the main control unit, and the main control unit performs read-write data operation on the blocks in the NAND unit according to the order of the block read-write sequence table;

[0027] generate a first log and send the first log to the client;

[0028] The data retention method of the solid state disk further comprises the steps of:

[0029] When the remaining capacity is less than a second preset capacity, do not power the main control unit, generate a second log, and send the second log to the client; the second preset capacity is less than the first preset capacity.

[0030] Optionally, the step of stopping the power supply to the master control unit comprises:

[0031] closing an active switch between the battery unit and the master control unit, and stopping the power supply to the master control unit.

[0032] The application also discloses a solid state disk, which comprises a master control unit, a NAND unit, a wake-up control unit, a storage unit, a battery unit and an active switch, wherein the NAND unit is used for storing data; the master control unit is connected with the NAND unit, and is used for reading data in the NND unit and writing data into the NAND unit; the source and the drain of the active switch are connected with the master control unit and the battery unit respectively, and the gate of the active switch is connected with the wake-up control unit.

[0033] The wake-up control unit is connected with the master control unit, and is used for judging whether the master control unit is powered off, calculating the power-off duration, and controlling the opening and closing of the active switch; the storage unit is connected with the wake-up control unit, and is used for storing a preset period; the battery unit is connected with the master control unit and the wake-up control unit, and supplies power to the master control unit, the wake-up control unit and the NAND unit.

[0034] Optionally, the solid state disk further comprises a battery detection unit, which is connected with the battery unit and is used for detecting the remaining power of the battery unit; the battery detection unit is also connected with the wake-up control unit, and is also used for sending the detected remaining power to the wake-up control unit.

[0035] Optionally, the solid state disk further comprises a temperature detection unit, which is connected with the wake-up control unit and is used for detecting the ambient temperature.

[0036] The application also discloses an electronic device, which comprises:

[0037] at least one processor; and

[0038] a memory connected with the at least one processor in communication; wherein

[0039] the memory stores instructions executable by the at least one processor, and the instructions are executed by the at least one processor to enable the at least one processor to execute the data retention method of the solid state disk.

[0040] The application further discloses a computer readable storage medium storing a computer program, which realizes the data maintaining method of the solid state disk when executed by a processor.

[0041] Compared with the existing data maintaining method of the solid state disk which needs manual power-on, the application realizes the power-off self-maintenance function of the solid state disk, improves the reliability and data security of the solid state disk storage, and reduces the risk of irreversible data drift caused by NAND floating gate electron leakage due to long-time power-off by judging whether the master control unit is in a power-off state; if the master control unit is in the power-off state, starting timing to obtain a power-off duration; when the power-off duration reaches a preset period, supplying power to the master control unit; and the master control unit performing read-write data operation on the NAND unit; and stopping the power supply to the master control unit. BRIEF DESCRIPTION OF DRAWINGS

[0042] The accompanying drawings included to provide a further understanding of the embodiments of the application and constitute a part of the specification, serve to explain the principles of the application together with the text. Obviously, the drawings in the following description are only some embodiments of the application, and other drawings can be obtained by those skilled in the art without creative labor on the basis of these drawings. In the drawings:

[0043] Figure 1 is a schematic diagram of a data maintaining method of a solid state disk according to an embodiment of the application;

[0044] Figure 2 is a schematic diagram of performing read-write data operation on blocks in the NAND unit in the order of the block read-write order table according to an embodiment of the application;

[0045] Figure 3 is a schematic diagram of a solid state disk according to an embodiment of the application;

[0046] Figure 4 is a schematic diagram of an electronic device according to an embodiment of the application.

[0047] In the drawings, 10 is an electronic device; 11 is a memory; 12 is a processor; 13 is a display; 14 is a network interface; 20 is a solid state disk; 21 is a master control unit; 22 is a NAND unit; 23 is a storage unit; 24 is an active switch; 25 is a battery unit; 26 is a wake-up control unit; 27 is a temperature detection unit; and 28 is a battery detection unit. DETAILED DESCRIPTION

[0048] It is to be understood that the terminology used herein is for the purpose of describing specific embodiments only and is not intended to be limiting, but is intended to be representative of many alternatives. Many modifications will become apparent to those skilled in the art upon reading this disclosure and it is intended to include all such modifications as fall within the scope of the application.

[0049] In the description of the present application, the terms "first", "second", "third", etc. are used only for the purpose of description, and should not be interpreted as indicating relative importance or implying that the indicated technical features are limited to the number. Therefore, unless otherwise specified, the features defined with "first", "second" can explicitly or implicitly include one or more of the features; the meaning of "multiple" is two or more. The term "comprising" and any variation thereof means non-exclusive inclusion, and one or more other features, integers, steps, operations, units, components and / or combinations thereof can exist or be added.

[0050] In addition, the terms indicating the orientation or positional relationship of "center", "transverse", "upper", "lower", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer" and the like are described based on the orientation or relative position relationship shown in the drawings, and are only for the convenience of the simplified description of the present application, and do not indicate that the devices or elements indicated must have a particular orientation, be constructed and operated in a particular orientation, and therefore cannot be understood as a limitation on the present application.

[0051] In addition, unless otherwise specified and limited, the terms "mounting", "connecting", "connecting" should be broadly understood, for example, it can be fixedly connected, or it can be detachably connected, or integrally connected; it can be mechanically connected, or it can be electrically connected; it can be directly connected, or it can be indirectly connected through an intermediate medium, or it can be connected inside two elements. For those skilled in the art, the specific meaning of the above terms in the present application can be understood according to the specific circumstances.

[0052] The present application will be described in detail below with reference to the accompanying drawings and optional embodiments.

[0053] Figure 1 is a schematic diagram of a data retention method of a solid state disk according to an embodiment of the present application, as Figure 1 The present application discloses a data retention method of a solid state disk, which comprises the steps of:

[0054] S1: judging whether the master control unit is in a power-off state;

[0055] The solid state disk 20 is usually equipped with a power management module (PMM) inside, which is responsible for monitoring the power input state of the solid state disk 20. The state register of the power management module can be accessed through a programming interface (such as SPI, I2C, etc.), and the power state information of the current solid state disk 20 can be read, that is, the power state information of the host control unit 21 is also indicated. If the state register indicates that the solid state disk 20 is in power-off or low-power standby mode, it can be determined that the solid state disk 20 has been powered off or will be powered off, and the corresponding host control unit 21 has been powered off or will be powered off.

[0056] Of course, it is also possible to integrate a voltage monitoring circuit in the wake-up control unit 26 to detect the power supply pin (such as VCC, VDD, etc.) of the host control unit 21 to realize real-time monitoring of the voltage level of the power supply pin. When the monitored voltage is lower than a certain preset threshold (usually close to 0V), it is determined that the host control unit 21 has been powered off.

[0057] S2: If the host control unit is in a power-off state, start timing to obtain the power-off duration;

[0058] When the wake-up control unit 26 detects that the host control unit 21 is in a power-off state, the timer starts timing to obtain the power-off duration of the host control unit 21. The timer module can be a hardware-based timer or a software-implemented timing function.

[0059] S3: When the power-off duration reaches a preset period, power the host control unit;

[0060] The preset period can be stored in the storage unit 23. When the wake-up control unit 26 detects that the power-off duration reaches the preset period, the battery unit 25 can be controlled to supply power to the host control unit 21. For example, the active switch 24 connected between the battery unit 25 and the host control unit 21 is opened, so that the battery unit 25 can supply power to the host control unit 21.

[0061] For example, the preset period is 1 month to 3 months, that is, it can avoid data drift of the solid state disk 20 after power-off, and can also avoid rapid consumption of the battery unit 25 caused by frequent use of the battery unit 25 for power supply.

[0062] S4: The host control unit performs read / write data operations on the NAND unit;

[0063] After the battery unit 25 supplies power to the host control unit 21, the host control unit 21 can receive the operation instruction sent by the wake-up control unit 26. For example, the operation instruction includes read / write data operations on the NAND unit 22.

[0064] In the read and write of the NAND unit 22, the error correction code (ECC) mechanism built in the solid state disk 20 can also correct the offset data.

[0065] For example, the host unit 21 can also perform dynamic ECC upgrade on the NAND unit 22, in other words, reconstruct the data and perform secondary coding with RS (544, 514) code, so that the error correction capability is increased by more than 10 times.

[0066] For example, the host unit 21 can also perform voltage optimization write on the NAND unit 22, that is, re-write new read voltage, apply standard value 105%-110% of programming voltage (Vpp) to high P / E cycle blocks, enhance electron injection depth, and improve data read accuracy.

[0067] For example, each NAND unit 22 includes a plurality of blocks, and the host unit 21 can also perform cross-block copy on the NAND unit 22, that is, write the refreshed data to blank blocks of different physical blocks to realize physical isolation storage.

[0068] S5: stop supplying power to the host unit.

[0069] After the host unit 21 completes the read and write data operation on the NAND unit 22, the wake-up control unit 26 can close the active switch 24, so that the battery unit 25 stops supplying power to the host unit 21, thereby reducing the energy loss of the battery unit 25.

[0070] Then enter the next round of cycle, that is, repeat the steps:

[0071] S1: determine whether the host unit is in a power-off state;

[0072] S2: if the host unit is in a power-off state, start timing to obtain the power-off duration;

[0073] S3: when the power-off duration reaches a preset period, supply power to the host unit;

[0074] S4: the host unit performs read and write data operation on the NAND unit;

[0075] S5: stop supplying power to the host unit.

[0076] Compared with the existing data retention method of the solid state disk which needs manual power-on, the application judges whether the master control unit 21 is in a power-off state; if the master control unit 21 is in a power-off state, the power-off duration is obtained by starting timing; when the power-off duration reaches a preset period, the master control unit 21 is powered; the master control unit 21 performs read and write data operations on the NAND unit 22; the power supply to the master control unit 21 is stopped; thereby realizing automatic timing and automatically controlling the master control unit 21 to perform data read and write operations on the NAND unit 22, realizing the power-off self-maintenance function of the solid state disk 20, improving the reliability and data security of the solid state disk 20 storage, and reducing the risk of irreversible data offset caused by NAND floating gate electron leakage due to long-time power-off.

[0077] Moreover, the power supply to the master control unit is stopped after the read and write data operations are completed, thereby saving the energy consumption of the battery unit 25.

[0078] The preset period can be a fixed value, or can be adjusted in real time according to the change of the environmental temperature, and the specific adjustment is as follows:

[0079] The S3: the step of powering the master control unit when the power-off duration reaches the preset period includes:

[0080] S31: obtaining the environmental temperature;

[0081] The environmental temperature can be obtained by the temperature detection unit 27 on the solid state disk 20, which detects the environmental temperature of the solid state disk 20, and the average temperature of the day can be obtained by detecting multiple times in a day and then calculating the average value, and then stored in the storage unit 23, and the environmental temperature is obtained by averaging the average temperature of each day.

[0082] S32: when the environmental temperature is within the first preset environmental temperature range, powering the master control unit when the power-off duration reaches the first preset period;

[0083] S33: when the environmental temperature is within the second preset environmental temperature range, powering the master control unit when the power-off duration reaches the second preset period;

[0084] The temperature within the first preset environmental temperature range is higher than the temperature within the second preset environmental temperature range, and the first preset period is shorter than the second preset period.

[0085] For example, when the first preset environmental temperature is less than 50℃, the first preset period is 2-3 months; when the second preset environmental temperature is greater than or equal to 50℃, the second preset period is 1 month.

[0086] Of course, the ambient temperature can be further divided, for example, when the ambient temperature is in a third preset ambient temperature range, the power supply to the main control unit 21 is turned off when the power-off duration reaches a third preset period.

[0087] The first preset ambient temperature is less than 30℃, and the first preset period is 3 months; the second preset ambient temperature is greater than or equal to 30℃ and less than or equal to 50℃, and the third preset period is 2 months; the second preset ambient temperature is greater than 50℃, and the third preset period is 1 month.

[0088] Thus, the data retention method of the solid state disk is more flexible, the environmental adaptability of the data retention method of the solid state disk is improved, and the data retention capability of the solid state disk 20 is improved.

[0089] And after the step of the main control unit 21 performing read-write data operation on the NAND unit 22 for the first time after power-off, the health score of each block in the NAND unit 22 is calculated to obtain the health score value corresponding to each block. Specifically:

[0090] Figure 2 An embodiment of the present application is a schematic diagram of performing read-write data operation on the blocks in the NAND unit 22 in the order of the block read-write order table, as shown in Figure 2 S4: the step of the main control unit 21 performing read-write data operation on the NAND unit 22 and S5: the step of stopping power supply to the main control unit 21, further includes:

[0091] S41: calculating the health score of each block in the NAND unit performing read-write data operation to obtain the health score value corresponding to each block;

[0092] The calculation method of the health score is health score = α × (P / E cycle / maximum P / E) + β × error rate + γ × temperature coefficient, P / E cycle represents the cumulative erase-write times of the blocks of the NAND unit 22, reflecting the physical aging degree; maximum P / E represents the theoretical service life read-write times of the blocks of the NAND unit 22, which can be obtained from the specification record of the solid state disk 20; error rate represents the error rate (RBER) of the original data read, i.e. the bit error probability caused by charge attenuation; temperature coefficient represents the acceleration factor of high temperature on electron leakage, for example, taking normal temperature as 25℃, when the ambient temperature is 30℃, the temperature coefficient Tc = (30-25) / 100 = 0.05, and when the ambient temperature is 70℃, the temperature coefficient Tc = (70-25) / 100 = 0.45.

[0093] Wherein, a represents the first weight; β represents the second weight; γ represents the third weight; a+β+γ=1. Exemplarily, a is 0.5; β is 0.3; γ is 0.2; and γ increases with the rise of the ambient temperature, exemplarily, when the ambient temperature is greater than 50℃, a is 0.5; β is 0.2; γ is 0.3, so as to increase the proportion of the ambient temperature in the health score calculation.

[0094] S42: sorting the blocks in ascending order of health score value to obtain a block read-write sequence table;

[0095] The block read-write sequence table can be stored in the storage unit 23.

[0096] The block read-write sequence table can be used for the next time the host control unit 21 performs read-write data operation on the NAND unit 22, and the host control unit 21 performs read-write data operation on the blocks in the NAND unit 22 according to the order of the block read-write sequence table. Specifically:

[0097] The S5: stopping the power supply of the host control unit further comprises:

[0098] S61: judging whether the host control unit is in a power-off state;

[0099] S62: if the host control unit is in a power-off state, start timing to obtain a power-off duration;

[0100] S63: when the power-off duration reaches a preset period, power the host control unit, and the host control unit performs read-write data operation on the blocks in the NAND unit according to the order of the block read-write sequence table;

[0101] S64: stop the power supply of the host control unit.

[0102] The host control unit 21 performs read-write operation on the blocks in the NAND unit 22 according to the order of the block read-write sequence table calculated after the last read-write data operation on the blocks in the NAND unit 22, so that the blocks with low health score can be processed preferentially and timely, avoiding the situation that when cross-block copying is needed, the blank blocks have been used by the data in the blocks with high health score.

[0103] Of course, S41: after calculating the health score of each block in the NAND unit performing read-write data operation to obtain the health score value corresponding to each block:

[0104] S411: grouping the health score of the blocks, and grouping the blocks exceeding the first preset health score into a high score group, and grouping the blocks below the preset health score into a low score group;

[0105] Then in S63: when the power-off duration reaches the preset period, power is supplied to the main control unit, and the main control unit performs read and write data operations on the blocks in the NAND unit in the order of the block read-write sequence table:

[0106] The main control unit only performs read and write data operations on the low-group blocks in the NAND unit in the order of the block read-write sequence table.

[0107] Thus, the time for read and write data operations is reduced, further optimizing the use efficiency of the battery unit 25.

[0108] And the application also detects the battery unit 25, specifically:

[0109] The S63: when the power-off duration reaches the preset period, power is supplied to the main control unit, and the main control unit performs read and write data operations on the blocks in the NAND unit in the order of the block read-write sequence table:

[0110] S631: when the power-off duration reaches the preset period, detect the remaining capacity of the battery unit;

[0111] The remaining capacity of the battery unit 25 can be collected by the battery management chip to convert the voltage into the remaining capacity percentage, thereby obtaining the remaining capacity.

[0112] S632: when the remaining capacity is less than the first preset capacity, power is supplied to the main control unit, and the main control unit performs read and write data operations on the blocks in the NAND unit in the order of the block read-write sequence table;

[0113] S633: generate a first log and send the first log to the client;

[0114] For example, the first preset capacity is 15%, and then power can be supplied to the main control unit 21, and the main control unit 21 performs read and write data operations on the blocks in the NAND unit 22 in the order of the block read-write sequence table. And generate a first log, the content of the first log can include device SN number, last refresh timestamp, block health score, AES-256 compression, activate BLE5.0 module broadcast 3 seconds, send to the paired client.

[0115] The transmission of the first log uses the AES-256 compression encryption method, which can improve the tamper resistance.

[0116] The data retention method of the solid state disk further includes the steps of:

[0117] S65: when the remaining capacity is less than the second preset capacity, do not supply power to the main control unit, generate a second log, and send the second log to the client; the second preset capacity is less than the first preset capacity.

[0118] For example, the second preset power is 5%, at this time, the master control unit 21 is no longer powered, and the master control unit 21 no longer performs the read-write data operation on the blocks in the NAND unit 22 according to the order of the block read-write sequence table. A second log is generated, and the content of the second log can include the device SN number, the battery unit 25 failure flag, and the last refresh timestamp; the BLE5.0 module broadcasts at the maximum power for 5 seconds to ensure transmission in extreme environments.

[0119] The S5: the step of stopping the power supply to the master control unit 21 includes:

[0120] S4: closing the active switch between the battery unit and the master control unit, and stopping the power supply to the master control unit.

[0121] The way of controlling the power supply or power-off of the battery unit 25 to the master control unit 21 by controlling the active switch 24 by the wake-up control unit 26 realizes the physical cut-off of the power supply, so that the master control unit 21 enters the zero-power-consumption state.

[0122] Figure 3 is a schematic diagram of a solid state disk 20 according to an embodiment of the present application, as Figure 3 The present application discloses a solid state disk 20, which comprises a master control unit 21, a NAND unit 22, a wake-up control unit 26, a storage unit 23, a battery unit 25, and an active switch 24.

[0123] The NAND unit 22 is used for storing data; the master control unit 21 is connected with the NAND unit 22, and is used for reading the data in the NAND unit 22 and writing the data into the NAND unit 22; the source and the drain of the active switch 24 are connected with the master control unit 21 and the battery unit 25 respectively, and the gate of the active switch 24 is connected with the wake-up control unit 26.

[0124] The wake-up control unit 26 is connected with the master control unit 21, and is used for judging whether the master control unit 21 is powered off, and calculating the power-off duration, and controlling the opening and closing of the active switch 24; the storage unit 23 is connected with the wake-up control unit 26, and is used for storing a preset period; the battery unit 25 is connected with the master control unit 21 and the wake-up control unit 26, and supplies power to the master control unit 21, the wake-up control unit 26, and the NAND unit 22.

[0125] The solid state disk 20 uses the above-mentioned data retention method of the solid state disk to retain the data of the solid state disk 20.

[0126] The application judges whether the master control unit 21 is in a power-off state; if the master control unit 21 is in a power-off state, timing is started, and a power-off duration is obtained; when the power-off duration reaches a preset period, power is supplied to the master control unit 21; the master control unit 21 performs read and write data operations on the NAND unit 22; the power supply to the master control unit 21 is stopped; thereby automatic timing and automatic control of the master control unit 21 to perform data read and write operations on the NAND unit 22 are realized, the power-off self-maintenance function of the solid state disk 20 is realized, the reliability and data security of the solid state disk 20 storage are improved, and the risk of irreversible data drift caused by NAND floating gate electron leakage due to long-time power-off is reduced.

[0127] The solid state disk 20 further comprises a battery detection unit 28 connected with the battery unit 25, the battery detection unit 28 is used for detecting the remaining power of the battery unit 25; the battery detection unit 28 is further connected with the wake-up control unit 26, and the battery detection unit 28 is further used for sending the detected remaining power to the wake-up control unit 26. By detecting the battery unit 25 through the battery detection unit 28, the situation that the battery unit 25 runs out of power and cannot be found in time can be avoided, and whether the power in the battery unit 25 is sufficient is also considered when the master control unit 21 performs read and write data operations on the NAND unit 22, so that the situation that data is lost due to the power in the battery unit 25 being insufficient to support operation halfway through is avoided.

[0128] The solid state disk 20 further comprises a temperature detection unit 27 connected with the wake-up control unit 26, and the temperature detection unit 27 is used for detecting the ambient temperature.

[0129] The ambient temperature is detected through the temperature detection unit 27, the preset period is flexibly adjusted in cooperation with the wake-up control unit 26, the environmental adaptability of the data retention method of the solid state disk is improved, and the data retention capability of the solid state disk 20 is improved.

[0130] Figure 4 is a schematic diagram of an electronic device 10 of an embodiment of the application, as Figure 4 The application further discloses an electronic device 10, which comprises at least one processor 12 and a memory 11 connected with the at least one processor 12; the memory 11 stores instructions executable by the at least one processor 12; the instructions are executed by the at least one processor 12, so that the at least one processor 12 can execute the data retention method of the solid state disk.

[0131] Specifically, the electronic device 10 includes but is not limited to a memory 11, a processor 12, a display 13, and a network interface 14. The electronic device 10 connects to a network through the network interface 14 to obtain original test data. The network can be an intranet, the Internet, a Global System of Mobile communication (GSM), a Wideband Code Division Multiple Access (WCDMA), a 4G network, a 5G network, Bluetooth, Wi-Fi, a call network, or other wireless or wired networks.

[0132] The memory 11 includes at least one type of readable medium, such as a flash memory, a hard disk, a multimedia card, a card-type memory 11 (e.g., an SD or DX memory 11, etc.), a random access memory 11 (RAM), a static random access memory 11 (SRAM), a read-only memory 11 (ROM), an electrically erasable programmable read-only memory 11 (EEPROM), a programmable read-only memory 11 (PROM), a magnetic memory 11, a magnetic disk, an optical disk, or the like. In some embodiments, the memory 11 can be an internal storage unit 23 of the electronic device 10, such as a hard disk or a memory of the electronic device 10. In other embodiments, the memory 11 can also be an external storage device of the electronic device 10, such as a plug-in hard disk, a Smart Media Card (SMC), a Secure Digital (SD) card, a Flash Card, or the like. Of course, the memory 11 can include both the internal storage unit 23 and the external storage device of the electronic device 10. In this embodiment, the memory 11 is generally used to store an operating system and various application software installed in the electronic device 10, such as a program code of the test method of the firmware module 22, and the like. In addition, the memory 11 can also be used to temporarily store various data that have been output or will be output.

[0133] The processor 12 can be a central processing unit 12 (CPU), a controller, a microcontroller, a microprocessor 12, or other data processing chips in some embodiments. The processor 12 is generally used to control the overall operation of the electronic device 10, such as performing control and processing related to data interaction or communication, and the like. In this embodiment, the processor 12 is used to run program codes or process data stored in the memory 11, such as running program codes of the test method of the firmware module 22, and the like.

[0134] The display 13 can be referred to as a display screen or a display unit. In some embodiments, the display 13 can be an LED display 13, a liquid crystal display 13, a touch liquid crystal display 13, an Organic Light-Emitting Diode (OLED) touch, and the like. The display 13 is used to display information processed in the electronic device 10 and to display a visualized work interface, for example, to display results of data statistics.

[0135] The network interface 14 can optionally include a standard wired interface 21, a wireless interface 21 (such as a WI-FI interface 21), and is generally used to establish a communication connection between the electronic device 10 and other electronic devices 10.

[0136] Figure 4 Only the electronic device 10 with the memory 11, the processor 12, the display 13, and the network interface 14, and the firmware module 22 of the test method is shown, but it should be understood that it is not required to implement all the shown components, and more or fewer components can be alternatively implemented.

[0137] Optionally, the electronic device 10 can also include a user interface, which can include a display 13 (Display), an input unit such as a keyboard (Keyboard), and optionally a user interface can also include a standard wired interface, a wireless interface. Optionally, in some embodiments, the display 13 can be an LED display 13, a liquid crystal display 13, a touch liquid crystal display 13, an Organic Light-Emitting Diode (OLED) touch, and the like. The display 13 can also be appropriately referred to as a display screen or a display unit, and is used to display information processed in the electronic device 10 and to display a visualized user interface.

[0138] The electronic device 10 can also include a radio frequency (RF) circuit, a sensor, and an audio circuit, and the like, which are not described here.

[0139] In the above embodiments, the processor 12 can implement the following steps when performing the test of the firmware module 22 stored in the memory 11:

[0140] determining whether the master control unit is in a power-off state;

[0141] If the master control unit is in a power-off state, start timing to obtain a power-off duration;

[0142] When the power-off duration reaches a preset period, power the master control unit;

[0143] The master control unit performs read and write data operations on the NAND unit;

[0144] stopping the power supply to the host unit.

[0145] In addition, the embodiment of the present application also proposes a computer readable storage medium, which can be non-volatile or volatile. The computer readable medium can be any one or any combination of the following: a hard disk, a multimedia card, an SD card, a flash memory card, an SMC, a read-only memory (ROM), an erasable programmable read-only memory (EPROM), a portable compact disc read-only memory (CD-ROM), a USB memory, and the like.

[0146] The computer readable medium includes a storage data area and a storage program area. The storage data area stores data created according to the use of the blockchain node, and the storage program area stores a data retention method of the solid state disk, which, when executed by the processor 12, implements the following operations:

[0147] determining whether the host unit is in a power-off state;

[0148] If the host unit is in a power-off state, start timing to obtain a power-off duration;

[0149] When the power-off duration reaches a preset period, power the host unit;

[0150] The host unit performs read and write data operations on the NAND unit;

[0151] stopping the power supply to the host unit.

[0152] It should be noted that the limitations of each step involved in the present scheme do not limit the order of the steps without affecting the implementation of the specific scheme. The steps written in the front can be executed first, or executed later, or even executed simultaneously, as long as the scheme can be implemented, it should be considered to belong to the protection scope of the present application.

[0153] It should be noted that the inventive concept of the present application can form a very large number of embodiments, but the length of the application file is limited and cannot be listed one by one, therefore, on the premise of not conflicting, the above described embodiments or technical features can be combined to form new embodiments, and the combination of each embodiment or technical feature will enhance the original technical effect.

[0154] The above is a further detailed description of the present application in combination with specific optional embodiments, which cannot be limited to these descriptions. For ordinary skilled persons in the technical field to which the present application belongs, without departing from the concept of the present application, a number of simple deductions or substitutions can be made, which should be considered to belong to the protection scope of the present application.

Claims

1. A data retention method of a solid state drive, characterized by, The data retention method of the solid state disk comprises the steps of: determining whether the master control unit is in a power-off state; if the master control unit is in a power-off state, starting timing to obtain a power-off duration; when the power-off duration reaches a preset period, supplying power to the master control unit; the master control unit performing read-write data operation on the NAND unit; stopping power supply to the master control unit.

2. The data retention method of a solid state drive according to claim 1, wherein, The step of supplying power to the master control unit when the power-off duration reaches the preset period comprises: obtaining an ambient temperature; when the ambient temperature is within a first preset ambient temperature range, supplying power to the master control unit when the power-off duration reaches a first preset period; when the ambient temperature is within a second preset ambient temperature range, supplying power to the master control unit when the power-off duration reaches a second preset period; wherein the temperature within the first preset ambient temperature range is higher than the temperature within the second preset ambient temperature range, and the first preset period is shorter than the second preset period.

3. The data retention method of a solid state drive according to claim 1, wherein, The step of the master control unit performing read-write data operation on the NAND unit and the step of stopping power supply to the master control unit further comprise: calculating the health score of each block in the NAND unit performing read-write data operation to obtain a health score value corresponding to each block; sorting the blocks in ascending order of the health score value to obtain a block read-write sequence table; The step of stopping power supply to the master control unit further comprises: determining whether the master control unit is in a power-off state; if the master control unit is in a power-off state, starting timing to obtain a power-off duration; when the power-off duration reaches a preset period, supplying power to the master control unit, and the master control unit performing read-write data operation on the blocks in the NAND unit according to the order of the block read-write sequence table; stopping power supply to the master control unit.

4. The data retention method of a solid state drive according to claim 3, wherein, The step of supplying power to the master control unit when the power-off duration reaches the preset period comprises: when the power-off duration reaches the preset period, detecting the remaining battery capacity; when the remaining capacity is less than a first preset capacity, supplying power to the master control unit, and the master control unit performing read-write data operation on the blocks in the NAND unit according to the order of the block read-write sequence table; generating a first log and sending the first log to the client; The data retention method of the solid state disk further comprises the steps of: when the remaining capacity is less than a second preset capacity, not supplying power to the master control unit, generating a second log, and sending the second log to the client; the second preset capacity is less than the first preset capacity.

5. The data retention method of a solid state drive according to claim 1, wherein, The step of stopping power supply to the master control unit comprises: closing the active switch between the battery unit and the master control unit to stop power supply to the master control unit.

6. A solid state drive, comprising: The solid state disk comprises a master control unit, a NAND unit, a wake-up control unit, a storage unit, a battery unit and an active switch, the NAND unit is used for storing data; the master control unit is connected with the NAND unit, and the master control unit is used for reading data in the NAND unit and writing data into the NAND unit; the source and drain of the active switch are connected with the master control unit and the battery unit respectively, and the gate of the active switch is connected with the wake-up control unit; The wake-up control unit is connected with the master control unit, and is configured to determine whether the master control unit is powered off, to calculate a power-off duration, and to control opening and closing of the active switch; the storage unit is connected with the wake-up control unit, and is configured to store a preset period; the battery unit is connected with the master control unit and the wake-up control unit, and is configured to supply power to the master control unit, the wake-up control unit and the NAND unit.

7. The solid state drive of claim 6, wherein, The solid state disk further comprises a battery detection unit connected with the battery unit, and configured to detect a remaining power of the battery unit; the battery detection unit is further connected with the wake-up control unit, and is further configured to send the detected remaining power to the wake-up control unit.

8. The solid state drive of claim 6, wherein, The solid state disk further comprises a temperature detection unit connected with the wake-up control unit, and configured to detect an ambient temperature.

9. An electronic device, comprising: The electronic device comprises: at least one processor; and a memory connected with the at least one processor in communication; wherein the memory stores instructions executable by the at least one processor, and the instructions are executed by the at least one processor to enable the at least one processor to perform the data retention method of the solid state disk according to any one of claims 1 to 5.

10. A computer readable storage medium storing a computer program, characterized in that, The computer program is executed by the processor to implement the data retention method of the solid state disk according to any one of claims 1 to 5.

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