High-precision current feedback high-speed operational amplifier

Abstract

The invention relates to the field of analog integrated circuits, in particular to a high-precision current feedback operational amplifier which comprises an input stage circuit, an active load circuit and an output stage circuit, the input stage circuit is connected with the active load circuit, the active load circuit is further connected with the output stage circuit, and the input stage circuit comprises a biasing circuit; according to the operational amplifier, the current compensation structure is introduced into the input stage circuit of the operational amplifier, the input bias current caused by the beta value difference of the transistors can be effectively compensated, and the input bias current does not change along with an input signal by providing a quiescent working point for an input path; the influence of mismatch current caused by the difference between the current amplification coefficient beta values of the NPN type transistor and the PNP type transistor on the circuit is effectively reduced, and the forward input impedance is improved.

Description

TECHNICAL FIELD

[0001] The present application relates to the field of analog integrated circuits, in particular to a high-precision current feedback high-speed operational amplifier. BACKGROUND

[0002] Operational amplifier is one of the basic units in analog signal processing system, among which voltage feedback type operational amplifier (VFA) has universal application, while current feedback type operational amplifier (CFA) has greater advantage when higher bandwidth and faster speed are required. Both have the same closed-loop gain equation, but there are great differences in precision, speed and stability. CFA works in wide frequency band using direct current coupling, has higher conversion rate and intermodulation distortion, but its input end is different from the differential input of VFA, and the commonly used input stage structure is complementary input, which requires high matching of process NPN transistor and PNP transistor. Such mismatch will cause the existing CFA to have a large current and voltage offset. In the application scene of high speed and wide band, the low precision of operational amplifier will seriously affect the performance of the system, especially in the application system of weak signal processing.

[0003] The CFA in the prior art often adopts a symmetrical current mirror structure, as shown in Figure 1 The structure can bring similar collector currents to the input tubes, but due to the difference in amplification factor β value between NPN transistor and PNP transistor, there is generally a uA level of input bias current. For some application scenes with high direct current precision requirements, the system for amplifying weak signals has limitations.

[0004] Therefore, in order to make CFA meet the growing precision requirements, it is necessary to design CFA with high precision. SUMMARY

[0005] Therefore, the present application discloses a high-precision current feedback high-speed operational amplifier to solve the above problems; comprising: an input stage circuit, an active load circuit, and an output stage circuit, the input stage circuit is connected with the active load circuit, and the active load circuit is further connected with the output stage circuit;

[0006] The input stage circuit includes elements: 15 resistors R1-R15, 3 capacitors C1-C3, 14 PNP transistors P1-P14, and 15 NPN transistors N1-N15.

[0007] The connection mode of the input stage circuit is as follows:

[0008] The emitter of P1 is connected with one end of R1, the base of P1 is connected with the base of P2, the collector of P1 is connected with the emitter of P3, and the base of P3 is connected with the collector of P1.

[0009] Anode of P2 is connected to one end of R2, cathode of P2 is connected to anode of P4;

[0010] Cathode of P3 is connected to cathode of N4, one end of C2 and one end of R3 respectively, base of P3 is connected to base of P4, cathode of P4, anode of P5 and anode of P6 respectively;

[0011] Base of P5 is connected to base of P6, cathode of P5, anode of P7 and one end of R4 respectively;

[0012] Cathode of P6 is connected to cathode of N1, base of P7, base of P8 and one end of C1 respectively;

[0013] Cathode of P7 is connected to cathode of N8, base of N7, other end of R4, other end of C1 and base of N1 respectively;

[0014] Anode of P8 is connected to other end of R3, cathode of P8 is connected to cathode of N2, base of N2 and base of N3 respectively;

[0015] Anode of P9 is connected to one end of R7, base of P9 is connected to one end of C3, one end of R9, anode of P11, anode of P12 and base of P10 respectively, cathode of P9 is connected to anode of N11, other end of C3 and one end of R11 respectively;

[0016] Anode of P10 is connected to one end of R8, cathode of P10 is connected to cathode of N10 and base of N10 respectively;

[0017] Base of P11 is connected to base of P12, cathode of P11 and cathode of N7 respectively;

[0018] Cathode of P12 is connected to cathode of N15 and anode of N10 respectively;

[0019] Anode of P13 is connected to one end of R15, cathode of P13 is connected to anode of P14 and cathode of N3 respectively;

[0020] Base of P14 is connected to cathode of P14 and cathode of N5 respectively;

[0021] Anode of N1 is connected to one end of R10;

[0022] Anode of N2 is connected to base of N4, other end of C2, other end of R9, anode of N3 and base of N5 respectively;

[0023] Anode of N4 is connected to one end of R5;

[0024] Anode of N5 is connected to one end of R6;

[0025] The collector of N6 is connected to the other end of R5 and the other end of R7, respectively, and the base of N6 is connected to the emitter of N6, one end of R13, one end of R14 and one end of R16, respectively;

[0026] The emitter of N7 is connected to the other end of R11;

[0027] The base of N8 is connected to the base of N9, the collector of N9 and the other end of R10, respectively, and the emitter of N8 is connected to the collector of N12, the base of N12, the base of N11 and one end of R12, respectively;

[0028] The emitter of N9 is connected to the other end of R12;

[0029] The emitter of N11 is connected to the collector of N13, the base of N13 and the base of N14, respectively;

[0030] The emitter of N12 is connected to the collector of N14;

[0031] The emitter of N13 is connected to the other end of R13;

[0032] The emitter of N14 is connected to the other end of R14;

[0033] The emitter of N15 is connected to the other end of R16;

[0034] The other end of R1 is connected to the other end of R2 and the other end of R15, respectively;

[0035] The other end of R6 is connected to the other end of R8;

[0036] Further, R1, R2, R4, R5, R7, R9, R10, R12, R13, R14, P1-P7, P8, N1, N4, N8, N9, N11-N14, C1-C3 constitute a bias circuit for providing stable bias for the operational amplifier, so that the static working point of the circuit does not change with the input signal;

[0037] Further, R5, R6, R7, R8 and R15 are realized by parallel resistors.

[0038] The application can effectively compensate for the input bias current caused by the difference in transistor beta value by introducing a current compensation structure in the input stage circuit of the operational amplifier, and by providing a static working point for the input path, the input bias current does not change with the input signal, effectively reducing the mismatch current caused by the difference in current amplification factor beta value of NPN transistor and PNP transistor, and improving the positive input impedance. BRIEF DESCRIPTION OF DRAWINGS

[0039] Figure 1The current mirror structure diagram is commonly used in the prior art CFA;

[0040] Figure 2 The circuit diagram of the high-precision current feedback high-speed operational amplifier in the embodiment of the present application is shown in the figure;

[0041] Figure 3 The feedback model schematic diagram of the input stage circuit in the embodiment of the present application is shown in the figure;

[0042] Figure 4 The structure schematic diagram of the input stage circuit commonly used in the prior art is shown in the figure. DETAILED DESCRIPTION

[0043] In order to make the purpose, technical scheme, characteristics and advantages of the present application more clear, the present application is further explained in the following with reference to the accompanying drawings and embodiments.

[0044] The embodiment includes a high-precision current feedback high-speed operational amplifier, as shown in the figure, which comprises an input stage circuit, an active load circuit and an output stage circuit. Figure 2

[0045] The input stage circuit is connected with the active load circuit, and the active load circuit is further connected with the output stage circuit. The input stage circuit comprises elements: 15 resistors R1-R15, 3 capacitors C1-C3, 14 PNP transistors P1-P14 and 15 NPN transistors N1-N15.

[0046] ​Further, the input stage circuit is connected in the following manner: the emitter of P1 is connected to one end of R1, the base of P1 is connected to the base of P2, the collector of P1 is connected to the emitter of P3, and the emitter of P1 is connected to the collector of P2; the emitter of P2 is connected to one end of R2, and the collector of P2 is connected to the emitter of P4; the collector of P3 is connected to the collector of N4, one end of C2, and one end of R3, the base of P3 is connected to the base of P4, the collector of P4, the emitter of P5, and the emitter of P6; the base of P5 is connected to the base of P6, the collector of P5, the emitter of P7, and one end of R4; the collector of P6 is connected to the collector of N1, the base of P7, the base of P8, and one end of C1; the collector of P7 is connected to the collector of N8, the base of N7, the other end of R4, the other end of C1, and the base of N1; the emitter of P8 is connected to the other end of R3, the collector of P8 is connected to the collector of N2, the base of N2, and the base of N3; the emitter of P9 is connected to one end of R7, the base of P9 is connected to one end of C3, one end of R9, the emitter of P11, the emitter of P12, and the base of P10, and the collector of P9 is connected to the emitter of N11, the other end of C3, and one end of R11; the emitter of P10 is connected to one end of R8, the collector of P10 is connected to the collector of N10 and the base of N10; the base of P11 is connected to the base of P12, the collector of P11, and the collector of N7; the collector of P12 is connected to the collector of N15 and the emitter of N10; the emitter of P13 is connected to one end of R15, the collector of P13 is connected to the emitter of P14 and the collector of N3; the base of P14 is connected to the collector of P14 and the collector of N5; the emitter of N1 is connected to one end of R10; the emitter of N2 is connected to the base of N4, the other end of C2, the other end of R9, the emitter of N3, and the base of N5; the emitter of N4 is connected to one end of R5; the emitter of N5 is connected to one end of R6; the collector of N6 is connected to the other end of R5 and the other end of R7, the base of N6 is connected to the emitter of N6, one end of R13, one end of R14, and one end of R16; the emitter of N7 is connected to the other end of R11; the base of N8 is connected to the base of N9, the collector of N9, and the other end of R10, the emitter of N8 is connected to the collector of N12, the base of N12, the base of N11, and one end of R12; the emitter of N9 is connected to the other end of R12; the emitter of N11 is connected to the collector of N13, the base of N13, and the base of N14; the emitter of N12 is connected to the collector of N14; the emitter of N13 is connected to the other end of R13; the emitter of N14 is connected to the other end of R14; the emitter of N15 is connected to the other end of R16; the other end of R1 is connected to the other end of R2 and the other end of R15; the other end of R6 is connected to the other end of R8.

[0047] Wherein, R5, R6, R7, R8 and R15 are realized by parallel resistance, which is used for shunt protection of the whole circuit. R1, R2, R4, R5, R7, R9, R10, R12, R13, R14, P1-P7, P8, N1, N4, N8, N9, N11-N14, C1-C3 constitute a bias circuit, which is used for providing stable bias for the operational amplifier, so that the static working point of the circuit does not change with the signal input.

[0048] When the circuit is in working state, the bias circuit is turned on, and the current of the power supply voltage through R1 is lowered by V BE through P2, V BE represents the base-emitter voltage of the transistor, the current flows through the diode formed by the base-collector shorted P1, is lowered by V BE through P3, again flows through the diode formed by the base-collector shorted P4, is lowered by V BE through P6, flows through P5 diode, and R4 is a starting resistance, which provides base bias for N1, so that N1 is turned on. After the current flows downward through the resistor R9, it passes through N9 diode, is lowered by V BE through N11, is lowered by V BE through N13 diode, and reaches the low potential through the resistor R after being lowered by V cN through N14, forming an open path of the bias circuit.

[0049] In the input stage circuit, C1 is used to improve stability and avoid oscillation caused by the bias circuit; N4-N5 and P9-P10 constitute an AB stage amplifier, and the collector current of N5 and P10 copies the input current difference to the active load circuit through the current mirror structure.

[0050] N1, P3, N3, N7, P11 and P12 constitute a feedback network, which can extract base current, so as to adjust the input bias current introduced by the difference of the amplification coefficient β value of the triode. C2 and C3 are used to adjust the level fluctuation brought by the feedback network, so as to avoid oscillation.

[0051] Further, the feedback model of the current feedback type operational amplifier of the embodiment is shown in Figure 3 , which adopts the same direction input voltage, and the input Vp of the amplifier is outputted as Vn through a high resistance input and low resistance output structure equivalent to a gain follower. In the figure, ie represents the error current flowing into the non-inverting input terminal of the current feedback operational amplifier, Zt represents the transimpedance amplification coefficient of the current feedback operational amplifier, and Vo represents the output voltage, which is ie*Zt. The current obtained through feedback at the inverting input terminal is the input current of the CFA.

[0052] The traditional CFA input stage circuit is shown in Figure 4 , the input terminal adopts an up-down height symmetrical structure, and the I cN=I cP , I cN represents the collector current of the NPN transistor, I cP represents the collector current of the PNP transistor, and due to the difference between the β values of the NPN transistor and the PNP transistor, taking the positive input end as an example, the forward input bias current +I B is derived from:

[0053]

[0054] wherein +I B is the mismatch current, caused by the difference between the amplification coefficient β N of the NPN transistor and the amplification coefficient β P of the PNP transistor, I eN represents the emitter current of the NPN transistor, and I eP represents the emitter current of the PNP transistor.

[0055] The application discloses a bias circuit with feedback network compensation in an input stage circuit, which is used to compensate the collector current of the input transistor when providing the base bias of the input transistor, so as to offset the influence of the mismatch. The path composed of N2, N3, P8 and R3 directly provides stable bias from the reference of the circuit, and plays an accelerating role when the input signal current is large. The accelerating role is exemplified by the falling edge of the signal, N3 extracts current from the reverse input branch, raises the base voltage of N5, and thus raises the V BE of N5, and further raises the response speed of the signal; similarly, the rising edge of the signal is exemplified, and the influence of P12 on P10 and the response speed are raised. The accelerating role is to provide an additional path, so that the output voltage connected with the inverting input end is more efficiently raised or lowered when the input signal current is large.

[0056] In the input stage circuit, the base bias of the input transistors N4 and N5 is provided through N2 and N3, the collector current of N2 is extracted from the collector current of N4, and the flow direction is the base current direction of N4; the collector current of N3 is extracted from the collector current of N5, and the flow direction is the base current direction of N5.

[0057] The sizes of the transistors in the input stage circuit are consistent, and in the embodiment, the areas of the emitters are all 16um*8um; I1 represents the size of the emitter current of N4 in the traditional structure, and I2 represents the size of the emitter current of P5 in the traditional structure; I1 * represents the size of the emitter current of N4, I2 * represents the size of the emitter current of P5, the collector extraction current reduces the emitter currents of N2 and P11 to I3 and I5, and the base compensation current increases the emitter currents of N2 and P11 to I4 and I6; I b1 and Ib2 respectively represent the base currents of N2 and P11; when the circuit is in working state, the following relationship exists:

[0058] I B =I2-I1

[0059] I B * =I2 * -I1 *

[0060] I1*=I1-I3+I4

[0061] I2*=I2-I5+I6

[0062]

[0063] I4=(β N +1) 2 I b1

[0064]

[0065] I6=(β P +1) 2 I b2

[0066] Further, the reduction of the input bias current in the present application can be obtained as follows:

[0067]

[0068] wherein I B represents the input bias current under the conventional structure, the absolute value range is 35-50uA, I B * is the input bias current under the structure of the present application, the absolute value range is 100-300nA, the term (β N +1)(β P +1)(1-β N β P )<0; the ratio of I b2 and I b1 is the ratio of β p and β N ; therefore, I B -I B * is a positive value.

[0069] As can be seen from the expression, the circuit structure designed by the application can effectively compensate the input bias current caused by the difference of transistor β value, and by providing a static working point for the input path, the input bias current does not change with the input signal.

[0070] Further, by adjusting R1, R2, R13 and R14, the input bias current can be further reduced.

[0071] The high-precision current feedback high-speed operational amplifier in the embodiment has a conversion rate of 2000V / us, a bandwidth of 60MHz, and an input bias current of 100-200nA.

[0072] Finally, it should be noted that the above description only describes some embodiments of the application, and for those skilled in the art, various changes, modifications, replacements and deformations of these embodiments can be made without departing from the principles and spirits of the application, the protection scope of the application is defined by the appended claims and their equivalents, and the above-mentioned behaviors should be covered within the protection scope of the application.

Claims

1. A high-precision current feedback high-speed operational amplifier, comprising an input stage circuit, an active load circuit, and an output stage circuit, the input stage circuit being connected to the active load circuit, and the active load circuit being further connected to the output stage circuit, characterized in that, The input stage circuit includes elements: 15 resistors R1-R15, 3 capacitors C1-C3, 14 PNP transistors P1-P14, 15 NPN transistors N1-N15; The connection mode of the input stage circuit is that: the emitter of P1 is connected with one end of R1, the base of P1 is connected with the base of P2, the collector of P1 is connected with the emitter of P3, the emitter of P2 is connected with one end of R2, the collector of P2 is connected with the emitter of P4, the collector of P3 is connected with the collector of N4, one end of C2 and one end of R3, the base of P3 is connected with the base of P4, the collector of P4, the emitter of P5 and the emitter of P6, the base of P5 is connected with the base of P6, the collector of P5, the emitter of P7 and one end of R4, the collector of P6 is connected with the collector of N1, the base of P7, the base of P8 and one end of C1, the collector of P7 is connected with the collector of N8, the base of N7, the other end of R4, the other end of C1 and the base of N1, the emitter of P8 is connected with the other end of R3, the collector of P8 is connected with the collector of N2, the base of N2 and the base of N3, the emitter of P9 is connected with one end of R7, the base of P9 is connected with one end of C3, one end of R9, the emitter of P11, the emitter of P12 and the base of P10, the collector of P9 is connected with the emitter of N11, the other end of C3 and one end of R11, the emitter of P10 is connected with one end of R8, the collector of P10 is connected with the collector of N10 and the base of N10, the base of P11 is connected with the base of P12, the collector of P11 and the collector of N7, the collector of P12 is connected with the collector of N15 and the emitter of N10, the emitter of P13 is connected with one end of R15, the collector of P13 is connected with the emitter of P14 and the collector of N3, the base of P14 is connected with the collector of P14 and the collector of N5, the emitter of N1 is connected with one end of R10, the emitter of N2 is connected with the base of N4, the other end of C2, the other end of R9, the emitter of N3 and the base of N5, the emitter of N4 is connected with one end of R5, the emitter of N5 is connected with one end of R6, the collector of N6 is connected with the other end of R5 and the other end of R7, the base of N6 is connected with the emitter of N6, one end of R13, one end of R14 and one end of R16, the emitter of N7 is connected with the other end of R11, the base of N8 is connected with the base of N9, the collector of N9 and the other end of R10, the emitter of N8 is connected with the collector of N12, the base of N12, the base of N11 and one end of R12, the emitter of N9 is connected with the other end of R12, the emitter of N11 is connected with the collector of N13, the base of N13 and the base of N14, the emitter of N12 is connected with the collector of N14, the emitter of N13 is connected with the other end of R13, the emitter of N14 is connected with the other end of R14, the emitter of N15 is connected with the other end of R16, the other end of R1 is connected with the other end of R2 and the other end of R15, the other end of R6 is connected with the other end of R8.

2. The high precision current feedback high speed operational amplifier of claim 1, wherein, The transistor size in the input stage circuit is consistent.

3. The high precision current feedback high speed operational amplifier of claim 1, wherein, R1, R2, R4, R5, R7, R9, R10, R12, R13, R14, P1~P7, P8, N1, N4, N8, N9, N11~N14, C1~C3 constitute a bias circuit for providing stable bias for the operational amplifier.

4. The high precision current feedback high speed operational amplifier of claim 1, wherein, R5, R6, R7, R8 and R15 are realized by parallel resistance.

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