Display panel and display device

Abstract

The invention discloses a display panel and a display device. The display panel is provided with a first area and a second area, and comprises a base plate which comprises a substrate, a driving circuit, a first type signal line and a second type signal line, and the driving circuit, the first type signal line and the second type signal line are arranged on the same side of the substrate; the light-emitting device is arranged on one side of the substrate, the first-type signal lines and the second-type signal lines are at least partially arranged in the second area, the first-type signal lines and the driving circuits in the second area are arranged at intervals, and the second-type signal lines are connected with at least one driving circuit in the second area; the first-type signal line comprises a first segment and a second segment which are located in the second area and connected with each other, the first segment is connected with the driving circuits in the first area, and the first segment is located between the adjacent driving circuits in the second area in the first direction; the minimum distance between the second segment and the driving circuit on one side in the first direction is smaller than the minimum distance between the second segment and the driving circuit on the other side in the first direction.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of display, in particular to a display panel and a display device. BACKGROUND

[0002] Liquid Crystal Display (LCD) panels, Organic Light Emitting Display (OLED) panels, and display panels using Light Emitting Diode (LED) devices, etc. have been widely applied to mobile phones, televisions, personal digital assistants, digital cameras, notebook computers, desktop computers and other consumer electronic products due to their high image quality, power saving, thin body, wide application range and other advantages, and have become the mainstream in display devices.

[0003] However, the working performance of the current display products needs to be improved. SUMMARY

[0004] Embodiments of the present application provide a display panel and a display device, aiming to improve the working performance of the display panel.

[0005] Embodiments of the first aspect of the present application provide a display panel having a first region and a second region, the display panel comprising: a substrate comprising a substrate and a driving circuit, a first type of signal line and a second type of signal line disposed on the same side of the substrate; a light emitting device disposed on one side of the substrate, the driving circuit being connected to the light emitting device, wherein the driving circuit and the light emitting device are disposed in the first region and the second region, the first type of signal line and the second type of signal line are at least partially disposed in the second region, the first type of signal line is spaced apart from the driving circuit in the second region, the second type of signal line is connected to at least one driving circuit in the second region, the first type of signal line comprises a first segment and a second segment located in the second region and connected to each other, the first segment is connected to the driving circuit in the first region, and the first segment is located between the driving circuits adjacent in the first direction in the second region, the minimum distance between the second segment and the driving circuit on one side in the first direction is less than the minimum distance between the second segment and the driving circuit on the other side in the first direction.

[0006] Embodiments of the first aspect of the present application also provide a display panel having a first region and a second region, the display panel comprising: a substrate comprising a substrate and a driving circuit, a first type of signal line and a second type of signal line disposed on the same side of the substrate; a light emitting device disposed on one side of the substrate, the driving circuit being connected to the light emitting device, wherein the driving circuit and the light emitting device are disposed in the first region and the second region, the first type of signal line and the second type of signal line are at least partially disposed in the second region, the first type of signal line is spaced apart from the driving circuit in the second region, the second type of signal line is connected to at least one driving circuit in the second region, and a portion of the second type of signal line and another portion of the second type of signal line are staggered in the second region, and a portion of the first type of signal line and another portion of the first type of signal line are staggered in the second region.

[0007] Embodiments of the first aspect of the present application also provide a display panel having a first region and a second region, the display panel comprising: a substrate comprising a substrate and a driving circuit, a first type of signal line and a second type of signal line disposed on the same side of the substrate; a light emitting device disposed on one side of the substrate, the driving circuit being connected to the light emitting device, wherein the driving circuit and the light emitting device are disposed in the first region and the second region, the first type of signal line and the second type of signal line are at least partially disposed in the second region, the first type of signal line is spaced apart from the driving circuit in the second region, and the first type of signal line is located outside the light shielding space, the light shielding structure is provided with a communication opening, the second type of signal line extends from outside the light shielding space to the light shielding space through the communication opening, the second type of signal line is connected to at least one driving circuit in the second region, the first type of signal line comprises a first segment and a second segment located in the second region and connected to each other, the first segment is connected to the driving circuit in the first region, and the first segment is located between the light shielding structures adjacent in the first direction in the second region, the minimum distance between the second segment and the light shielding structure on one side of the first direction is less than the minimum distance between the second segment and the light shielding structure on the other side of the first direction, and the compensation capacitor is formed between the adjacent second segment and the light shielding structure.

[0008] Embodiments of the second aspect of the present application provide a display device, the display device comprising the display panel of any of the above embodiments.

[0009] In the display panel provided by the embodiment of the present application, the display panel comprises a substrate and a light-emitting device, the light-emitting device is arranged on one side of the substrate, the substrate comprises a substrate and a driving circuit, a first type of signal line and a second type of signal line arranged on the same side of the substrate, the driving circuit is connected with the light-emitting device, so that the driving circuit can be used to drive the light-emitting display of the light-emitting device. The display panel has a first area and a second area, the driving circuit and the light-emitting device are arranged in the first area and the second area, so that the first area and the second area can be used for light-emitting display.

[0010] The first type of signal line and the second type of signal line can be used to be connected with the driving circuit and used to provide signals to the driving circuit, so as to realize the work of the driving circuit. The first type of signal line and the second type of signal line are at least partially arranged in the second area, the second type of signal line is connected with at least one driving circuit in the second area, so that the second type of signal line can be used to transmit signals to the driving circuit in the second area.

[0011] The first type of signal line is arranged in the second area and spaced apart from the driving circuit in the second area, the first type of signal line comprises a first segment and a second segment arranged in the second area and connected with each other, the first segment is connected with the driving circuit in the first area, and the first type of signal line can be used only to transmit signals to the driving circuit in the first area, that is, the first type of signal line only extends through the second area, but is not used to transmit signals to the driving circuit in the second area. By arranging the first segment between the driving circuits adjacent in the first direction in the second area, the first segment can be connected with the driving circuit in the first area between the adjacent second type of signal lines in the first direction.

[0012] By arranging the minimum distance between the second segment of the second area and the driving circuit on one side in the first direction to be smaller than the minimum distance between the second segment and the driving circuit on the other side in the first direction, the second segment not directly connected with the driving circuit in the second area can be offset towards the driving circuit on one side in the first direction, so that in the second area, the electric field environment around the first type of signal line can be similar to the electric field environment around the second type of signal line, so that in the process of transmitting signals, the working stability of the first type of signal line and the second type of signal line is similar, which is beneficial to improving the display uniformity and working stability of the display panel. BRIEF DESCRIPTION OF DRAWINGS

[0013] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the following will briefly introduce the drawings needed to be used in the embodiments. It should be understood that the following drawings only show some embodiments of the present application, and therefore should not be regarded as a limitation on the scope. For those skilled in the art, other related drawings can also be obtained without creative labor on the basis of these drawings.

[0014] Figure 1is a partial cross-sectional schematic view of a display panel provided by an embodiment of the present application;

[0015] Figure 2 is a structural schematic view of a driving circuit provided by an embodiment of the present application;

[0016] Figure 3 is a structural schematic view of a display panel provided by an embodiment of the present application;

[0017] Figure 4 is a structural schematic view of a driving circuit provided by an embodiment of the present application;

[0018] Figure 5 is a position schematic view of a driving circuit, a first type of signal line and a second type of signal line provided by an embodiment of the present application;

[0019] Figure 6 is a partial cross-sectional schematic view of a display panel provided by another embodiment of the present application;

[0020] Figure 7 is a partial cross-sectional schematic view of a display panel provided by still another embodiment of the present application;

[0021] Figure 8 is a partial cross-sectional schematic view of a display panel provided by yet another embodiment of the present application;

[0022] Figure 9 is a partial cross-sectional schematic view of a display panel provided by still another embodiment of the present application;

[0023] Figure 10 is a partial cross-sectional schematic view of a display panel provided by still another embodiment of the present application;

[0024] Figure 11 is a position schematic view of a light shielding structure, a driving circuit, a first type of signal line and a second type of signal line provided by an embodiment of the present application;

[0025] Figure 12 is a partial cross-sectional schematic view of a display panel provided by still another embodiment of the present application;

[0026] Figure 13 is a position schematic view of a light shielding structure, a driving circuit, a first type of signal line, a second type of signal line and a third type of signal line provided by an embodiment of the present application.

[0027] Legend of reference signs:

[0028] 10, display panel;

[0029] 100, substrate; 110, base; 120, insulating film layer; 121, first insulating layer; 122, second insulating layer; 123, third insulating layer; 124, fourth insulating layer; 125, fifth insulating layer; 126, sixth insulating layer; 126a, first sub-insulating layer; 126b, second sub-insulating layer; 130, drive circuit; 131, transistor; 131a, semiconductor structure; 131b, gate; 131c, source / drain; 132, storage capacitor; 132a, first plate; 132b, second plate; 140, first type signal line; 141, first segment; 142, second segment; 142a, first sub-segment; 142b, second sub-segment; 142c, third sub-segment; 143, first connection segment; 150, second type signal line; 151, third segment; 152, fourth segment; 153, second connection segment; 160, third type signal line; 161, fifth segment; 162, sixth segment; 170, light shielding structure; 170a, light shielding space; 170b, communication opening; 171, light shielding body; 171a, first light shielding part; 171b, second light shielding part; 171c, third light shielding part; 172, protruding structure;

[0030] 200, pixel definition layer; 200a, pixel opening;

[0031] 300, light emitting device; 310, first electrode; 320, light emitting functional layer; 321, light emitting structure; 322, common layer; 330, second electrode;

[0032] T1, drive transistor; T2, data write transistor; T3, threshold compensation transistor; T4, first reset transistor; T5, first control transistor; T6, second control transistor; T7, second reset transistor;

[0033] ELVDD, first power voltage signal line; ELVSS, second power voltage signal line; Vdata, data signal line; VREF1, first reset signal line; VREF2, second reset signal line; EM, light emitting control signal line; S1, first scan signal line; S2, second scan signal line; S3, third scan signal line; S4, fourth scan signal line;

[0034] CG, circuit group; CG1, first circuit group; CG2, second circuit group;

[0035] RC1, first circuit row; RC2, second circuit row; RC3, third circuit row; LC, circuit column;

[0036] AA, display area; AA1, first region; AA2, second region; AA2a, edge region; AA2b, main region; NA, non-display area;

[0037] X, first direction; Y, second direction; Z, thickness direction. DETAILED DESCRIPTION

[0038] The features and exemplary embodiments of the various aspects of the present application will be described in detail below with reference to the accompanying drawings and specific embodiments. It should be understood that the specific embodiments described herein are merely configured to explain the present application and are not configured to limit the present application. The present application can be implemented without some of the specific details described below. The following description of the embodiments is merely provided to provide a better understanding of the present application by showing examples of the present application.

[0039] It should be noted that the relative terms such as first and second, and the like are used herein only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between such entities or operations. Moreover, the terms "comprising", "including", or any other variant thereof are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements recited, but can also include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without more limitations, an element defined by the statement "comprising" does not exclude the presence of additional identical elements in the process, method, article, or apparatus that includes the element.

[0040] It should be understood that when describing the structure of a component, when one layer, one region is referred to as being "on" or "above" another layer, another region, it can mean being directly on or above the other layer, another region, or containing other layers or regions therebetween. Moreover, if the component is flipped, the layer, the region will be "below" or "below" the other layer, another region.

[0041] Embodiments of the present application provide a display panel and a display device, which will be described below with reference to the accompanying drawings.

[0042] Figure 1 is a partial cross-sectional schematic view of a display panel 10 provided by embodiments of the present application, Figure 2 is a structural schematic view of a driving circuit 130 provided by embodiments of the present application, Figure 3 is a structural schematic view of a display panel 10 provided by embodiments of the present application, Figure 4 is a structural schematic view of a driving circuit 130 provided by embodiments of the present application, Figure 5FIG. 1 is a schematic diagram of a display panel 10 according to an embodiment of the present application.

[0043] For ease of display, the driving circuit 130 is shown in solid lines in some of the drawings, Figure 5 The line width and overlapping of the signal lines are not shown. Figure 1 The display panel 10 in the first region AA1 can be a partial cross-sectional view. The X direction can represent the first direction X, the Y direction can represent the second direction Y, and the Z direction can represent the thickness direction Z of the display panel 10. The first direction X, the second direction Y, and the thickness direction Z of the display panel 10 can be perpendicular to each other.

[0044] As shown in FIG. 1, the display panel 10 according to an embodiment of the present application includes a substrate 100, a driving circuit 130, a first signal line 140, and a second signal line 150. Figures 1 to 5 As shown in FIG. 1, the display panel 10 according to an embodiment of the present application includes a substrate 100, a driving circuit 130, a first signal line 140, and a second signal line 150.

[0045] Optionally, the display panel 10 provided in the embodiments of the present application can be a display panel 10 that emits light based on the principle of liquid crystal display (LCD), or can be a display panel 10 that emits light based on the principle of organic light emitting diode (OLED) light emitting display, or can be a display panel 10 that emits light based on the principle of quantum dot light emitting diode (QLED) light emitting display, which is not limited in the present application.

[0046] For the convenience of description, the following embodiments take the display panel 10 provided in the embodiments of the present application as an example, which emits light based on the principle of organic light emitting diode (OLED) light emitting display.

[0047] In a display panel 10 provided in the embodiments of the present application, the display panel 10 includes a substrate 100 and a light emitting device 300, the light emitting device 300 is arranged on one side of the substrate 100, the substrate 100 includes a substrate 110 and a driving circuit 130, a first type of signal line 140 and a second type of signal line 150 arranged on the same side of the substrate 110, the driving circuit 130 is connected with the light emitting device 300, so that the driving circuit 130 can be used to drive the light emitting display of the light emitting device 300.

[0048] For example, the driving circuit 130 can include a transistor 131, a storage capacitor 132 and a wiring for connecting various devices. The transistor 131 can include a semiconductor structure 131a, a gate 131b located on the side of the semiconductor structure 131a away from the substrate 110, and a source-drain electrode 131c located on the side of the gate 131b away from the substrate 110. The storage capacitor 132 can include a first plate 132a and a second plate 132b located on the side of the first plate 132a away from the substrate 110.

[0049] Optionally, the working principle of the driving circuit 130 and the circuit structure setting mode of the driving circuit 130 have many kinds, and the driving circuit 130 can be a 2T1C, 4T1C, 7T1C, 7T2C, 8T1C or 8T2C circuit structure.

[0050] As an example, the transistor 131 can include a driving transistor T1, a data write transistor T2, a threshold compensation transistor T3, a first reset transistor T4, a second reset transistor T7, a first control transistor T5, a second control transistor T6, and a second reset transistor T7, and the substrate 100 can further include a first power voltage signal line ELVDD, a second power voltage signal line ELVSS, a data signal line Vdata, a first reset signal line VREF1, a second reset signal line VREF2, a light emitting control signal line EM, a first scan signal line S1, a second scan signal line S2, a third scan signal line S3, and a fourth scan signal line S4.

[0051] The first end of the first control transistor T5 can be electrically connected with the second plate 132b of the storage capacitor 132, and the first end of the first control transistor T5 and the second plate 132b of the storage capacitor 132 can be electrically connected with the first power voltage signal line ELVDD, and the first power voltage signal line ELVDD can provide a positive power voltage signal to the first control transistor T5 and the storage capacitor 132. The first end of the data write transistor T2 can be electrically connected with the data signal line Vdata, and the data signal line Vdata can provide a data signal to the data write transistor T2. The second end of the data write transistor T2, the second end of the first control transistor T5, and the first end of the driving transistor T1 can be electrically connected with each other.

[0052] The second end of the driving transistor T1 and the first end of the threshold compensation transistor T3 are electrically connected. Further, the second end of the driving transistor T1, the first end of the threshold compensation transistor T3, and the first end of the second control transistor T6 can be electrically connected with each other. The first end of the first reset transistor T4 can be electrically connected with the first reset signal line VREF1, and the first reset signal line VREF1 can provide a first reset signal to the first reset transistor T4. The second end of the threshold compensation transistor T3, the control end of the driving transistor T1, the second end of the first reset transistor T4, and the first plate 132a of the storage capacitor 132 can be electrically connected with each other.

[0053] The first end of the second reset transistor T7 can be electrically connected with the second reset signal line VREF2, and the second reset signal line VREF2 can provide a second reset signal to the second reset transistor T7. The second end of the second reset transistor T7, the second end of the second control transistor T6, and the first electrode 310 of the light emitting device 300 can be electrically connected with each other. The second electrode 330 of the light emitting device 300 can be electrically connected with the second power voltage signal line ELVSS (for example, which can be a negative power voltage signal line).

[0054] The control end of the second control transistor T6 can be electrically connected with the control end of the first control transistor T5, and the control end of the second control transistor T6 and the control end of the first control transistor T5 can be electrically connected with the light-emitting control signal line EM. The control end of the first reset transistor T4 can be electrically connected with the first scan signal line S1, the control end of the data writing transistor T2 can be electrically connected with the second scan signal line S2, and the control end of the threshold compensation transistor T3 can be electrically connected with the third scan signal line S3. The control end of the second reset transistor T7 can be electrically connected with the fourth scan signal line S4.

[0055] Optionally, the substrate 100 can further include a plurality of insulating film layers 120 stacked on the substrate 110, and the device structures in the driving circuit 130 can be arranged between adjacent insulating film layers 120, so as to facilitate the arrangement of each device structure in the driving circuit 130. As an example, in the direction away from the substrate 110, the substrate 100 can further include a first insulating layer 121, a second insulating layer 122, a third insulating layer 123, a fourth insulating layer 124, a fifth insulating layer 125, and a sixth insulating layer 126 which are sequentially stacked, the semiconductor structure 131a can be arranged between the first insulating layer 121 and the second insulating layer 122, the gate 131b and the first plate 132a can be located between the second insulating layer 122 and the third insulating layer 123, the second plate 132b can be located between the third insulating layer 123 and the fourth insulating layer 124, the source-drain electrode 131c can be located between the fourth insulating layer 124 and the fifth insulating layer 125, and the sixth insulating layer 126 can be used as a planarization layer, i.e., the surface of the sixth insulating layer 126 away from the substrate 110 can be relatively flat, which can facilitate the subsequent preparation of other film layers on the substrate 100, and the light-emitting device 300 can be arranged on the side of the sixth insulating layer 126 away from the substrate 110.

[0056] Optionally, the sixth insulating layer 126 can include a first sub-insulating layer 126a and a second sub-insulating layer 126b located on the side of the first sub-insulating layer 126a away from the substrate 110, so that the first sub-insulating layer 126a and the second sub-insulating layer 126b can also be used to arrange device structures, thereby further facilitating the arrangement of each device structure in the substrate 100.

[0057] Optionally, a single driving circuit 130 can correspond to a single light-emitting device 300, i.e., a single driving circuit 130 can be used to drive the light-emitting display of a single light-emitting device 300. Optionally, the number of driving circuits 130 and the number of light-emitting devices 300 can be multiple, and the plurality of driving circuits 130 and the plurality of light-emitting devices 300 can be arranged in an array along the first direction X and the second direction Y. Among them, the first direction X can be the column direction of the arrangement of the driving circuit 130 and the light-emitting device 300, and the second direction Y can be the row direction of the arrangement of the driving circuit 130 and the light-emitting device 300.

[0058] Optionally, the light emitting device 300 comprises a first electrode 310, a light emitting functional layer 320 and a second electrode 330 stacked in sequence in a direction away from the substrate 100.

[0059] Optionally, the light emitting functional layer 320 can comprise a light emitting structure 321 and a common layer 322 disposed on at least one side of the light emitting structure 321 in the thickness direction Z of the display panel 10. For example, the common layer 322 can be disposed on both sides of the light emitting structure 321 in the thickness direction Z of the display panel 10. The common layer 322 disposed on the side of the light emitting structure 321 facing the substrate 100 can comprise a hole injection layer (HIL) and a hole transport layer (HTL). The common layer 322 disposed on the side of the light emitting structure 321 away from the substrate 100 can comprise an electron injection layer (EIL) and an electron transport layer (ETL).

[0060] Optionally, the first electrode 310 and the second electrode 330 can serve as pixel electrodes of the display panel 10. One of the first electrode 310 and the second electrode 330 can serve as an anode, and the other can serve as a cathode to drive the light emitting functional layer 320 to emit light. The first electrode 310 is taken as the anode of the display panel 10, and the second electrode 330 is taken as the cathode of the display panel 10 for illustration.

[0061] Optionally, the driving circuit 130 is connected to the light emitting device 300, which means that the source / drain 131c of a part of the transistors 131 in the driving circuit 130 can be connected to the first electrode 310 of the light emitting device 300, so that the driving circuit 130 can provide driving current to the first electrode 310 to drive the light emitting device 300 to emit light.

[0062] Optionally, the second electrodes 330 of the light emitting devices 300 can be electrically connected to each other, so as to facilitate the control of the display panel 10. For example, the second electrodes 330 of the light emitting devices 300 can be integrally formed. Optionally, the common layers 322 of the light emitting devices 300 can be integrally formed, so as to facilitate the preparation of the display panel 10.

[0063] Optionally, the display panel 10 can further include a pixel definition layer 200 disposed on the side of the first electrode 310 away from the substrate 100, the pixel definition layer 200 can be provided with a pixel opening 200a, and the light-emitting functional layer 320 and the second electrode 330 can extend from the pixel opening 200a to the outside of the pixel opening 200a. At least part of the surface of the first electrode 310 away from the substrate 100 can be exposed from the pixel opening 200a and connected with the light-emitting functional layer 320. The pixel definition layer 200 can be used to participate in the division of the sub-pixels of the display panel 10.

[0064] The display panel 10 has a first area AA1 and a second area AA2, and the driving circuit 130 and the light-emitting device 300 are disposed in the first area AA1 and the second area AA2, so that the first area AA1 and the second area AA2 can be used for light-emitting display.

[0065] For example, the display panel 10 can include a display area AA and a non-display area NA surrounding at least part of the display area AA, and the display area AA can include the first area AA1 and the second area AA2.

[0066] Optionally, the first area AA1 and the second area AA2 can be used to realize the display function of the display panel 10, and the structure of the display panel 10 in the first area AA1 and the second area AA2 can be different, so that the display panel 10 in the second area AA2 can have other functions compared with the display panel 10 in the first area AA1.

[0067] Optionally, the light transmittance of the display panel 10 in the second area AA2 is greater than that of the display panel 10 in the first area AA1, so that the display panel 10 in the second area AA2 can be used to participate in the light sensing work. For example, when the display panel 10 is applied to a display device, the light sensing component for sensing light in the display device can be correspondingly disposed under the second area AA2. The second area AA2 with high light transmittance is not easy to block light, which can facilitate the light sensing component to better sense light. The light sensing component can include at least one of a face recognition sensor, a camera, an under-screen fingerprint recognition module, an infrared light emitting diode (IR-LED) proximity sensor, a distance sensor, and other components capable of sensing light.

[0068] Optionally, there are various ways to realize that the display panel 10 located in the second area AA2 has a larger light transmittance than the display panel 10 located in the first area AA1. As an example, the arrangement density of the sub-pixels in the second area AA2 can be smaller than the arrangement density of the sub-pixels in the first area AA1, and / or the size of the sub-pixels in the second area AA2 can be smaller than the size of the sub-pixels in the first area AA1. As a further example, the arrangement density of the driving circuit 130 in the second area AA2 can be smaller than the arrangement density of the driving circuit 130 in the first area AA1, and / or the arrangement density of the light emitting device 300 in the second area AA2 can be smaller than the arrangement density of the light emitting device 300 in the first area AA1, and / or the size of the driving circuit 130 in the second area AA2 can be smaller than the size of the driving circuit 130 in the first area AA1, and / or the size of the light emitting device 300 in the second area AA2 can be smaller than the size of the light emitting device 300 in the first area AA1.

[0069] Optionally, the arrangement density of the sub-pixels in the second area AA2 can be half of the arrangement density of the sub-pixels in the first area AA1, so that the display panel 10 located in the second area AA2 can have better light transmittance.

[0070] Optionally, there are various relative positions between the first area AA1 and the second area AA2. As an example, the first area AA1 can surround at least part of the second area AA2 (for example, part of the first area AA1 can be located on at least one side of the second area AA2 in the first direction X, and part of the first area AA1 can be located on both sides of the second area AA2 in the second direction Y), so that the first area AA1 can have a larger size, which is beneficial to improve the display effect of the display panel 10.

[0071] Optionally, the number of the second areas AA2 can be one, which can facilitate the control of the display of the sub-pixels in the second area AA2. For example, when the display panel 10 is applied to a display device, by setting the number of the second areas AA2 to be one, the control chip in the display device can facilitate the control of the display of the sub-pixels in the second area AA2.

[0072] The first type of signal line 140 and the second type of signal line 150 can be used to connect with the driving circuit 130 and provide signals to the driving circuit 130, so as to realize the work of the driving circuit 130.

[0073] For example, the first type of signal lines 140 and the second type of signal lines 150 can be used to transmit at least one of a scan signal, an emission control signal and a reset signal, i.e., the first type of signal lines 140 and the second type of signal lines 150 can be multiplexed as at least one of the first scan signal line S1, the second scan signal line S2, the third scan signal line S3, the emission control signal line EM, the first reset signal line VREF1 and the second reset signal line VREF2 in the foregoing embodiments, which are not limited herein.

[0074] Optionally, the number of the first type of signal lines 140 can be at least two, and different first type of signal lines 140 can be used to transmit different signals. The number of the second type of signal lines 150 can be at least two, and different second type of signal lines 150 can be used to transmit different signals.

[0075] The first type of signal lines 140 and the second type of signal lines 150 are at least partially disposed in the second area AA2, and the second type of signal lines 150 are connected with at least one driving circuit 130 in the second area AA2, so that the second type of signal lines 150 can be used to transmit signals to the driving circuit 130 in the second area AA2.

[0076] Optionally, the display panel 10 includes circuit groups CG located in the second area AA2, a single circuit group CG includes at least one driving circuit 130, the number of the circuit groups CG is multiple, and the multiple circuit groups CG are arrayed in the first direction X and the second direction Y. The second type of signal lines 150 can be used to connect with the driving circuits 130 (e.g., all the driving circuits 130 in the circuit group CG) in the circuit group CG, so that the second type of signal lines 150 can be used to transmit signals to the driving circuits 130 in the circuit group CG in the second area AA2.

[0077] Optionally, each circuit group CG corresponds to a repetitive pixel unit group, the repetitive pixel unit group can include multiple light emitting devices 300, and the circuit group CG can include multiple driving circuits 130 disposed correspondingly to the light emitting devices 300.

[0078] For example, when a repetitive pixel unit group includes one light emitting device 300 with a red emission color, one light emitting device 300 with a green emission color and one light emitting device 300 with a blue emission color, a single circuit group CG can include three driving circuits 130. For further example, a single circuit group CG can include one driving circuit 130 connected with a light emitting device 300 with a red emission color, one driving circuit 130 connected with a light emitting device 300 with a green emission color and one driving circuit 130 connected with a light emitting device 300 with a blue emission color.

[0079] Optionally, the at least one second type signal line 150 is connected with at least two circuit groups CG adjacent in the second direction Y. Exemplarily, the display panel 10 includes a first circuit row RC1 located in the second area AA2, the first circuit row RC1 includes circuit groups CG located in the same row in the second direction Y, and a single second type signal line 150 can be connected with the driving circuits 130 of all the circuit groups CG in the first circuit row RC1, so that the single second type signal line 150 can be used to provide signals to the driving circuits 130 located in the same row in the second direction Y in the second area AA2.

[0080] Optionally, the display panel 10 further includes a second circuit row RC2 and a third circuit row RC3 arranged staggeredly, the second circuit row RC2 includes a part of the driving circuits 130 located in the same row in the second direction Y in the first area AA1, and the third circuit row RC3 includes another part of the driving circuits 130 located in the same row in the second direction Y in the first area AA1.

[0081] Optionally, the second circuit row RC2 and the third circuit row RC3 arranged staggeredly can mean that the second circuit row RC2 and the third circuit row RC3 are arranged alternately in the first direction X.

[0082] Optionally, one of the second circuit row RC2 and the third circuit row RC3 can be located in an odd-numbered row in the arrangement of the driving circuits 130 in the display panel 10, and the other can be located in an even-numbered row in the arrangement of the driving circuits 130 in the display panel 10, which is not limited in the present application. For the convenience of description, the following embodiments are described by taking the second circuit row RC2 located in an even-numbered row in the arrangement of the driving circuits 130 in the display panel 10 and the third circuit row RC3 located in an odd-numbered row in the arrangement of the driving circuits 130 in the display panel 10 as an example.

[0083] Optionally, the first circuit row RC1 can be arranged along the second direction Y with the third circuit row RC3, i.e., the first circuit row RC1 and the third circuit row RC3 can be located in the same row (for example, the first circuit row RC1 and the third circuit row RC3 are both located in an odd-numbered row in the arrangement of the driving circuits 130 in the display panel 10). Exemplarily, the first circuit row RC1 can be located between the third circuit rows RC3 arranged on both sides of the second area AA2 in the second direction Y in the first area AA1.

[0084] Optionally, the second circuit row RC2 can not be located in the same row with the first circuit row RC1.

[0085] Optionally, the single second-type signal line 150 is connected with two driving circuits 130 in the third circuit row RC3 located on two sides of the second area AA2 in the second direction Y, so that the signals in the third circuit row RC3 located on one side of the second area AA2 in the first direction X can be transmitted to the driving circuits 130 in the second area AA2 through the second-type signal line 150, and the signals in the third circuit row RC3 located on one side of the second area AA2 in the first direction X can be transmitted to the driving circuits 130 in the third circuit row RC3 located on the other side of the second area AA2 in the first direction X through the second-type signal line 150, thereby facilitating the control of the operation of the display panel 10.

[0086] Optionally, the second-type signal line 150 includes a third segment 151 and a fourth segment 152 located in the second area AA2 and connected with each other. For example, the third segment 151 can be connected with two driving circuits 130 in the third circuit row RC3 located on two sides of the second area AA2 in the second direction Y, and the fourth segment 152 can be connected with at least one driving circuit 130 in the second area AA2.

[0087] The first-type signal line 140 is spaced apart from the driving circuits 130 in the second area AA2, and the first-type signal line 140 includes a first segment 141 and a second segment 142 located in the second area AA2 and connected with each other, the first segment 141 is connected with the driving circuits 130 in the first area AA1, and the first-type signal line 140 can be used only for transmitting signals to the driving circuits 130 in the first area AA1, that is, the first-type signal line 140 only extends through the second area AA2, but is not used for transmitting signals to the driving circuits 130 in the second area AA2.

[0088] For example, the first segment 141 can be connected with the driving circuits 130 in the second circuit row RC2 in the first area AA1.

[0089] Optionally, the single first-type signal line 140 is connected with two driving circuits 130 in the second circuit row RC2 located on two sides of the second area AA2 in the second direction Y, so that the signals in the second circuit row RC2 located on one side of the second area AA2 in the first direction X can be transmitted to the driving circuits 130 in the second circuit row RC2 located on the other side of the second area AA2 in the first direction X through the first-type signal line 140, thereby facilitating the control of the operation of the display panel 10.

[0090] For example, the number of the first segments 141 in a single first signal line 140 can be two, and the two first segments 141 can be arranged on two sides of the second segment 142 in the second direction Y, one of the first segments 141 can be used to connect with the driving circuit 130 in the second circuit row RC2 on one side of the second area AA2 in the second direction Y, and the other first segment 141 can be used to connect with the driving circuit 130 in the second circuit row RC2 on the other side of the second area AA2 in the second direction Y.

[0091] Optionally, the first signal line 140 can further include a first connection segment 143 in the first area AA1, and the first connection segment 143 can be connected with the driving circuit 130 in the second circuit row RC2. For example, a single first connection segment 143 can be connected with each driving circuit 130 in the same second circuit row RC2.

[0092] Optionally, the second signal line 150 can further include a second connection segment 153 in the first area AA1, and the second connection segment 153 can be connected with the driving circuit 130 in the third circuit row RC3. For example, a single second connection segment 153 can be connected with each driving circuit 130 in the same third circuit row RC3.

[0093] Optionally, the first segment 141 can be arranged in various directions, and the first segment 141 can be connected with the driving circuit 130 in the first area AA1 and the second segment 142 in the shortest path.

[0094] By arranging the first segment 141 between the adjacent driving circuits 130 in the second area AA2 in the first direction X, the first segment 141 can be connected with the driving circuit 130 in the first area AA1 between the adjacent second signal lines 150 in the first direction X.

[0095] For example, by arranging the first segment 141 between the adjacent driving circuits 130 in the second area AA2 in the first direction X, the first segment 141 can be connected with the driving circuit 130 in the second circuit row RC2 between the adjacent third circuit rows RC3 in the first direction X.

[0096] By setting the minimum distance between the second sub-section 142 in the second area AA2 and the driving circuit 130 on one side of the first direction X to be smaller than the minimum distance between the second sub-section 142 and the driving circuit 130 on the other side of the first direction X, the second sub-section 142 not directly connected with the driving circuit 130 in the second area AA2 can be offset towards the driving circuit 130 on one side thereof in the first direction X, so that the electric field environment around the first type of signal line 140 in the second area AA2 can be similar to the electric field environment around the second type of signal line 150, and the working stability of the first type of signal line 140 and the second type of signal line 150 during signal transmission can be similar, which is beneficial to improving the display uniformity and working stability of the display panel 10.

[0097] For example, by setting the minimum distance between the second sub-section 142 in the second area AA2 and the driving circuit 130 on one side of the first direction X to be smaller than the minimum distance between the second sub-section 142 and the driving circuit 130 on the other side of the first direction X, the second sub-section 142 not directly connected with the driving circuit 130 in the second area AA2 can be offset towards the first circuit row RC1 on one side thereof in the first direction X.

[0098] Therefore, when the second type of signal line 150 in the second area AA2 and the first circuit row RC1 adjacent thereto form a capacitance (e.g. a parasitic capacitance), the second sub-section 142 and the first circuit row RC1 adjacent thereto can form a compensating capacitance, which can be similar to or equal to the capacitance formed between the second type of signal line 150 and the first circuit row RC1.

[0099] Or when the second type of signal line 150 in the second area AA2 and other conductive structures around the first circuit row RC1 adjacent thereto form a capacitance (e.g. a parasitic capacitance), the second sub-section 142 and the other conductive structures around the first circuit row RC1 adjacent thereto can form a compensating capacitance, which can be similar to or equal to the capacitance formed between the second type of signal line 150 and the other conductive structures around the first circuit row RC1.

[0100] Therefore, in the second area AA2, the electric field environment around the first type of signal line 140 can be similar to the electric field environment around the second type of signal line 150, and the working stability of the first type of signal line 140 and the second type of signal line 150 during signal transmission can be similar, which is beneficial to improving the display uniformity and working stability of the display panel 10.

[0101] Optionally, when the working stability of the first type signal line 140 is similar to that of the second type signal line 150, the display uniformity and the working stability of the display panel 10 can be improved, which can be due to that the first type signal line 140 can be used to transmit signals to the driving circuits 130 located in the odd-numbered rows (e.g., the driving circuits 130 in the second circuit row RC2) in the display panel 10, and the second type signal line 150 can be used to transmit signals to the driving circuits 130 located in the even-numbered rows (e.g., the driving circuits 130 in the first circuit row RC1 and the third circuit row RC3) in the display panel 10, thus, when the working stability of the first type signal line 140 is similar to that of the second type signal line 150 during the signal transmission, the working stability of the driving circuits 130 in the odd-numbered rows in the display panel 10 can be similar to that of the driving circuits 130 in the even-numbered rows, so that the working stability of the light emitting devices 300 driven by the driving circuits 130 in the odd-numbered rows can be similar to that of the light emitting devices 300 driven by the driving circuits 130 in the even-numbered rows, thereby being conducive to improving the display uniformity and the working stability of the display panel 10.

[0102] In some optional embodiments, the first type signal line 140 surrounds at least part of the circuit group CG.

[0103] Optionally, the first type signal line 140 can be located on at least one side of the circuit group CG in the first direction X, and / or the first type signal line 140 can be located on at least one side of the circuit group CG in the second direction Y, so as to achieve that the first type signal line 140 surrounds at least part of the circuit group CG.

[0104] For example, the second segment 142 can be located on at least one side of the circuit group CG in the first direction X, and / or the second segment 142 can be located on at least one side of the circuit group CG in the second direction Y.

[0105] In these optional embodiments, by arranging the first type signal line 140 to surround at least part of the circuit group CG, the first type signal line 140 with a larger size in the second area AA2 can be adjacent to the circuit group CG, which is conducive to forming a compensation capacitor between the first type signal line 140 and the first circuit row RC1 adjacent thereto, or between the first type signal line 140 and other conductive structures around the first circuit row RC1 adjacent thereto, thereby being conducive to reducing the working difference between the first type signal line 140 and the second type signal line 150. Moreover, by arranging the first type signal line 140 to surround at least part of the circuit group CG, the first type signal line 140 in the second area AA2 can be better adjacent to the circuit group CG, which is conducive to improving the compactness of the structure in the second area AA2, thereby being conducive to improving the light transmittance in the second area AA2.

[0106] In some embodiments, the second area AA2 includes an edge area AA2a adjacent to the first area AA1 and a main area AA2b located on a side of the edge area AA2a away from the first area AA1 in the first direction X, the circuit group CG includes a first circuit group CG1 located in the edge area AA2a and a second circuit group CG2 located in the main area AA2b, the second segment 142 includes a first sub-segment 142a disposed around the first circuit group CG1 and a second sub-segment 142b disposed around the second circuit group CG2, wherein the first sub-segment 142a extends from a side of the first circuit group CG1 in the first direction X to a side of the first circuit group CG1 in the second direction Y adjacent to the second circuit group CG2, and / or the second sub-segment 142b extends from a side of the second circuit group CG2 in the second direction Y via a side of the second circuit group CG2 in the first direction X to another side of the second circuit group CG2 in the second direction Y.

[0107] Optionally, the number of the first type of signal lines 140 is at least two, wherein the first segments 141 of the at least two first type of signal lines 140 are adjacent in the first direction X and the first sub-segments 142a are disposed on the same side of the first circuit group CG1 in the first direction X, and / or the first segments 141 of the at least two first type of signal lines 140 are adjacent in the first direction X and the second sub-segments 142b are disposed on both sides of the second circuit group CG2 in the first direction X.

[0108] Optionally, the number of the first circuit groups CG1 located in a single edge area AA2a in the first circuit row RC1 is one, which is beneficial to increase the size of the main area AA2b in the second area AA2 (e.g. the size of the main area AA2b in the first direction X), so that the second sub-segment 142b surrounding the circuit group CG to a greater extent in the second area AA2 can have a larger size.

[0109] Optionally, the number of the edge areas AA2a is two, and the two edge areas AA2a are disposed on both sides of the main area AA2b in the second direction Y. For example, the number of the first circuit groups CG1 in a single first circuit row RC1 can be two, and the two first circuit groups CG1 can be disposed in the edge areas AA2a on both sides of the main area AA2b.

[0110] Optionally, the first segment 141 and the first sub-segment 142a can be located in the edge area AA2a, and the second sub-segment 142b can be located in the main area AA2b.

[0111] Optionally, the second segment 142 further includes a third sub-segment 142c connecting between the first sub-segment 142a and the second sub-segment 142b adjacent in the second direction Y, and connecting between the second sub-segments 142b adjacent in the second direction Y.

[0112] Optionally, the third sub-section 142c can be connected to the first sub-section 142a and the second sub-section 142b adjacent to each other in the second direction Y in the shortest path, or the third sub-section 142c can be connected to the second sub-section 142b adjacent to each other in the second direction Y in the shortest path. For example, the third sub-section 142c can extend in the second direction Y.

[0113] In these optional embodiments, by properly setting the positions of the first sub-section 142a and the second sub-section 142b, the degree of the first type of signal line 140 surrounding the circuit group CG can gradually increase during the extension of the first type of signal line 140 from the edge region AA2a to the main region AA2b, so that the first type of signal line 140 with a larger size can be adjacent to the circuit group CG in the second region AA2, thereby facilitating the reduction of the working difference between the first type of signal line 140 and the second type of signal line 150.

[0114] In addition, when the number of the first type of signal line 140 is at least two, by setting the first sub-section 141 of the at least two first type of signal lines 140 adjacent to each other in the first direction X and the second sub-section 142b arranged on both sides of the second circuit group CG2 in the first direction X, the structure of the circuit group CG for forming the compensation capacitor or the structure of the circuit group CG for forming the compensation capacitor (hereinafter referred to as the capacitor structure) can have a smaller size in the first direction X.

[0115] For example, when the second sub-section 142b of each first type of signal line 140 is located on the same side of the second circuit group CG2 in the first direction X, in order for each second sub-section 142b to form a compensation capacitor with the capacitor structure, the size of the capacitor structure located on one side of the circuit group CG in the first direction X needs to be extended. By arranging the second sub-section 142b of the at least two first type of signal lines 140 on both sides of the second circuit group CG2 in the first direction X, the size of the capacitor structure can be reduced, and the capacitor structure with a smaller size located on both sides of the circuit group CG in the first direction X can be used to form a compensation capacitor with the second sub-section 142b of the different first type of signal line 140, thereby better reducing the blocking effect of the capacitor structure on light, and thus facilitating the improvement of the light transmission performance in the second region AA2.

[0116] In some embodiments of the present application, the film layer position of each subsection of the first type of signal line 140 and the second type of signal line 150 can be set in various ways.

[0117] Figure 6 is a partial cross-sectional schematic view of a display panel 10 provided by another embodiment of the present application, Figure 7is a partial cross-sectional schematic view of a display panel 10 provided by another embodiment of the present application, Figure 8 is a partial cross-sectional schematic view of a display panel 10 provided by yet another embodiment of the present application. In this embodiment, Figure 6 may be Figure 5 is a partial cross-sectional schematic view of a display panel 10 at position A in the above embodiment, Figure 7 may be Figure 5 is a partial cross-sectional schematic view of a display panel 10 at position B in the above embodiment, Figure 8 may be Figure 5 is a partial cross-sectional schematic view of a display panel 10 at position C in the above embodiment.

[0118] As shown in some optional embodiments, a portion of the second type of signal lines 150 and another portion of the second type of signal lines 150 are arranged in a staggered manner within the second area AA2, and a portion of the first type of signal lines 140 and another portion of the first type of signal lines 140 are arranged in a staggered manner within the second area AA2. Figures 5 to 8 Optionally, the portion of the first type of signal lines 140 and the another portion of the first type of signal lines 140 arranged in a staggered manner within the second area AA2 can mean that a segment of the first type of signal lines 140 and another segment of the first type of signal lines 140 are located between different insulating film layers 120.

[0119] Optionally, the portion of the second type of signal lines 150 and the another portion of the second type of signal lines 150 arranged in a staggered manner within the second area AA2 can mean that a segment of the second type of signal lines 150 and another segment of the second type of signal lines 150 are located between different insulating film layers 120.

[0120] In this optional embodiment, by arranging a segment of the second type of signal lines 150 and another segment of the second type of signal lines 150 in a staggered manner within the second area AA2, the segment of the second type of signal lines 150 can be arranged to be relatively far away from the driving circuit 130, and the another segment of the second type of signal lines 150 can be arranged to be relatively close to the driving circuit 130.

[0121]

[0122] ​Due to the staggered arrangement of one portion of the second signal lines 150 and another portion of the second signal lines 150 in the second area AA2, the second signal lines 150 can change the layer position in the second area AA2 by the via holes in the insulating film layer 120, and the second signal lines 150 in the via holes have a larger resistance. Due to the staggered arrangement of one portion of the first signal lines 140 and another portion of the first signal lines 140 in the second area AA2, the first signal lines 140 can also change the layer position in the second area AA2 by the via holes in the insulating film layer 120, and the resistance of the first signal lines 140 in the via holes in the second area AA2 can be used as a compensation resistance, which is approximately equal to or the same as the resistance of the second signal lines 150 in the via holes, so that the resistance of the first signal lines 140 in the second area AA2 is approximately equal to the resistance of the second signal lines 150, and the working stability of the first signal lines 140 and the second signal lines 150 is approximately equal during the transmission of signals, which is beneficial to improve the display uniformity and working stability of the display panel 10.

[0123] In some optional embodiments, the third segments 151 are staggered with the fourth segments 152, and the fourth segments 152 are connected with the at least one driving circuit 130 in the second area AA2.

[0124] Optionally, the fourth segments 152 are connected with the driving circuits 130 in the first area AA1 through the third segments 151, and / or connected between the adjacent fourth segments 152 in the second direction Y through the third segments 151.

[0125] Optionally, the fourth segments 152 are located in the film layer on the side of the third segments 151 in the substrate 100 close to the substrate 110.

[0126] For example, at least part of the third segments 151 are arranged in the same layer as the source-drain electrodes 131c (for example, at least part of the third segments 151 can be located between the fourth insulating layer 124 and the fifth insulating layer 125), and / or at least part of the third segments 151 are located in the film layer on the side of the source-drain electrodes 131c in the substrate 100 away from the substrate 110 (for example, at least part of the third segments 151 can be located between the first sub-insulating layer 126a and the second sub-insulating layer 126b), and / or at least part of the fourth segments 152 are arranged in the same layer as the gate electrodes 131b (for example, at least part of the fourth segments 152 can be located between the second insulating layer 122 and the third insulating layer 123), and / or at least part of the fourth segments 152 are located in the film layer between the gate electrodes 131b and the source-drain electrodes 131c in the substrate 100 (for example, at least part of the fourth segments 152 can be located between the third insulating layer 123 and the fourth insulating layer 124).

[0127] In these alternative embodiments, the fourth segment 152 can be closer to the driving circuit 130 than the third segment 151, so as to facilitate the connection of the fourth segment 152 to the driving circuit 130. The third segment 151 and the fourth segment 152 can be connected by a via hole formed in the insulating film layer 120.

[0128] In some alternative embodiments, the number of the second type signal lines 150 is plural, the third segments 151 of at least two adjacent second type signal lines 150 are staggered, and / or the third segments 151 of the first type signal lines 140 and the second type signal lines 150 between adjacent driving circuits 130 in the second area AA2 are staggered.

[0129] For example, the third segments 151 of at least two adjacent second type signal lines 150 corresponding to the same first circuit row RC1 are staggered, and / or the third segments 151 of the first type signal lines 140 and the second type signal lines 150 between adjacent circuit groups CG in the same first circuit row RC1 in the second area AA2 are staggered.

[0130] Optionally, the at least two adjacent second type signal lines 150 corresponding to the same first circuit row RC1 can mean that the at least two second type signal lines 150 are connected to the driving circuits 130 in the same first circuit row RC1.

[0131] Optionally, the third segments 151 of the at least two adjacent second type signal lines 150 being staggered can mean that a part of the third segments 151 of the second type signal lines 150 are located between different insulating film layers 120 from another part of the third segments 151 of the second type signal lines 150. For example, the third segments 151 of a part of the second type signal lines 150 are located between the fourth insulating layer 124 and the fifth insulating layer 125, and the third segments 151 of another part of the second type signal lines 150 are located between the first sub-insulating layer 126a and the second sub-insulating layer 126b.

[0132] Optionally, the third segments 151 of the first type signal lines 140 and the second type signal lines 150 between adjacent driving circuits 130 in the second area AA2 being staggered can mean that the third segments 151 of the first type signal lines 140 (for example, the third sub-segment 142c) between adjacent driving circuits 130 in the second area AA2 are located between different insulating film layers 120 from the third segments 151 of the second type signal lines 150. For example, the third sub-segment 142c can be located between the fifth insulating layer 125 and the first sub-insulating layer 126a, the third segments 151 of a part of the second type signal lines 150 are located between the fourth insulating layer 124 and the fifth insulating layer 125, and the third segments 151 of another part of the second type signal lines 150 are located between the first sub-insulating layer 126a and the second sub-insulating layer 126b.

[0133] In these optional embodiments, by setting the third segments 151 of the at least two adjacent second signal lines 150 to be staggered, the third segments 151 of the adjacent second signal lines 150 can have a smaller spacing in the direction parallel to the plane on which the display panel 10 is located, which is conducive to improving the compactness of the arrangement of the second signal lines 150. Similarly, by setting the third segments 151 of the second signal lines 150 and the first signal lines 140 between the adjacent drive circuits 130 in the second region AA2 to be staggered, the third segments 151 of the second signal lines 150 and the first signal lines 140 between the adjacent drive circuits 130 can have a smaller spacing in the direction parallel to the plane on which the display panel 10 is located, which is conducive to improving the compactness of the arrangement of the first signal lines 140 and the second signal lines 150 between the adjacent drive circuits 130.

[0134] Optionally, since the film layer arrangement area occupied by the drive circuit 130 in the circuit group CG is larger, the fourth segments 152 of each second signal line 150 can be arranged in the same layer to reduce the influence of the fourth segments 152 of each second signal line 150 on the arrangement of the drive circuit 130 in the substrate 100.

[0135] Optionally, the fourth segments 152 of each second signal line 150 corresponding to the same first circuit row RC1 can be arranged at intervals in the first direction X.

[0136] For ease of description, the following embodiments are described by taking, as an example, the case where “a part of the third segments 151 of the second signal lines 150 are located between the fourth insulating layer 124 and the fifth insulating layer 125, another part of the third segments 151 of the second signal lines 150 are located between the first sub-insulating layer 126a and the second sub-insulating layer 126b, and the fourth segments 152 of the second signal lines 150 are located between the second insulating layer 122 and the third insulating layer 123”.

[0137] Optionally, the orthographic projections of the third segments 151 of the at least two second signal lines 150 on the substrate 110 at least partially overlap, so that the orthographic projections of the third segments 151 of the at least two adjacent second signal lines 150 on the substrate 110 can not have a gap, which can facilitate improving the arrangement density of the second signal lines 150, and is conducive to reducing the arrangement area of the second signal lines 150 in the second region AA2, thereby facilitating improving the light transmittance in the second region AA2.

[0138] Exemplarily, when the third segment 151 extends along the second direction Y, by setting the third segment 151 of the at least two second-type signal lines 150 to at least partially overlap with each other in the orthographic projection on the substrate 110, the arrangement size of the third segment 151 in the first direction X of each second-type signal line 150 can be reduced, and the light transmittance in the second area AA2 can be improved.

[0139] Optionally, the orthographic projection on the substrate 110 of the first-type signal line 140 between the adjacent driving circuits 130 in the second area AA2 at least partially overlaps with the orthographic projection on the substrate 110 of the third segment 151 of the second-type signal line 150, so that there can be no gap between the orthographic projections on the substrate 110 of the at least two adjacent first-type signal lines 140 and the third segment 151 of the second-type signal line 150. The arrangement density of the first-type signal line 140 and the second-type signal line 150 can be improved, the arrangement area of the first-type signal line 140 and the second-type signal line 150 in the second area AA2 can be reduced, and the light transmittance in the second area AA2 can be improved.

[0140] Exemplarily, the orthographic projection on the substrate 110 of the third sub-segment 142c of the first-type signal line 140 in the second area AA2 at least partially overlaps with the orthographic projection on the substrate 110 of the third segment 151 of the second-type signal line 150. When the third sub-segment 142c and the third segment 151 both extend along the second direction Y, by setting the orthographic projection on the substrate 110 of the third sub-segment 142c of the first-type signal line 140 in the second area AA2 to at least partially overlap with the orthographic projection on the substrate 110 of the third segment 151 of the second-type signal line 150, the arrangement size of the third sub-segment 142c and the third segment 151 in the first direction X can be reduced, and the light transmittance in the second area AA2 can be improved.

[0141] In some optional embodiments, the first-type signal line 140 in the second area AA2 can be at least partially arranged in the same layer as the second-type signal line 150 in the second area AA2.

[0142] Optionally, the first sub-segment 142a can be at least partially arranged in the same layer as the second-type signal line 150. Exemplarily, at least part of the first sub-segment 142a can be arranged in the same layer as the fourth segment 152.

[0143] Optionally, the second sub-segment 142b can be at least partially arranged in the same layer as the second-type signal line 150. Exemplarily, at least part of the second sub-segment 142b can be arranged in the same layer as the fourth segment 152.

[0144] In these optional embodiments, by arranging the first type of signal line 140 in the second region AA2 and the second type of signal line 150 in the second region AA2 to be at least partially in the same layer, the material of at least part of the segments of the first type of signal line 140 in the second region AA2 can be the same as the material of at least part of the segments of the second type of signal line 150 in the second region AA2, so that the impedance of the first type of signal line 140 in the second region AA2 and the impedance of the second type of signal line 150 in the second region AA2 can be approximately or the same, which is conducive to reducing the working difference between the first type of signal line 140 and the second type of signal line 150.

[0145] In addition, the electric field environment of the first type of signal line 140 and the second type of signal line 150 arranged in the same layer in the second region AA2 can be approximately the same, so that the working stability of the first type of signal line 140 and the second type of signal line 150 during signal transmission is approximately the same, which is conducive to improving the display uniformity and working stability of the display panel 10. For example, since the fourth segment 152 is relatively close to the driving circuit 130 in the circuit group CG, the fourth segment 152 is prone to form a parasitic capacitance with the driving circuit 130 or the structure around the driving circuit 130. Therefore, when the first sub-segment 142a and the second sub-segment 142b for forming the compensation capacitance are arranged in the same layer as the fourth segment 152, the compensation capacitance formed by the first sub-segment 142a and the second sub-segment 142b can be approximately the same as the parasitic capacitance formed by the fourth segment 152, so that the electric field environment around the first type of signal line 140 can be approximately the same as the electric field environment around the second type of signal line 150, and thus the working stability of the first type of signal line 140 and the second type of signal line 150 during signal transmission is approximately the same, which is conducive to improving the display uniformity and working stability of the display panel 10.

[0146] In some optional embodiments, the first sub-segment 142a and the second sub-segment 142b are arranged at least partially in the same layer.

[0147] Optionally, the first sub-segment 142a located on one side of the circuit group CG in the first direction X is arranged in the same layer as the second sub-segment 142b located on both sides of the circuit group CG in the first direction X.

[0148] In these optional embodiments, by setting the first sub-section 142a and the second sub-section 142b at least partially in the same layer, the compensation capacitance formed by the first sub-section 142a in the first type of signal line 140 can be approximately equal to the compensation capacitance formed by the second sub-section 142b, that is, the compensation capacitance formed between the first type of signal line 140 in the second area AA2 and the capacitance structure corresponding to each circuit group CG can be approximately equal, which is beneficial to further improve the similarity between the electric field environment around the first type of signal line 140 and the electric field environment around the second type of signal line 150, thereby being beneficial to further reduce the working difference between the first type of signal line 140 and the second type of signal line 150, and further improve the display uniformity and working stability of the display panel 10.

[0149] In some optional embodiments, the first section 141 and the first sub-section 142a are at least partially set in different layers, and / or the first section 141 and the second sub-section 142b are at least partially set in different layers.

[0150] Optionally, the first section 141 and the first sub-section 142a being at least partially set in different layers can mean that the first section 141 and at least part of the first sub-section 142a are located between different insulating film layers 120.

[0151] Optionally, the first section 141 and the second sub-section 142b being at least partially set in different layers can mean that the first section 141 and at least part of the second sub-section 142b are located between different insulating film layers 120.

[0152] Optionally, the first section 141 and the third sub-section 142c are set in the same layer, so that the preparation of the first section 141 and the third sub-section 142c can be completed in the same preparation step, which is beneficial to improve the preparation efficiency of the display panel 10.

[0153] Optionally, at least part of the first sub-section 142a is located in a film layer between the first section 141 and the substrate 110, and / or at least part of the second sub-section 142b is located in a film layer between the first section 141 and the substrate 110.

[0154] For example, at least part of the first section 141 is located in a film layer on the side of the source-drain electrode 131c away from the substrate 110 (for example, at least part of the first section 141 can be located between the fifth insulating layer 125 and the first sub-insulating layer 126a), and / or at least part of the first sub-section 142a is set in the same layer as the gate electrode 131b (for example, at least part of the first sub-section 142a can be located between the second insulating layer 122 and the third insulating layer 123), and / or at least part of the second sub-section 142b is set in the same layer as the gate electrode 131b (for example, at least part of the second sub-section 142b can be located between the second insulating layer 122 and the third insulating layer 123).

[0155] In these optional embodiments, by at least partially staggered arrangement of the first segment 141 which does not need to participate in forming the compensation capacitor and the first sub-segment 142a and / or the second sub-segment 142b, the first segment 141 can not need to extend into the film layer adjacent to the capacitor structure, which is conducive to the arrangement of the first segment 141.

[0156] And, due to the at least partially staggered arrangement of the first segment 141 and the first sub-segment 142a and / or the second sub-segment 142b, the first type of signal line 140 can change the film layer position in the second area AA2 by the via hole opened in the insulating film layer 120, so that the resistance of the first type of signal line 140 in the second area AA2 at the via hole can serve as a compensation resistance, so that in the second area AA2, the resistance of the first type of signal line 140 can be approximately equal to the resistance of the second type of signal line 150, and in the process of transmitting signals, the working stability of the first type of signal line 140 and the second type of signal line 150 is approximately equal, which is conducive to improving the display uniformity and working stability of the display panel 10.

[0157] Figure 9 is a partial cross-sectional schematic view of a display panel 10 provided by another embodiment of the present application, Figure 10 is a partial cross-sectional schematic view of a display panel 10 provided by another embodiment of the present application, Figure 11 is a position schematic view of a light shielding structure 170, a driving circuit 130, a first type of signal line 140 and a second type of signal line 150 provided by an embodiment of the present application. For convenience of illustration, Figure 11 in which the light shielding structure 170 is schematically shown by a dashed box. Among them, Figure 10 may be Figure 11 in which the partial cross-sectional schematic view of the display panel 10 at the D position.

[0158] As shown in Figures 9 to 11 , in some optional embodiments, the substrate 100 further includes a light shielding structure 170 arranged on one side of the substrate 110, the light shielding structure 170 encloses a light shielding space 170a, and the driving circuit 130 is located in the light shielding space 170a.

[0159] Optionally, the light shielding structure 170 can be located only in the second area AA2, that is, the light shielding structure 170 can be used only to accommodate the driving circuit 130 in the second area AA2, which is conducive to improving the pixel arrangement density in the first area AA1 and improving the display effect of the first area AA1.

[0160] Optionally, the light shielding structure 170 can include a light shielding body 171, and the light shielding body 171 can enclose a light shielding space 170a. For example, the light shielding body 171 can include a first light shielding portion 171a, a second light shielding portion 171b disposed on a side of the first light shielding portion 171a away from the substrate 110, and a third light shielding portion 171c disposed between the first light shielding portion 171a and the second light shielding portion 171b. The surface of the first light shielding portion 171a on the side facing the light shielding space 170a can serve as a bottom wall surface of the light shielding space 170a. The surface of the second light shielding portion 171b on the side facing the light shielding space 170a can serve as a top wall surface of the light shielding space 170a. The third light shielding portion 171c can have a ring shape, and the surface of the third light shielding portion 171c on the side facing the light shielding space 170a can serve as a side wall surface of the light shielding space 170a.

[0161] Optionally, the material of the light shielding structure 170 can include a light shielding material. For example, the material of the light shielding structure 170 can include at least one of a light reflecting material and a light absorbing material. For example, the material of the light shielding structure 170 can include an opaque metal material.

[0162] Optionally, the light shielding structure 170 can be arranged in the substrate 100 in various ways. For example, the first light shielding portion 171a can be located between the substrate 110 and the first insulating layer 121. The second light shielding portion 171b can be located between the fifth insulating layer 125 and the first sub-insulating layer 126a. The third light shielding portion 171c can penetrate at least one of the first insulating layer 121, the second insulating layer 122, the third insulating layer 123, the fourth insulating layer 124, and the fifth insulating layer 125, so that the light shielding space 170a enclosed by the light shielding structure 170 can better accommodate the driving circuit 130.

[0163] Optionally, the circuit group CG can be located in the light shielding space 170a. For example, a single light shielding structure 170 can correspond to a single circuit group CG, that is, one circuit group CG can be accommodated in one light shielding space 170a, and different circuit groups CG can be located in different light shielding spaces 170a.

[0164] Optionally, the light shielding structure 170 can be provided with a communication opening 170b, and the second signal line 150 can extend from outside the light shielding space 170a to the light shielding space 170a through the communication opening 170b. For example, the driving circuit 130 and the fourth segment 152 can be located in the light shielding space 170a, and the third segment 151 can extend from outside the light shielding space 170a to the light shielding space 170a through the communication opening 170b.

[0165] Optionally, when the third segment 151 of the second signal line 150 is located between the fourth insulating layer 124 and the fifth insulating layer 125, the communication opening 170b can be at least partially formed in the third light shielding portion 171c, such that the third segment 151 of the second signal line 150 located between the fourth insulating layer 124 and the fifth insulating layer 125 can extend into the light shielding space 170a through the communication opening 170b formed in the third light shielding portion 171c. When the third segment 151 of the second signal line 150 is located between the first sub-insulating layer 126a and the second sub-insulating layer 126b, the communication opening 170b can be at least partially formed in the second light shielding portion 171b, such that the third segment 151 of the second signal line 150 located between the first sub-insulating layer 126a and the second sub-insulating layer 126b can extend into the light shielding space 170a through the communication opening 170b formed in the second light shielding portion 171b.

[0166] Optionally, the transistor 131 in the driving circuit 130 can also be connected with the light emitting device 300 through the communication opening 170b. For example, the second light emitting control transistor 131 in the driving circuit 130 can be connected with the first electrode 310 of the light emitting device 300 through the communication opening 170b formed in the second light shielding portion 171b.

[0167] Optionally, since the first signal line 140 can not need to be connected with the driving circuit 130 in the second area AA2, the first signal line 140 can be located outside the light shielding space 170a, so as to reduce the occupation of the light shielding space 170a by the first signal line 140, thereby facilitating the arrangement of the driving circuit 130 in the light shielding space 170a.

[0168] In these optional embodiments, since the display panel 10 in the second area AA2 has good light transmission performance, by arranging the light shielding structure 170 for shielding light in the second area AA2 and arranging the driving circuit 130 in the light shielding space 170a, the influence of light on the working stability of the driving circuit 130 can be reduced, for example, the light shielding structure 170 can be used to limit the light from shining on the semiconductor structure 131a of the transistor 131 in the driving circuit 130, so that the transistor 131 can have better working stability, thereby facilitating the improvement of the working stability of the display panel 10.

[0169] Optionally, the display panel 10 can include a fixed voltage terminal, and the light shielding structure 170 can be electrically connected with the fixed voltage terminal, so that the light shielding structure 170 can have a fixed voltage, so that the light shielding structure 170 can have better potential stability. For example, the fixed voltage terminal can be used to transmit the first power voltage signal, the second power voltage signal or the reset signal. Further, the light shielding structure 170 can be electrically connected with the fixed voltage terminal through the first power voltage signal line ELVDD, the second power voltage signal line ELVSS, the first reset signal line VREF1 or the second reset signal line VREF2.

[0170] In some optional embodiments, at least part of the light shielding structure 170 can serve as the capacitor structure in the foregoing embodiments, that is, a compensation capacitor can be formed between the adjacent first type signal line 140 and the light shielding structure 170.

[0171] For example, a compensation capacitor can be formed between the adjacent second segment 142 and the light shielding structure 170. Further, a compensation capacitor can be formed between the adjacent first subsegment 142a and the light shielding structure 170, and / or a compensation capacitor can be formed between the adjacent second subsegment 142b and the light shielding structure 170.

[0172] Optionally, the minimum distance between the second segment 142 and the light shielding structure 170 on one side of the first direction X is smaller than the minimum distance between the second segment 142 and the light shielding structure 170 on the other side of the first direction X, so that the second segment 142 not directly connected with the driving circuit 130 in the second area AA2 can be offset towards the light shielding structure 170 on one side thereof in the first direction X, which is beneficial to form a compensation capacitor between the second segment 142 and the light shielding structure 170 adjacent thereto, and the compensation capacitor can be approximately or equivalent to the capacitor formed between the second type signal line 150 and other conductive structures around the first circuit row RC1, so that in the second area AA2, the electric field environment around the first type signal line 140 can be approximately the same as the electric field environment around the second type signal line 150, so that the working stability of the first type signal line 140 and the second type signal line 150 is approximately the same during signal transmission, which is beneficial to improve the display uniformity and working stability of the display panel 10.

[0173] Optionally, the minimum distance between the second segment 142 and the adjacent light shielding structure 170 is not greater than 6 microns, so as to form a compensation capacitor between the adjacent second segment 142 and the light shielding structure 170. For example, the minimum distance between the second segment 142 and the adjacent light shielding structure 170 is not greater than 3 microns.

[0174] For example, the minimum distance between the first sub-section 142a and the light-shielding structure 170 on one side of the first direction X is smaller than the minimum distance between the first sub-section 142a and the light-shielding structure 170 on the other side of the first direction X, and / or the minimum distance between the second sub-section 142b and the light-shielding structure 170 on one side of the first direction X is smaller than the minimum distance between the second sub-section 142b and the light-shielding structure 170 on the other side of the first direction X.

[0175] Optionally, the distance between the first sub-section 142a and the light-shielding structure 170 is not greater than 6 microns, and / or the distance between the second sub-section 142b and the light-shielding structure 170 is not greater than 6 microns. For example, the distance between the first sub-section 142a and the light-shielding structure 170 is not greater than 3 microns, and / or the distance between the second sub-section 142b and the light-shielding structure 170 is not greater than 3 microns.

[0176] Optionally, the orthogonal projection of the first type of signal line 140 on the substrate 110 partially overlaps with the orthogonal projection of the light-shielding structure 170 on the substrate 110, so that a compensation capacitor can be formed between the adjacent first type of signal line 140 and the light-shielding structure 170. For example, the orthogonal projection of the second sub-section 142 on the substrate 110 partially overlaps with the orthogonal projection of the light-shielding structure 170 on the substrate 110. Further, the orthogonal projection of the first sub-section 142a on the substrate 110 partially overlaps with the orthogonal projection of the light-shielding structure 170 on the substrate 110, and / or the orthogonal projection of the second sub-section 142b on the substrate 110 partially overlaps with the orthogonal projection of the light-shielding structure 170 on the substrate 110.

[0177] In some optional embodiments, the light-shielding structure 170 includes a protruding structure 172 disposed on the side of the light-shielding body 171 away from the light-shielding space 170a, and the orthogonal projection of the first type of signal line 140 on the substrate 110 partially overlaps with the orthogonal projection of the protruding structure 172 on the substrate 110.

[0178] For example, the orthogonal projection of the second sub-section 142 on the substrate 110 partially overlaps with the orthogonal projection of the protruding structure 172 on the substrate 110. Further, the orthogonal projection of the first sub-section 142a on the substrate 110 partially overlaps with the orthogonal projection of the protruding structure 172 on the substrate 110, and / or the orthogonal projection of the second sub-section 142b on the substrate 110 partially overlaps with the orthogonal projection of the protruding structure 172 on the substrate 110.

[0179] Optionally, a compensation capacitor is formed between the adjacent second sub-section 142 and the protruding structure 172.

[0180] Optionally, at least a portion of the second segment 142 is disposed in the same layer as the gate 131b (e.g., at least a portion of the second segment 142 may be located between the second insulating layer 122 and the third insulating layer 123), and / or, at least a portion of the protruding structure 172 is located in the film layer between the semiconductor structure 131a and the substrate 110 within the substrate 100 (e.g., at least a portion of the protruding structure 172 may be located between the substrate 110 and the first insulating layer 121), and / or, at least a portion of the protruding structure 172 is located in the film layer between the gate 131b and the source / drain 131c within the substrate 100 (e.g., at least a portion of the protruding structure 172 may be located between the third insulating layer 123 and the fourth insulating layer 124).

[0181] Optionally, the protruding structures may be arranged around the light-shielding body 171. For example, a portion of the protruding structures may be located on both sides of the light-shielding body 171 in the first direction X, and another portion of the protruding structures may be located on both sides of the light-shielding body 171 in the second direction Y.

[0182] Optionally, the size of the compensation capacitor can be controlled by controlling the overlap area of ​​the orthographic projection of the first type signal line 140 on the substrate 110 and the orthographic projection of the protruding structure 172 on the substrate 110.

[0183] As an example, such as Figure 11 As shown, the orthographic projection of the second segment 142 on the substrate 110 may only partially overlap with the orthographic projection of the protrusion structure located on at least one side of the light-shielding body 171 in the first direction X on the substrate 110, that is, the formed compensation capacitor may only be located on at least one side of the third light-shielding portion 171c in the first direction X. For example, the orthographic projection of the first sub-segment 142a on the substrate 110 may only partially overlap with the orthographic projection of the protrusion structure located on one side of the light-shielding body 171 in the first direction X on the substrate 110, and the orthographic projection of the second sub-segment 142b of two adjacent first-type signal lines 140 on the substrate 110 may only partially overlap with the orthographic projections of the protrusion structures located on both sides of the light-shielding body 171 in the first direction X on the substrate 110, respectively.

[0184] As another example, the orthographic projection of the second segment 142 on the substrate 110 can at least partially overlap with the orthographic projection of the protruding structure on at least one side of the light-shielding body 171 in the first direction X on the substrate 110, and the orthographic projection of the second segment 142 on the substrate 110 can at least partially overlap with the orthographic projection of the protruding structure on at least one side of the light-shielding body 171 in the second direction Y on the substrate 110 (not shown in the figure), i.e., the formed compensation capacitor can be partially located on at least one side of the third light-shielding part 171c in the first direction X, and the formed compensation capacitor can be partially located on at least one side of the third light-shielding part 171c in the second direction Y. For example, the orthographic projection of the first sub-segment 142a on the substrate 110 can partially overlap with the orthographic projection of the protruding structure on one side of the light-shielding body 171 in the first direction X on the substrate 110, and the orthographic projection of the first sub-segment 142a on the substrate 110 can partially overlap with the orthographic projection of the protruding structure on one side of the light-shielding body 171 in the second direction Y on the substrate 110, the orthographic projection of the second sub-segment 142b of the two adjacent first-type signal lines 140 on the substrate 110 can respectively partially overlap with the orthographic projection of the protruding structure on both sides of the light-shielding body 171 in the first direction X on the substrate 110, and the orthographic projection of the second sub-segment 142b on the substrate 110 can partially overlap with the orthographic projection of the protruding structure on one side of the light-shielding body 171 in the second direction Y on the substrate 110.

[0185] Figure 12 is a partial cross-sectional schematic view of a display panel 10 provided by another embodiment of the present application, Figure 13 is a position schematic view of a light-shielding structure 170, a driving circuit 130, a first-type signal line 140, a second-type signal line 150, and a third-type signal line 160 provided by an embodiment of the present application. Among them, Figure 12 may be Figure 13 a partial cross-sectional schematic view of a display panel 10 at the E position in

[0186] As shown in Figure 12 and Figure 13 , in some optional embodiments, the display panel 10 further includes a circuit column LC, the circuit column LC includes the driving circuits 130 in the same column in the first direction X in the first area AA1, the substrate 100 further includes a third-type signal line 160, a single third-type signal line 160 is connected with the two driving circuits 130 located on both sides of the second area AA2 in the first direction X in the circuit column LC, and the third-type signal line 160 is connected with at least one driving circuit 130 in the circuit column LC.

[0187] Optionally, the number of third-type signal lines 160 can be at least two, and the at least two third-type signal lines 160 can be arranged at intervals in the second direction Y.

[0188] In the optional embodiment, the third type of signal line 160 can be used to provide signals to the driving circuits 130 in the same column in the first direction X in the first area AA1, so as to facilitate the operation of the driving circuits 130.

[0189] For example, the third type of signal line 160 can be used to transmit data signals, i.e., the third type of signal line 160 can be multiplexed as the data signal line Vdata in the foregoing embodiments.

[0190] In some optional embodiments, the third type of signal line 160 includes a fifth segment 161 and a sixth segment 162 connected to each other, the fifth segment 161 partially overlaps with the orthogonal projection of the first type of signal line 140 on the substrate 110, the sixth segment 162 is connected to at least one driving circuit 130 in the second area AA2, and the orthogonal projection of the sixth segment 162 on the substrate 110 partially overlaps with the orthogonal projection of the second type of signal line 150 on the substrate 110, wherein the fifth segment 161 is at least partially staggered with the first type of signal line 140, and the sixth segment 162 is at least partially staggered with the second type of signal line 150.

[0191] Optionally, the fifth segment 161 can extend from outside the light shielding structure 170 to inside the light shielding structure 170 through the communication opening 170b, and the sixth segment 162 can be located in the light shielding space 170a.

[0192] Optionally, the sixth segment 162 is connected to the driving circuit 130 in the first area AA1 through the fifth segment 161, and / or is connected between adjacent sixth segments 162 in the first direction X through the fifth segment 161.

[0193] Optionally, at least part of the fifth segment 161 is arranged in the same layer as the source / drain electrode 131c (for example, at least part of the fifth segment 161 can be located between the fourth insulating layer 124 and the fifth insulating layer 125), and / or at least part of the fifth segment 161 is located in a film layer on the side of the source / drain electrode 131c away from the substrate 110 in the substrate 100 (for example, at least part of the fifth segment 161 can be located between the first sub-insulating layer 126a and the second sub-insulating layer 126b).

[0194] Optionally, at least part of the sixth segment 162 is arranged in the same layer as the source / drain electrode 131c (for example, at least part of the sixth segment 162 can be located between the fourth insulating layer 124 and the fifth insulating layer 125).

[0195] In these optional embodiments, by reasonably setting the relative positional relationship between the third type of signal line 160 and the first type of signal line 140 and the second type of signal line 150, it is beneficial to reduce the interference of the arrangement of the third type of signal line 160 on the arrangement of the first type of signal line 140 and the second type of signal line 150.

[0196] Please refer to Figures 1 to 13 Embodiments of the first aspect of the present application also provide a display panel 10 having a first area AA1 and a second area AA2, the display panel 10 comprising: a substrate 100 comprising a substrate 110 and a driving circuit 130, a first type of signal line 140 and a second type of signal line 150 disposed on the same side of the substrate 110; a light emitting device 300 disposed on one side of the substrate 100, the driving circuit 130 being connected to the light emitting device 300, wherein the driving circuit 130 and the light emitting device 300 are disposed in the first area AA1 and the second area AA2, the first type of signal line 140 and the second type of signal line 150 are at least partially disposed in the second area AA2, the first type of signal line 140 is spaced apart from the driving circuit 130 in the second area AA2, the second type of signal line 150 is connected to at least one driving circuit 130 in the second area AA2, and a portion of the second type of signal line 150 is staggered with another portion of the second type of signal line 150 in the second area AA2, and a portion of the first type of signal line 140 is staggered with another portion of the second type of signal line 150 in the second area AA2.

[0197] In the display panel 10 provided by the embodiments of the present application, the display panel 10 comprises a substrate 100 and a light emitting device 300, the light emitting device 300 is disposed on one side of the substrate 100, the substrate 100 comprises a substrate 110 and a driving circuit 130, a first type of signal line 140 and a second type of signal line 150 disposed on the same side of the substrate 110, and the driving circuit 130 is connected to the light emitting device 300, so that the driving circuit 130 can be used to drive the light emitting display of the light emitting device 300. The display panel 10 has a first area AA1 and a second area AA2, and the driving circuit 130 and the light emitting device 300 are disposed in the first area AA1 and the second area AA2, so that the first area AA1 and the second area AA2 can be used for light emitting display.

[0198] The first type of signal line 140 and the second type of signal line 150 can be used to connect to the driving circuit 130 and provide signals to the driving circuit 130, so as to facilitate the operation of the driving circuit 130. The first type of signal line 140 and the second type of signal line 150 are at least partially disposed in the second area AA2, and the second type of signal line 150 is connected to at least one driving circuit 130 in the second area AA2, so that the second type of signal line 150 can be used to transmit signals to the driving circuit 130 in the second area AA2. The first type of signal line 140 is spaced apart from the driving circuit 130 in the second area AA2, that is, the first type of signal line 140 can only extend through the second area AA2, but is not used to transmit signals to the driving circuit 130 in the second area AA2.

[0199] By setting a part of the second type signal lines 150 and another part of the second type signal lines 150 in the second area AA2 in staggered layers, a part of the second type signal lines 150 can be arranged relatively far away from the driving circuit 130, and another part of the second type signal lines 150 can be arranged relatively close to the driving circuit 130.

[0200] As a part of the second type signal lines 150 and another part of the second type signal lines 150 are set in staggered layers in the second area AA2, the second type signal lines 150 can change the position of the film layer in the second area AA2 through the via, and the second type signal lines 150 in the via have a large resistance. By setting a part of the first type signal lines 140 and another part of the first type signal lines 140 in staggered layers in the second area AA2, the first type signal lines 140 can also change the position of the film layer in the second area AA2 through the via, so that the resistance of the first type signal lines 140 in the second area AA2 at the via can be a compensation resistance, which is approximately equal to or the same as the resistance of the second type signal lines 150 in the via, so that the resistance of the first type signal lines 140 in the second area AA2 can be approximately equal to the resistance of the second type signal lines 150, and the working stability of the first type signal lines 140 and the second type signal lines 150 in the process of transmitting signals is approximately equal, which is beneficial to improving the display uniformity and working stability of the display panel 10.

[0201] Optionally, the display panel 10 provided by the embodiment of the first aspect of the present application can be the display panel 10 in any of the foregoing embodiments, and thus the display panel 10 provided by the embodiment of the present application can have the structure and advantages of the display panel 10 in any of the foregoing embodiments, which will not be described herein.

[0202] Please refer to Figures 1 to 13Embodiments of the first aspect of the present application also provide a display panel 10 having a first area AA1 and a second area AA2, the display panel 10 comprising: a substrate 100 comprising a substrate 110 and a driving circuit 130, a first type of signal line 140 and a second type of signal line 150 disposed on the same side of the substrate 110; a light shielding structure 170 disposed on one side of the substrate 110, the light shielding structure 170 enclosing a light shielding space 170a, the driving circuit 130 being located in the light shielding space 170a; a light emitting device 300 disposed on one side of the substrate 100, the driving circuit 130 being connected to the light emitting device 300, wherein the first area AA1 and the second area AA2 are both provided with the driving circuit 130 and the light emitting device 300, the first type of signal line 140 and the second type of signal line 150 are at least partially disposed in the second area AA2, the first type of signal line 140 is disposed apart from the driving circuit 130 in the second area AA2, and the first type of signal line 140 is located outside the light shielding space 170a, the light shielding structure 170 is provided with a communication opening 170b, the second type of signal line 150 extends from outside the light shielding space 170a to inside the light shielding space 170a through the communication opening 170b, the second type of signal line 150 is connected to at least one driving circuit 130 in the second area AA2, the first type of signal line 140 comprises a first segment 141 and a second segment 142 located in the second area AA2 and connected to each other, the first segment 141 is connected to the driving circuit 130 in the first area AA1, and the first segment 141 is located between adjacent light shielding structures 170 in the second area AA2 in the first direction X, the minimum distance between the second segment 142 and the light shielding structure 170 on one side of the first direction X is less than the minimum distance between the second segment 142 and the light shielding structure 170 on the other side of the first direction X, and adjacent second segments 142 and the light shielding structure 170 form a compensation capacitor.

[0203] In the display panel 10 provided by the embodiments of the present application, the display panel 10 comprises a substrate 100, a light shielding structure 170 and a light emitting device 300, the light emitting device 300 is disposed on one side of the substrate 100, the substrate 100 comprises a substrate 110 and a driving circuit 130, a first type of signal line 140 and a second type of signal line 150 disposed on the same side of the substrate 110, the driving circuit 130 is connected to the light emitting device 300, so that the driving circuit 130 can be used to drive the light emitting display of the light emitting device 300. The display panel 10 has a first area AA1 and a second area AA2, the first area AA1 and the second area AA2 are both provided with the driving circuit 130 and the light emitting device 300, so that the first area AA1 and the second area AA2 can be used for light emitting display.

[0204] The light shielding structure 170 is arranged on one side of the substrate 110, and the light shielding structure 170 encloses a light shielding space 170a, and the driving circuit 130 is located in the light shielding space 170a, which can help to reduce the influence of light on the working stability of the driving circuit 130. For example, the light shielding structure 170 can be used to limit the light from shining on the semiconductor structure 131a of the transistor 131 in the driving circuit 130, so that the transistor 131 can have better working stability, thereby helping to improve the working stability of the display panel 10.

[0205] The first type of signal line 140 and the second type of signal line 150 can be used to connect with the driving circuit 130 and provide signals to the driving circuit 130 to facilitate the working of the driving circuit 130. The first type of signal line 140 and the second type of signal line 150 are at least partially arranged in the second area AA2, and the light shielding structure 170 is provided with a communication opening 170b, and the second type of signal line 150 extends from outside the light shielding space 170a to the light shielding space 170a through the communication opening 170b, and the second type of signal line 150 is connected with at least one driving circuit 130 in the second area AA2, so that the second type of signal line 150 can be used to transmit signals to the driving circuit 130 in the second area AA2.

[0206] The first type of signal line 140 is arranged apart from the driving circuit 130 in the second area AA2, and the first type of signal line 140 is located outside the light shielding space 170a, and the first type of signal line 140 includes a first segment 141 and a second segment 142 located in the second area AA2 and connected with each other, and the first segment 141 is connected with the driving circuit 130 in the first area AA1, and the first type of signal line 140 can be used only to transmit signals to the driving circuit 130 in the first area AA1, that is, the first type of signal line 140 only extends through the second area AA2, but is not used to transmit signals to the driving circuit 130 in the second area AA2. By arranging the first segment 141 between the adjacent light shielding structures 170 in the second area AA2 in the first direction X, the first segment 141 can be connected with the driving circuit 130 in the first area AA1 located between the adjacent second type of signal line 150 in the first direction X.

[0207] By setting the minimum distance between the second segment 142 and the light shielding structure 170 on one side of the first direction X to be smaller than the minimum distance between the second segment 142 and the light shielding structure 170 on the other side of the first direction X, the second segment 142 not directly connected with the driving circuit 130 in the second area AA2 can be offset towards the light shielding structure 170 on one side thereof in the first direction X, which is conducive to forming a compensation capacitor between the second segment 142 and the light shielding structure 170 adjacent thereto, and the compensation capacitor can be approximately or equivalent to the capacitor formed between the second type signal line 150 and other conductive structures in the second area AA2, so that in the second area AA2, the electric field environment around the first type signal line 140 can be approximately the same as the electric field environment around the second type signal line 150, so that in the process of transmitting signals, the working stability of the first type signal line 140 and the second type signal line 150 is approximately the same, which is conducive to improving the display uniformity and working stability of the display panel 10.

[0208] Optionally, the display panel 10 provided by the embodiment of the first aspect of the present application can be the display panel 10 in any of the foregoing embodiments, and thus the display panel 10 provided by the embodiment of the present application can have the structures and advantages of the display panel 10 in any of the foregoing embodiments, which will not be described herein again.

[0209] The display device provided by the embodiment of the second aspect of the present application includes the display panel 10 in any of the foregoing embodiments, and thus the display device provided by the embodiment of the second aspect of the present application has the advantages of the display panel 10 in any of the foregoing embodiments of the first aspect, which will not be described herein again.

[0210] The display device in the embodiments of the present application includes but is not limited to a mobile phone, a personal digital assistant (PDA), a tablet computer, an e-book, a television, an access control, a smart fixed telephone, a console, and other devices with a display function.

[0211] The technical features of the foregoing embodiments can be combined in any manner. To make the description concise, not all possible combinations of the technical features in the foregoing embodiments are described herein, but as long as the combinations of the technical features do not exist contradictions, they should be considered as the scope of the present disclosure.

[0212] The above embodiments only express several implementation manners of the present application, and the description is more specific and detailed, but it should not be understood as a limitation on the scope of the patent. It should be noted that for ordinary skilled persons in the art, without departing from the concept of the present application, several modifications and improvements can be made, which are within the scope of protection of the present application. Therefore, the protection scope of the patent of the present application should be subject to the appended claims.

Claims

1. A display panel, characterized by, The display panel comprises a first region and a second region, and the display panel comprises: a substrate comprising a substrate and a driving circuit, a first type of signal line and a second type of signal line arranged on the same side of the substrate; a light emitting device arranged on one side of the substrate, the driving circuit being connected to the light emitting device, wherein the driving circuit and the light emitting device are arranged in the first region and the second region, the first type of signal line and the second type of signal line are at least partially arranged in the second region, the first type of signal line is arranged apart from the driving circuit in the second region, and the second type of signal line is connected to at least one driving circuit in the second region, the first type of signal line comprises a first segment and a second segment arranged in the second region and connected to each other, the first segment is connected to the driving circuit in the first region, and the first segment is arranged between the driving circuits adjacent in a first direction in the second region, the minimum distance between the second segment and the driving circuit on one side of the first direction is less than the minimum distance between the second segment and the driving circuit on the other side of the first direction.

2. The display panel of claim 1, wherein, The display panel comprises a plurality of circuit groups arranged in the second region, each circuit group comprises at least one driving circuit, the number of circuit groups is a plurality, the plurality of circuit groups are arranged in an array in the first direction and the second direction, and the first type of signal line is arranged around at least part of the circuit groups, wherein the first direction intersects the second direction; Preferably, at least one second type of signal line is connected to at least two adjacent circuit groups in the second direction; Preferably, each circuit group corresponds to a repeated pixel unit group, the repeated pixel unit group comprises a plurality of light emitting devices, and the circuit group comprises a plurality of driving circuits arranged corresponding to the light emitting devices; Preferably, each circuit group comprises three driving circuits; Preferably, each circuit group comprises one driving circuit connected to a light emitting device with a red light emitting color, one driving circuit connected to a light emitting device with a green light emitting color, and one driving circuit connected to a light emitting device with a blue light emitting color.

3. The display panel of claim 2, wherein, The second region comprises an edge region adjacent to the first region and a main region located on the side of the edge region away from the first region in the first direction, the circuit group comprises a first circuit group located in the edge region and a second circuit group located in the main region, and the second segment comprises a first sub-segment arranged around the first circuit group and a second sub-segment arranged around the second circuit group, wherein the first sub-segment extends from one side of the first circuit group in the first direction to the side of the first circuit group close to the second circuit group in the second direction, and / or the second sub-segment extends from one side of the second circuit group in the second direction to the other side of the second circuit group in the second direction via one side of the second circuit group in the first direction. Preferably, the number of the edge regions is two, and the two edge regions are located on two sides of the main region in the second direction; Preferably, the display panel comprises a first circuit row located in the second region, the first circuit row comprises the circuit groups located in the same row in the second direction, and the number of the first circuit groups located in a single edge region in the first circuit row is one; Preferably, the number of the first type of signal lines is at least two, wherein the first segments of the at least two first type of signal lines are adjacent in the first direction and the first sub-segments are located on the same side of the first circuit group in the first direction, and / or, the first segments of the at least two first type of signal lines are adjacent in the first direction and the second sub-segments are located on two sides of the second circuit group in the first direction.

4. The display panel of claim 3, wherein, The first sub-segments and the second sub-segments are at least partially arranged in the same layer; Preferably, the first segments and the first sub-segments are at least partially arranged in different layers, and / or the first segments and the second sub-segments are at least partially arranged in different layers; Preferably, at least part of the first sub-segments are located in a film layer between the first segments and the substrate, and / or at least part of the second sub-segments are located in a film layer between the first segments and the substrate; Preferably, the driving circuit comprises a transistor, the transistor can comprise a semiconductor structure, a gate electrode located on a side of the semiconductor structure away from the substrate, and a source-drain electrode located on a side of the gate electrode away from the substrate, at least part of the first segments are located in a film layer on a side of the source-drain electrode away from the substrate, and / or at least part of the first sub-segments are arranged in the same layer as the gate electrode, and / or at least part of the second sub-segments are arranged in the same layer as the gate electrode; Preferably, the second segments further comprise third sub-segments, the first sub-segments and the second sub-segments adjacent in the second direction are connected through the third sub-segments, and the second sub-segments adjacent in the second direction are connected through the third sub-segments; Preferably, the first segments and the third sub-segments are arranged in the same layer.

5. The display panel of claim 1, wherein, The display panel further comprises a second circuit row and a third circuit row arranged in staggered rows, the second circuit row comprises a part of the driving circuits located in the same row in the second direction in the first region, the third circuit row comprises another part of the driving circuits located in the same row in the second direction in the first region, a single first type of signal line is connected with two driving circuits located on two sides of the second region in the second direction in the second circuit row, and a single second type of signal line is connected with two driving circuits located on two sides of the second region in the second direction in the third circuit row, wherein the first direction intersects with the second direction; Preferably, the second circuit row and the third circuit row are alternately arranged in the first direction.

6. The display panel of claim 1, wherein, The substrate further comprises a light shielding structure arranged on a side of the substrate, the light shielding structure encloses a light shielding space, and the driving circuit is located in the light shielding space; Preferably, the light-shielding structure is provided with a communication opening, and the second type of signal line extends into the light-shielding space from outside the light-shielding space through the communication opening; Preferably, the first type of signal line is located outside the light-shielding space; Preferably, the minimum distance between the second segment and the light-shielding structure on one side of the first direction is smaller than the minimum distance between the second segment and the light-shielding structure on the other side of the first direction; Preferably, a compensation capacitor is formed between adjacent second segments and the light-shielding structure; Preferably, the minimum distance between the second segment and the light-shielding structure is not greater than 6 microns; Preferably, the first type of signal line is partially overlapped with the light-shielding structure on the substrate in the orthogonal projection; Preferably, the light-shielding structure comprises a light-shielding body and a protruding structure arranged on the side of the light-shielding body away from the light-shielding space, and the first type of signal line is partially overlapped with the protruding structure on the substrate in the orthogonal projection; Preferably, a compensation capacitor is formed between adjacent second segments and the protruding structure; Preferably, the driving circuit comprises a transistor, which can comprise a semiconductor structure, a gate electrode located on the side of the semiconductor structure away from the substrate, and a source / drain electrode located on the side of the gate electrode away from the substrate, at least part of the second segment is arranged in the same layer as the gate electrode, and / or at least part of the protruding structure is located in a film layer between the semiconductor structure and the substrate in the substrate, and / or at least part of the protruding structure is located in a film layer between the gate electrode and the source / drain electrode in the substrate; Preferably, the display panel comprises a circuit group located in the second area, and each circuit group comprises at least two driving circuits, and the circuit group is located in the light-shielding space; Preferably, each circuit group comprises one driving circuit connected to the light-emitting device with red light-emitting color, one driving circuit connected to the light-emitting device with green light-emitting color, and one driving circuit connected to the light-emitting device with blue light-emitting color.

7. The display panel of claim 1, wherein, Part of the second type of signal line and another part of the second type of signal line are arranged in different layers in the second area, and part of the first type of signal line and another part of the first type of signal line are arranged in different layers in the second area; Preferably, the first type of signal line in the second area and the second type of signal line in the second area are at least partially arranged in the same layer.

8. The display panel of claim 7, wherein, The second type of signal line comprises third and fourth segments located in the second area and connected to each other, the third and fourth segments are arranged in different layers, and the fourth segment is connected to at least one driving circuit in the second area; Preferably, the fourth segment is connected to the driving circuit in the first area through the third segment, and / or adjacent fourth segments in the second direction are connected through the third segment, wherein the first direction intersects the second direction. Preferably, the fourth segment is located in a film layer of the third segment on the substrate side close to the substrate; Preferably, the driving circuit comprises a transistor, the transistor can comprise a semiconductor structure, a gate electrode on the semiconductor structure side away from the substrate, and a source / drain electrode on the gate electrode side away from the substrate, at least part of the third segment is arranged in the same layer as the source / drain electrode, and / or at least part of the third segment is located in a film layer of the source / drain electrode on the substrate side away from the substrate, and / or at least part of the fourth segment is arranged in the same layer as the gate electrode, and / or at least part of the fourth segment is located in a film layer between the gate electrode and the source / drain electrode on the substrate; Preferably, the substrate further comprises a light shielding structure arranged on the substrate side, the light shielding structure encloses a light shielding space, the light shielding structure is provided with a communication opening, the driving circuit and the fourth segment are located in the light shielding space, and the third segment extends from the light shielding space to the light shielding space through the communication opening.

9. The display panel of claim 8, wherein, The number of the second type of signal lines is multiple, and the third segments of at least two adjacent second type of signal lines are arranged in different layers, and / or the third segments of the first type of signal lines and the second type of signal lines located between adjacent driving circuits in the second area are arranged in different layers; Preferably, the third segments of at least two second type of signal lines at least partially overlap in the orthographic projection on the substrate; Preferably, the orthographic projection of the first type of signal lines on the substrate and the orthographic projection of the third segments of the second type of signal lines on the substrate at least partially overlap in the second area between adjacent driving circuits.

10. The display panel of claim 1, wherein, The display panel further comprises a circuit column comprising the driving circuits in the same column in the first direction in the first area, and the substrate further comprises a third type of signal line, a single third type of signal line is connected with two driving circuits located on both sides of the second area in the first direction in the circuit column, and the third type of signal line is connected with at least one driving circuit in the circuit column; Preferably, the third type of signal line comprises a fifth segment and a sixth segment connected with each other, the orthographic projection of the fifth segment on the substrate and the orthographic projection of the first type of signal line on the substrate partially overlap, the sixth segment is connected with at least one driving circuit in the second area, and the orthographic projection of the sixth segment on the substrate and the orthographic projection of the second type of signal line on the substrate partially overlap, wherein the fifth segment and the first type of signal line are at least partially arranged in different layers, and the sixth segment and the second type of signal line are at least partially arranged in different layers; Preferably, the sixth segment is connected with the driving circuit in the first area through the fifth segment, and / or adjacent sixth segments in the first direction are connected through the fifth segment; Preferably, the sixth segment is connected with the driving circuit in the first area through the fifth segment, and / or adjacent sixth segments in the first direction are connected through the fifth segment; Preferably, the driving circuit comprises a transistor, the transistor can comprise a semiconductor structure, a gate electrode located on a side of the semiconductor structure away from the substrate, and a source / drain electrode located on a side of the gate electrode away from the substrate, at least part of the fifth segment is arranged in the same layer as the source / drain electrode, and / or at least part of the fifth segment is located in a film layer on a side of the source / drain electrode away from the substrate in the substrate, Preferably, the driving circuit comprises a transistor, the transistor can comprise a semiconductor structure, a gate electrode located on a side of the semiconductor structure away from the substrate, and a source / drain electrode located on a side of the gate electrode away from the substrate, at least part of the sixth segment is arranged in the same layer as the source / drain electrode.

11. The display panel of any one of claims 1 to 7, wherein, The light transmittance of the display panel located in the second area is greater than that of the display panel located in the first area. Preferably, the arrangement density of the driving circuit in the second area is less than that in the first area, and / or the arrangement density of the light emitting device in the second area is less than that in the first area.

12. A display panel, characterized by The display panel comprises: a substrate comprising a substrate and a driving circuit, a first type of signal line and a second type of signal line arranged on the same side of the substrate; a light emitting device arranged on a side of the substrate, the driving circuit being connected to the light emitting device, wherein the first area and the second area are both provided with the driving circuit and the light emitting device, and the first type of signal line and the second type of signal line are at least partially arranged in the second area, the first type of signal line is arranged separately from the driving circuit in the second area, and the second type of signal line is connected to at least one of the driving circuits in the second area, part of the second type of signal line and another part of the second type of signal line are arranged in different layers in the second area, and part of the first type of signal line and another part of the first type of signal line are arranged in different layers in the second area.

13. The display panel of claim 12, wherein, The first type of signal line in the second area and the second type of signal line in the second area are at least partially arranged in the same layer.

14. The display panel of claim 12, wherein, The second type of signal line comprises a third segment and a fourth segment located in the second area and connected to each other, the third segment and the fourth segment are arranged in different layers, and the fourth segment is connected to at least one of the driving circuits in the second area; Preferably, the fourth segment is connected to the driving circuit in the first area through the third segment, and / or the fourth segments adjacent in the second direction are connected through the third segment; Preferably, the fourth segment is located in a film layer on a side of the third segment close to the substrate in the substrate. Preferably, the driving circuit comprises a transistor, the transistor can comprise a semiconductor structure, a gate electrode located on a side of the semiconductor structure away from a substrate, and a source / drain electrode located on a side of the gate electrode away from the substrate, at least part of the third segment is arranged in the same layer as the source / drain electrode, and / or at least part of the third segment is located in a film layer in the substrate on a side of the source / drain electrode away from the substrate, and / or at least part of the fourth segment is arranged in the same layer as the gate electrode, and / or at least part of the fourth segment is located in a film layer in the substrate between the gate electrode and the source / drain electrode; Preferably, the substrate further comprises a light shielding structure arranged on a side of the substrate, the light shielding structure encloses a light shielding space, the light shielding structure is provided with a communication opening, the driving circuit and the fourth segment are located in the light shielding space, and the third segment extends from outside the light shielding space to the light shielding space through the communication opening; Preferably, the number of the second type of signal lines is multiple, the third segments of at least two adjacent second type of signal lines are arranged in different layers, and / or the third segments of the first type of signal lines and the second type of signal lines located between adjacent driving circuits in the second area are arranged in different layers; Preferably, the third segments of at least two second type of signal lines at least partially overlap in the orthographic projection on the substrate; Preferably, the orthographic projection on the substrate of the first type of signal lines located between adjacent driving circuits in the second area at least partially overlaps with the orthographic projection on the substrate of the third segments of the second type of signal lines.

15. The display panel of any one of claims 12 to 14, wherein, The first type of signal line comprises a first segment and a second segment located in the second area and connected to each other, the first segment is connected to the driving circuit in the first area, and the first segment is located between the driving circuits adjacent in a first direction in the second area, The minimum distance between the second segment and the driving circuit on one side in the first direction is smaller than the minimum distance between the second segment and the driving circuit on the other side in the first direction.

16. The display panel of claim 15, wherein, The display panel comprises a plurality of circuit groups located in the second area, each circuit group comprises at least one driving circuit, the number of the circuit groups is multiple, the circuit groups are arrayed in the first direction and the second direction, and the first type of signal line is arranged around at least part of the circuit groups, wherein the first direction intersects the second direction; Preferably, at least one second type of signal line is connected to at least two circuit groups adjacent in the second direction; Preferably, each circuit group corresponds to a repeated pixel unit group, the repeated pixel unit group comprises a plurality of light emitting devices, and the circuit group comprises a plurality of driving circuits arranged correspondingly to the light emitting devices; Preferably, each circuit group comprises three driving circuits. Preferably, each of the circuit groups comprises one driving circuit connected with the light emitting device of red light emitting color, one driving circuit connected with the light emitting device of green light emitting color, and one driving circuit connected with the light emitting device of blue light emitting color.

17. The display panel of claim 16, wherein, The second area comprises an edge area adjacent to the first area and a main area located on a side of the edge area away from the first area in the first direction, the circuit groups comprise first circuit groups located in the edge area and second circuit groups located in the main area, the second segments comprise first sub-segments arranged on a side of the first circuit groups and second sub-segments arranged on a side of the second circuit groups, wherein the first sub-segments extend from one side of the first circuit groups in the first direction to a side of the first circuit groups in the second direction close to the second circuit groups, and / or the second sub-segments extend from one side of the second circuit groups in the second direction to another side of the second circuit groups in the second direction via one side of the second circuit groups in the first direction; Preferably, the number of the edge areas is two, and the two edge areas are arranged on two sides of the main area in the first direction; Preferably, the display panel comprises a first circuit row located in the second area, the first circuit row comprises the circuit groups located in the same row in the second direction, and the number of the first circuit groups located in a single edge area in the first circuit row is one; Preferably, the number of the second type of signal lines is at least two, wherein the first segments of the at least two second type of signal lines are adjacent in the first direction and the first sub-segments are arranged on the same side of the first circuit groups in the first direction, and / or the first segments of the at least two second type of signal lines are adjacent in the first direction and the second sub-segments are arranged on two sides of the second circuit groups in the first direction; Preferably, the first sub-segments and the second sub-segments are at least partially arranged in the same layer; Preferably, the first segments and the first sub-segments are at least partially arranged in different layers, and / or the first segments and the second sub-segments are at least partially arranged in different layers; Preferably, at least part of the first sub-segments are located in a film layer between the first segments and the substrate, and / or at least part of the second sub-segments are located in a film layer between the first segments and the substrate; Preferably, the driving circuit comprises a transistor, the transistor can comprise a semiconductor structure, a gate electrode located on a side of the semiconductor structure away from the substrate, and a source-drain electrode located on a side of the gate electrode away from the substrate, at least part of the first segments are located in a film layer on a side of the source-drain electrode away from the substrate, and / or at least part of the first sub-segments are arranged in the same layer as the gate electrode, and / or at least part of the second sub-segments are arranged in the same layer as the gate electrode; Preferably, the second segment further comprises a third sub-segment, the first sub-segment and the second sub-segment adjacent in the second direction are connected through the third sub-segment, and the second sub-segments adjacent in the second direction are connected through the third sub-segment; Preferably, the first segment and the third sub-segment are arranged in the same layer.

18. A display panel, characterized by The display panel comprises a substrate, a light shielding structure, a light emitting device, and a driving circuit. The substrate comprises a substrate and a driving circuit, a first type of signal line, and a second type of signal line arranged on the same side of the substrate. The light shielding structure is arranged on one side of the substrate, and the driving circuit is located in the light shielding space. The light emitting device is arranged on one side of the substrate, and the driving circuit is connected to the light emitting device. The first region and the second region are provided with the driving circuit and the light emitting device, and the first type of signal line and the second type of signal line are at least partially arranged in the second region. The first type of signal line is spaced apart from the driving circuit in the second region, and the first type of signal line is located outside the light shielding space. The light shielding structure is provided with a communication opening, and the second type of signal line extends from outside the light shielding space to inside the light shielding space through the communication opening, and the second type of signal line is connected to at least one driving circuit in the second region. The first type of signal line comprises a first segment and a second segment located in the second region and connected to each other, the first segment is connected to the driving circuit in the first region, and the first segment is located between the light shielding structures adjacent in the first direction in the second region. The minimum distance between the second segment and the light shielding structure on one side of the first direction is less than the minimum distance between the second segment and the light shielding structure on the other side of the first direction, and the adjacent second segments and the light shielding structures form a compensation capacitor.

19. The display panel of claim 18, wherein, The first type of signal line is partially overlapped with the light shielding structure on the substrate. Preferably, the light shielding structure comprises a light shielding body and a protruding structure arranged on the side of the light shielding body away from the light shielding space, and the first type of signal line is partially overlapped with the protruding structure on the substrate. Preferably, the adjacent second segments and the protruding structure form a compensation capacitor. Preferably, the driving circuit comprises a transistor, the transistor can comprise a semiconductor structure, a gate electrode located on the side of the semiconductor structure away from the substrate, and a source-drain electrode located on the side of the gate electrode away from the substrate, at least part of the second segment is arranged in the same layer as the gate electrode, and / or at least part of the protruding structure is located in a film layer between the semiconductor structure and the substrate in the substrate, and / or at least part of the protruding structure is located in a film layer between the gate electrode and the source-drain electrode in the substrate.

20. A display device comprising: The display panel comprises a substrate, a light shielding structure, a light emitting device, and a driving circuit. The substrate comprises a substrate and a driving circuit, a first type of signal line, and a second type of signal line arranged on the same side of the substrate.

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