Permission translator

Abstract

The invention relates to a license translator. Systems, methods, and circuitry are provided for translating permission identifiers in bus access transactions. In one example, a processing system includes a source system element characterized by a plurality of source privilege levels; a destination system element characterized by a plurality of destination privilege levels; and translator circuitry coupled between the source system element and the destination system element. The translation circuitry includes an input and an output. The input is coupled to a source system element that inputs a bus access transaction, where the bus access transaction includes a source permission identifier that indicates a source privilege level. The output is coupled to a destination system element. The output provides a modified bus access transaction in which the source permission identifier is replaced by a destination permission identifier indicating a destination privilege level mapped to the source privilege level.

Description

Technical Field

[0001] This disclosure generally relates to the field of processors and central processing units (CPUs), and more particularly to an access control system for a processing system comprising system elements having different licensing schemes. Background Technology

[0002] Modern microcontroller systems can include heterogeneous CPU types. For example, a microcontroller unit (MCU) on a single die can include many different blocks, which can include different types of CPUs, such as Tricore and RISC-V. These cores may have different and not necessarily compatible licensing schemes. Another example of heterogeneous CPU types in MCUs can be a system-in-package (SIP) architecture, in which the interconnect structure controls access to shared resources by system elements implemented on multiple silicon dies as central processing units (CPUs), processing cores, virtual machines, etc. Attached Figure Description

[0003] Some examples of circuits, devices, and / or methods will be described below as examples only. In this context, reference will be made to the accompanying drawings.

[0004] Figure 1 This is a diagram illustrating an exemplary system-in-package architecture based on various aspects described, in which different system components operate according to different licensing schemes.

[0005] Figure 2 This is a diagram illustrating the processing of bus access transactions using license identifiers with attributes at all system license scheme levels, based on the various aspects described.

[0006] Figure 3 This is an illustration of an exemplary process for bus access transactions using a translator circuit system between system components, according to the various aspects described.

[0007] Figure 4 This is an illustration of an exemplary process for bus access transactions using a translator circuit system between system components, according to the various aspects described.

[0008] Figure 5 This is a block diagram of an exemplary translator circuit system based on various aspects described.

[0009] Figure 6 This is a flowchart outlining exemplary methods for handling bus access transactions according to different licensing schemes, based on the various aspects described.

[0010] Figure 7 This is a flowchart outlining an exemplary method for translating license identifiers in bus access transactions, based on the various aspects described. Detailed Implementation

[0011] This disclosure is described with reference to the accompanying drawings. Similar parts in the various drawings may be designated by similar reference numerals. The drawings are not drawn to scale and are provided only to illustrate this disclosure. For illustrative purposes, several aspects of this disclosure are described below with reference to exemplary applications. Numerous specific details, relationships, and methods are set forth to provide an understanding of this disclosure. This disclosure is not limited to the order of the illustrated actions or events, as some actions may occur in a different order and / or simultaneously with other actions or events. Furthermore, not all illustrated actions or events are required to implement the methods chosen according to this disclosure.

[0012] In systems implementing security-related and / or confidentiality functions, it is often desirable to isolate multiple software entities and control access to security- or confidentiality-related memory or memory-mapped registers on a software entity basis. Shared memory resources may include protection features that allow or block access to the resource based on a license identifier associated with a bus access transaction. The license identifier indicates the privilege level of a given license scheme (e.g., the privilege level User (U) of a RISC-V license scheme).

[0013] As microcontrollers become more complex, different types of central processing units (CPUs) (e.g., ARM, RISC-V, TriCore, etc.) can be integrated into the same microcontroller to improve performance in terms of power consumption, speed, and processing power. Furthermore, when multiple silicon dies are integrated into a single in-system (SIP), these dies can include different types of CPUs, may originate from different vendors, and / or may be taped out at different times.

[0014] Figure 1 This is a block diagram of an architecture 100 with five interconnected system elements, each with a different licensing scheme. A first CPU 110 with a first licensing scheme and a second CPU 120 with a second licensing scheme share access to a peripheral device 160. CPUs 110 and 120 generate bus access transactions, which include requests to read or write data to the peripheral device 160. Access to the peripheral device is controlled based on the privilege levels of all system elements through which the bus access transaction has occurred. Figure 1 As shown, bus access transactions generated by the first CPU 110 and the second CPU 120 are routed to a bridge 150 with a fourth licensing scheme via a local interconnect 140 with a third licensing scheme. The bridge 150 spans between the dies in the architecture. Peripheral device 160 has its own licensing scheme.

[0015] Different types of CPUs often have different and incompatible licensing schemes. Figure 1In the example, the first CPU 110 has four different privilege levels: Virtual Machine (VM) 0, VM 1, VM 2 with Protected Register Set (PR) 0, and VM 2 with PR 1. The second CPU includes four privilege levels: Machine (M), Supervisor (S), User (U), and Insecure Mode (NS). The interconnect 140 has two privilege levels: IC1 and IC2. The bridge 150 has privilege levels BRG0 and BRG1. Peripheral device licensing schemes define which system elements have read access to shared resources and which system elements have write access to shared resources. These different types of read or write access are referred to herein as privilege or license levels and are indicated by license identifiers.

[0016] exist Figure 1 As can be seen, the number of potentially incompatible licensing schemes can increase rapidly as architectures become more complex. When multiple dies are combined to share or bridge common interconnects, privilege-level-based access protection must be maintained across the multi-die system. Access control mechanisms implemented in multi-die architectures should be able to handle system components (e.g., CPUs, interconnects, bridges, peripherals, etc.) with incompatible licensing schemes. Preferably, such a mechanism will allow for upgrades and additions of system components without requiring a redesign for licensing scheme alignment. Furthermore, in some systems, certain subsystems are used by only a limited number of software entities, and implementing full access protection for these subsystems can result in high costs in terms of configuration area.

[0017] This paper describes a system and method for translating license identifiers between different licensing schemes. A translator circuit system can be placed at the boundary between source system elements and destination system elements to replace the source license identifier encoded in a bus access transaction with a destination license identifier that indicates the privilege level of the destination license scheme. This destination license identifier is understood by the destination device without modifying the destination device's license scheme. This allows for seamless license / privilege protection across the entire system.

[0018] Figure 2 The illustration depicts the processing of a bus access transaction generated by a first CPU 110 with privilege level VM2 / PR1 and directed to a peripheral device 160. The bus access transaction is carried by interconnect 140, which carries data associated with multiple fields of the bus access transaction. These fields include data indicating, for example, the source, destination (such as a memory or register location), read or write command, and a license identifier 130. Figure 2The example illustration illustrates a licensing scheme extension technique in which the license identifier for a bus access transaction is extended to include fields representing privilege level identifiers of all system elements through which the bus access transaction can pass. Therefore, the license identifier 130 has two fields for encoding the virtual machine and protection group registers of the first CPU 110, four fields for encoding the four different privilege levels (M, S, U, NS) of the second CPU 120, and one field (CPU) indicating which CPU is the source of the bus access transaction. The field values ​​are initially set to default values, which are indicated as X.

[0019] When a second virtual machine associated with the second register group of the first CPU 110 generates a bus access transaction, the interconnect 140 sets the values ​​in the first two fields of the license identifier 130 to indicate VM2 / PR0 and sets the value in the third-to-last field to indicate CPU1. Based on the value of the license identifier 130, the access protection unit of the peripheral device 160 controls access to the peripheral device.

[0020] Using the license identifier extension technique, the physical configuration of interconnect 140 (e.g., the number of conductors) is based on the number of license identifier fields. As the number of incompatible licensing schemes in the system increases, the size of the license identifiers and the corresponding interconnect resources required to carry them also increases. Additionally, the access protection unit of peripheral device 160 can map each possible combination of license identifier field values ​​to configuration bits, indicating whether access will be granted or denied. In the illustrated example, there are 192 possible values ​​for the license identifier. This adds complexity to the initial configuration of the access protection unit and the processing performed by it. Another drawback of the license identifier extension technique is that it does not provide the flexibility to add system elements or privilege levels, as such modifications could lead to system-wide revisions of the common bus architecture. Furthermore, rarely used system elements will have rarely used dedicated license identifier fields, but have corresponding bus resources throughout the system.

[0021] Figure 3The illustration depicts an exemplary system architecture 300 with translator circuit systems 315, 345 mounted at boundaries between system components. In some examples, the translator circuit systems include multiplexers or lookup tables. Each translator circuit system maps each source license identifier, indicating a privilege level of a source license scheme, to a destination license identifier, indicating a privilege level of a destination license scheme. The destination privilege level mapped to a given source privilege level provides appropriate (e.g., equivalent) read or write access to peripheral devices. One or more configuration entities 305 may be used to set the mappings in each translator circuit system. As the system hardware evolves, configuration entities 305 and translator circuit systems 315, 345 may be adapted to change the source license identifiers and destination license identifiers mapped by a particular translator circuit system. As the system software evolves, configuration entity 305 may be used to change the destination license identifier mapped to a given source license identifier, and vice versa.

[0022] exist Figure 3 In this example, a bus access transaction is generated by a first CPU 110 with privilege level VM2 / PR1 and directed to peripheral device 160. The first CPU 110 encodes privilege level VM2 PR1 in a license identifier 330(1), which in this example is referred to as the source license identifier because its value is set according to the licensing scheme of the source of the bus access transaction. A translator circuit system 315 is coupled between the first CPU 110 and interconnect 140. The translator circuit system 315 is configured to replace the source license identifier 330(1) with a destination license identifier 330(2) (e.g., IC2) mapped to the source license identifier.

[0023] Note that this substitution of the source license identifier with the destination license identifier can be distinguished from... Figure 2 The extended technique illustrated in the diagram does not have a separate field or bus conductor associated with the destination license identifier. Instead, the value encoded for the source license identifier is changed to encode the destination license identifier. In other words, when a bus access transaction is received by the interconnect, the source license identifier is no longer encoded in or carried by the license identifier. The same bus resources are used to carry license identifiers from all licensing schemes in the system.

[0024] exist Figure 3In one example, the translator circuitry replaces a license identifier encoded with a privilege level of the source license scheme (e.g., VM2 / PR1) with a license identifier encoded with a privilege level of a specific source license scheme (e.g., IC). In other examples, the translator circuitry may map the source license identifier to an arbitrary, default, or general privilege level indicator, such as an integer value selected from a set of integer values ​​that is interpreted by the destination system elements as indicating a privilege level. In some examples, the arbitrary, default, or general privilege level indicator may be a system-wide indicator, interpreted by all system elements as indicating a certain privilege level.

[0025] Interconnect 140 receives a bus access transaction with a destination license identifier 330(2) and is able to process the bus access transaction based on its own privilege level IC2 without needing to interpret the license identifier generated by the first CPU. Interconnect 140 outputs the bus access transaction with license identifier 330(2) (now, source license identifier) ​​to translator circuitry 345. Translator circuitry 345 replaces the source license identifier indicating IC2 with a destination license identifier 330(3) indicating BRG1. Bridge 150 outputs the bus access transaction with license identifier 330(3) to peripheral device 160. Based on the value of license identifier 330(3), the peripheral device's access protection controls access to its resources; in this example, license identifier 330(3) may have one of two values, BRG0 or BRG1. Recall that in Figure 2 In extended technologies, the license identifier has many more values ​​that need to be interpreted by the protection unit of the peripheral device.

[0026] Figure 4 The diagram illustrates a multi-die architecture 400 in which a primary die 410 and a companion die 420 are connected by a bridge 450. In architecture 400, the translator circuitry is not placed at each boundary between system elements within the architecture. Instead, system elements in independent groups (e.g., system elements in the primary die 410 or companion die 420) can communicate with each other without permission to translate. Translation circuitry can be placed at the boundaries between these groups or domains to simplify the integration of architecture 400.

[0027] exist Figure 4 In the example, the primary die 410 communicates with the rest of architecture 400 via interconnects according to a licensing scheme with four privilege levels (PM0-PM3). The accompanying die 420 communicates with the rest of the architecture via interconnects according to a licensing scheme with three privilege levels (PC0-PC2). The bridge 450 operates according to a licensing scheme with two privilege levels (PB0, PB1). Access protection on the bridge prevents PM1, PM3, PC0, and PC2 from entering the bridge.

[0028] Two translator circuit systems are mounted at each boundary between bridge 450 and die 410 or 420. (As will be...) Figure 5 As described in more detail below, each translator circuit system includes a license control register (P_CTL), each license control register being mapped to a source license identifier. For example, the license control register selected by the source license identifier PB0 in translator circuit system 474 is indicated as P_CTL_PB0. Each license control register stores a destination license identifier, which is mapped to its associated source license identifier. The license register P_CTL_PB0 in translator circuit system 474 stores the destination (primary die) license identifier PM3. The license control register P_CTL_PB1 of bridge privilege level PB1 also stores the destination license identifier PM3. This license control register is shown in gray because in this particular example, no bus access transaction from companion die 420 to primary die 410 will include the license identifier PB1.

[0029] Translation circuit system 472 includes a permission control register for each of the four privilege levels of the main die. Each permission control register stores a bridge permission identifier, which is mapped to its associated main die permission identifier. The permission control registers for PM1 and PM3 are shown in gray because, in this particular example, bus access transactions including those permission identifiers are prohibited from entering bridge 450 by access protection associated with the bridge. Translation circuit system 476 includes a permission control register for each bridge privilege level. It can be seen that in translation circuit system 476, bridge privilege level PB0 is mapped to the associated die privilege level PC0, and bridge privilege level PB1 is mapped to the associated die privilege level PC2.

[0030] Translation circuitry 478 includes a license control register for each of the three privilege levels accompanying the die. Each license control register stores a bridge license identifier, which is mapped to its associated accompanying die license identifier. The license control registers for PC0 and PC2 are shown in gray because, in this particular example, bus access transactions including those license identifiers are prohibited from entering bridge 450 due to access protection associated with the bridge.

[0031] Bus access transactions from the primary die indicating privilege level PM0 are translated by translator circuitry 472 into bus access transactions indicating privilege level PB0, and bus access transactions indicating privilege level PM2 are translated into bus access transactions indicating privilege level PB1. Translator circuitry 476 translates bus access transactions from the bridge output indicating privilege level PB0 into bus access transactions indicating privilege level PC0, and bus access transactions indicating privilege level PB1 are translated into bus access transactions indicating privilege level PC2. In this manner, the primary die privilege level PM0 is translated into the accompanying die privilege level PC0, and privilege level PM2 is translated into PC2.

[0032] Bus access transactions from the accompanying die indicating privilege level PC1 are translated by translator circuitry 478 into bus access transactions indicating privilege level PB0. Translator circuitry 474 translates bus access transactions from the bridge output indicating privilege level PB0 into bus access transactions indicating privilege level PM3. In this way, the accompanying die privilege level PC1 is translated into the primary die privilege level PM3.

[0033] If privileged schemes for system components on the corresponding die have already been integrated, the translator circuitry may not be usable within the main die 410 or the accompanying die 420. Values ​​stored in the permission control registers of translator circuitry systems 472 and 474 can be set by the software designer integrating the main die 410 into architecture 400. Values ​​stored in the permission control registers of translator circuitry systems 476 and 478 can be set by the software designer integrating the accompanying die 420 into architecture 400.

[0034] For example, a software designer integrating the primary die 410 into the architecture only needs to configure the mapping between the primary die privilege level and the bridge privilege level. This is achieved by storing the appropriate license identifier in the license control register of the translation circuit systems 472, 474. The software designer can then inform the software designer integrating the companion die 420 which peripheral devices should be allowed access at privilege level PB0 or ​​PB1. The primary die software designer does not need to know which specific companion die privilege level will complete the appropriate peripheral device access.

[0035] Figure 5The illustrated exemplary translator circuit system 515 includes a set of license control registers 522 and a selector circuit system 525. Each license control register is connected to a different input of the selector circuit system 525. Based on a given source license identifier value received at the selector input of the selector circuit system, a particular license control register is selected or addressed by the selector circuit system 525. When the source system element is designed or integrated into the SIP, the source license identifier value for selecting each license control register can be configured individually. The source license identifiers mapped to the license control registers can cover all possible source license identifier values. In the illustrated example, the source system element has three different source license identifier values. The translator circuit system 515 may include any number N license control registers, such as Figure 5 As shown, some of these permission control registers may not be used in every implementation of the translator circuit system 515.

[0036] Destination license identifiers are stored in each license control register. To complete the mapping from source license identifier x to destination license identifier y, destination license identifier y is stored in the license control register selected by source license identifier x. In the illustrated example, there are two distinct destination license identifiers. Source license identifier (1) is mapped to destination license identifier (1), and source license identifiers (2) and (3) are mapped to destination license identifier (2). Therefore, destination license identifier (1) is stored in license control register 522a selected by source license identifier (1). Destination license identifier (2) is stored in license control registers 522b and 522c selected by source license identifier (2) and source license identifier (3), respectively. The destination license identifiers stored in the selected license control registers are output by the selector circuitry.

[0037] Based on the system element to which the permission control register 522 is connected, the permission control register 522 can be memory-mapped and access-protected. For example, the permission control register of the translator circuit system 315 can be memory-mapped to be associated with interconnect 140, thereby restricting access to the permission control register to entities that can access the memory associated with the interconnect. Some constraints can be placed on the values ​​that can be stored in the permission control register 522. For example, a value stored in the permission register can be compared with a set of all possible permission control identifiers, and if the value is not an element of that set, an error can be flagged and / or the value can be prevented from being written to the permission control register.

[0038] Configuration entity 505 is configured to populate license control register 522 with an appropriate destination license identifier. In some examples, this configuration is a hypervisor or other trusted software entity. In some examples, the license control register includes an access protection circuitry 529 that evaluates the license identifier in the license control register setting transaction 507 presented by configuration entity 505. Access protection circuitry 529 can enforce authorization criteria for changing the contents of the license control register. For example, to change the contents of the license control register, the configuration entity must have a higher privilege level than indicated by the source license identifier that selected the license control register.

[0039] When a bus access transaction is input to translator circuitry 515, selector circuitry 525 is controlled by the source license identifier in the bus access transaction to output a destination license identifier. In some examples, a physical conductor associated with the bus or interconnect is connected to the input of translator circuitry 515, and the value carried by that conductor (e.g., the mapped destination license identifier) ​​is selected by a license control register carried by a bus conductor connected to the output of translator circuitry 515.

[0040] Figure 6 This is a flowchart of method 600 for processing bus access transactions, which originate from a source system element with a source licensing scheme and are received by a destination system element with a destination licensing scheme for processing. System elements include a CPU, interconnects, bridges, and any other means capable of processing bus access transactions. Method 600 may be derived from... Figure 3 System architecture 300 or Figure 4 The system architecture 400 is executed. The method includes: at 610, receiving a bus access transaction from a source system element. This reception may be performed by a bus or interconnect-related conductor carrying a bit value corresponding to the bus transaction. The bus access transaction includes a source license identifier indicating a source license identifier. The bits corresponding to the source license identifier may be carried by a subset of the bus or interconnect-related conductors.

[0041] The method includes: at 620, selecting a destination license identifier based on a mapping between a corresponding source license identifier and a corresponding destination license identifier. This selection may be made by a translator circuit system (e.g., Figure 5 The method is performed by the circuit system 515 or any other mapping device including a multiplexer or lookup table. The method includes, at 630, providing a modified bus access transaction, including a selected destination license identifier, to the destination system element.

[0042] In some examples, the method includes replacing the source license identifier with a selected destination license identifier in a modified bus access transaction. In some examples, the destination license identifier is a set of arbitrarily chosen integers, each integer indicating a specific type of read or write access. In some examples, the destination license identifier is a set of license identifiers associated with a destination system element.

[0043] Figure 7 This is a flowchart outlining an exemplary method 700 for translating license identifiers in bus access transactions. The method may be, for example, derived from... Figure 5 The translator circuitry 515 executes the method. In other examples, the method can be executed by the processor executing stored instructions. Method 700 includes: at 710, providing a mapping of corresponding destination license identifiers and corresponding source license identifiers. This mapping can be provided by storing the corresponding destination license identifiers in corresponding license control registers, wherein each license control register is associated with a source license identifier. In some examples, method 700 includes: protecting each license control register from modification by license control register setting transactions that include license identifiers indicating a lower or equivalent privilege level compared to the source license identifier associated with that license control register.

[0044] In 720, the source permission identifier for the bus access transaction is received. This operation can be performed by selector circuitry systems (such as multiplexers, see example...) Figure 5 Execution of 525). The source identifier can be input at the selector input of the selector circuitry, which selects one of the permission control registers.

[0045] In 730, a bus access transaction including a modified destination license identifier is provided. The destination license identifier is mapped to a source license identifier. The destination license identifier provided in 730 may be a destination license identifier stored in a license control register selected by a source license identifier input to a selector circuit system. In some examples, the method includes replacing the source license identifier with the destination license identifier in the bus access transaction.

[0046] As the preceding description demonstrates, the publicly available systems, methods, and circuitry allow for seamless translation between license schemes with varying levels of privilege. Systems can be partitioned into different domains, and changes to the license scheme within one domain do not affect the implementation of other domains. This allows for area optimization. System integrators only need to configure the translator circuitry using the license identifiers of their system components and the license identifiers of system components directly adjacent to them. Each system integrator no longer needs to know all the license schemes in the entire system. This allows for reduced complexity for system integrators.

[0047] Example

[0048] Example 1 is a processing system comprising: a source system element characterized by a plurality of source privilege levels; a destination system element characterized by a plurality of destination privilege levels; and a translator circuit system coupled between the source system element and the destination system element. The translator circuit system includes an input and an output. The input is coupled to the source system element of an input bus access transaction, wherein the bus access transaction includes a source license identifier indicating a source privilege level. The output is coupled to the destination system element. The output provides a modified bus access transaction in which the source license identifier is replaced by a destination license identifier indicating a destination privilege level mapped to the source privilege level.

[0049] Example 2 includes the subject matter of Example 1, including or omitting optional elements, wherein the translator circuit system includes a multiplexer or a lookup table.

[0050] Example 3 includes the subject matter of Example 1, including or omitting optional elements, wherein the translator circuitry includes: a plurality of license control registers, each license control register associated with a source license identifier and configured to store a destination license identifier; and a selector circuitry. The selector circuitry includes: an output coupled to the destination system element, the output being configured to provide the destination license identifier for the bus access transaction; a plurality of corresponding selection inputs coupled to a respective license control register among the plurality of license control registers; and a selection input coupled to the source system element, the selection input being configured to receive the source license identifier for the bus access transaction.

[0051] Example 4 includes the subject matter of Example 3, including or omitting optional elements, wherein each license control register includes an access protection circuitry that protects against modification by a license control register setting transaction, the license control register setting transaction including a license identifier indicating a lower or equivalent privilege level compared to a source license identifier associated with the license control register.

[0052] Example 5 includes the subject of any one of Examples 1-3, including or omitting optional elements, wherein the destination license identifier belongs to a set of arbitrarily chosen integers, each of which indicates a specific type of read or write access.

[0053] Example 6 includes the subject of any one of Examples 1-3, including or omitting optional elements, wherein the destination license identifier belongs to a set of license identifiers associated with the destination system element.

[0054] Example 7 is a method comprising: receiving a bus access transaction from a source system element, the bus access transaction including a source license identifier; selecting a destination license identifier based on a mapping between a corresponding source license identifier and a corresponding destination license identifier; and providing a modified bus access transaction including the selected destination license identifier to the destination system element.

[0055] Example 8 includes the subject of Example 7, including or omitting optional elements, including: in a modified bus access transaction, replacing the source license identifier with a selected destination license identifier.

[0056] Example 9 includes the subject of any one of Examples 7-8, including or omitting optional elements, wherein the destination license identifier belongs to a set of arbitrarily selected integers, each of which indicates a particular type of read or write access.

[0057] Example 10 includes the subject matter of any one of Examples 7-8, including or omitting optional elements, wherein the destination license identifier belongs to a set of license identifiers associated with the destination system element.

[0058] Example 11 is a translator circuit system comprising: a plurality of license control registers, each license control register associated with a different source license identifier and configured to store a destination license identifier; and a selector circuit system. The selector circuit system comprises: an output configured to couple to a destination system element, the output being configured to provide the destination license identifier for a bus access transaction; a plurality of corresponding inputs coupled to corresponding license control registers among the plurality of license control registers; and a selection input configured to couple to a source system element, the selection input being configured to receive the source license identifier for the bus access transaction.

[0059] Example 12 includes the subject matter of Example 11, including or omitting optional elements, wherein each license control register includes an access protection circuitry that protects against modification by a license control register setting transaction, the license control register setting transaction including a license identifier indicating a lower or equivalent privilege level compared to the source license identifier that selects the license control register.

[0060] Example 13 includes the subject of any one of Examples 11-12, including or omitting optional elements, wherein the destination license identifier belongs to a set of arbitrarily chosen integers, each of which indicates a particular type of read or write access.

[0061] Example 14 includes the subject matter of any one of Examples 11-12, including or omitting optional elements, wherein the destination license identifier belongs to a set of license identifiers associated with the destination system element.

[0062] Example 15 is a method comprising: providing a mapping of a corresponding destination license identifier and a corresponding source license identifier; receiving a source license identifier of a bus access transaction; and providing a bus access transaction including a modified destination license identifier, wherein the destination license identifier is mapped to the source license identifier.

[0063] Example 16 includes the subject matter of Example 15, including or omitting optional elements, including: in a modified bus access transaction, replacing the source license identifier with the destination license identifier.

[0064] Example 17 includes the subject of Example 15, including or omitting optional elements, including: providing the mapping by storing the corresponding destination license identifier in the corresponding license control register, wherein each license control register is associated with a source license identifier.

[0065] Example 18 includes the subject matter of Example 17, including or omitting optional elements, including: protecting each license control register from modification by a license control register setting transaction, the license control register setting transaction including a license identifier indicating a lower or equivalent privilege level compared to a source license identifier associated with the license control register.

[0066] Example 19 includes the subject of any one of Examples 15-18, including or omitting optional elements, wherein the destination license identifier belongs to a set of arbitrarily chosen integers, each of which indicates a particular type of read or write access.

[0067] Example 20 includes the subject matter of any one of Examples 15-18, including or omitting optional elements, wherein the destination license identifier belongs to a set of license identifiers associated with the destination system element receiving the modified bus access transaction.

[0068] In this description and the appended claims, the term "determine" used with reference to an entity (e.g., parameter, variable, etc.) when describing method steps or functions should be interpreted broadly. For example, "determine" should be interpreted to cover, for example, receiving and parsing communications that encode an entity or the value of an entity. "Determine" should be interpreted to cover accessing and reading memory (e.g., lookup table, register, device memory, remote memory, etc.) that stores an entity or the value of an entity. "Determine" should be interpreted to cover calculating or obtaining the value of an entity or entity based on other quantities or entities. "Determine" should be interpreted to cover any manner of deriving or identifying the value of an entity or entity.

[0069] As used herein, when referring to an entity or the value of an entity, the term "identify" should be interpreted broadly to cover any manner in which an entity or the value of an entity is determined. For example, the term "identify" should be interpreted to cover, for instance, receiving and parsing communications that encode the value of an entity or entity. The term "identify" should be interpreted to cover accessing and reading memory (e.g., device queue, lookup table, register, device memory, remote memory, etc.) that stores the value of an entity or entity.

[0070] As used herein, when referring to an entity or the value of an entity, the term “encoding” should be interpreted broadly to encompass any means or techniques used to generate a sequence of data or signals that transmit an entity to another component.

[0071] As used herein, when referring to an entity or entity value, the term "selection" should be broadly interpreted to encompass any manner of determining an entity or entity value from a range of possible selections. For example, the term "selection" should be interpreted to encompass accessing and reading memory (e.g., lookup table, register, device memory, remote memory, etc.) that stores entity or entity values ​​and returning an entity or entity value from the stored entity or entity values. The term "selection" should be interpreted to apply one or more constraints or rules to a set of input parameters to determine a suitable entity or entity value. The term "selection" should be interpreted broadly to encompass any manner of selecting an entity based on one or more parameters or conditions.

[0072] As used herein, the term "obtain" should be interpreted broadly when used with reference to an entity or the value of an entity. "Obtain" should be interpreted to encompass accessing and reading memory (e.g., lookup table, register, device memory, remote memory, etc.) that stores an initial or underlying value and performing processing and / or logical / mathematical operations on one or more values ​​to produce the obtained entity or the value of the entity. The term "obtain" should be interpreted to encompass calculating or deriving the value of an entity or entity based on other quantities or entities. The term "obtain" should be interpreted to encompass any manner in which the value of an entity or entity is derived or identified.

[0073] As used herein, when referring to an entity (e.g., a parameter or setting) or the value of an entity, the term "indicator" should be interpreted broadly to cover any manner in which an entity or the value of an entity is explicitly or implicitly transmitted. For example, bits within a transmitted message may be used to explicitly encode the value of the indication, or may be used to encode an index or other indicator mapped to the value of the indication through prior configuration. The absence of a field within a message may implicitly indicate the value of an entity based on prior configuration.

[0074] As used herein, when referring to information or data or signals encoding data, the term "provide" should be interpreted broadly to cover any manner in which information, data, or signals encoding data are explicitly or implicitly transmitted. "Provide" should be interpreted to cover messages that transmit instruction information or data, storing information or data in a memory accessible to the recipient of the provision, electrical signals on conductors in control circuits to encode information or data, and so on.

[0075] While specific embodiments / examples / aspects have been illustrated and described herein, those skilled in the art will understand that various alternatives and / or equivalent implementations may replace the specific examples shown and described without departing from the scope of the invention. This application is intended to cover any modifications or variations of the specific examples discussed herein. Therefore, the invention is intended to be limited only by the claims and their equivalents.

[0076] It should be noted that the examples outlined in this document can be used independently or in combination with other methods and systems disclosed herein. Furthermore, features outlined in the context of the apparatus also apply to the corresponding methods, and vice versa. Additionally, all aspects of the methods and apparatus outlined in this document can be combined arbitrarily. In particular, the features of the claims can be combined with each other in any manner.

[0077] It should be noted that this description and accompanying drawings are merely illustrative of the principles of the proposed methods and systems. Those skilled in the art will be able to implement various arrangements, which, while not explicitly described or shown herein, embody the principles of the invention and are included within the spirit and scope of the invention. Furthermore, all examples and embodiments outlined in this document are primarily intended for illustrative purposes only to aid the reader in understanding the principles of the proposed methods and systems. Additionally, all statements herein providing the principles, aspects, and embodiments of the invention, as well as specific examples of the invention, are intended to cover their equivalents.

Claims

1. A processing system, comprising: Source system components, characterized by multiple source privilege levels; Destination system elements, characterized by multiple destination privilege levels; and A translator circuit system, coupled between the source system element and the destination system element, includes: Input, coupled to the source system element of the input bus access transaction, the bus access transaction including a source license identifier indicating the source privilege level; and The output, coupled to the destination system element, provides a modified bus access transaction in which the source license identifier is replaced by a destination license identifier, the destination license identifier indicating a destination privilege level mapped to the source privilege level.

2. The processing system of claim 1, wherein the translator circuitry includes a multiplexer or a lookup table.

3. The processing system of claim 1, wherein the translator circuit system comprises: Multiple license control registers, each associated with a source license identifier, are configured to store a destination license identifier; and The selector circuit system includes: The output, coupled to the destination system element, is configured to provide the destination license identifier for the bus access transaction; Multiple corresponding selection inputs are coupled to corresponding permission control registers in the multiple permission control registers; and A selection input, coupled to the source system element, is configured to receive the source license identifier of the bus access transaction.

4. The processing system of claim 3, wherein each license control register includes an access protection circuitry system that protects against modification by a license control register setting transaction, the license control register setting transaction including a license identifier indicating a lower or equivalent privilege level compared to a source license identifier associated with the license control register.

5. The processing system of claim 1, wherein the destination permission identifier belongs to a set of arbitrarily selected integers, each of which indicates a specific type of read or write access.

6. The processing system of claim 1, wherein the destination license identifier belongs to a set of license identifiers associated with the destination system element.

7. A method comprising: Receive bus access transactions from source system components, the bus access transactions including source license identifiers; Select the destination license identifier based on the mapping between the corresponding source license identifier and the corresponding destination license identifier; and Provide the modified bus access transaction, including the selected destination license identifier, to the destination system element.

8. The method of claim 7, comprising: In the modified bus access transaction, the source license identifier is replaced with the selected destination license identifier.

9. The method of claim 7, wherein the destination license identifier belongs to a set of arbitrarily selected integers, each of which indicates a specific type of read or write access.

10. The method of claim 7, wherein the destination license identifier belongs to a set of license identifiers associated with the destination system element.

11. A translator circuit system, comprising: Multiple license control registers, each associated with a different source license identifier and configured to store a destination license identifier; and The selector circuit system includes: The output, configured to be coupled to a destination system element, is configured to provide the destination license identifier for a bus access transaction; Multiple corresponding inputs are coupled to corresponding permission control registers in the multiple permission control registers; and The selection input, configured to be coupled to a source system element, is configured to receive a source license identifier for the bus access transaction.

12. The translator circuitry of claim 11, wherein each license control register includes an access protection circuitry that protects against modification by a license control register setting transaction, the license control register setting transaction including a license identifier indicating a lower or equivalent privilege level compared to a source license identifier that selects the license control register.

13. The translator circuit system of claim 11, wherein the destination permission identifier belongs to a set of arbitrarily selected integers, each of which indicates a specific type of read or write access.

14. The translator circuit system of claim 11, wherein the destination license identifier belongs to a set of license identifiers associated with the destination system element.

15. A method comprising: Provide a mapping between the corresponding destination license identifier and the corresponding source license identifier; Receive the source permission identifier for the bus access transaction; and Provide a modified bus access transaction that includes a destination license identifier, wherein the destination license identifier is mapped to the source license identifier.

16. The method of claim 15, comprising: In the modified bus access transaction, the destination license identifier is used to replace the source license identifier.

17. The method of claim 15, comprising: The mapping is provided by storing the corresponding destination license identifier in the corresponding license control register, where each license control register is associated with the source license identifier.

18. The method of claim 17, comprising: Protect each license control register from modification by license control register setting transactions, which include license identifiers indicating a lower or equivalent privilege level compared to the source license identifier associated with the license control register.

19. The method of claim 15, wherein the destination license identifier belongs to a set of arbitrarily selected integers, each integer indicating a specific type of read or write access.

20. The method of claim 15, wherein the destination license identifier belongs to a set of license identifiers associated with the destination system element receiving the modified bus access transaction.

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