Semiconductor circuit

Abstract

The invention belongs to the technical field of semiconductors, and discloses a semiconductor circuit which comprises a substrate, a chip function layer and a plurality of movable pin assemblies. The two sides of the substrate are respectively provided with a plurality of bonding pads. The movable pin assembly comprises a first pin, a second pin and a third pin, the first end of the first pin is connected with the bonding pad, the second end of the first pin is movably connected with the first end of the second pin, and the second end of the second pin is movably connected with the first end of the third pin. According to the semiconductor circuit, through the arrangement of the movable pin assembly, the position of the semiconductor circuit can be flexibly adjusted through the movable pin assembly when the semiconductor circuit is installed on the electric control board, the pin welding position of the electric control board does not need to be changed, and the design flexibility of the electric control board is improved; and meanwhile, the pins are detachably connected, repeated soldering iron operation is not needed during replacement, the replacement efficiency is improved, and meanwhile the electric control board is prevented from being damaged.

Description

Technical Field

[0001] This invention belongs to the field of semiconductor technology, and specifically relates to a semiconductor circuit. Background Technology

[0002] Existing semiconductor circuits are typically wave-soldered onto control boards. After soldering, the pins of the semiconductor circuits are fixedly connected to the control board and cannot be moved. When the control board needs to change the mounting position of the original semiconductor circuits due to circuit layout changes, the pin mounting positions on the control board must be changed. This involves significant modifications to the control board circuitry, limiting design flexibility. Furthermore, when conducting verification tests on different solutions within the semiconductor circuitry on the same control board, existing technologies require removing the original semiconductor circuit from the control board with a soldering iron, then soldering it again to replace it with the new semiconductor circuit. This is not only inefficient but also prone to damaging the plating at the pin solder joints due to repeated high-temperature soldering, ultimately rendering the control board unusable. Summary of the Invention

[0003] The present invention aims to improve at least one technical problem in the prior art.

[0004] This invention provides a semiconductor circuit, comprising: A substrate, one side of which is used as the arrangement surface, and several pads are provided on both sides of the substrate; A chip functional layer is disposed on the arrangement surface and electrically connected to each of the pads; A plurality of movable pin assemblies, the movable pin assembly including a first pin, a second pin and a third pin, wherein a first end of the first pin is connected to the pad, a second end of the first pin is detachably and movably connected to the first end of the second pin, and a second end of the second pin is detachably and movably connected to the first end of the third pin.

[0005] The beneficial effects of the present invention are as follows: The semiconductor circuit of the present invention, through the setting of the movable pin assembly, allows the semiconductor circuit to be flexibly adjusted in position on the control board without changing the pin soldering positions of the control board, thus improving the flexibility of the control board design; at the same time, the pins are detachably connected, eliminating the need for repeated soldering operations during replacement, improving replacement efficiency and avoiding damage to the control board.

[0006] Furthermore, the second end of the first pin is hinged to the first end of the second pin via a first hinge mechanism, and the second end of the second pin is hinged to the first end of the third pin via a second hinge mechanism.

[0007] Furthermore, the rotation axes of the first hinge mechanism and the second hinge mechanism are parallel, and the rotation axes are perpendicular to the substrate.

[0008] Furthermore, the first hinge mechanism and the second hinge mechanism include a screw and a nut. The second end of the first pin, the first end of the second pin, the second end of the second pin, and the first end of the third pin are respectively provided with through holes perpendicular to the direction of the substrate. The screw passes through the through holes of two adjacent pins and is threadedly connected to the nut.

[0009] Furthermore, the through hole is a countersunk hole, which is used to accommodate the head of the screw and the nut.

[0010] Furthermore, several of the aforementioned pads are spaced apart.

[0011] Furthermore, an insulating layer is provided on the arrangement surface.

[0012] Furthermore, the chip functional layer includes a circuit wiring layer and a circuit component assembly. The circuit wiring layer is disposed on the insulating layer and is electrically connected to each of the pads. The circuit component assembly is disposed on the circuit wiring layer and is electrically connected to the circuit wiring layer.

[0013] Furthermore, a green solder mask layer is provided on the circuit wiring layer, which is used to protect the circuit wiring layer.

[0014] Furthermore, the semiconductor circuit also includes a molding compound that covers the chip functional layer, and the second end of the first pin extends out of the molding compound. Attached Figure Description

[0015] The above and / or additional aspects and advantages of the present invention will become apparent and readily understood from the description of the embodiments taken in conjunction with the following drawings, in which: Figure 1 This is a schematic diagram of the structure of a semiconductor circuit according to one embodiment; Figure 2 for Figure 1 Enlarged view of point A in the middle; Figure 3 This is a top view of a semiconductor circuit according to one embodiment.

[0016] In the attached diagram: 100-substrate; 101-pad; 200-insulating layer; 300-circuit wiring layer; 401-first pin; 402-second pin; 403-third pin; 501-screw; 502-nut; 600-component; 700-wire; 800-molding enclosure. Detailed Implementation

[0017] Embodiments of the present invention are described in detail below. Examples of these embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the present invention, and should not be construed as limiting the present invention.

[0018] In the description of this invention, it should be understood that the orientation descriptions, such as up, down, front, back, left, right, etc., are based on the orientation or positional relationship shown in the accompanying drawings. They are only for the convenience of describing this invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limiting this invention.

[0019] In the description of this invention, unless otherwise explicitly defined, terms such as "set up," "install," and "connect" should be interpreted broadly, and those skilled in the art can reasonably determine the specific meaning of the above terms in this invention in conjunction with the specific content of the technical solution.

[0020] The following is combined with Figures 1 to 3 Embodiments of the present invention will be described.

[0021] This invention provides a semiconductor circuit, comprising: A substrate 100, one side of which is used as an arrangement surface, and a plurality of pads 101 are provided on both sides of the substrate 100. A chip functional layer is disposed on the arrangement surface and electrically connected to each of the pads 101; A plurality of movable pin assemblies, the movable pin assemblies including a first pin 401, a second pin 402 and a third pin 403, the first end of the first pin 401 being connected to the pad 101, the second end of the first pin 401 being detachably and movably connected to the first end of the second pin 402, and the second end of the second pin 402 being detachably and movably connected to the first end of the third pin 403.

[0022] In this embodiment, the semiconductor circuit constructs a flexible and adjustable connection system by setting up a movable pin assembly consisting of a first pin 401, a second pin 402, and a third pin 403. The first pin 401 is connected to the solder pad 101 of the semiconductor circuit, the third pin 403 is connected to the pin soldering position on the control board, and the second pin 402 acts as a movable mechanism to achieve a movable connection with the first and third pins 403. This allows the position of the semiconductor circuit to be adjusted after it is installed on the control board, so that when the installation position of the semiconductor circuit needs to be changed due to circuit layout, there is no need to modify the pin soldering positions on the control board. This also solves the matching problem between the installation positions of the semiconductor circuit and the control board, improving the flexibility of the control board design. Furthermore, the pins are detachable, allowing for direct disassembly and replacement of the semiconductor circuit without changing the pin soldering positions on the control board during verification tests of different internal schemes. This eliminates the need for repeated removal, disassembly, and soldering operations using a soldering iron, improving replacement efficiency and avoiding damage to the plating at the pin soldering positions and the potential scrapping of the control board due to repeated high-temperature soldering.

[0023] Furthermore, the second end of the first pin 401 is hinged to the first end of the second pin 402 via a first hinge mechanism, and the second end of the second pin 402 is hinged to the first end of the third pin 403 via a second hinge mechanism.

[0024] In this embodiment, the first pin 401 and the second pin 402, and the second pin 402 and the third pin 403 are connected by a hinge mechanism, providing a solution that combines flexibility and stability for the movable connection. The rotating joint design of the hinge mechanism ensures the smoothness of the relative movement between the pins. Compared with traditional elastic or sliding connections, it has less mechanical wear and can withstand more position adjustment operations without easily failing. At the same time, the rigid connection characteristics of the hinge can keep the pin contact parts tightly fitted, reduce the changes in contact resistance caused by environmental factors such as vibration and impact, and ensure the stability of circuit signal transmission. Especially in vibrating environments such as industrial equipment, it can effectively avoid intermittent power outages or signal distortion problems.

[0025] Furthermore, the rotation axes of the first hinge mechanism and the second hinge mechanism are parallel, and the rotation axes are perpendicular to the substrate 100.

[0026] This embodiment provides precise guiding constraints for the movement of the movable pin assembly by limiting the rotation axes of the first and second hinge mechanisms to be parallel and perpendicular to the substrate 100. This structural design enables the movement trajectories of the three pins to form a coordinated planar motion relationship, avoiding motion interference caused by multi-directional rotation. For example, when adjusting the position of the semiconductor circuit, each pin can synchronously extend, retract, and translate in a unified direction, ensuring the overall smooth movement of the semiconductor circuit without local jamming or pin twisting. In densely installed scenarios, the unified direction of movement can also reduce spatial conflicts between adjacent semiconductor circuits, making the internal layout of the equipment more compact, while reducing the risk of structural damage to the semiconductor circuit or control board due to operational errors, and improving the controllability and efficiency of position adjustment.

[0027] Furthermore, the first hinge mechanism and the second hinge mechanism include a screw 501 and a nut 502. The second end of the first pin 401, the first end of the second pin 402, the second end of the second pin 402, and the first end of the third pin 403 are respectively provided with through holes perpendicular to the direction of the substrate 100. The screw 501 passes through the through holes of two adjacent pins and is threadedly connected to the nut 502.

[0028] This embodiment employs a screw 501 and a nut 502, achieving an optimized balance between movable connection and detachability. The self-locking characteristic of the threaded connection ensures the tightness of the pin connection during operation. Furthermore, compared to a one-piece movable structure, the detachable structure of the threaded connection allows for independent replacement of individual components of the pin assembly. For example, if a pin section wears or breaks, only the damaged part needs to be replaced, without replacing the entire assembly, significantly reducing maintenance costs. Simultaneously, the through-hole structure provides a stable channel for electrical connections between pins. Conductivity can be enhanced by filling with conductive adhesive, solder, or applying a conductive coating, reducing electrical signal loss.

[0029] Furthermore, the through hole is a countersunk hole, which is used to accommodate the head of the screw 501 and the nut 502.

[0030] In this embodiment, the through hole is set as a countersunk hole to accommodate the head of the screw 501 and the nut 502. The countersunk hole design allows the screw 501 and the nut 502 to be hidden under the pin surface, avoiding mechanical collisions between their protruding structures and other components 600, wires or housings on the control board, reducing the risk of damage to the insulation layer 200 or short circuits caused by friction. During cleaning and maintenance, the flat pin surface is also less prone to the accumulation of dust, oil and other impurities, reducing contact problems caused by the accumulation of contaminants. In addition, the compact structural design allows the semiconductor circuit to fit more closely to the surface of the control board during installation.

[0031] Furthermore, several of the aforementioned pads 101 are spaced apart.

[0032] In this embodiment, the pads 101 are spaced apart, which can effectively avoid electrical interference caused by the close proximity of adjacent pads 101, and reduce signal crosstalk and short circuit risks; at the same time, it can reduce mechanical interference or electrical contact of the active pin components corresponding to adjacent pads 101 when adjusting their positions, and ensure the stability and reliability of the overall activity of the semiconductor circuit when adjusting its position.

[0033] Furthermore, an insulating layer 200 is provided on the arrangement surface.

[0034] In this embodiment, the substrate 100 is a metal substrate. The metal substrate has high thermal conductivity, which can provide good heat dissipation performance for semiconductor circuits. The insulating layer 200 is provided to prevent the internal circuit from short-circuiting and leakage risks caused by direct contact between the chip functional layer and the substrate 100 and power supply.

[0035] Furthermore, the chip functional layer includes a circuit wiring layer 300 and circuit component assemblies. The circuit wiring layer 300 is disposed on the insulating layer 200 and is electrically connected to each of the pads 101. The circuit component assemblies are disposed on the circuit wiring layer 300 and are electrically connected to the circuit wiring layer 300.

[0036] In this embodiment, the circuit routing layer 300 serves as the basic connection carrier. Standardized routing design ensures the stability of electrical connections and the integrity of signal transmission between the layer and each pad 101, reducing the risk of signal interference or open circuits caused by messy routing. The circuit components are independently arranged on the circuit routing layer 300, facilitating flexible selection and layout of components 600 according to functional requirements, reducing design coupling between different functional modules, and enabling batch assembly and testing of components 600 during production, thus improving manufacturing efficiency. Simultaneously, this layered structure makes later maintenance more convenient. When a circuit component 600 malfunctions, the component can be directly repaired or replaced without disassembling the entire chip functional layer, reducing maintenance costs and time. Furthermore, the direct connection design between the circuit routing layer 300 and the pads 101 shortens the signal transmission path, reduces signal attenuation, and further ensures the stability of the semiconductor circuit's performance.

[0037] Furthermore, a green solder mask layer is provided on the circuit wiring layer 300, which is used to protect the circuit wiring layer 300.

[0038] In this embodiment, the solder mask layer serves as a robust physical protective layer for the circuit wiring layer 300. It effectively resists damage to the circuit wiring layer 300 caused by humid environments, chemical corrosion, and mechanical wear, significantly extending the service life of the circuit. Furthermore, the solder mask layer reduces the probability of oxidation on the surface of the circuit wiring layer 300, ensuring the stability of circuit connections and thus enhancing the reliability of the semiconductor circuit.

[0039] Furthermore, the circuit component assembly is electrically connected to the circuit wiring layer 300 via wires 700.

[0040] This embodiment uses wire 700 for connection, which has lower resistance compared to traditional soldering methods. This helps reduce power loss during transmission and improves the energy efficiency of semiconductor circuits. This connection method also offers good maintenance convenience and upgrade flexibility, facilitating rapid repair in case of circuit failure and allowing for expansion of circuit functionality according to actual needs. In this embodiment, wire 700 is copper wire; in other embodiments, gold wire, aluminum wire, or other materials can also be used.

[0041] Furthermore, the circuit component assembly includes a plurality of components 600, and a heat sink is provided between the components 600 and the circuit wiring layer 300.

[0042] In this embodiment, the heat sink significantly expands the heat dissipation area of ​​component 600, quickly dissipating the heat generated during component 600's operation and effectively reducing its operating temperature. Lower operating temperature helps reduce performance degradation caused by overheating of component 600, enhancing its stability and durability, extending its lifespan, and thus improving the overall performance and stability of the semiconductor circuit.

[0043] Furthermore, the semiconductor circuit also includes a molding compound 800, which covers the chip functional layer, and the second end of the first pin 401 extends outward from the molding compound 800.

[0044] In this embodiment, the hybrid resin encapsulant 800 is composed of epoxy resin, phenolic resin, silica powder, and additives. Epoxy resin serves as the base resin, providing the basic structure and mechanical strength of the encapsulant 800. Phenolic resin acts as a curing agent, reacting chemically with epoxy resin to form a cross-linked structure, thereby curing and molding. Silica powder serves as a filler, which not only increases the volume stability of the encapsulant 800 but also improves its thermal conductivity and electrical insulation properties.

[0045] The semiconductor circuit manufacturing method of this embodiment includes the following steps: Pads 101 are provided on both sides of the substrate 100; The insulating layer 200 is pressed with the copper foil layer to obtain a pressed semi-finished product. Then the pressed semi-finished product is pressed with the substrate 100, wherein one side of the insulating layer 200 in the pressed semi-finished product faces the arrangement surface of the substrate 100. The copper foil layer is etched to obtain the circuit wiring layer 300; A green solder mask is formed on the surface of the circuit wiring layer 300, and the green solder mask avoids the preset positions of the circuit components. The substrate 100 is placed on a carrier (in this embodiment, the carrier is a ceramic material that can withstand temperatures above 200°C; in other embodiments, the carrier may also be made of aluminum, polyphenylene sulfide, synthetic stone, or other materials). Solder paste is applied to the preset positions of the circuit component assembly, and the circuit component assembly is then mounted to its preset positions using an automatic die bonding device (wherein the component 600 is first mounted to a silver-plated copper heat sink using a soft solder die bonder). The carrier-mounted substrate 100 enters the reflow oven and solders all the circuit components to their corresponding preset positions. The first pin 401 is soldered onto the pad 101, and the soldering quality of the circuit components is inspected by visual inspection equipment (AOI optical inspection instrument). The flux and aluminum shavings remaining on the substrate 100 are removed by spraying and ultrasonic cleaning methods. Electrical connections are formed between the circuit component assembly and the circuit wiring layer 300 via wires 700; Perform plastic sealing to form a sealed body of 800; The second pin 402 is hinged to the first pin 401 by screw 501 and nut 502; The third pin 403 is hinged to the second pin 402 by screw 501 and nut 502; The product undergoes post-curing stress relief treatment using a high-temperature oven. After completing the electrical parameter tests, the semiconductor circuit is obtained.

[0046] The preferred embodiments of the present invention have been described in detail above, but the present invention is not limited to the embodiments described. Those skilled in the art can make various equivalent modifications or substitutions without departing from the spirit of the present invention, and these equivalent modifications or substitutions are all included within the scope defined by the claims of the present invention.

Claims

1. A semiconductor circuit, characterized in that, include: A substrate, one side of which is used as the arrangement surface, and several pads are provided on both sides of the substrate; A chip functional layer is disposed on the arrangement surface and electrically connected to each of the pads; A plurality of movable pin assemblies, the movable pin assembly including a first pin, a second pin and a third pin, wherein a first end of the first pin is connected to the pad, a second end of the first pin is detachably and movably connected to the first end of the second pin, and a second end of the second pin is detachably and movably connected to the first end of the third pin.

2. The semiconductor circuit according to claim 1, characterized in that, The second end of the first pin is hinged to the first end of the second pin via a first hinge mechanism, and the second end of the second pin is hinged to the first end of the third pin via a second hinge mechanism.

3. The semiconductor circuit according to claim 2, characterized in that, The rotation axes of the first hinge mechanism and the second hinge mechanism are parallel, and the rotation axes are perpendicular to the substrate.

4. The semiconductor circuit according to claim 3, characterized in that, The first hinge mechanism and the second hinge mechanism include a screw and a nut. The second end of the first pin, the first end of the second pin, the second end of the second pin, and the first end of the third pin are respectively provided with through holes perpendicular to the direction of the substrate. The screw passes through the through holes of two adjacent pins and is threadedly connected to the nut.

5. The semiconductor circuit according to claim 4, characterized in that, The through hole is a countersunk hole, which is used to accommodate the head of the screw and the nut.

6. The semiconductor circuit according to claim 1, characterized in that, Several of the aforementioned pads are spaced apart.

7. The semiconductor circuit according to claim 1, characterized in that, An insulating layer is provided on the arrangement surface.

8. The semiconductor circuit according to claim 7, characterized in that, The chip functional layer includes a circuit wiring layer and circuit component assemblies. The circuit wiring layer is disposed on the insulating layer and is electrically connected to each of the pads. The circuit component assemblies are disposed on the circuit wiring layer and are electrically connected to the circuit wiring layer.

9. The semiconductor circuit according to claim 8, characterized in that, The circuit wiring layer is provided with a green solder mask layer, which is used to protect the circuit wiring layer.

10. The semiconductor circuit according to claim 1, characterized in that, The semiconductor circuit also includes a molding compound that covers the chip functional layer, and the second end of the first pin extends out of the molding compound.

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