Semiconductor circuit

Abstract

The invention relates to the technical field of semiconductor circuit application, and provides a semiconductor circuit which comprises a first substrate, a second substrate and a lead frame, the second substrate and the first substrate are oppositely arranged, the lead frame comprises a first pin assembly and a second pin assembly, the first pin assembly is provided with a first end, a second end and a third end, and the second pin assembly is provided with a second end and a third end. The second pin assembly is provided with a fourth end, a fifth end and a sixth end; the first end and the fourth end are positioned between the first substrate and the second substrate and are electrically connected with the first substrate respectively; the second end and the fifth end are positioned between the first substrate and the second substrate and are electrically connected with the second substrate respectively; and the third end and the sixth end extend outwards in the direction far away from the substrates, so that the double substrates are supported and fixed, and meanwhile, the double substrates can be electrically connected, so that the stability of electric connection between an upper circuit layer and a lower circuit layer and the stability of the double substrates are ensured.

Description

Technical Field

[0001] This application relates to the field of semiconductor technology, and in particular to a semiconductor circuit. Background Technology

[0002] Semiconductor circuits are power drive products that combine power electronics and integrated circuit technology. They highly integrate power switching devices, high-voltage drive circuits, and fault detection circuits for overvoltage, overcurrent, and overheating into a single unit. Compared to traditional discrete device solutions, semiconductor circuits, with their significant advantages of high integration and high reliability, are particularly suitable for motor drive inverters and various inverter power supplies. They are ideal power electronic devices for fields such as variable frequency speed control, metallurgical machinery, electric traction, servo drives, and variable frequency home appliances.

[0003] Currently, electrical connections between two substrates are usually achieved by bonding wires to bind pins or through an intermediate conductive medium. These connection methods are relatively complex and are susceptible to mechanical stress and thermal expansion, resulting in poor connection stability. Summary of the Invention

[0004] This application aims to improve at least one technical problem in the background art.

[0005] This application provides a semiconductor circuit, which includes a first substrate, a second substrate, and a lead frame; The second substrate is disposed opposite to the first substrate; The lead frame includes a first pin assembly and a second pin assembly. The first pin assembly has a first end, a second end, and a third end. The second pin assembly has a fourth end, a fifth end, and a sixth end. The first end and the fourth end are located between the first substrate and the second substrate and are electrically connected to the first substrate, respectively. The second end and the fifth end are located between the first substrate and the second substrate and are electrically connected to the second substrate, respectively. The third end and the sixth end extend outward in a direction away from the substrate.

[0006] According to some technical solutions of this application, the first substrate and / or the second substrate are metal substrates.

[0007] According to some technical solutions of this application, the first pin assembly and the second pin assembly are both integrally formed structures.

[0008] According to some technical solutions of this application, both the first substrate and the second substrate include a metal substrate, a circuit wiring layer and a plurality of electronic components. The circuit wiring layer is disposed on the metal substrate, and the plurality of electronic components are disposed on the circuit wiring layer.

[0009] According to some technical solutions of this application, the metal substrate is further provided with an insulating layer and a copper foil layer, the copper foil layer is disposed on the metal substrate, the circuit wiring layer is formed by etching the copper foil layer, and the insulating layer is disposed between the circuit wiring layer and the metal substrate.

[0010] According to some technical solutions of this application, a protective layer is further provided on the metal substrate, and the protective layer is disposed on the surface of the circuit wiring layer.

[0011] According to some technical solutions of this application, the electronic component includes a high-power component, and a heat sink and a heat fin are respectively provided on both sides of the high-power component.

[0012] According to some technical solutions of this application, it also includes multiple bonding wires, and the circuit wiring layer and the electronic component are connected through the bonding wires.

[0013] According to some technical solutions of this application, it also includes a package body, which covers the first substrate, the second substrate and part of the lead frame, and the third end and the sixth end extend outward along the package body.

[0014] According to some technical solutions of this application, the encapsulation body is a mixed resin.

[0015] The semiconductor circuit provided in this application has at least the following beneficial effects: by providing a first pin assembly and a second pin assembly, it not only achieves the support and fixation between the two substrates, but also can be electrically connected to the two substrates and extend outward as pin terminals for input and output, thus ensuring the stability of the electrical connection between the upper and lower circuit layers and the stability of the two substrates. Attached Figure Description

[0016] Figure 1 A schematic diagram of the semiconductor circuit before packaging, provided in an embodiment of this application; Figure 2 This is an internal structure diagram of a semiconductor circuit provided in an embodiment of this application; Figure 3 This is a partially enlarged structural schematic diagram of a semiconductor circuit provided in an embodiment of this application; Figure 4 A schematic diagram of the packaging structure of a semiconductor circuit provided in an embodiment of this application; Figure 5 This is a three-dimensional structural diagram of a semiconductor circuit provided in an embodiment of this application.

[0017] In the attached figures: 110-first substrate; 120-second substrate; 100-package; 310-first pin assembly; 320-second pin assembly; 311-first terminal; 312-second terminal; 313-third terminal; 321-fourth terminal; 322-fifth terminal; 323-sixth terminal; 101-metal substrate; 102-insulating layer; 103-copper foil layer; 105-electronic component; 106-chip resistor; 107-bonding wire. Detailed Implementation

[0018] The embodiments of this application are described in detail below. Examples of these embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the present invention, and should not be construed as limiting the present invention.

[0019] In the description of this application, it should be understood that the orientation descriptions, such as up, down, front, back, left, right, etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation or be constructed or operated in a specific orientation. Therefore, they should not be construed as limiting the present invention.

[0020] In the description of this invention, unless otherwise explicitly defined, terms such as "set," "install," and "connect" should be interpreted broadly, and those skilled in the art can reasonably determine the specific meaning of the above terms in this invention in conjunction with the specific content of the technical solution.

[0021] The following is combined Figures 1 to 5 Embodiments of the present invention will be described.

[0022] This application provides a semiconductor circuit, which includes a first substrate 110, a second substrate 120 and a lead frame; The second substrate 120 is disposed opposite to the first substrate 110; The lead frame includes a first pin assembly 310 and a second pin assembly 320. The first pin assembly 310 has a first end 311, a second end 312 and a third end 313. The second pin assembly 320 has a fourth end 321, a fifth end 322 and a sixth end 323. The first end 311 and the fourth end 321 are located between the first substrate 110 and the second substrate 120 and are electrically connected to the first substrate 110, respectively. The second end 312 and the fifth end 322 are located between the first substrate 110 and the second substrate 120 and are electrically connected to the second substrate 120, respectively. The third end 313 and the sixth end 323 extend outward in a direction away from the substrate.

[0023] Specifically, the lead frame material is selected from C194 (-1 / 2H) or KFC (-1 / 2H). The chemical composition requirements for C194 (-1 / 2H) are: copper (Cu) content ≥ 97.0%, iron (Fe) content 2.4%, phosphorus (P) content 0.03%, and zinc (Zn) content 0.12%. The chemical composition requirements for KFC (-1 / 2H) are: copper (Cu) content ≥ 99.6%, iron (Fe) content in the range of 0.05–0.15 (e.g., 0.1%), and phosphorus (P) content in the range of 0.025–0.04 (e.g., 0.03%). During lead wire processing, 0.5mm thick copper plates are used as raw materials. Through stamping and bending processes in machining, they are processed into the required shape. Then, the surface is plated. First, nickel is plated with a thickness controlled at 0.1-0.5um, and then tin is plated with a thickness controlled at 2-5um.

[0024] Therefore, by providing the first pin assembly 310 and the second pin assembly 320, not only is the support and fixation between the two substrates achieved, but they can also be electrically connected to the two substrates and extend outward as input / output pin terminals, ensuring the stability of the electrical connection between the upper and lower circuit layers and the stability of the two substrates. No bracket is needed to fix the two substrates, and no other conductive medium is required between the two substrates; the entire process is completed in a single molding process, creating conditions for achieving high integration and miniaturization of semiconductors.

[0025] In some embodiments, the first substrate 110 and / or the second substrate 120 are metal substrates. Metal substrates have good electrical and thermal conductivity, which can effectively improve circuit performance and heat dissipation capabilities. In applications with high heat dissipation requirements, such as high-power electronic devices, using both the first substrate 110 and the second substrate 120 as metal substrates can greatly improve heat dissipation efficiency and ensure stable operation of semiconductor circuits even in high-temperature environments. Optionally, the metal substrate can be made of materials such as aluminum, copper, or silver.

[0026] In some embodiments, the first pin assembly 310 and the second pin assembly 320 are both integrally molded structures. The entire pin assembly is integrally molded without connection gaps, avoiding electrical connection problems caused by poor contact or aging of the conductive medium, thus improving product yield and reliability. Therefore, by manufacturing the lead frame integrally, support and electrical connection between substrates are achieved without the need for additional conductive medium, reducing process steps and lowering the complexity and cost of the production process.

[0027] In some embodiments, both the first substrate 110 and the second substrate 120 include a metal substrate 101, a wiring layer, and a plurality of electronic components 105. The metal substrate 101, as the carrier of the entire internal circuitry of the semiconductor circuit, not only provides stable support for the wiring layer and electronic components 105, but also plays a crucial role in heat dissipation for the entire semiconductor circuit. The heat generated during the operation of the electronic components 105 can be rapidly conducted to the metal substrate 101 and then dissipated through it, thereby effectively reducing the operating temperature of the electronic components 105 and extending their service life.

[0028] In some embodiments, a circuit wiring layer is disposed on a metal substrate 101, and multiple electronic components 105 are disposed on the circuit wiring layer. The circuit wiring layer is formed by etching metal foil and is used to realize the electrical connection between the electronic components 105. Its precise wiring design can ensure the accurate transmission of signals in the circuit and avoid signal interference and attenuation. Multiple electronic components 105 are arranged at intervals on the circuit wiring layer according to the requirements of the circuit design to jointly complete various circuit functions. Different types of electronic components 105, such as resistors and capacitors, cooperate with each other to realize the processing of electrical signals.

[0029] An insulating layer 102, a copper foil layer 103, and a protective layer are also provided on the metal substrate 101. The copper foil layer 103 is disposed on the metal substrate 101, and the circuit wiring layer is formed by etching the copper foil layer 103. The insulating layer 102 is disposed between the circuit wiring layer and the metal substrate 101, and the protective layer is disposed on the surface of the circuit wiring layer. In some embodiments, the electronic component 105 includes a surface mount capacitor, a surface mount resistor 106, and other components, which are spaced apart on the circuit wiring layer.

[0030] In complex circuit environments, the insulating layer 102 prevents direct contact between the circuit wiring layer and the metal substrate 101, thus avoiding the risk of internal short circuits and leakage. The copper foil layer 103 is formed into the required circuit wiring layer through an etching process. Copper has good conductivity, which meets the circuit's requirement for a low-resistance transmission path, ensuring signal transmission in the circuit. The protective layer, also known as the solder mask, prevents soldering in inappropriate areas, avoiding short circuits or poor contact caused by improper soldering. It also prevents short circuits caused by oxidation or contamination, providing long-term protection for the circuit and extending the lifespan of the semiconductor circuit.

[0031] Since there are heat-generating power devices on the bimetallic substrate, it is necessary to improve the heat dissipation capacity. In some embodiments, the components include high-power components. Since the high-power components on the bimetallic substrate generate a lot of heat when they are working, heat sinks and heat fins are respectively provided on both sides of the high-power components to improve the heat dissipation capacity.

[0032] The heat sink can be made of heat dissipation fins, which further increases the heat dissipation area and improves heat dissipation efficiency. The heat sink is made of metal material with good thermal conductivity and has a large heat dissipation surface area, which can quickly absorb and dissipate the heat generated by high-power components into the surrounding environment.

[0033] One of the heat sinks is mounted on the control board and in contact with the components, serving a supporting and positioning function. A heat sink is located on the other side of the component. By installing heat dissipation structures on both sides of the component, not only is support provided and heat dissipation capacity improved, facilitating the installation of semiconductor circuits and increasing installation efficiency, but it also prevents condensation from the control board from soaking the module for extended periods, thus protecting its reliability. In humid environments or operating scenarios prone to condensation, it effectively protects the semiconductor circuits.

[0034] In some embodiments of this embodiment, the semiconductor circuit also includes multiple bonding wires 107, which connect the circuit wiring layer and the electronic component 105. The bonding wires 107 are generally made of metals with good conductivity, such as gold, aluminum, or copper. In the semiconductor circuit, the bonding wires 107 are used to achieve electrical connections between components. They can precisely connect the electrodes on the circuit wiring layer to the pins of the electronic component 105, ensuring smooth current transmission between components.

[0035] In some embodiments, a package 100 is also included, which covers the first substrate 110, the second substrate 120, and a portion of the lead frame. The function of the package 100 is to completely seal the components inside the semiconductor circuit, preventing them from being corroded by the environment, such as moisture, dust, and chemicals. These external factors may cause performance degradation, short circuits, or even damage to the electronic components 105, while the package 100 provides a stable operating environment for the internal components. The third terminal 313 and the sixth terminal 323 extend outward along the package 100. The third terminal 313 and the sixth terminal 323 extend outward along the package 100 to facilitate connection with external circuits and realize the input / output functions of the semiconductor circuit. In practical applications, these extended pins can be connected to other components on the circuit board by means of soldering or other methods.

[0036] In some embodiments, the package 100 is a hybrid resin. Specifically, it is a powdered molding compound made by mixing epoxy resin as the matrix resin, high-performance phenolic resin as the curing agent, silica powder and other fillers, and various additives. This hybrid resin is extruded into a mold cavity using a heat transfer molding method to embed the semiconductor chip therein. Epoxy resin has good adhesion and electrical insulation properties, which can firmly bond the internal components together and provide reliable insulation protection. The high-performance phenolic resin, as a curing agent, can chemically react with the epoxy resin to cure the resin and form a hard and stable package structure. The addition of fillers such as silica powder can improve the physical properties of the package 100, such as increasing its hardness and reducing its coefficient of thermal expansion, so that the package 100 can better adapt to temperature changes and reduce internal stress caused by thermal expansion and contraction. Through this hybrid resin encapsulation, high integration and miniaturization of semiconductor circuits are achieved, and the reliability and stability of the product in various environments are improved.

[0037] In this way, the first substrate 110 uses a metal substrate 101 as a carrier and an insulating layer 102 disposed between the metal substrate 101 and the copper foil layer 103, and a copper foil layer 103 for forming a circuit wiring layer; the insulating layer 102 and the copper foil layer 103 are pressed together to form a pressed semi-finished product; the insulating layer 102 of the pressed semi-finished product is pressed together with the metal substrate 101 to form a substrate semi-finished product; a circuit wiring layer is formed on the surface of the copper foil layer 103 of the substrate semi-finished product; a green oil layer that plays a protective role is formed on the circuit wiring layer to form a substrate finished product; And using a silver-plated metal heat sink, the chip is soldered to the metal heat sink to form a component semi-finished product, the circuit component is configured in a specific part of the circuit wiring, and the metal wire is used to electrically connect the circuit wiring and the circuit component; the above semi-finished product is sealed with epoxy resin, and the external connection limiting pin is not sealed by the resin and is exposed. Therefore, this dual-substrate stacking process achieves high integration and miniaturization. The electrical connection between the upper and lower layers of the bimetallic substrate is achieved through a special lead frame structure welding to realize internal and external electrical connections, ensuring the stability of the welding electrical connection between the upper and lower circuit layers in this stacking process.

[0038] This application also provides a method for fabricating a semiconductor circuit, characterized by the following features: The substrate is a metal substrate; The process of depositing a copper foil layer on the surface of a metal substrate; Circuit wiring is formed on copper foil on a metal substrate by etching. A protective green oil layer is formed on the surface of the circuit wiring; Forming the first metal substrate and the second metal substrate into finished products; A process of forming a plating layer on a specific shaped copper material surface not covered by the green oil layer of the first and second metal substrates to manufacture a metal connector; The process of applying a fluid adhesive material to specific locations of the circuit wiring on the first and second metal substrates. The process of soldering chips onto the surface of a metal heat sink; The process of placing circuit elements on the adhesive material of the first metal substrate and the second metal substrate; The process of curing adhesive materials; The flux and aluminum shavings remaining on the first and second metal substrates are removed by cleaning methods such as spraying and ultrasonic cleaning. By using bonding wires, an electrical connection is formed between the circuit elements and circuit wiring above the first and second metal substrates. By encapsulating the first and second metal substrates and the circuit board frame, the resin is sealed and fixed, so that a specific location of the circuit wiring at a specific potential is not filled with resin. The process of testing necessary electrical and appearance parameters using testing equipment; After passing the test, the semiconductor circuit of this invention will be manufactured.

[0039] Specifically, the process includes the following steps: placing the finished first metal substrate and the second metal substrate into a special carrier, which can be made of materials that are resistant to high temperatures above 200°C, such as aluminum, synthetic stone, ceramics, or PPS. The semiconductor inverter circuit chip is then mounted onto the component mounting positions reserved in the copper foil circuit layers of the first and second metal substrates by applying solder paste or silver glue, using an automatic die-attaching device such as a DA machine.

[0040] High-voltage power devices are mounted onto silver-plated copper heat sinks using a solder die bonder, forming semi-finished components.

[0041] The resistors, capacitors, and semi-finished components are mounted onto the component mounting positions using an automated surface mount technology (SMT) machine. The entire first and second metal substrate semi-finished products, including the carrier, are then passed through a reflow oven to solder all the components to their corresponding mounting positions. The welding quality of components is inspected using visual inspection AOI equipment; The flux and aluminum shavings remaining on the insulating substrate are removed by cleaning methods such as spraying and ultrasonic cleaning. By using bonding wires, electrical connections are formed between circuit components and circuit wiring. The first and second substrates 120 are stacked using a special carrier. Then, the lead frame is placed on the pin soldering positions of the first and second metal substrates by a robotic arm or manually. The pins are soldered to the first and second substrates 120 by local heating. The substrate circuit is then encapsulated in a specific mold using packaging equipment. Laser marking is then applied to the product, followed by post-curing stress relief in a high-temperature oven. Excess pins are trimmed and shaped using a lead-cutting and forming equipment. Finally, electrical parameter testing is performed to create the final qualified product. Thus, the entire semiconductor circuit does not require a bracket to fix the two substrates, and no conductive medium is needed between the two substrates. It is encapsulated in a single process, achieving a highly integrated and miniaturized process through this multi-substrate stacking technology.

[0042] The preferred embodiments of the present invention have been described in detail above, but the present disclosure is not limited to the embodiments. Those skilled in the art can make various equivalent modifications or substitutions without departing from the spirit of the present invention, and these equivalent modifications or substitutions are all included within the scope defined by the claims of the present disclosure.

Claims

1. A semiconductor circuit, characterized in that: include: First substrate (110); The second substrate (120) is disposed opposite to the first substrate (110); The lead frame includes a first pin assembly (310) and a second pin assembly (320), the first pin assembly (310) having a first end (311), a second end (312) and a third end (313), and the second pin assembly (320) having a fourth end (321), a fifth end (322) and a sixth end (323). The first end (311) and the fourth end (321) are located between the first substrate (110) and the second substrate (120), and are electrically connected to the first substrate (110) respectively; The second end (312) and the fifth end (322) are located between the first substrate (110) and the second substrate (120), and are electrically connected to the second substrate (120) respectively; The third end (313) and the sixth end (323) extend outward in a direction away from the first substrate.

2. The semiconductor circuit according to claim 1, characterized in that: The first substrate (110) and / or the second substrate (120) are metal substrates.

3. The semiconductor circuit according to claim 1, characterized in that: The first pin assembly (310) and the second pin assembly (320) are both integrally formed structures.

4. The semiconductor circuit according to claim 1, characterized in that: Both the first substrate (110) and the second substrate (120) include a metal substrate (101), a circuit wiring layer and a plurality of electronic components (105). The circuit wiring layer is disposed on the metal substrate (101) and the plurality of electronic components (105) are disposed on the circuit wiring layer.

5. The semiconductor circuit according to claim 4, characterized in that: An insulating layer (102) and a copper foil layer (103) are provided on the metal substrate (101). The copper foil layer (103) is disposed on the metal substrate (101). The circuit wiring layer is formed by etching the copper foil layer (103). The insulating layer (102) is disposed between the circuit wiring layer and the metal substrate (101).

6. The semiconductor circuit according to claim 5, characterized in that: A protective layer is also provided on the metal substrate (101), and the protective layer is provided on the surface of the circuit wiring layer.

7. The semiconductor circuit according to claim 4, characterized in that: The electronic components include high-power components, and heat sinks and heat fins are respectively provided on both sides of the high-power components.

8. The semiconductor circuit according to claim 4, characterized in that: It also includes multiple bonding wires (107) that connect the circuit wiring layer and the electronic component (105).

9. The semiconductor circuit according to claim 1, characterized in that: It also includes a package (100) that covers the first substrate (110), the second substrate (120) and a portion of the lead frame, with the third end (313) and the sixth end (323) extending outward along the package (100).

10. The semiconductor circuit according to claim 9, characterized in that: The encapsulation body (100) is a mixed resin.

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