Semiconductor device

Abstract

The purpose of the present invention is to provide a semiconductor device having improved reliability under high-temperature and high-humidity conditions. The semiconductor device includes a semiconductor substrate, a first electrode, an insulating interlayer film, and at least one second electrode. The semiconductor substrate includes an active region through which a main current flows and a terminal region provided around the active region. The first electrode is disposed in the active area. An insulating interlayer film is provided on a surface side of the semiconductor substrate in the termination region. The at least one second electrode is disposed in the terminal region and annularly surrounds the active region. A portion of the at least one second electrode is embedded in the insulating interlayer film. The lower surface of the at least one second electrode is located below the upper surface of the insulating interlayer film.

Description

Technical Field

[0001] This disclosure relates to semiconductor devices. Background Technology

[0002] To improve the reliability of power devices, the requirements for THB (Thermal Humidity Bias) testing are becoming increasingly stringent. The structure of the termination region in a power device can affect the characteristics of THB testing. In the termination region of the semiconductor device described in Patent Document 1, a second field plate is formed on the upper surface of a second insulating film. Existing technical documents Patent documents

[0003] Patent Document 1: Japanese Patent Application Publication No. 2015-76544 Summary of the Invention The technical problem that the invention aims to solve

[0004] The shape and quality of electrodes and insulating films in the termination region have a significant impact on the characteristics of THB testing. For example, under high temperature and humidity conditions, moisture can easily penetrate from the thin protective film into the device. This intruding moisture causes electrode corrosion in the termination region, leading to a deterioration in the lifespan of the power device.

[0005] To address the aforementioned problems, the present disclosure aims to provide a semiconductor device that improves reliability under high temperature and high humidity conditions. Technical means for solving technical problems

[0006] The semiconductor device disclosed herein includes a semiconductor substrate, a first electrode, an insulating interlayer film, and at least one second electrode. The semiconductor substrate includes an effective region through which a main current flows and a terminal region disposed around the effective region. The first electrode is disposed in the effective region. The insulating interlayer film is disposed on the surface side of the semiconductor substrate in the terminal region. At least one second electrode is disposed in the terminal region and surrounds the effective region in a ring shape. A portion of the at least one second electrode is embedded in the insulating interlayer film. The lower surface of the at least one second electrode is located below the upper surface of the insulating interlayer film. Invention Effects

[0007] According to this disclosure, a semiconductor device is provided that improves reliability under high temperature and high humidity conditions.

[0008] The purpose, features, aspects, and advantages of this disclosure will become more apparent from the following detailed description and accompanying drawings. Attached Figure Description

[0009] Figure 1 This is a cross-sectional view showing the structure of the semiconductor device according to Embodiment 1. Figure 2 This is a cross-sectional view showing the structure of a semiconductor device in a modified example of Embodiment 1. Figure 3 This is a cross-sectional view showing the structure of the semiconductor device in Embodiment 5. Figure 4 This is a cross-sectional view showing the structure of a semiconductor device in a modified example of Embodiment 5. Detailed Implementation

[0010] <Implementation Method 1> Figure 1 This is a cross-sectional view showing the structure of the semiconductor device in Embodiment 1. Figure 1 The diagram shows a cross-sectional view of the upper surface of the semiconductor device, while the cross-sectional view of the lower surface is omitted. The semiconductor device includes a semiconductor substrate 1 with an active region and a termination region. Although not shown in the diagram, in the top view of the semiconductor device, the termination region is disposed around and surrounds the active region.

[0011] The semiconductor device includes a semiconductor element (not shown) and a first electrode 2 in the effective region. The semiconductor element is formed within a semiconductor substrate 1. The semiconductor element is formed, for example, from a semiconductor such as Si. The semiconductor element may be formed from a wide-bandgap semiconductor such as SiC. The semiconductor element is a switching element such as an IGBT (Insulated Gate Bipolar Transistor), a MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor), or a Schottky barrier diode. The first electrode 2 is disposed on the surface side of the semiconductor substrate 1 and is electrically connected to the semiconductor element. When the semiconductor element is an IGBT, the first electrode 2 is the emitter electrode, and the main current flows through the first electrode 2 between the emitter and collector of the IGBT. In other words, the main current flows through the effective region via the first electrode 2.

[0012] A RESURF (Reduced Surface Field) structure is formed in the terminal region of Embodiment 1. In this terminal region, the semiconductor device includes a p-type semiconductor layer 3, an n-type semiconductor layer 4, an oxide film 5, a conductive film 6, an insulating interlayer film 7, a second electrode 8, and a protective film 9.

[0013] The p-type semiconductor layer 3 and the n-type semiconductor layer 4 are configured as surface layers of the semiconductor substrate 1. The p-type semiconductor layer 3 is disposed closer to the effective region than the n-type semiconductor layer 4. An oxide film 5 is disposed on the upper surface of the p-type semiconductor layer 3. A conductive film 6 is selectively disposed on the oxide film 5 in the terminal region. The conductive film 6 is, for example, a polycrystalline silicon film.

[0014] An insulating interlayer film 7 is disposed on the surface side of the semiconductor substrate 1. In Embodiment 1, the insulating interlayer film 7 is disposed between the conductive film 6 and the second electrode 8, and covers the oxide film 5 and the conductive film 6 disposed on the oxide film 5.

[0015] The second electrode 8 is a field plate electrode. Although not shown in the diagram, in the top view, the two second electrodes 8 are arranged in a ring to surround the effective area. Figure 1 As shown, the upper surface of the second electrode 8 protrudes from the upper surface of the insulating interlayer film 7. Here, the upper surface of the insulating interlayer film 7 is the surface that contacts the protective film 9. The height of the upper surface of the second electrode 8 is the same as the height of the upper surface of the insulating interlayer film 7. In other words, the upper surface of the second electrode 8 is flush with the upper surface of the insulating interlayer film 7. The height of the upper surface of the second electrode 8 and the height of the upper surface of the insulating interlayer film 7 correspond, for example, to the height from the surface of the semiconductor substrate 1. The side and lower surfaces of the second electrode 8 are embedded in the insulating interlayer film 7. That is, a portion of the second electrode 8 is embedded in the insulating interlayer film 7, and the lower surface of the second electrode 8 is located below the upper surface of the insulating interlayer film 7.

[0016] The protective film 9 is configured to cover the upper surface of the insulating interlayer film 7 and the upper surface of the second electrode 8.

[0017] When there is a significant difference between the height of the upper surface of the second electrode 8 and the height of the upper surface of the insulating interlayer film 7, the thickness of the protective film 9 covering the corners of the second electrode 8 becomes locally thinner. Therefore, under high temperature and humidity conditions, moisture and other substances can penetrate from the thinner portions of the protective film 9. Consequently, corrosion occurs in the second electrode 8 in the terminal region, and the shape of the second electrode 8 changes. As a result, it becomes impossible to maintain the same electric field as designed within the semiconductor substrate 1, leading to increased leakage current or decreased withstand voltage.

[0018] However, in the semiconductor device of Embodiment 1, the lower part of the second electrode 8 is embedded in the insulating interlayer film 7, and the lower surface of the second electrode 8 is positioned below the upper surface of the insulating interlayer film 7. Therefore, the flatness of the protective film 9 covering the second electrode 8 and the insulating interlayer film 7 is increased, and the uniformity of the film thickness of the protective film 9 is improved. As a result, even under high temperature and high humidity conditions, moisture and the like can be suppressed from penetrating from the protective film 9 to the second electrode 8. This reduces shape changes caused by corrosion of the second electrode 8, suppresses the reduction of insulation properties of the semiconductor device, and thus improves the lifespan of the semiconductor device.

[0019] Although two second electrodes 8 are provided in the semiconductor device of Embodiment 1, the number of second electrodes 8 is not limited to two. Providing at least one second electrode 8 is sufficient. When multiple second electrodes 8 are provided, the arrangement of electrode widths, etc., does not need to be identical.

[0020] In summary, the semiconductor device of Embodiment 1 includes a semiconductor substrate 1, a first electrode 2, an insulating interlayer film 7, and at least one second electrode 8. The semiconductor substrate 1 includes an effective region through which a main current flows and a terminal region disposed around the effective region. The first electrode 2 is disposed in the effective region. The insulating interlayer film 7 is disposed on the surface side of the semiconductor substrate 1 in the terminal region. At least one second electrode 8 is disposed in the terminal region and surrounds the effective region in a ring shape. A portion of the at least one second electrode 8 is embedded in the insulating interlayer film 7. The lower surface of the at least one second electrode 8 is located below the upper surface of the insulating interlayer film 7.

[0021] Such semiconductor devices reduce changes in electrical characteristics under high temperature and high humidity conditions, thereby improving reliability.

[0022] (A variation of Implementation Method 1) Figure 2 This is a cross-sectional view showing the structure of a semiconductor device in a modified example of Embodiment 1. Figure 2 The image shows a cross-sectional view of the upper surface of the semiconductor device, while the cross-sectional view of the lower surface is omitted.

[0023] In a variation of Embodiment 1, an FLR (Field Limiting Ring) structure is formed in the terminal region. In this terminal region, the semiconductor device includes a p-type semiconductor layer 13, an n-type semiconductor layer 4, an oxide film 5, an insulating interlayer film 7, a second electrode 18, and a protective film 9.

[0024] A p-type semiconductor layer 13 and an n-type semiconductor layer 4 are provided as surface layers of the semiconductor substrate 1. The p-type semiconductor layer 13 is selectively disposed on the surface layer of the semiconductor substrate 1 in the terminal region. Furthermore, the p-type semiconductor layer 13 is disposed at a position closer to the effective region than the n-type semiconductor layer 4. An oxide film 5 is disposed on the surface of the semiconductor substrate 1.

[0025] An insulating interlayer film 7 is disposed between the oxide film 5 and the protective film 9.

[0026] Although the illustration is omitted, in the top view, the two second electrodes 18 are arranged in a ring to surround the effective area. For example... Figure 2As shown, the upper surface of the second electrode 18 protrudes from the upper surface of the interlayer insulating film 7. The height of the upper surface of the second electrode 18 is the same as the height of the upper surface of the interlayer insulating film 7. In other words, the upper surface of the second electrode 18 is flush with the upper surface of the interlayer insulating film 7. The two second electrodes 18 have a T-shaped cross-section and include a first lower surface 18A and a second lower surface 18B. The second electrode 18 penetrates the interlayer insulating film 7 and the oxide film 5. The side surface of the second electrode 18 and the first lower surface 18A are embedded in the interlayer insulating film 7. The second lower surface 18B is in contact with the p-type semiconductor layer 13. As described above, a portion of the second electrode 18 is embedded in the interlayer insulating film 7, and the first lower surface 18A and the second lower surface 18B of the second electrode 18 are located below the upper surface of the interlayer insulating film 7.

[0027] The protective film 9 is configured to cover the upper surface of the insulating interlayer film 7 and the upper surface of the second electrode 18.

[0028] Even with this structure, the flatness of the protective film 9 covering the second electrode 18 and the insulating interlayer film 7 is increased, and the uniformity of the film thickness of the protective film 9 is improved. Therefore, even under high temperature and high humidity conditions, it is possible to suppress the penetration of moisture and other substances from the protective film 9 into the second electrode 18. This reduces shape changes caused by corrosion of the second electrode 18, suppresses the reduction of insulation of the semiconductor device, and thus improves the lifespan of the semiconductor device.

[0029] Although the semiconductor device in the modified embodiment 1 has two second electrodes 18, the number of second electrodes 18 is not limited to two. At least one second electrode 18 is sufficient. When multiple second electrodes 18 are provided, the electrode widths, etc., do not need to be identical.

[0030] Although the RESURF structure and FLR structure are shown in Embodiment 1 and its variations, the structure of the terminal region is not limited to these. If a portion of the second electrodes 8 and 18 is embedded in the insulating interlayer film 7, and the lower surface of the second electrodes 8 and 18 is located below the upper surface of the insulating interlayer film 7, the same effect as described above can be obtained.

[0031] <Implementation Method 2> exist Figure 1 or Figure 2 In this process, the upper surfaces of the second electrodes 8 and 18 may be higher than the upper surface of the insulating interlayer film 7. In this case, the height difference between the upper surfaces of the second electrodes 8 and 18 and the upper surface of the insulating interlayer film 7 is preferably less than the thickness of the protective film 9. As a result, the flatness of the protective film 9 is improved, thereby achieving the aforementioned effect.

[0032] <Implementation Method 3> exist Figure 1 or Figure 2 In this design, two second electrodes 8 and 18 are provided, but the number of second electrodes 8 and 18 is not limited to two. For all second electrodes 8 and 18, the layout of electrode widths, etc., does not need to be the same.

[0033] <Implementation Method 4> The second electrodes 8 and 18 are formed of a different material than the first electrode 2. The first electrode 2 and the second electrodes 8 and 18 include at least one material selected from Ti, Cr, W, and Mo. The second electrodes 8 and 18 are formed of a highly corrosive material, thereby mitigating the reduction in insulation of the semiconductor device.

[0034] The second electrodes 8 and 18 can be formed from the same material as the first electrode 2. This allows for the simultaneous formation of the first electrode 2 and the second electrodes 8 and 18, thereby reducing costs.

[0035] <Implementation Method 5> Figure 3 This is a cross-sectional view showing the structure of the semiconductor device in Embodiment 5. Figure 3 The image shows a cross-sectional structure of the upper surface of the semiconductor device, while the cross-sectional structure of the lower surface is omitted. A RESURF structure is formed in the terminal region.

[0036] The two second electrodes 28 and 38 have lower surfaces at different heights from the surface of the semiconductor substrate 1. In other words, the lower surface of the second electrode 28 is at a different height than the lower surface of the second electrode 38. However, there should be no region where the insulating interlayer film 7 is not provided. By varying the heights of the lower surfaces of the second electrodes 28 and 38, the distribution of the electric field intensity generated within the semiconductor substrate 1 is optimized. As a result, the reduction in the insulation of the semiconductor device is further mitigated.

[0037] Furthermore, each of the two second electrodes 28 and 38 comprises at least one material selected from Ti, Cr, W, and Mo. The second electrodes 28 and 38 are formed of a highly corrosive material, thereby mitigating the reduction in insulation of the semiconductor device.

[0038] (A variation of implementation method 5) Figure 4 This is a cross-sectional view showing the structure of a semiconductor device in a modified example of Embodiment 5. Figure 4 The image shows a cross-sectional structure of the upper surface of the semiconductor device, while the cross-sectional structure of the lower surface is omitted. An FLR structure is formed in the terminal region.

[0039] The two second electrodes 48 and 58 have a T-shaped cross-sectional shape. Second electrode 48 includes a first lower surface 48A and a second lower surface 48B. Second electrode 58 includes a first lower surface 58A and a second lower surface 58B. The second electrodes 48 and 58 penetrate the insulating interlayer film 7 and the oxide film 5. The side surfaces of the second electrode 48 and the first lower surface 48A are embedded in the insulating interlayer film 7. Similarly, the side surfaces of the second electrode 58 and the first lower surface 58A are embedded in the insulating interlayer film 7. The second lower surface 48B and the second lower surface 58B are in contact with the p-type semiconductor layer 13. The first lower surface 48A and the first lower surface 58A are at different heights from the surface of the semiconductor substrate 1. That is, the two second electrodes 48 and 58 have first lower surfaces 48A and 58A at different heights from the surface of the semiconductor substrate 1. However, there should be no areas where the insulating interlayer film 7 is not provided. Furthermore, each of the two second electrodes 48 and 58 includes at least one material selected from Ti, Cr, W, and Mo. Even with this structure, the same effect as described above can be achieved.

[0040] <Implementation Method 6> right Figure 1 or Figure 2 The method for forming the second electrodes 8 and 18 shown will be described. After forming the insulating interlayer film 7, recesses are formed in a specified area using photolithography and etching techniques.

[0041] <Implementation Method 7> In embodiment 6, when the first electrode 2 and the second electrodes 8, 18 are formed from the same material, firstly, an electrode film for forming the first electrode 2 and the second electrodes 8, 18 is formed by sputtering or vapor deposition. Then, a pattern is formed by photolithography so that only the terminal area is exposed. Then, the thickness of the electrode film is processed to the desired thickness by etching. Furthermore, a pattern is formed by photolithography so that only the effective area is exposed. This area is etched to form the first electrode 2 and the second electrode 8, 18 with different heights.

[0042] <Implementation Method 8> In embodiment 6, when the first electrode 2 and the second electrodes 8, 18 are formed of different materials, firstly, an electrode film serving as the second electrode 8, 18 is formed at a desired height using a method such as sputtering or vapor deposition. Then, a pattern is formed using photolithography to expose only the effective area. The electrode film is then removed by etching. Alternatively, an electrode film serving as the first electrode 2 is formed using a method such as sputtering or vapor deposition. Then, a pattern is formed using photolithography to expose only the terminal area. The electrode film is then removed by etching. Thus, a first electrode 2 and a second electrode 8, 18 with different heights and materials are formed.

[0043] In this disclosure, various embodiments can be freely combined, or appropriately modified or omitted.

[0044] The various methods disclosed herein are summarized and recorded below as appendices.

[0045] (Postscript 1) A semiconductor device includes: a semiconductor substrate comprising an effective region through which a main current flows and a terminal region disposed around the effective region; A first electrode is disposed in the effective region; An insulating interlayer film disposed on the surface side of the semiconductor substrate in the terminal region; and At least one second electrode is disposed in the terminal region and surrounds the effective region in a ring shape. A portion of the at least one second electrode is embedded in the insulating interlayer film. The lower surface of the at least one second electrode is located below the upper surface of the insulating interlayer film.

[0046] (Postscript 2) The semiconductor device described in Appendix 1 further includes a protective film covering the upper surface of the insulating interlayer film. The upper surface of the at least one second electrode is exposed from the upper surface of the insulating interlayer film and is covered by the protective film.

[0047] (Note 3) In the semiconductor device described in Note 1 or Note 2, the at least one second electrode is formed of a material different from the first electrode, and includes at least one material selected from Ti, Cr, W and Mo.

[0048] (Note 4) In the semiconductor device described in Note 1 or Note 2, the at least one second electrode is formed of the same material as the first electrode.

[0049] (Note 5) In any one of the notes 1 to 4, the height of the upper surface of the at least one second electrode is the same as the height of the upper surface of the insulating interlayer film.

[0050] (Note 6) In any one of the semiconductor devices described in Appendix 1 to Appendix 5, the at least one second electrode is a plurality of second electrodes. The plurality of second electrodes have lower surfaces at different heights from the surface of the semiconductor substrate.

[0051] (Note 7) In the semiconductor device described in Appendix 6, each of the plurality of second electrodes comprises at least one material selected from Ti, Cr, W, and Mo. Label Explanation

[0052] 1 Semiconductor substrate, 2 First electrode, 3 p-type semiconductor layer, 4 n-type semiconductor layer, 5 Oxide film, 6 Conductive film, 7 Insulating interlayer film, 8 Second electrode, 9 Protective film, 18 Second electrode, 18A First lower surface, 18B Second lower surface, 28 Second electrode, 38 Second electrode, 48 Second electrode, 48A First lower surface, 48B Second lower surface, 58 Second electrode, 58A First lower surface, 58B Second lower surface.

Claims

1. A semiconductor device, characterized in that, include: A semiconductor substrate comprising an effective region through which a main current flows and a terminal region disposed around the effective region; A first electrode is disposed in the effective region; An insulating interlayer film is disposed on the surface side of the semiconductor substrate in the terminal region; as well as At least one second electrode is disposed in the terminal region and surrounds the effective region in a ring shape. A portion of the at least one second electrode is embedded in the insulating interlayer film. The lower surface of the at least one second electrode is located below the upper surface of the insulating interlayer film.

2. The semiconductor device as claimed in claim 1, characterized in that, It also includes a protective film covering the upper surface of the insulating interlayer film. The upper surface of the at least one second electrode is exposed from the upper surface of the insulating interlayer film and is covered by the protective film.

3. The semiconductor device as claimed in claim 1 or 2, characterized in that, The at least one second electrode is formed of a material different from the first electrode, and includes at least one of Ti, Cr, W and Mo.

4. The semiconductor device as claimed in claim 1 or 2, characterized in that, The at least one second electrode is formed of the same material as the first electrode.

5. The semiconductor device according to any one of claims 1 to 4, characterized in that, The height of the upper surface of the at least one second electrode is the same as the height of the upper surface of the insulating interlayer film.

6. The semiconductor device according to any one of claims 1 to 5, characterized in that, The at least one second electrode may be a plurality of second electrodes. The plurality of second electrodes have lower surfaces at different heights from the surface of the semiconductor substrate.

7. The semiconductor device as claimed in claim 6, characterized in that, Each of the plurality of second electrodes comprises at least one material selected from Ti, Cr, W, and Mo.

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