Microelectronic devices including contact structures and related electronic systems and methods

Abstract

A microelectronic device includes a stacked structure including alternating conductive structures and insulating structures arranged in levels. Each of the levels individually includes a conductive structure and an insulating structure. The microelectronic device includes: a stair structure having steps including lateral ends of the levels; and the contact points are arranged on the stairs in a covering manner at different elevation positions of the stair structure. The contact includes a liner material. The microelectronic device includes a conductive plug structure underlying the liner material of the contact and including: a lateral portion within voids in at least some of the conductive structures; and a vertical portion overlying the lateral portion. Related electronic systems and methods are also described.

Description

[0001] Priority Claim

[0002] This application claims the filing date benefit of U.S. Patent Application No. 18 / 427,720, filed January 30, 2024, and U.S. Provisional Patent Application No. 63 / 491,410, filed March 21, 2023, pursuant to 35 U.S. SC § 119(e), the disclosures of each of which are hereby incorporated herein by reference in their entirety. Technical Field

[0003] In various embodiments, this disclosure generally relates to the field of microelectronic device design and manufacturing. More specifically, this disclosure relates to microelectronic devices (e.g., memory devices, such as 3D NAND memory devices) including staircase structures and contact structures at various step elevations of the staircase structure, and related electronic systems and methods for forming microelectronic devices. Background Technology

[0004] A continuous goal of the microelectronics industry is to increase the memory density (e.g., the number of memory cells per memory die) of memory devices, such as non-volatile memory devices (e.g., NAND flash memory devices). One way to increase the memory density of non-volatile memory devices is to utilize vertical memory array (also known as "three-dimensional (3D) memory array") architectures. A conventional vertical memory array comprises vertical memory strings extending through openings in one or more conductive stacked structures containing conductive and insulating structures. Each vertical memory string may contain at least one selection device that is series-coupled to a serial combination of vertically stacked memory cells. Compared to structures with conventional planar (e.g., two-dimensional) transistor arrangements, this configuration allows for the placement of more switching devices (e.g., transistors) per unit die area (i.e., the length and width of the effective surface occupied) by building an array upwards (e.g., vertically) on the die.

[0005] Vertical memory array architectures typically include electrical connections between conductive structures and access lines (e.g., word lines) in a hierarchy of conductive stacked structures of memory devices, allowing memory cells in the vertical memory array to be uniquely selected for write, read, or erase operations. One method of forming this electrical connection involves forming a so-called "staircase" (or "step") structure at the edge (e.g., horizontal end) of the conductive stacked structure of the memory device. The staircase structure includes individual "steps" defining contact areas of conductive structures, and conductive contact structures can be positioned on the steps to provide electrical pathways to the conductive structures. The conductive contact structures are formed to be physically and electrically in contact with the steps to provide electrical pathways to the conductive structures associated with each corresponding step. Because the steps are located at different elevations within the staircase structure, the conductive contact structures are formed within openings exhibiting a high aspect ratio (HAR). Summary of the Invention

[0006] The embodiments described herein include microelectronic devices comprising a staircase structure and contact structures at various step elevations of the staircase structure, and related electronic systems and methods for forming the microelectronic device. According to one embodiment described herein, a microelectronic device includes: a stacked structure comprising alternating conductive and insulating structures arranged in a hierarchy, each of the hierarchies individually including both conductive and insulating structures; a staircase structure having steps including transverse ends of the hierarchies; contacts covering the steps at different elevations of the staircase structure, the contacts comprising a lining material; and conductive plug structures resting beneath the lining material of the contacts and comprising: transverse portions within gaps in at least some of the conductive structures; and vertical portions covering the transverse portions.

[0007] According to an additional embodiment described herein, a method of forming a microelectronic device includes: forming a preliminary stacked structure comprising a vertically alternating sequence of insulating and sacrificial materials arranged in a preliminary hierarchy; forming a dielectric material on a staircase structure within the preliminary stacked structure, the staircase structure having steps including lateral ends of the preliminary hierarchy of the preliminary stacked structure; replacing the sacrificial material with a conductive structure; forming an opening extending through the dielectric material and exposing portions of the conductive structure at the steps of the staircase structure; selectively forming a conductive material within the voids in the conductive structure and within the opening to form a conductive plug structure, the conductive plug structure individually including: a lateral portion within the voids in at least some of the conductive structure; and a vertical portion overlying the lateral portion; and forming conductive contacts on the steps of the staircase structure, the conductive contacts individually including a liner material and additional conductive material within the opening and overlying the conductive material of the conductive plug structure.

[0008] According to another embodiment described herein, an electronic system includes: a processor operatively coupled to an input device and an output device; and a microelectronic device operatively coupled to the processor, the microelectronic device including: a stacked structure including a vertically alternating sequence of conductive and insulating structures arranged in a hierarchy; a staircase structure within the stacked structure and having steps including lateral edges of the hierarchy; a contact structure terminating on the steps of the staircase structure; conductive plugs between the steps of the staircase structure and the lining material of the contact structure; and a conductive filler material circumferentially surrounding at least some of the conductive plugs, the conductive filler material between vertically opposing portions of the conductive material within at least some of the conductive structures of the stacked structure. Attached Figure Description

[0009] Figures 1A to 1F This is a simplified longitudinal cross-sectional view illustrating different processing stages of a method for forming a microelectronic device according to embodiments of the present disclosure. Figures 1A to 1D and 1F) and simplified top view ( Figure 1E );

[0010] Figure 2 This is a simplified partial cross-sectional perspective view of a microelectronic device according to embodiments of the present disclosure; and

[0011] Figure 3 This is a block diagram of an electronic system according to an embodiment of the present disclosure. Detailed Implementation

[0012] The following description provides specific details, such as material composition, shape, and size, to provide an exhaustive description of embodiments of this disclosure. However, those skilled in the art will understand that embodiments of this disclosure can be practiced without these specific details. In fact, embodiments of this disclosure can be practiced in conjunction with conventional microelectronic device manufacturing techniques used in industry. Furthermore, the description provided below does not form a complete process flow for manufacturing microelectronic devices (e.g., memory devices, such as NAND flash memory devices). The structures described below do not form a complete microelectronic device. Only those process actions and structures necessary for understanding embodiments of this disclosure are described in detail below. Additional actions for forming a complete microelectronic device from the structures can be performed using conventional manufacturing techniques.

[0013] As used herein, the terms “vertical,” “longitudinal,” “horizontal,” and “lateral” refer to the principal plane of the reference structure and are not necessarily defined by the Earth’s gravitational field. A “horizontal” or “lateral” direction is generally parallel to the principal plane of the structure, while a “vertical” or “longitudinal” direction is generally perpendicular to the principal plane of the structure. The principal plane of the structure is defined by the surfaces of the structure that have a relatively larger area than the other surfaces of the structure. Referring to the accompanying drawings, a “horizontal” or “lateral” direction may be perpendicular to the indicated “Z” axis and parallel to the indicated “X” axis and / or parallel to the indicated “Y” axis; and a “vertical” or “longitudinal” direction may be parallel to the indicated “Z” axis, perpendicular to the indicated “X” axis, and perpendicular to the indicated “Y” axis.

[0014] As used herein, the term "intersection point" means and includes the location where two or more features (e.g., areas, structures, materials, openings, devices) or, alternatively, two or more portions of a single feature meet. For example, the intersection point between a first feature extending in a first direction (e.g., the X direction) and a second feature extending in a second direction different from the first direction (e.g., the Y direction, the Z direction) can be the location where the first and second features meet.

[0015] As used herein, the term "generally" with respect to a given parameter, property, or condition means and includes, as understood by one of ordinary skill in the art, the degree to which a given parameter, property, or condition is satisfied within a certain range of variation (e.g., within acceptable tolerances). For example, depending on the specific parameter, property, or condition that is generally satisfied, it may be satisfied at least 90.0%, at least 95.0%, at least 99.0%, at least 99.9%, or even 100.0%.

[0016] As used herein, “about” or “approximate” with respect to a particular parameter includes the degree of variation of the value within acceptable tolerances for the particular parameter, as understood by one of ordinary skill in the art. For example, “about” or “approximate” with respect to a value may include additional values ​​within the range of 90.0% to 108.0% of the value, such as within the range of 95.0% to 105.0%, 97.5% to 102.5%, 99.0% to 101.0%, 99.5% to 100.5%, or 99.9% to 100.1%.

[0017] As used herein, “conductive material” means and includes conductive materials, such as one or more of the following: metals (e.g., tungsten (W), titanium (Ti), molybdenum (Mo), niobium (Nb), vanadium (V), hafnium (Hf), tantalum (Ta), chromium (Cr), zirconium (Zr), iron (Fe), ruthenium (Ru), osmium (Os), cobalt (Co), rhodium (Rh), iridium (Ir), nickel (Ni), palladium (Pd), platinum (Pt), copper (Cu), silver (Ag), gold (Au), aluminum (Al)), alloys (e.g., Co-based) Alloys, Fe-based alloys, Ni-based alloys, Fe and Ni-based alloys, Co and Ni-based alloys, Fe and Co-based alloys, Co, Ni and Fe-based alloys, Al-based alloys, Cu-based alloys, Magnesium (Mg)-based alloys, Ti-based alloys, steel, low-carbon steel, stainless steel), conductive metallic materials (e.g., conductive metal nitrides, conductive metal silicides, conductive metal carbides, conductive metal oxides), and conductive doped semiconductor materials (e.g., conductive doped polycrystalline silicon, conductive doped germanium (Ge), conductive doped silicon-germanium (SiGe)). Furthermore, "conductive structure" means and includes structures formed from conductive materials and containing conductive materials.

[0018] As used herein, “insulating material” means and includes electrically insulating materials, such as one or more of the following: at least one dielectric oxide material (such as one or more of the following: silicon oxide (SiO2)). x Phosphorus silicate glass, borosilicate glass, borosilicate-phosphorus silicate glass, fluorosilicate glass, alumina (AlO) x ), hafnium oxide (HfO) x ), niobium oxide (NbO) x Titanium oxide (TiO) x Zirconium oxide (ZrO) x ), tantalum oxide (TaO) x ) and magnesium oxide (MgO) x ()), at least one dielectric nitride material (e.g., silicon nitride (SiN) y ()), and at least one dielectric oxide nitride material (e.g., silicon oxynitride (SiO) x N y and at least one dielectric carbon nitride material (e.g., silicon carbon nitride (SiO2)). x C z N y This article contains the chemical formula of one or more of "x", "y" and "z" (e.g., SiO2). x AlO x HfO x NbO x TiO x SiN y SiO x N ySiO x C z N y The chemical formula represents a material containing, for each atom of another element (e.g., Si, Al, Hf, Nb, Ti), an average ratio of "x" atoms of one element, "y" atoms of another element, and "z" atoms of any additional element (if any). Because a chemical formula represents relative atomic ratios rather than strict chemical structures, insulating materials can include one or more stoichiometric compounds and / or one or more non-stoichiometric compounds, and the values ​​of "x", "y", and "z" (if any) can be integers or non-integers. As used herein, the term "non-stoichiometric compound" means and includes chemical compounds composed of elements that cannot be expressed by a well-defined ratio of natural numbers and violate the law of definite proportions. Additionally, "insulating structure" means and includes structures formed from and containing insulating materials.

[0019] According to embodiments described herein, a microelectronic device includes a stacked structure comprising alternating conductive and insulating structures arranged in layers, each layer individually including both conductive and insulating structures. The stacked structure includes a staircase structure having steps comprising lateral ends of layers. Contacts (e.g., conductive contact structures) are overlaid on the steps at different elevations of the staircase structure, and conductive plug structures are underlying a liner material of the contacts. The conductive plug structure includes lateral portions within gaps (e.g., vertical central regions) in at least some of the conductive structures and vertical portions overlaid on the lateral portions. In some embodiments, the conductive plug structure comprises a material composition different from the conductive structures of the stacked structure. The lateral extent of individual lateral portions of the conductive plug structure may be relatively larger than the lateral extent of their respective vertical portions, and the lateral extent of individual lateral portions of the conductive plug structure may differ from each other throughout the stacked structure. The conductive plug structure facilitates improved alignment (e.g., vertical alignment) of the contacts with the conductive structures of the stacked structure and facilitates the formation of electrical connections between the contacts and the conductive structures of the stacked structure.

[0020] Microelectronic devices can be formed by selectively forming conductive material within voids in a conductive structure and within openings (e.g., contact openings) in a staircase structure to form a conductive plug structure prior to the formation of contacts. In some embodiments, the conductive plug structure is formed to include tungsten, and the conductive structure is formed to include one or more of titanium, ruthenium, aluminum, and molybdenum. The conductive material may be formed within voids in the conductive structure relatively close to the opening, and the conductive material may not be formed within additional voids in the conductive structure relatively far from the opening. The conductive material in the lateral and vertical portions of the conductive plug structure can be formed in a single material forming process.

[0021] Conductive plug structures facilitate the formation of electrical connections between contacts and conductive structures in a stacked structure without undesirably increasing the overall width of the stacked structure (e.g., horizontal footprint). Furthermore, the formation of conductive plug structures can improve electrical isolation between vertically adjacent conductive structures in the stacked structure, which can lead to a reduction in bridging (e.g., electrical connections) between two or more vertically adjacent conductive structures. In some instances, bridging between vertically adjacent conductive structures in conventional microelectronic devices can be a result of so-called “over-etching” during conventional contact fabrication. Bridging can be mitigated by forming conductive plug structures prior to contact formation, compared to conventional contacts that are simply formed overlying the conventional conductive structures.

[0022] Furthermore, during the formation of the stacked structure, conventional conductive structures may contain voids (e.g., gaps), which increase the resistivity during the operation of conventional microelectronic devices. However, forming a lateral portion of a conductive plug structure within the voids in the conductive structure before forming the contacts, and forming a vertical portion covering the lateral portion of the conductive plug structure, can improve the electrical connection between the contacts and the conductive structure of the stacked structure. This, in turn, provides a reduction in the resistivity (e.g., resistance level) of its conductive material without significantly affecting conductivity. Additionally, forming the conductive plug structure to include a material composition different from that of the conductive structure of the stacked structure (e.g., a tungsten-free material, such as titanium, ruthenium, aluminum, or molybdenum) (e.g., a tungsten-containing material) can also provide a reduction in resistivity. By forming the conductive plug structure (e.g., its lateral portion), voids in the conductive structure can be reduced, and the structural stability of the stacked structure can be improved.

[0023] Figures 1A to 1F A method for forming a microelectronic device structure according to embodiments of the present disclosure is described. Figures 1A to 1D This is a simplified longitudinal cross-sectional view of the microelectronic device structure 100. Figure 1E Explanation along Figure 1D The simplified top view of the microelectronic device structure 100, taken by the cross-sectional line EE, is an enlarged portion. Figure 1F illustrate Figure 1D A magnified portion of the longitudinal cross-sectional view of box F. (Reference) Figure 1AThe microelectronic device structure 100 may include a stacked structure 101 vertically overlying a source structure 102 (e.g., a source plate, at least one source line) and an insulating material 104 vertically overlying the source structure 102. The insulating material 104 may be vertically interposed between the source structure 102 and the stacked structure 101. The source structure 102 may be formed, for example, from and include: a semiconductor material doped with at least one P-type conductive material (e.g., polysilicon doped with at least one P-type dopant (e.g., one or more of boron, aluminum, and gallium)) or at least one N-type conductive material (e.g., polysilicon doped with at least one N-type dopant (e.g., one or more of arsenic, phosphorus, and antimony)). The insulating material 104 may be made of an insulating material (e.g., SiO2). x It is formed and contains the insulating carbon material.

[0024] The stacked structure 101 comprises a vertical (e.g., in the Z direction) alternating sequence of at least two different materials. For example, the stacked structure 101 (e.g., a conductive stacked structure) may comprise a vertical alternating sequence of insulating structures 106 and conductive structures 108 arranged in layers 110 (e.g., conductive layers). Each of the layers 110 may individually comprise one or more of the insulating structures 106 and one or more of the conductive structures 108 directly perpendicularly adjacent to the insulating structures 106. In some embodiments, the insulating material 104 serves as the lowermost insulating structure 106 vertically overlying the source structure 102 (e.g., directly on the source structure 102), such that there is no additional insulating material between the source structure 102 and the stacked structure 101. The insulating structure 106 of the stacked structure 101 may also be referred to herein as "insulating material" and the conductive structure 108 of the stacked structure 101 may also be referred to herein as "conductive material".

[0025] In some embodiments, the number (e.g., quantity) of the layers 110 of the stacked structure 101 ranges from 32 to 256 layers 110. In some embodiments, the stacked structure 101 includes 128 layers 110. However, this disclosure is not limited thereto, and the stacked structure 101 may include a different number of layers 110. The stacked structure 101 may include at least one (e.g., one, two, or more than two) layered structures vertically overlying the source structure 102. For example, the stacked structure 101 may include a single-layered structure of a 3D memory device (e.g., a 3D NAND flash memory device) or, alternatively, a two-layered structure.

[0026] The insulating structure 106 may be formed from, for example, at least one dielectric material, such as at least one dielectric oxide material (e.g., one or more of the following: SiO2). x Phosphorosilicate glass, borosilicate glass, borosilicate-phosphorosilicate glass, fluorosilicate glass, AlO x HfOx NbO x TiO x ZrO x TaO x and MgO x In some embodiments, the insulating structure 106 is formed of and contains silicon dioxide (SiO2).

[0027] The conductive structure 108 may be formed of and comprise a conductive material, including (but not limited to) n-doped polysilicon, p-doped polysilicon, undoped polysilicon, or a metal. In some embodiments, the conductive structure 108 comprises n-doped polysilicon. In other embodiments, the conductive structure 108 comprises tungsten (W). In other embodiments, the conductive structure 108 comprises a material comprising one or more of titanium (Ti), ruthenium (Ru), aluminum (Al), and molybdenum (Mo).

[0028] The conductive structure 108 of the stacked structure 101 can be used as an access line (e.g., word line) structure (e.g., access line board, word line board) of the microelectronic device structure 100. The conductive structure 108 can be individually configured to at least partially replace the initial sacrificial material (e.g., nitride material) through a so-called "replacement gate" or "post-gate" process. Alternatively, the microelectronic device structure 100 can be formed via a so-called "gate-first" process, wherein a layer 110 having alternating conductive structures 108 and insulating structures 106 is formed prior to the formation of additional structures, as described in more detail below. For example, a layer 110 having alternating conductive structures 108 and insulating structures 106 exists in the microelectronic device structure 100 prior to the formation of additional structures.

[0029] The microelectronic device structure 100 may be configured to include a staircase structure 112 within a staircase region of a stacked structure 101. The staircase structure 112 may be formed, for example, by etching each of the layers 110 to define a step 114 at the lateral end of each of the layers 110. In some embodiments, the staircase structure 112 is formed prior to forming the conductive structure 108 by a replacement gate process. A liner material 116 may be formed to vertically overlay (e.g., in the Z direction) the staircase structure 112, and a dielectric material 118 may then be formed to fill the valleys 120 (e.g., spaces, openings) vertically overlaying the staircase structure 112. The staircase structure 112 (and the valleys 120 partially defined by the staircase structure 112) includes a stepped cross-sectional profile in the ZX plane, such as... Figure 1A As shown in the image. The stepped cross-sectional profile of the staircase structure 112 (and valley 120) can be defined by the geometric configuration of the steps 114 of the staircase structure 112. Although Figure 1AThis description focuses on a single staircase structure 112, but additional staircase structures 112 may be formed before, concurrently with, or after the formation of staircase structure 112. For example, a second staircase structure may be formed opposite to staircase structure 112.

[0030] The lining material 116 can be formed as a vertical (e.g., in the Z direction) uppermost layer 110 covering the stair structure 112, the insulating structure 106, and the conductive structure 108. For example... Figure 1A As shown, the lining material 116 may comprise an upper portion extending horizontally (e.g., in the X direction) across and substantially covering the upper surface of the step 114, and a side portion extending vertically (e.g., in the Z direction) across and substantially covering the sides of the step 114. The lining material 116 may be formed to comprise a substantially continuous material (e.g., a substantially continuous lining material) on or above the step 114 of the staircase structure 112. In other embodiments, the lining material 116 comprises an upper portion of the upper surface of the step 114 but does not include a side portion covering the sides of the step 114.

[0031] The liner material 116 may include one or more insulating liner materials (e.g., first liner material 116a). Figure 1F ) and the second lining material 116b covering the first lining material 116a. Figure 1F For example, the first substrate material 116a may be formed of and contain at least one insulating material, such as one or more of the materials described above with reference to the insulating structure 106. The second substrate material 116b may exhibit etch selectivity relative to the insulating structure 106, the dielectric material 118, and the substrate material 116 of the first substrate material 116a. The second substrate material 116b may be formed of and contain, for example, one or more of the following: silicon nitride (Si3N4), silicon oxycarbide (SiO2), etc. x C y ), silicon oxynitride (SiO) x N y ), hydrogenated carbon silicon oxide (SiC) x O y H z ) or silicon dioxide (SiO2) x C y N z The second liner material 116b may comprise a low-k dielectric material, such as a dielectric nitride material or a dielectric oxide material, having a dielectric lower dielectric content than silicon nitride (Si3N4) or silicon oxide (SiO2). x The dielectric constant (k) of a silicon oxide material containing silicon atoms, carbon atoms, oxygen atoms, and hydrogen atoms. In some embodiments, the first liner material 116a of the liner material 116 comprises SiO2, and the second liner material 116b comprises Si3N4.

[0032] An upper dielectric material 122, which can be used as a mask material, may be positioned on the uppermost layer 110 of the stacked structure 101. The upper dielectric material 122 may be formed of and comprise an insulating material, such as (for example) one or more of the following: phosphosilicate glass (PSG), borosilicate glass (BSG), fluorosilicate glass (FSG), borosilicate glass (BPSG), and silicon dioxide (SiO2). In some embodiments, the upper dielectric material 122 comprises the same material composition (e.g., SiO2) as the insulating structure 106.

[0033] In some examples, voids 124 (e.g., gaps) may be formed within dielectric material 118 during the fabrication of microelectronic device structure 100. For example, dielectric material 118 may include one or more voids 124 exhibiting high aspect ratio (HAR) during the formation of dielectric material 118 within valley 120. Furthermore, additional voids 126 (e.g., gaps, slots) may be formed within at least some regions 128 (e.g., vertical central regions) of conductive structure 108 during the fabrication of stacked structure 101. For example, conductive structure 108 may include one or more additional voids 126 within regions 128 due to material formation (e.g., growth, deposition) processes of the conductive material (e.g., W) used to form conductive structure 108. In some examples, additional voids 126 may exist at the location of residual portions of sacrificial material (e.g., nitride material) of layer 110 removed during a gate replacement process.

[0034] Continue to refer to Figure 1A An opening 130 (e.g., a contact opening) may be formed within the dielectric material 118 overlying the staircase structure 112. The opening 130 extends vertically through the upper dielectric material 122, the dielectric material 118, and the liner material 116 to expose the conductive structure 108 of the stacked structure 101 and the steps 114 of the staircase structure 112. The opening 130 may have any suitable lateral cross-sectional shape, such as (for example) a generally circular cross-sectional shape, a generally square cross-sectional shape, a generally elliptical cross-sectional shape, or a generally triangular cross-sectional shape. In some embodiments, each of the openings 130 individually exhibits a generally circular cross-sectional shape with a generally circular cross-sectional area. Although Figure 1A Four openings 130 are shown for clarity, but additional openings 130 may be formed within the dielectric material 118 covering the stacked structure 101.

[0035] Opening 130 may extend from the upper surface of the upper dielectric material 122 into or into the uppermost conductive structure 108 of an individual step 114 of the staircase structure 112. For example, the lower vertical boundary of opening 130 may be defined by the upper surface of conductive structure 108 (e.g., step 114 of staircase structure 112). Alternatively or additionally, at least some of openings 130 may extend below the upper surface of conductive structure 108 and into a portion (e.g., the upper part) of its conductive material to expose additional voids 126 within area 128. Openings 130 may be individually shaped to intersect with additional voids 126 within area 128 of conductive structure 108 at intersection point 129. The horizontal boundary of opening 130 may be defined by the surface (e.g., side) of each of the upper dielectric material 122, dielectric material 118, liner material 116, and the remaining portion of the conductive material of conductive structure 108. Opening 130 may be configured (e.g., sized and shaped) to receive subsequently formed structures, such as Figure 1D It is displayed in the middle.

[0036] At least some of the openings 130 have a different depth and / or aspect ratio (e.g., height-to-width ratio, depth-to-width ratio) than the others in the openings 130. Some or all of the aspect ratios may be high aspect ratios (HAR), exhibiting, for example, at least about 3:1 (e.g., at least about 10:1) for the shallowest opening 130. Although the openings 130 in the figures are illustrated as having vertical sidewalls, in some embodiments, the sidewalls may be inclined (e.g., tapered).

[0037] refer to Figure 1B Conductive material (such as one or more of the conductive materials described above regarding the conductive material of conductive structure 108, e.g., W) is selectively formed (e.g., grown) on the conductive structure 108 exposed within the opening 130 to form selectively conductive material 132. For example, after forming the opening 130, the native oxide may be removed from the exposed conductive structure 108 (e.g., at the bottom of the opening 130), and then the exposed portion of the conductive structure 108 is surface-treated to prepare the exposed surface for forming (e.g., growing, depositing) the selectively conductive material 132. The selectively conductive material 132 may then be selectively formed (e.g., grown, deposited) only on the exposed portion of the conductive structure 108 and not on the upper dielectric material 122, the dielectric material 118 containing a portion of it within the void 124, and the liner material 116.

[0038] The selectively conductive material 132 may be wholly or partially crystalline (e.g., single crystal, polycrystalline) or amorphous. Furthermore, the material composition of the selectively conductive material 132 may be substantially the same as or different from the material composition of the conductive material of the conductive structure 108. For example, the selectively conductive material 132 may exhibit a material structure (e.g., a crystalline structure) different from the material structure of the conductive structure 108. In some embodiments, the selectively conductive material 132 comprises tungsten, and the conductive structure 108 comprises one or more of titanium, ruthenium, aluminum, and molybdenum, such that the conductive structure 108 is substantially free of tungsten.

[0039] The selectively conductive material 132 may be formed from and include a material composition adapted to reduce (e.g., minimize) additional voids 126 that may occur during the formation of the conductive structure 108 of the stacked structure 101. Thus, the material composition of the selectively conductive material 132 can be selected to improve properties during the formation (e.g., deposition, growth) of such a material. The selectively conductive material 132 may comprise a single material or, alternatively, multiple materials (e.g., two or more) with clearly defined boundaries between them. For example, the formation of the selectively conductive material 132 may involve forming a first portion (e.g., a liner) having a first material composition adjacent to the conductive material of the conductive structure 108 (e.g., directly on the conductive material) and then forming a second portion having a second material composition adjacent to the first portion (e.g., directly on the first portion). The formation of selective conductive material 132 can be used to reduce the potential occurrence of voids, gaps, etc. during the formation of stacked structure 101 and improve metal-to-metal contact between selective conductive material 132 and conductive material of conductive structure 108, and does not allow (e.g., does not facilitate) selective conductive material 132 to accumulate, for example, along the sidewall of dielectric material 118 within opening 130.

[0040] In some embodiments, the selectively conductive material 132 is formed using a PVD or CVD process. The selectively conductive material 132 may be formed from and comprise a material configured to enhance its material formation and conductivity. For example, the selectively conductive material 132 may be formed from and comprise a single-phase material (e.g., β-phase tungsten material or α-phase tungsten material). The selectively conductive material 132 may be formed (e.g., grown, deposited) adjacent to an exposed surface (e.g., upper surface, side surface) of the conductive structure 108 (e.g., on the exposed surface, directly on the exposed surface). The conductive material of the conductive structure 108 may be used as a seed material to form the selectively conductive material 132. In some embodiments, where a precursor material comprising, for example, the selectively conductive material 132, is grown directly on the conductive structure 108, the phase of the selectively conductive material 132 (e.g., β phase, α phase) is at least partially dependent on the phase of the material of the conductive structure 108 (e.g., β phase, α phase).

[0041] In other embodiments, the selectively conductive material 132 is formed using an ALD process. In some such embodiments, the selectively conductive material 132 is formed from a precursor comprising tungsten hexafluoride (WF6) and silane (SiH4). Therefore, in some embodiments, the selectively conductive material 132 is formed from a halogen-containing precursor. In some such embodiments, the selectively conductive material 132 contains at least some of the halogens (e.g., fluorine).

[0042] For example, a precursor material (e.g., a semiconductive substrate material) may be formed of and comprise at least one semiconductive material, such as one or more of the following: silicon, silicon-germanium, boron, germanium, gallium arsenide, gallium nitride, and indium phosphide. By a non-limiting example, the precursor material may be formed of and comprise at least one silicon material. As used herein, the term "silicon material" means and includes materials comprising elemental silicon or silicon compounds. The precursor material may, for example, be formed of and comprise at least one monocrystalline silicon and polycrystalline silicon. In some embodiments, the precursor material comprises polycrystalline silicon.

[0043] The precursor material can be formed to exhibit desired dimensions (e.g., height, width) at least in part based on the desired dimensions of the selectively conductive material 132, and can be formed using one or more conventional conformal deposition processes, such as one or more of conventional conformal CVD processes and conventional ALD processes. In some embodiments, the precursor material is doped (e.g., impregnated) with one or more dopants (e.g., chemical species). The dopants doped with the precursor material can include materials that facilitate or promote the subsequent formation of tungsten (e.g., β-phase tungsten) from the doped precursor material, as described in more detail below. In some embodiments, the dopants include at least one N-type dopant, such as one or more of phosphorus (P), arsenic (Ar), antimony (Sb), and bismuth (Bi). In additional embodiments, the dopants include at least one P-type dopant, such as one or more of boron (B), aluminum (Al), and gallium (Ga). In other embodiments, the dopants include one or more of carbon (C), fluorine (F), chlorine (Cl), bromine (Br), hydrogen (H), deuterium (C), fluorine (F), chlorine (Cl), bromine (Br), hydrogen (H), deuterium (B), fluorine ...B), chlorine (C), fluorine (B), fluorine (C), fluorine (B), chlorine (C), fluorine (B), fluorine (C), fluorine (B), fluorine (C), fluorine (B), fluorine (C), 2 H, helium (He), neon (Ne), and argon (Ar).

[0044] The precursor material of the selectively conductive material 132 may be doped with at least one dopant to form the doped precursor material using conventional processes (e.g., conventional implantation processes, conventional diffusion processes) not described in detail herein. As a non-limiting example, one or more phosphorus-containing species (e.g., phosphorus atoms, phosphorus-containing molecules, phosphorus ions, phosphorus-containing ions) may be implanted into the precursor material to form the doped precursor material. Phosphorus-containing species may, for example, include phosphorus ions (P... 3-As another non-limiting example, one or more arsenic-containing species (e.g., arsenic atoms, arsenic-containing molecules, arsenic ions, arsenic-containing ions) can be implanted into a precursor material to form a doped precursor material. Arsenic-containing species may, for example, include arsenic ions (As... 3+ In some embodiments, after dopant implantation, the amount of dopant in the doped precursor material ranges from about 0.001 atomic% to about 10 atomic%. Individual portions of the doped precursor material of the selectively conductive material 132 may individually exhibit a substantially homogeneous distribution of dopant within its semiconducting material, or may individually exhibit a heterogeneous distribution of dopant within its semiconducting material.

[0045] Subsequently, a portion of the doped precursor material can be converted into a selectively conductive material 132 containing tungsten and a dopant containing the doped precursor material. The conversion process allows a portion of the semiconducting material (e.g., silicon, such as polycrystalline silicon) containing a doped precursor material with dopant dispersed therein to be converted into tungsten relatively faster than the undoped semiconducting material.

[0046] At least some of the tungsten in the selectively conductive material 132 may include β-phase tungsten. β-phase tungsten has a metastable A15 cubic structure. The grains of β-phase tungsten may exhibit a generally columnar shape. Tungsten contained in the selectively conductive material 132 may exist only in the β phase or may exist in both beta (β) and alpha (α) phases. α-phase tungsten (if present) has a metastable body-centered cubic structure. The grains of α-phase tungsten may exhibit a generally equidistant shape. If the selectively conductive material 132 contains both β-phase and α-phase tungsten, the amount of β-phase tungsten contained therein may differ from or be substantially the same as the amount of α-phase tungsten contained therein. In some embodiments, the amount of β-phase tungsten contained in the selectively conductive material 132 is greater than the amount of α-phase tungsten contained therein. For example, at least a majority (e.g., more than 50%, such as more than or equal to about 60%, more than or equal to about 70%, more than or equal to about 80%, more than or equal to about 90%, more than or equal to about 95%, or more than or equal to about 99%) of the tungsten contained in the selectively conductive material 132 may be present in the β phase.

[0047] The dopants included in the selectively conductive material 132 may be substantially the same as those included in the dopant precursor material used to form the selectively conductive material 132. For example, the dopants used to form the selectively conductive material 132 (e.g., N-type dopants, P-type dopants, other dopants) may be present therein after its formation. In some embodiments, the selectively conductive material 132 comprises β-phase tungsten doped with one or more of As and P. The dopants in the selectively conductive material 132 may support (e.g., promote, facilitate) the stability of its β-phase tungsten.

[0048] The selectively conductive material 132 may exhibit a substantially homogeneous distribution of its dopants or a heterogeneous distribution of its dopants. The distribution of dopants within the selectively conductive material 132 may be substantially the same as or different from the distribution of dopants within the dopant precursor material.

[0049] Selectively conductive material 132 can be formed by treating a doped precursor material with one or more chemical species to promote the conversion of its semiconductive material (e.g., silicon) into tungsten (e.g., β-phase tungsten, α-phase tungsten). As a non-limiting example, if the doped precursor material includes doped silicon (e.g., doped polycrystalline silicon), then the doped precursor material can be treated with tungsten hexafluoride (WF6) to form selectively conductive material 132. The silicon (Si) of the doped precursor material can react with WF6 to produce tungsten (W) and silicon tetrafluoride (SiF4). The resulting SiF4 is removed as a gas. The resulting W retains the dopant from the doped precursor material to form selectively conductive material 132. The doped precursor material can be treated with WF6, for example, using conventional CVD equipment at temperatures ranging from about 200°C to about 500°C.

[0050] Continue to refer to Figure 1B The selectively conductive material 132 can be in direct physical contact with the conductive structure 108 within the horizontal portion of the additional void 126 (e.g., within region 128 of the conductive structure 108) and the vertical portion of the opening 130. Therefore, the selectively conductive material 132 extends in at least one horizontal direction (e.g., the X direction, Y direction) and a vertical direction generally orthogonal to the horizontal direction (e.g., the Z direction). The formation of the selectively conductive material 132 results in the formation of a lateral portion 134 within the additional void 126 within region 128 of the conductive structure 108 and a vertical portion 136 within the lower portion of the opening 130, thereby forming a conductive plug structure 137. The conductive plug structure 137 includes the lateral portion 134 (e.g., conductive filler material) and the vertical portion 136 (e.g., conductive plug, plug region) of the selectively conductive material 132.

[0051] The selectively conductive material 132 of the conductive plug structure 137 may be formed (e.g., in a single material forming action) to a desired lateral extent (e.g., horizontal width) and a desired thickness (e.g., vertical height). The selectively conductive material 132 may at least partially (e.g., substantially) fill the additional void 126 near the opening 130, such that the lateral extent of the lateral portion 134 is relatively larger than the lateral extent of the opening 130. The lateral portion 134 of the selectively conductive material 132 may be substantially surrounded by the conductive material of the conductive structure 108. For example, the selectively conductive material 132 may be adjacent (e.g., directly adjacent) to the conductive material of the conductive structure 108 in one or more horizontal directions (e.g., X direction, Y direction) and in a vertical direction (e.g., Z direction). Additionally, the selectively conductive material 132 may at least partially (e.g., substantially fill) the lower portion of at least some (e.g., each) of the openings 130. In some embodiments, the additional portion of the selectively conductive material 132 substantially surrounds (e.g., substantially laterally surrounds) the lower portion of the opening 130.

[0052] In some embodiments, the additional void 126 within region 128 of conductive structure 108 may be enlarged by one or more material removal processes (e.g., lateral recess, vertical recess) before the selectively conductive material 132 is formed therein. For example, a residual portion of the conductive material of conductive structure 108 may remain close to opening 130, at least partially “pinching” and closing (e.g., sealing) the region between opening 130 and the additional void 126. The residual portion of the conductive material of conductive structure 108 close to opening 130 may be selectively removed, for example, by etching, to recess the conductive material of conductive structure 108 into its region 128 and enlarge the additional void 126. Thus, a portion of the conductive material centrally located within conductive structure 108 may be recessed (e.g., removed), and additional portions of the conductive material of conductive structure 108 may exist within the periphery of conductive structure 108 (e.g., adjacent to insulating structure 106). The selectively conductive material 132 may be formed adjacent to (e.g., directly adjacent to) the exposed surface of the conductive material of the conductive structure 108 within its region 128 to form a lateral portion 134 and within the lower portion of the opening 130 to form a vertical portion 136 of the conductive plug structure 137. The selectively conductive material 132 may substantially completely fill the remaining portion of the region 128 of the conductive structure 108 so as to substantially completely extend between the exposed surfaces (e.g., upper surface, lower surface, side surface) of the conductive material of the conductive structure 108.

[0053] In some embodiments, at least some of the vertical portions 136 of the conductive plug structures 137 extend vertically above the liner material 116, such that the upper surface of the vertical portions 136 is perpendicularly above the upper surface of the liner material 116 and therefore perpendicularly above the upper surface of the conductive structure 108 at the step 114. In some embodiments, the thickness of the vertical portions 136 of the conductive plug structures 137 is one or more times the initial thickness of each of the conductive structures 108. Individual vertical portions 136 of the selective conductive material 132 may be formed to the same thickness as the grown (e.g., deposited) conductive material. In additional embodiments, the upper surface of the vertical portions 136 of the conductive plug structures 137 may be substantially coplanar with the upper surfaces of the liner material 116 and one or more of the conductive structures 108 at the step 114.

[0054] In some embodiments, the formation of the opening 130 results in partial material loss from the exposed portion (e.g., the upper part) of the conductive structure 108. In some such embodiments, vertical portions 136 of the selectively conductive material 132 formed within the opening 130 extend to different heights above and different depths below the upper surface of the corresponding conductive structure 108. In some embodiments, at least some of the vertical portions 136 of the conductive plug structures 137 are vertically recessed relative to the liner material 116, such that the uppermost boundary (e.g., the upper surface) of the vertical portion 136 is vertically below the lowermost boundary (e.g., the lower surface) of the liner material 116 (e.g., at or below the upper surface of the conductive structure 108 at step 114). In some such embodiments, the conductive plug structure 137 has substantially no liner material on the sides of the vertical portions 136. In other embodiments, the vertical portions 136 of the conductive plug structure 137 are horizontally adjacent to the conductive structure 108 but not vertically adjacent to it. For example, at least some of the vertical portions 136 in the conductive plug structure 137 may be recessed vertically relative to the upper surface of the conductive structure 108, such that the upper surface of the vertical portion 136 is vertically below the upper surface of the conductive structure 108 at the step 114.

[0055] like Figure 1BAs shown, the additional void 126 within region 128 of conductive structure 108 may comprise a first region 126a (e.g., an unfilled region) and a second region 126b (e.g., a filled region). The first region 126a of the additional void 126 may be located away from opening 130 (e.g., isolated from or relatively far from opening 130) and thus away from the lateral portion 134 of selectively conductive material 132. Therefore, at least some (e.g., each) of the first regions 126a may be substantially free of selectively conductive material 132. The second region 126b may be positioned close to (e.g., relatively close to) opening 130 and may be at least partially (e.g., substantially completely) filled with selectively conductive material 132 after its lateral portion 134 is formed. Since selectively conductive material 132 is formed through opening 130, its lateral portion 134 may be formed in the second region 126b and not in the first region 126a of the additional void 126.

[0056] In some embodiments, the selectively conductive material 132 within the second region 126b of the additional void 126 is substantially centered along the horizontal centerline of the conductive structure 108. The horizontal centerline of the selectively conductive material 132 may be substantially aligned with the horizontal centerline of the conductive structure 108, wherein substantially equal portions of the conductive material of the conductive structure 108 are positioned above and below the selectively conductive material 132. However, this disclosure is not limited thereto, and the additional void 126 may be located in additional locations (e.g., relatively close to the insulating structure 106 of the stacked structure 101). For example, the horizontal centerline of the selectively conductive material 132 may be positioned above or alternatively below the horizontal centerline of the conductive structure 108, such that opposing portions of the conductive material of the conductive structure 108 contain unequal thicknesses (e.g., heights) above and below the selectively conductive material 132 within the region 128 of the conductive structure 108. In some embodiments, the additional void 126 is directly adjacent to one or more of the insulating structures 106.

[0057] After the conductive material of the conductive structure 108 is formed, additional voids 126 (e.g., gaps) within at least some regions 128 of the conductive structure 108 may be formed unevenly due to material formation during the formation of the stacked structure 101. The location and extent (e.g., vertical extent, horizontal extent, volume) of the additional voids 126 may vary within the stacked structure 101 of the microelectronic device structure 100. Therefore, the location of the second region 126b containing the additional voids 126 of the lateral portion 134 of the selectively conductive material 132 may vary (e.g., randomly) across all conductive structures 108 of the layer 110. The first region 126a may or may not be connected to the second region 126b (e.g., physically connected). Furthermore, individual conductive structures 108 within the various layers 110 of the stacked structure 101 may or may not contain additional voids 126. The lateral portion 134 within the second region 126b of the additional voids 126 may be adjacent to (e.g., vertically adjacent, horizontally adjacent, in direct contact with) the vertical portion 136 of the selectively conductive material 132. Compared to conventional conductive structures formed by using a single process action (e.g., a single deposition action of a single conductive material), the conductive structure 108 containing the selectively conductive material 132 can result in a reduction of voids in the layer 110 by forming the selectively conductive material 132 in region 128 of the conductive structure 108 in a second process action.

[0058] refer to Figure 1C After forming the transverse portion 134 and vertical portion 136 of the selectively conductive material 132 (also described herein as a conductive plug structure 137), the contact structure 142 ( Figure 1D The liner material 138 may be formed (e.g., conformally deposited) within the opening 130. The liner material 138 may be continuous along the vertical distance between the upper dielectric material 122 and the dielectric material 118. The liner material 138 may be formed of and comprise an insulating material, such as an oxide material, a nitride material, or an oxide oxynitride material. In some embodiments, the liner material 138 comprises a high-quality silicon oxide material, such as ALD SiO2. x The substrate material 138 can be substantially uniform and substantially conformal during deposition. For example, the substrate material 138 can be a substantially uniform and substantially conformal silicon oxide material (e.g., a highly uniform and highly conformal silicon dioxide material). The substrate material 138 can be formulated to form in HAR openings (e.g., openings of HARs having a ratio of at least about 20:1, at least about 50:1, at least about 100:1, or at least about 1000:1) without forming voids. The substrate material 138 can exhibit etch selectivity relative to the surrounding material (including substrate material 116). The substrate material 138 is formed by conventional techniques, such as by CVD or ALD. In some embodiments, the substrate material 138 is formed by plasma-enhanced ALD (PEALD).

[0059] In some embodiments, a so-called "through-etch" is then performed to remove a portion of the liner material 138 and expose the underlying portion of the vertical portion 136 of the conductive plug structure 137. In some embodiments, the lowermost surface of the remaining portion of the liner material 138 extends to or beyond the upper surface of the vertical portion 136 of the conductive plug structure 137. In other embodiments, a portion of one or more of the liner material 116 and the dielectric material 118 is laterally exposed below the lowermost surface of the liner material 138, such that the liner material 138 terminates above the elevation of the vertical portion 136 of the conductive plug structure 137. Forming the selectively conductive material 132 prior to forming the liner material 138 and performing its through-etch can mitigate over-etching compared to conventional forming processes.

[0060] refer to Figure 1D After the liner material 138 is formed, additional conductive material 140 may be formed within the opening 130 to form a contact structure 142. The additional conductive material 140 may be formed to substantially fill the remaining portion of the opening 130, which extends vertically through the upper dielectric material 122 and the dielectric material 118 to reach the conductive plug structure 137 (e.g., its vertical portion 136). The contact structure 142 includes the liner material 138 and the additional conductive material 140.

[0061] In some embodiments, the vertical portion 136 of the conductive plug structure 137 is directly inserted between the liner material 138 and the additional conductive material 140 of the contact structure 142 and the lateral portion 134 of the conductive plug structure 137. The contact structure 142 can be perpendicularly separated from the conductive structure 108 of the stacked structure 101 by the vertical portion 136 of the conductive plug structure 137. For example, the vertical portion 136 of the conductive plug structure 137 can be perpendicularly inserted between the contact structure 142 and the conductive structure 108, such that the additional conductive material 140 is perpendicularly separated from the conductive material of the conductive structure 108 by the conductive plug structure 137 (e.g., in the Z direction). In other embodiments, the additional conductive material 140 of the contact structure 142 extends to and contacts the conductive structure 108. For example, the additional conductive material 140 of the contact structure 142 may directly contact (e.g., directly physically contact) the conductive material of the conductive structure 108, for example, when the vertical portion 136 of the conductive plug structure 137 is horizontally adjacent to the conductive structure 108 and is recessed vertically relative to its upper surface.

[0062] In some embodiments, the additional conductive material 140 extends vertically through a portion (e.g., all) of the liner material 116, for example, when the vertical portion 136 of the conductive plug structure 137 is relative to the liner material 116 (e.g., the second liner material 116b). Figure 1FWhen vertically recessed, the additional conductive material 140 can be substantially surrounded by the liner material 138 and physically contact (e.g., directly contact) the vertical portion 136 of the conductive plug structure 137. For example, the contact structure 142 can extend through the dielectric material 118 and, in some embodiments, through the liner material 116 to individually contact the upper surface of the vertical portion 136 of the conductive plug structure 137. The outer surfaces (e.g., sidewalls) of the contact structure 142 can individually exhibit a tapered vertical profile, wherein the upper portion of the individual contact structure 142 has a critical dimension (e.g., width) larger than its lower portion.

[0063] The additional conductive material 140 may be one or more of the conductive materials described above with reference to conductive structure 108. In some embodiments, the additional conductive material 140 of contact structure 142 comprises the same material composition as conductive structure 108 (e.g., W). In some embodiments, the material composition of conductive plug structure 137 differs from the material composition of one or more (e.g., each) of conductive structure 108 of stacked structure 101 and additional conductive material 140 of contact structure 142. The upper surface of contact structure 142 may be planarized, for example, by one or more CMP actions to promote or enhance the flatness of the upper boundary (e.g., upper surface) of contact structure 142 for further processing thereon. Although Figure 1D Four contact structures 142 are shown for clarity, but additional contact structures 142 may be formed within the microelectronic device structure 100.

[0064] Figure 1E Explanation along Figure 1D The simplified top view of the microelectronic device structure 100, taken by the cross-sectional line EE, is an enlarged portion. For clarity and ease of understanding of the diagrams and related descriptions, Figure 1E There is no surrounding material. For clarity, the transverse portion 134 of the selectively conductive material 132 of the conductive plug structure 137 is illustrated with dashed lines to show the additional gap 126 relative to the position of the contact structure 142. Figure 1D The location of the transverse portion 134 within the conductive structure 108 is specified, but it should be understood that the transverse portion 134 of the selectively conductive material 132 is vertically recessed into region 128 of the conductive structure 108. Figure 1D )Inside.

[0065] In some embodiments, the vertical portion 136 includes an additional portion 136a of the selectively conductive material 132. The additional portion 136a may extend horizontally (e.g., in the X and Y directions) beyond the outer horizontal boundary of the contact structure 142 (e.g., its liner material 138) and thus beyond the outer horizontal boundary of the vertical portion 136 of the selectively conductive material 132, such as... Figure 1E As shown in the diagram. An additional portion 136a of the selectively conductive material 132 can be present in the staircase structure 112 ( Figure 1D) each step 114 ( Figure 1D The conductive structure 108 and the first liner material 116a on the surface Figure 1F The elevation of one or more of the materials may optionally laterally surround the vertical portion 136. Thus, the additional portion 136a may be positioned horizontally close to and may at least partially (e.g., substantially) surround the vertical portion 136 of the selectively conductive material 132.

[0066] In some embodiments, an additional portion 136a of the selectively conductive material 132 horizontally surrounds the lower portion of the contact structure 142. In other embodiments, the additional portion 136a extends horizontally beyond the outer horizontal boundary of the contact structure 142 and is not positioned horizontally adjacent to the contact structure 142, such that the uppermost surface of the selectively conductive material 132 is vertically below the liner material 138 of the contact structure 142. In other embodiments, a vertical portion 136 of the selectively conductive material 132 lies vertically below the contact structure 142 and the additional portion 136a does not extend horizontally beyond the outer horizontal boundary of the contact structure 142.

[0067] like Figure 1E As shown, at least a portion of the contact structure 142, comprising a liner material 138 and additional conductive material 140, may be within the horizontal boundary (e.g., a horizontal region) of the lateral portion 134 of the conductive plug structure 137, but other configurations are contemplated. Furthermore, the vertical portion 136 may be within the horizontal boundary of the lateral portion 134 of the conductive plug structure 137. The lateral dimension (e.g., a first width W1, diameter in the X direction) of individual contact structures 142 may be relatively smaller than the lateral dimension (e.g., a second width W2, diameter in the X direction) of the vertical portion 136 of the conductive plug structure 137 (e.g., its additional portion 136a). In other embodiments, the second width W2 is approximately the same size as the first width W1. Because the contact structures 142 may individually exhibit a tapered vertical profile, the second width W2 of the vertical portion 136 of the conductive plug structure 137 may be relatively larger than the first width W1 at the lower portion but not relatively larger than the first width W1 at the upper portion of the contact structure 142. The lateral dimension (e.g., the third width W3, the diameter in the X direction) of the lateral portion 134 of the conductive plug structure 137 may be relatively larger than one or more (e.g., each) of the first width W1 and the second width W2. Due to the additional gap 126 ( Figure 1D The position and extent (e.g., horizontal extent) of the conductive plug structure 137 can vary within the stacked structure 101 of the microelectronic device structure 100, so the third width W3 of the lateral portion 134 of the conductive plug structure 137 can vary (e.g., be different) among each other throughout the stacked structure 101.

[0068] By way of non-limiting examples, the first width W1 may be in the range of about 80 nm to about 200 nm, for example, from about 80 nm to about 100 nm, from about 100 nm to about 150 nm, or from about 150 nm to about 200 nm, and the second width W2 may be in the range of about 100 nm to about 250 nm, for example, from about 100 nm to about 150 nm, from about 150 nm to about 200 nm, or from about 200 nm to about 250 nm. The third width W3 may be between about 2 times and 10 times (e.g., one order of magnitude) the second width W2. By way of non-limiting examples, the second width W2 may be in the range of about 110 nm to about 180 nm, and the third width W3 may be in the range of about 200 nm to about 800 nm. For example, the third width W3 can range from about 200 nm to about 400 nm, from about 400 nm to about 600 nm, or from about 600 nm to about 800 nm, or even larger, depending on the varying width of the additional gap 126. Since the lateral portion 134 of the conductive plug structure 137 is within the uppermost conductive structure 108, the third width W3 ensures that the horizontal boundary of the lateral portion 134 does not extend horizontally beyond the step 114 in at least one direction (e.g., in the positive X direction). Figure 1D However, one or more of the transverse portions 134 of the conductive plug structure 137 may extend horizontally beyond the horizontal boundary of the overlying step 114 (e.g., in the negative X direction).

[0069] Figure 1F illustrate Figure 1D This is an enlarged portion of the longitudinal cross-sectional view of box F. For clarity and ease of understanding of the diagram and related descriptions, Figure 1F There is no surrounding material. Due to the opening of 130 ( Figure 1D At least some of the openings 130 extend below the upper surface 108a of the individual conductive structure 108 and within a portion (e.g., the upper part) of its conductive material, thus exposing at least some of the additional voids 126 (e.g., the second region 126b) within the region 128 of the conductive structure 108. During the formation of the microelectronic device structure 100, the opening 130 may be formed to extend below the upper surface 108a and not extend beyond the lower surface 108b of the conductive structure 108. After the conductive plug structure 137 is formed, the vertical portion 136 of the selectively conductive material 132 may extend below the upper surface 108a and not extend beyond the lower surface 108b of the conductive structure 108. In some embodiments, at least some of the vertical portions 136 of the selectively conductive material 132 extend below the upper surface of the lateral portion 134 (e.g., within the second region 126b) and not extend beyond the lower surface of its lateral portion 134. For convenience, the lateral portion 134 and the vertical portion 136 are described as separate portions of the selectively conductive material 132, but it should be understood that the selectively conductive material 132 may comprise a single continuous portion of conductive material.

[0070] The vertical portion 136 directly contacts (e.g., directly physically contacts) the lateral portion 134 of the conductive plug structure 137 and directly contacts its additional portion 136a (if present). An elongated portion of the lateral portion 134 extends in at least one horizontal direction (e.g., in the X or Y direction), and an elongated portion of the vertical portion 136 extends in a vertical direction orthogonal to the horizontal direction (e.g., in the Z direction). The lateral portion 134 substantially surrounds (e.g., substantially laterally surrounds) the vertical portion 136 of the conductive plug structure 137 in at least one horizontal direction. In a single material forming process, the lateral portion 134 of the conductive plug structure 137 may be formed within region 128 of the conductive structure 108, and the vertical portion 136 of the conductive plug structure 137 may be formed in opening 130. Figure 1D The transverse portion 134 and the vertical portion 136 (e.g., including an additional portion 136a) of the conductive plug structure 137 may contain substantially the same material composition and have no easily identifiable physical interface between them. Alternatively, the transverse portion 134 and the vertical portion 136 may contain different material compositions from each other, such that the material composition of the vertical portion 136 (e.g., the plug region) is different from the material composition of the transverse portion 134 of the conductive plug structure 137.

[0071] The lateral portion 134 and vertical portion 136 of the selectively conductive material 132 can individually form a generally "L-shaped" structure of the conductive plug structure 137 at individual steps 114, approaching the uppermost conductive structure 108. Therefore, the conductive plug structure 137 physically contacts the uppermost of the conductive structures 108 at steps 114 on at least two consecutive sides (e.g., lateral and vertical sides). Thus, a multidimensional (e.g., two-dimensional) contact area of ​​the uppermost conductive structure 108 can be exposed to form two corresponding consecutive sides of the conductive plug structure 137. The exposure of the multidimensional contact area of ​​the uppermost conductive structure 108 further enhances (e.g., further enlarges) the available area of ​​the selectively conductive material 132, where the conductive plug structure 137 will be formed, having more than one side (e.g., both sides).

[0072] As previously referenced Figure 1B Description: The first zone 126a of the additional gap 126 can be located away from the opening 130. Figure 1D And thus, it is far from the lateral portion 134 of the selectively conductive material 132. The second region 126b may be positioned close to the opening 130 and is at least partially (e.g., substantially) filled with the selectively conductive material 132. Therefore, the second region 126b is relatively close to the contact structure 142 and the first region 126a is relatively far from the contact structure 142. Figure 1FAs shown, the second region 126b (containing the transverse portion 134 of the selectively conductive material 132) can be positioned within the uppermost conductive structure 108 of an individual step 114 of the staircase structure 112 and in direct contact with the vertical portion 136 of the conductive plug structure 137. The first region 126a can optionally be positioned within the conductive structure 108 that is vertically subordinate to the uppermost conductive structure 108. Therefore, the second region 126b is positioned below the contact structure 142 and close to the end face of the step 114, and the first region 126a can optionally be positioned below the second region 126b of the additional gap 126. Although in Figure 1F A single step 114 is described as being defined by two levels 110, but a single step 114 may alternatively be defined by a single (e.g., only one) level 110.

[0073] like Figure 1F As shown, the lower surface of the contact structure 142 (e.g., its additional conductive material 140) can directly contact the upper surface of the vertical portion 136 of the selectively conductive material 132 along the first interface 144 (e.g., a horizontal interface). Furthermore, one or more sides (e.g., lateral sides, horizontal sides) of the vertical portion 136 of the selectively conductive material 132 can directly contact the stacked structure 101 along the second interface 146 (e.g., a vertical interface). Figure 1D The remaining side of the conductive structure 108.

[0074] The additional portion 136a may optionally be positioned adjacent to the vertical portion 136 of the selectively conductive material 132, for example, between the upper surface 108a of the conductive structure 108 and the outer wall of the vertical portion 136, such as... Figure 1F The diagram is illustrated by dashed lines. An additional portion 136a of the selectively conductive material 132 may be vertically superimposed (e.g., vertically overlapped) on the upper surface 108a of the conductive structure 108 along the third interface 148 (e.g., a horizontal interface). Therefore, the additional portion 136a of the selectively conductive material 132 may exhibit a lateral extent greater than the lateral extent of the contact structure 142. In some embodiments, the upper portion of the conductive structure 108 is substantially surrounded on at least three consecutive sides by the selectively conductive material 132 of the conductive plug structure 137. For example, the lateral portion 134 of the selectively conductive material 132 may be vertically subordinate to and in direct contact with the upper portion of the conductive structure 108, its vertical portion 136 may be horizontally adjacent to and in direct contact with the upper portion of the conductive structure 108, and its additional portion 136a may be vertically superimposed on and in direct contact with the upper portion of the conductive structure 108.

[0075] In some embodiments, an additional portion 136a of the selectively conductive material 132 extends horizontally on the upper surface 108a of the conductive structure 108, such that the additional portion 136a responds to openings 130 ( Figure 1DThe selectively conductive material 132 is formed non-uniformly (e.g., irregularly, asymmetrically) within the second region 126b of the additional void 126. In other embodiments, the sides (e.g., vertical sidewalls) of the vertical portion 136 of the selectively conductive material 132 are generally aligned with the sides of one or more (e.g., each) of the liner material 116 and the conductive structure 108, and the additional portion 136a is not perpendicularly overly applied to the conductive structure 108.

[0076] like Figure 1F The lining material 116 (shown in the image) Figure 1D A first liner material 116a may be vertically overlaid on the step 114, and a second liner material 116b may be vertically overlaid on and in direct contact with the first liner material 116a. The thickness of the first liner material 116a may be in the range of about 5 nm to about 15 nm, for example, from about 5 nm to about 10 nm or from about 10 nm to about 15 nm, and the thickness of the second liner material 116b may be in the range of about 20 nm to about 40 nm, for example, from about 20 nm to about 30 nm or from about 30 nm to about 40 nm. However, this disclosure is not limited thereto, and the thickness may differ from the thickness described. In some embodiments, the thickness of the second liner material 116b is relatively greater than the thickness of the first liner material 116a.

[0077] In some embodiments, the upper portion of the conductive plug structure 137 extends less than or equal to about 10 nm (e.g., in the range from about 2 nm to about 10 nm) above the upper surface 108a of the conductive structure 108, such that the upper surface of the vertical portion 136 of the conductive plug structure 137 at the first interface 144 is perpendicularly recessed relative to the lower surface of the second liner material 116b. In some such embodiments, the conductive plug structure 137 extends perpendicularly within the first liner material 116a and the conductive structure 108 but does not extend perpendicularly into or into the second liner material 116b. In other embodiments, the conductive plug structure 137 extends beyond the upper surface of the first liner material 116a and enters or alternatively extends beyond the vertical range of the second liner material 116b.

[0078] The first height H1 of the conductive structure 108 (defined as the vertical dimension between the upper surface 108a and the lower surface 108b of the conductive structure 108) can range from about 20 nm to about 40 nm, for example, from about 20 nm to about 25 nm, from about 25 nm to about 30 nm, from about 30 nm to about 35 nm, or from about 35 nm to about 40 nm. The second height H2 of the conductive plug structure 137 (defined as the vertical dimension between the lower surface of the contact structure 142 and the remainder of the conductive structure 108) can range from about 25 nm to about 50 nm, for example, from about 25 nm to about 30 nm, from about 30 nm to about 35 nm, from about 35 nm to about 40 nm, from about 40 nm to about 45 nm, or from about 45 nm to about 50 nm. However, this disclosure is not limited thereto and the height may differ from the height described. In some embodiments, the second height H2 of the conductive plug structure 137 is substantially equal to or relatively greater than the first height H1 of the conductive structure 108.

[0079] Forming the conductive plug structure 137 prior to the formation of the contact structure 142 can facilitate a reduction in the failure rate of the electrical connection between the contact structure 142 and the conductive structure 108 of the stacked structure 101 during use and operation of the microelectronic device structure 100. In some embodiments, the failure rate can be reduced by about 73% or even higher percentages (e.g., about 88%, about 96%) compared to the failure rate of a conventional 3D NAND structure. Thus, a reduction in failure rate can be achieved even as the spacing between adjacent structures decreases to smaller values, the thickness (e.g., height in the Z direction) of the conductive structure 108 decreases, and the high aspect ratio (HAR) increases.

[0080] Figure 2 This illustration shows a partial cross-sectional perspective view of a portion of a microelectronic device 201 (e.g., a memory device, such as a two-layer 3D NAND flash memory device) including a microelectronic device structure 200. The microelectronic device structure 200 may be substantially similar to the previously referenced... Figures 1A to 1F The microelectronic device structure 100 is described. (e.g.) Figure 2 As shown, the microelectronic device structure 200 may include defined contact areas to connect access lines 206 to conductive layers 205 (e.g., conductive layers, conductive plates, such as conductive structure 108). Figure 1D Staircase structure 220 (e.g., staircase structure 112) Figure 1D The microelectronic device structure 200 may include vertical strings 207 of memory cells 203 coupled in series with each other. The vertical strings 207 may extend perpendicularly (e.g., in the Z direction) and orthogonally to conductive lines and layers 205, such as data lines 202 and source layers 204 (e.g., source structure 102). Figure 1DThe system includes a conductive layer 205, an access line 206, a first select gate 208 (e.g., upper select gate, drain select gate (SGD)), a select line 209, and a second select gate 210 (e.g., lower select gate, source select gate (SGS)). The select gate 208 may be horizontally (e.g., in the Y direction) divided into a plurality of blocks 232 that are horizontally (e.g., in the Y direction) separated from each other by slots 230.

[0081] Vertical conductive contact 211 (e.g., contact structure 142) Figure 1D This allows components to be electrically coupled to each other, as shown. For example, select line 209 may be electrically coupled to first select gate 208 and access line 206 may be electrically coupled to conductive layer 205. Microelectronic device 201 may also include control unit 212 located under the memory array, which may include at least one of a string driver circuitry, a gate, a circuitry for selecting gates, a circuitry for selecting conductive lines (e.g., data line 202, access line 206), a circuitry for amplifying signals, and a circuitry for sensing signals. For example, control unit 212 may be electrically coupled to data line 202, source layer 204, access line 206, first select gate 208, and second select gate 210. In some embodiments, control unit 212 includes CMOS (Complementary Metal-Oxide-Semiconductor) circuitry. In such embodiments, control unit 212 may be characterized to have an "under-array CMOS (CuA)" configuration.

[0082] The first selection gate 208 may extend horizontally in a first direction (e.g., the X direction) and may be coupled at a first end (e.g., the upper end) of the vertical string 207 to a corresponding first group of vertical strings 207 of the memory cell 203. The second selection gate 210 may be formed in a generally planar configuration and may be coupled at a second opposite end (e.g., the lower end) of the vertical string 207 of the memory cell 203 to the vertical string 207.

[0083] Data lines 202 (e.g., bit lines) may extend horizontally in a second direction (e.g., in the Y direction) at an angle (e.g., perpendicular) to a first direction in which the first select gate 208 extends. Data lines 202 may be coupled at a first end (e.g., the upper end) of vertical strings 207 to a corresponding second group of vertical strings 207. Vertical strings 207 coupled to the first group of corresponding first select gates 208 may share a specific vertical string 207 with vertical strings 207 coupled to the second group of corresponding data lines 202. Therefore, a specific vertical string 207 may be selected at the intersection of a specific first select gate 208 and a specific data line 202. Thus, the first select gate 208 can be used to select a memory cell 203 of a vertical string 207 of memory cell 203.

[0084] Conductive layers 205 (e.g., word lines) may extend in a corresponding horizontal plane. Conductive layers 205 may be stacked vertically such that each conductive layer 205 is coupled to all vertical strings 207 of memory cells 203, and the vertical strings 207 of memory cells 203 extend vertically through the stack of conductive layers 205. Conductive layers 205 may be coupled to or may form the control gate of the memory cell 203 to which the conductive layer 205 is coupled. Each conductive layer 205 may be coupled to a specific memory cell 203 of a particular vertical string 207 of memory cells 203.

[0085] The first select gate 208 and the second select gate 210 are operable to select a specific vertical string 207 of memory cells 203 between a specific data line 202 and the source layer 204. Therefore, a specific memory cell 203 can be selected and electrically coupled to the data line 202 by operating (e.g., by selecting) the appropriate first select gate 208, second select gate 210, and conductive layer 205 coupled to the specific memory cell 203.

[0086] The staircase structure 220 can be configured to provide an electrical connection between the access line 206 and the step 205 via a vertical conductive contact 211. In other words, a specific step of the step 205 can be selected via the access line 206, which is electrically connected to a corresponding conductive contact 211 that is electrically connected to the specific step 205. The data line 202 can be electrically coupled to the vertical string 207 via a conductive contact structure 234.

[0087] Therefore, in some embodiments, a microelectronic device includes a stacked structure comprising alternating conductive and insulating structures arranged in layers. Each of the layers individually includes both conductive and insulating structures. The microelectronic device includes: a staircase structure having steps including lateral ends of the layers; and contacts covering the steps at different elevations of the staircase structure. The contacts include a liner material. The microelectronic device includes a conductive plug structure underlying the liner material of the contacts and including: a lateral portion within gaps in at least some of the conductive structures; and a vertical portion covering the lateral portion.

[0088] Furthermore, in some embodiments, a method of forming a microelectronic device includes: forming a preliminary stacked structure comprising a vertically alternating sequence of insulating and sacrificial materials arranged in a preliminary hierarchy; and forming a dielectric material on a staircase structure within the preliminary stacked structure. The staircase structure has steps including lateral ends of the preliminary hierarchy of the preliminary stacked structure. The method includes: replacing the sacrificial material with a conductive structure; forming an opening extending through the dielectric material and exposing portions of the conductive structure at the steps of the staircase structure; and selectively forming conductive material within the voids in the conductive structure and within the openings to form a conductive plug structure. The conductive plug structure individually includes: a lateral portion within the voids in at least some of the conductive structures; and a vertical portion covering the lateral portion. The method includes forming conductive contacts on the steps of the staircase structure. The conductive contacts individually include a liner material within the openings and covering the conductive material of the conductive plug structure, and additional conductive material.

[0089] Microelectronic devices (e.g., microelectronic device 201) and microelectronic device structures (e.g., microelectronic device structures 100, 200) comprising a lateral portion 134 and a vertical portion 136 of a conductive plug structure 137 adjacent to a contact structure 142, according to embodiments of the present disclosure, can be used in embodiments of the electronic systems of the present disclosure. For example, Figure 3 This is a block diagram of an electronic system 303 according to an embodiment of the present disclosure. The electronic system 303 may include, for example, a computer or computer hardware component, a server or other networking hardware component, a cellular phone, a digital camera, a personal digital assistant (PDA), a portable media (e.g., music) player, a Wi-Fi or cellular-enabled tablet computer, such as (for example) or Tablet computers, e-book readers, navigation devices, etc. Electronic system 303 includes at least one memory device 305. Memory device 305 may include, for example, microelectronic device structures previously described herein (e.g., microelectronic device structures 100, 200) or previously referenced... Figures 1A to 1F and Figure 2 An embodiment of the described microelectronic device (e.g., microelectronic device 201) includes a lateral portion 134 and a vertical portion 136 adjacent to a conductive plug structure 137 of the contact structure 142.

[0090] The electronic system 303 may further include at least one electronic signal processor device 307 (generally referred to as a “microprocessor”). The electronic signal processor device 307 may optionally include embodiments of the microelectronic devices or microelectronic device architectures previously described herein (e.g., previously referenced). Figures 1A to 1F and Figure 2The described microelectronic device 201 or one or more of the microelectronic device structures 100, 200. Electronic system 303 may further include one or more input devices 309 for inputting information into electronic system 303 by a user, such as (for example) a mouse or other pointing device, keyboard, touchpad, button, or control panel. Electronic system 303 may further include one or more output devices 311 for outputting information (e.g., visual or audio output) to a user, such as (for example) a monitor, display, printer, audio output jack, speaker, etc. In some embodiments, input devices 309 and output devices 311 may constitute a single touchscreen device that can be used both to input information into electronic system 303 and to output visual information to a user. Input devices 309 and output devices 311 may be in electrical communication with one or more of memory device 305 and electronic signal processor device 307.

[0091] Therefore, in some embodiments, an electronic system includes: a processor operatively coupled to input and output devices; and a microelectronic device operatively coupled to the processor. The microelectronic device includes: a stacked structure comprising a vertically alternating sequence of conductive and insulating structures arranged in a hierarchy; a staircase structure within the stacked structure having steps including lateral edges of the hierarchy; a contact structure terminating on the steps of the staircase structure; conductive plugs between the steps of the staircase structure and the lining material of the contact structure; and a conductive filler material circumferentially surrounding at least some of the conductive plugs. The conductive filler material is located between vertically opposing portions of the conductive material within at least some of the conductive structures of the stacked structure.

[0092] The embodiments disclosed herein may be further characterized (but are not limited to) as described below.

[0093] Example 1: A microelectronic device comprising: a stacked structure including alternating conductive and insulating structures arranged in a hierarchy, each of the hierarchical levels individually including both conductive and insulating structures; a staircase structure having steps including lateral ends of the hierarchical levels; contacts covering the steps at different elevations of the staircase structure, the contacts including a lining material; and a conductive plug structure resting beneath the lining material of the contacts and comprising: a lateral portion within gaps in at least some of the conductive structures; and a vertical portion covering the lateral portion.

[0094] Example 2: In the microelectronic device according to Example 1, the vertical portion of the conductive plug structure is directly inserted between the liner material of the contact and the transverse portion of the conductive plug structure, and the conductive plug structure has substantially no liner material on the vertical sidewall of the vertical portion of the conductive plug structure.

[0095] Example 3: The microelectronic device according to Example 1 or Example 2, wherein the contact comprises a conductive material substantially surrounded by the substrate material, and the material composition of the conductive material of the contact is substantially the same as the material composition of the conductive structure of the stacked structure.

[0096] Example 4: A microelectronic device according to any one of Examples 1 to 3, wherein the conductive plug structure comprises a material composition different from that of the conductive structure of the stacked structure.

[0097] Example 5: A microelectronic device according to any one of Examples 1 to 4, wherein the conductive plug structure includes an additional portion extending beyond the horizontal boundary of the contact, the additional portion being directly perpendicular to the conductive structure of the stacked structure.

[0098] Example 6: A microelectronic device according to any one of Examples 1 to 5, wherein the conductive plug structure extends below the upper surface of the conductive structure of the stacked structure, and the conductive plug structure individually exhibits a height equal to or greater than the height of each of the conductive structures.

[0099] Example 7: A microelectronic device according to any one of Examples 1 to 6, wherein the conductive plug structure individually forms an L-shaped structure that closely approximates the uppermost conductive structure that defines the step.

[0100] Example 8: A microelectronic device according to any one of Examples 1 to 7, wherein the lateral range of an individual lateral portion of the conductive plug structure is relatively larger than the lateral range of its vertical portion, and the lateral range of the individual lateral portions of the conductive plug structure varies with each other throughout the stacked structure.

[0101] Example 9: A microelectronic device according to any one of Examples 1 to 8, wherein the conductive structure at the step is in direct physical contact with the conductive plug structure, and the upper part of the conductive structure is substantially surrounded by additional conductive material of the conductive plug structure on at least three consecutive sides.

[0102] Example 10: A method of forming a microelectronic device, the method comprising: forming a preliminary stacked structure including a vertically alternating sequence of insulating and sacrificial materials arranged in a preliminary hierarchy; forming a dielectric material on a staircase structure within the preliminary stacked structure, the staircase structure having steps including lateral ends of the preliminary hierarchy of the preliminary stacked structure; replacing the sacrificial material with a conductive structure; forming an opening extending through the dielectric material and exposing portions of the conductive structure at the steps of the staircase structure; selectively forming a conductive material within the voids in the conductive structure and within the opening to form a conductive plug structure, the conductive plug structure individually including: a lateral portion within the voids in at least some of the conductive structure; and a vertical portion covering the lateral portion; and forming conductive contacts on the steps of the staircase structure, the conductive contacts individually including a liner material and additional conductive material within the opening and covering the conductive material of the conductive plug structure.

[0103] Example 11: The method according to Example 10 further includes: forming the conductive plug structure to include tungsten; and forming the conductive structure to include one or more of titanium, ruthenium, aluminum and molybdenum, wherein the conductive structure is substantially free of tungsten.

[0104] Example 12: The method according to Example 10 or Example 11, wherein selectively forming the conductive material includes substantially completely filling the remaining portion of the voids in the conductive structure relatively close to the opening and not forming the conductive material in additional voids in the conductive structure relatively far from the opening.

[0105] Example 13: The method according to any one of Examples 10 to 12 further includes selectively forming an additional portion of the conductive material extending beyond the horizontal boundary of the conductive contact, the additional portion of the conductive material directly physically contacting the conductive structure and the vertical portion of the conductive plug structure.

[0106] Example 14: The method according to any one of Examples 10 to 13, wherein selectively forming the conductive material includes forming the transverse portion of the conductive plug structure within the void in the conductive structure and forming the vertical portion of the conductive plug structure within the opening in a single material forming process.

[0107] Example 15: The method according to any of Examples 10 to 14 further includes selectively removing a portion of the conductive structure adjacent to the opening before selectively forming the conductive material, wherein selectively forming the conductive material includes growing the conductive material along the exposed surface of the remaining portion of the conductive structure.

[0108] Example 16: An electronic system comprising: a processor operatively coupled to an input device and an output device; and a microelectronic device operatively coupled to the processor, the microelectronic device comprising: a stacked structure including a vertically alternating sequence of conductive and insulating structures arranged in a hierarchy; a staircase structure within the stacked structure having steps including lateral edges of the hierarchy; a contact structure terminating on the steps of the staircase structure; conductive plugs between the steps of the staircase structure and the lining material of the contact structure; and a conductive filler material circumferentially surrounding at least some of the conductive plugs, the conductive filler material between vertically opposing portions of the conductive material within at least some of the conductive structures of the stacked structure.

[0109] Example 17: The electronic system according to Example 16, wherein the conductive filler material substantially surrounds the conductive plug in at least one horizontal direction, and the conductive filler material has a lateral dimension larger than that of the contact structure.

[0110] Example 18: The electronic system according to Example 16 or Example 17, wherein the conductive plug is directly on the conductive filler material, and the upper surface of the conductive plug extends above the upper surface of the conductive structure at the step.

[0111] Example 19: An electronic system according to any one of Examples 16 to 18, wherein the conductive plug and the conductive filler material are in physical contact with one of the conductive structures of the stacked structure on the lateral and vertical sides.

[0112] Example 20: An electronic system according to any of Examples 16 to 19, further comprising a nitride liner material covering the steps of the staircase structure, wherein the uppermost boundary of the conductive plug is perpendicularly below the lowermost boundary of the nitride liner material.

[0113] While certain illustrative embodiments have been described with reference to the figures, those skilled in the art will recognize and understand that the embodiments covered by this disclosure are not limited to those explicitly shown and described herein. Rather, many additions, deletions, and modifications can be made to the embodiments described herein without departing from the scope of the embodiments covered by this disclosure, such as those claimed in the appended claims, including legal equivalents. Furthermore, features from one disclosed embodiment may be combined with features from another disclosed embodiment while still being covered within the scope of this disclosure.

Claims

1. A microelectronic device comprising: A stacked structure comprising alternating conductive and insulating structures arranged in a hierarchy, each of the hierarchical levels individually comprising both conductive and insulating structures. A staircase structure having steps including the transverse ends of the levels; Contacts, which cover the steps at different elevations of the staircase structure, the contacts comprising a lining material; and A conductive plug structure, which lies beneath the liner material of the contact and comprises: The lateral portion is located within the gaps in at least some of the conductive structures; and The vertical portion covers the horizontal portion.

2. The microelectronic device of claim 1, wherein the vertical portion of the conductive plug structure is directly inserted between the liner material of the contact and the transverse portion of the conductive plug structure, and the conductive plug structure has substantially no liner material on the vertical sidewall of the vertical portion of the conductive plug structure.

3. The microelectronic device of claim 1, wherein the contact comprises a conductive material substantially surrounded by the substrate material, the material composition of the conductive material of the contact being substantially the same as the material composition of the conductive structure of the stacked structure.

4. The microelectronic device according to any one of claims 1 to 3, wherein the conductive plug structure comprises a material composition different from that of the conductive structure of the stacked structure.

5. The microelectronic device according to any one of claims 1 to 3, wherein the conductive plug structure includes an additional portion extending beyond the horizontal boundary of the contact, the additional portion being directly perpendicular to the conductive structure of the stacked structure.

6. The microelectronic device according to any one of claims 1 to 3, wherein the conductive plug structure extends below the upper surface of the conductive structure of the stacked structure, and the conductive plug structure individually exhibits a height equal to or greater than the height of each of the conductive structures.

7. The microelectronic device according to any one of claims 1 to 3, wherein the conductive plug structure individually forms an L-shaped structure that closely approximates the uppermost conductive structure that defines the step.

8. The microelectronic device according to any one of claims 1 to 3, wherein the lateral extent of an individual lateral portion of the conductive plug structure is relatively larger than the lateral extent of its vertical portion, and the lateral extent of the individual lateral portions of the conductive plug structure varies with each other throughout the stacked structure.

9. The microelectronic device according to any one of claims 1 to 3, wherein the conductive structure at the step is in direct physical contact with the conductive plug structure, and the upper portion of the conductive structure is substantially surrounded on at least three consecutive sides by additional conductive material of the conductive plug structure.

10. The microelectronic device according to any one of claims 1 to 3, wherein the lateral portion of the conductive plug structure generally surrounds its vertical portion in at least one horizontal direction, and the lateral portion of the conductive plug structure has a lateral dimension larger than that of the contact.

11. The microelectronic device according to any one of claims 1 to 3, wherein the vertical portion of the conductive plug structure is directly on its vertical portion, and the upper surface of the vertical portion of the conductive plug structure extends above the upper surface of the conductive structure at the step.

12. The microelectronic device according to any one of claims 1 to 3, wherein the vertical portion and the lateral portion of the conductive plug structure physically contact one of the conductive structures of the stacked structure on the lateral and vertical sides.

13. The microelectronic device according to any one of claims 1 to 3, further comprising a nitride liner material covering the steps of the staircase structure, wherein the uppermost boundary of the conductive plug structure is perpendicularly below the lowermost boundary of the nitride liner material.

14. A method of forming a microelectronic device, the method comprising: A preliminary stacked structure is formed, which includes a vertical alternating sequence of insulating and sacrificial materials arranged in a preliminary hierarchy; A dielectric material is formed on a stair structure within the initial stacked structure, the stair structure having steps including the lateral ends of the initial level of the initial stacked structure; Replace the sacrificial material with a conductive structure; An opening is formed that extends through the dielectric material and exposes a portion of the conductive structure at the step of the staircase structure; Conductive material is selectively formed within the voids and openings of the conductive structure to form a conductive plug structure, the conductive plug structure individually comprising: The lateral portion, within the gaps in at least some of the conductive structure; and The vertical portion, which covers the horizontal portion; and Conductive contacts are formed on the steps of the staircase structure, each conductive contact individually comprising a liner material and additional conductive material that are inside the opening and covered by the conductive plug structure.

15. The method of claim 14, further comprising: The conductive plug structure is formed to include tungsten; and The conductive structure is formed to include one or more of titanium, ruthenium, aluminum and molybdenum, and the conductive structure is substantially free of tungsten.

16. The method of claim 14 or claim 15, wherein selectively forming the conductive material comprises substantially completely filling the remaining portion of the voids in the conductive structure relatively close to the opening and not forming the conductive material in additional voids in the conductive structure relatively far from the opening.

17. The method of claim 14 or claim 15, further comprising selectively forming an additional portion of the conductive material extending beyond the horizontal boundary of the conductive contact, the additional portion of the conductive material being in direct physical contact with the vertical portion of the conductive structure and the conductive plug structure.

18. The method of claim 14 or claim 15, wherein selectively forming the conductive material includes forming the transverse portion of the conductive plug structure within the void in the conductive structure and forming the vertical portion of the conductive plug structure within the opening in a single material forming process.

19. The method of claim 14 or claim 15, further comprising selectively removing a portion of the conductive structure adjacent to the opening prior to selectively forming the conductive material, wherein selectively forming the conductive material comprises growing the conductive material along the exposed surface of the remaining portion of the conductive structure.

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