Power conversion circuit and control method thereof

Abstract

The invention discloses a power conversion circuit and a control method thereof. The power conversion circuit comprises a transformer, a resonant capacitor, an upper bridge transistor, a lower bridge transistor, a rectification circuit, a feedback circuit, a detection circuit and a control circuit. The transformer includes a primary coil coupled to the switching node and a secondary coil. The resonant capacitor is coupled to the primary coil. The upper bridge transistor provides an input voltage to the switching node, and the lower bridge transistor couples the switching node to a ground terminal. The rectifying circuit converts energy of the secondary coil into output voltage. The feedback circuit compares the output voltage with a reference voltage to generate a compensation signal. The detection circuit generates a current detection signal and a voltage detection signal. The control circuit drives the upper bridge transistor and the lower bridge transistor based on a current detection signal, a voltage detection signal, a compensation signal, and an input voltage.

Description

Technical Field

[0001] This invention relates to a power conversion circuit and its control method, and more particularly to a resonant power conversion circuit and its control method that uses the current flowing through the resonant capacitor, the voltage across the resonant capacitor, a compensation signal, and the input voltage to control the upper bridge transistor and the lower bridge transistor. Background Technology

[0002] With the continuous development of portable electronic devices, the development trend of power conversion circuits, like most power products, is towards higher efficiency, higher power density, higher reliability, and lower cost. Resonant power conversion circuits (including LLC resonant power conversion circuits) offer advantages such as achieving zero-voltage switching (ZVS) on the primary side and zero-current switching (ZCS) on the secondary side rectifier diodes across the entire load range; frequency control ensuring a 50% duty cycle for both the upper and lower bridge transistors; no need for an output inductor; and the ability to use lower voltage transistors on the secondary side to reduce cost and improve efficiency. These advantages have led to their increasing application in DC-DC converters in recent years.

[0003] However, due to the inherent characteristics of resonant power converter circuits, higher switching frequencies are required when the output voltage is low or under light load, resulting in poor conversion efficiency. To meet current market demands for wide-range output voltage, high output power, and high conversion efficiency, further optimization of the power conversion circuit is necessary. Summary of the Invention

[0004] This invention proposes a power conversion circuit and its control method, enabling the LLC resonant power conversion circuit to have a wider range of output voltages and achieve zero-voltage switching to reduce switching power loss. Furthermore, the proposed power conversion circuit and its control method can detect the voltage at the switching node and turn on the lower bridge transistor at a relatively low point, further contributing to reduced power loss. Moreover, the voltage across the resonant capacitor can be adjusted by adjusting the threshold voltage, thereby balancing the current of the rectifier components and reducing output voltage ripple. Lower output voltage ripple also allows for the use of a smaller output capacitor.

[0005] In view of this, the present invention proposes a power conversion circuit, including a transformer, a resonant capacitor, an upper-bridge transistor, a lower-bridge transistor, a rectifier circuit, a feedback circuit, a detection circuit, and a control circuit. The transformer includes a primary coil and a secondary coil, wherein the primary coil is coupled between a switching node and a resonant node. The resonant capacitor is coupled between the resonant node and a ground terminal. The upper-bridge transistor provides an input voltage to the switching node based on an upper-bridge drive signal. The lower-bridge transistor couples the switching node to the ground terminal based on a lower-bridge drive signal. The rectifier circuit converts the energy of the secondary coil into an output voltage. The feedback circuit compares the output voltage with a reference voltage to generate a compensation signal. The detection circuit is coupled to the resonant node to generate a current detection signal and a voltage detection signal. The control circuit generates the upper-bridge drive signal and the lower-bridge drive signal based on the current detection signal, the voltage detection signal, the compensation signal, and the input voltage. When the upper-bridge transistor is turned on and the current detection signal exceeds the compensation signal, the control circuit turns off the upper-bridge transistor. When the voltage detection signal does not exceed a threshold voltage, the control circuit turns off the lower-bridge transistor.

[0006] According to one embodiment of the present invention, the detection circuit detects the current flowing through the resonant capacitor and generates the current detection signal. The voltage detection signal is related to the voltage across the resonant capacitor.

[0007] According to one embodiment of the present invention, the control circuit includes a first comparator. The first comparator compares the current detection signal and the compensation signal to generate an output signal. Based on the output signal, the control circuit does not turn on the upper bridge transistor.

[0008] According to one embodiment of the present invention, the control circuit includes a second comparator. The second comparator compares the voltage detection signal and the threshold voltage to generate an output signal. Based on the output signal, the control circuit does not turn on the lower bridge transistor, thereby reducing the ripple of the output voltage.

[0009] According to one embodiment of the present invention, the threshold voltage is adjusted based on half of the input voltage.

[0010] According to one embodiment of the present invention, the rectifier circuit includes an output capacitor, a first rectifier element, and a second rectifier element. The first rectifier element rectifies the energy of the secondary coil into a first current. The second rectifier element rectifies the energy of the secondary coil into a second current. The first current and the second current are used to charge the output capacitor to generate the output voltage. The directions of the first current and the second current are the same.

[0011] According to one embodiment of the present invention, the voltage detection signal is close to the threshold voltage. When the voltage detection signal is close to half of the input voltage, the magnitudes of the first current and the second current are similar, thereby reducing the ripple of the output voltage.

[0012] According to one embodiment of the present invention, the control circuit includes a valley voltage detection circuit. The valley voltage detection circuit detects that the voltage across the lower bridge transistor is at a relatively low point, thereby generating a valley signal. The control circuit turns on the lower bridge transistor based on the valley signal to reduce the switching loss of the lower bridge transistor.

[0013] According to one embodiment of the present invention, when the lower bridge transistor is not turned on and a dead time has elapsed, the upper bridge transistor is turned on to achieve zero voltage switching.

[0014] According to another embodiment of the present invention, when the upper bridge transistor is not turned on and a dead time has elapsed, the lower bridge transistor is turned on to achieve zero voltage switching.

[0015] According to one embodiment of the present invention, the detection circuit includes a resistor and a capacitor connected in series, wherein the voltage across the resistor is the current detection signal.

[0016] According to one embodiment of the present invention, the detection circuit includes an integrator. The integrator integrates the current detection signal to generate the voltage detection signal.

[0017] According to another embodiment of the present invention, the detection circuit includes a detection resistor. The detection resistor is connected in series between the resonant capacitor and the ground terminal. The voltage across the detection resistor is the current detection signal.

[0018] According to another embodiment of the present invention, the detection circuit includes a capacitor voltage divider circuit. The capacitor voltage divider circuit is coupled to both ends of the resonant capacitor. The capacitor voltage divider circuit is used to divide the voltage across the resonant capacitor to generate the voltage detection signal.

[0019] The present invention further proposes a control method for controlling a power conversion circuit. The power conversion circuit includes a resonant capacitor coupled between a resonant node and a ground terminal, a transformer including a primary coil and a secondary coil, an upper-bridge transistor providing an input voltage to a switching node, a lower-bridge transistor coupling the switching node to the ground terminal, and a rectifier circuit converting the energy of the secondary coil into an output voltage. The primary coil is coupled between the switching node and the resonant node. The control method includes: generating a compensation signal by comparing the output voltage with a reference voltage; generating a current detection signal based on the current flowing through the resonant capacitor; generating a voltage detection signal related to the voltage across the resonant capacitor; and driving the upper-bridge transistor and the lower-bridge transistor based on the current detection signal, the voltage detection signal, the compensation signal, and the input voltage. When the upper-bridge transistor is turned on and the current detection signal exceeds the compensation signal, the upper-bridge transistor is turned off. When the voltage detection signal does not exceed a threshold voltage, the lower-bridge transistor is turned off.

[0020] According to an embodiment of the present invention, the control method further includes: detecting the cross voltage of the lower bridge transistor; and turning on the lower bridge transistor when the cross voltage of the lower bridge transistor is a trough voltage, so as to reduce the switching loss of the lower bridge transistor.

[0021] According to one embodiment of the present invention, when the lower bridge transistor is not turned on and a dead time has elapsed, the upper bridge transistor is turned on to achieve zero voltage switching.

[0022] According to another embodiment of the present invention, when the upper bridge transistor is not turned on and a dead time has elapsed, the lower bridge transistor is turned on to achieve zero voltage switching.

[0023] According to one embodiment of the present invention, the threshold voltage is adjusted based on half of the input voltage.

[0024] According to an embodiment of the present invention, the rectifier circuit includes an output capacitor, a first rectifier element that generates a first current, and a second rectifier element that generates a second current. The first current and the second current charge the output capacitor to generate the output voltage. The voltage detection signal is close to the threshold voltage. When the voltage detection signal is close to half of the input voltage, the magnitudes of the first current and the second current are similar, thereby reducing the ripple of the output voltage. Attached Figure Description

[0025] Figure 1 A schematic diagram of a power conversion circuit according to an embodiment of the present invention is shown;

[0026] Figure 2 A schematic diagram of a detection circuit according to an embodiment of the present invention is shown;

[0027] Figure 3 A schematic diagram of a control circuit according to an embodiment of the present invention is shown;

[0028] Figure 4 The diagram shows a waveform of a power conversion circuit according to an embodiment of the present invention.

[0029] Figure 5 The diagram shows a waveform of a power conversion circuit according to another embodiment of the present invention;

[0030] Figure 6 The diagram shows a waveform of a power conversion circuit according to yet another embodiment of the present invention.

[0031] Figure 7 A schematic diagram of a control circuit according to another embodiment of the present invention is shown;

[0032] Figure 8 The diagram shows a waveform of a power conversion circuit according to an embodiment of the present invention.

[0033] Figure 9 The diagram shows a waveform of a power conversion circuit according to another embodiment of the present invention;

[0034] Figure 10 The diagram shows a waveform of a power conversion circuit according to yet another embodiment of the present invention.

[0035] Figure 11 A schematic diagram of a control circuit according to another embodiment of the present invention is shown;

[0036] Figure 12 The illustration shows an embodiment of the present invention. Figure 11 Waveforms generated by the control circuit; and

[0037] Figure 13 A flowchart of a control method according to an embodiment of the present invention is shown.

[0038] Symbol Explanation

[0039] 100: Power conversion circuit

[0040] 110: Upper-bridge transistor

[0041] 120: Lower-bridge transistor

[0042] 130,200: Detection circuit

[0043] 140: Feedback Circuit

[0044] 150, 300, 700, 1100: Control circuit

[0045] 160: Gate drive circuit

[0046] 170: Rectifier circuit

[0047] VIN: Input voltage

[0048] VOUT: Output voltage

[0049] TM: Transformer

[0050] LR: Resonant inductor

[0051] CR: Resonant capacitor

[0052] CIN: Input capacitance

[0053] PS: Primary coil

[0054] SS: Secondary coil

[0055] NR: Resonant Node

[0056] SW: Switch Node

[0057] ICR: Current Detection Signal

[0058] VCR: Voltage detection signal

[0059] VFB: Feedback Voltage

[0060] VREF: Reference Voltage

[0061] COMP: Compensation signal

[0062] HSW: Upper Bridge Gate Drive Signal

[0063] LSW: Lower bridge gate drive signal

[0064] HS: Upper bridge drive signal

[0065] LS: Lower bridge drive signal

[0066] D1: First rectifier element

[0067] D2: Second rectifier element

[0068] COUT: Output capacitor

[0069] ID1: First Current

[0070] ID2: Second current

[0071] N1: First node

[0072] N2: Second node

[0073] NC: Intermediate Node

[0074] C1: First capacitor

[0075] R1: First resistor

[0076] 210: Integrator

[0077] 310: First Delay Circuit

[0078] 320: Lower bridge conduction control circuit

[0079] AND1: First AND gate

[0080] FF1: First trigger

[0081] FF2: Second trigger

[0082] CMP1: First comparator

[0083] TSW: Switching Cycle

[0084] t0: Initial time

[0085] t1: First time

[0086] t2: Second time

[0087] t3: Third Time

[0088] t4: Fourth Time

[0089] 710: Second Delay Circuit

[0090] 720: Threshold Voltage Generator

[0091] CMP2: Second comparator

[0092] EA: Error Amplifier

[0093] LSB: Inverted lower bridge gate drive signal

[0094] HSB: Inverted upper bridge gate drive signal

[0095] AND2: Second AND gate

[0096] 1110: Valley Voltage Detection Circuit

[0097] SV: Valley Signal

[0098] 1300: Control Method

[0099] S1310~S1340: Procedure Flow Detailed Implementation

[0100] The following description is an embodiment of this disclosure. Its purpose is to illustrate the general principles of this disclosure and should not be regarded as a limitation of this disclosure. The scope of this disclosure shall be defined by the claims.

[0101] It is worth noting that the following disclosure provides multiple embodiments or examples for practicing different features of this disclosure. The specific examples and arrangements of elements described below are only used to briefly illustrate the spirit of this disclosure and are not intended to limit the scope of this disclosure. Furthermore, the same element symbols or words may be repeated in multiple examples in the following description. However, the purpose of repetition is only to provide a simplified and clear description and is not intended to limit the relationship between the multiple embodiments and / or configurations discussed below.

[0102] Furthermore, the description in the following specification of a feature being connected to, coupled to, and / or formed on top of another feature may actually include multiple different embodiments, including features that are in direct contact, or additional features that are formed between features, such that the features are not in direct contact.

[0103] Furthermore, relative terms such as "lower" or "bottom" and "higher" or "top" may be used in the embodiments to describe the relative relationship of one element of the diagram to another element. It is understood that if the arrangement of the diagram is flipped so that it is upside down, the element depicted on the "lower" side will become the element on the "higher" side.

[0104] It is understood that although terms such as "first," "second," and "third" may be used herein to describe various elements, components, regions, layers, and / or portions, these elements, components, regions, layers, and / or portions should not be limited by these terms, and these terms are only used to distinguish different elements, components, regions, layers, and / or portions. Therefore, a first element, component, region, layer, and / or portion discussed below may be referred to as a second element, component, region, layer, and / or portion without departing from the teachings of some embodiments disclosed herein.

[0105] This disclosure includes embodiments that can be understood in conjunction with the accompanying drawings, which are also considered part of the description of these embodiments. It should be understood that the drawings of this disclosure are not drawn to scale with actual devices and components. The shape and thickness of the embodiments may be exaggerated in the drawings to clearly show the features of the disclosed embodiments. Furthermore, the structures and devices in the drawings are illustrated schematically to clearly show the features of the disclosed embodiments.

[0106] Here, the terms "about," "approximately," and "roughly" generally indicate within 20% of a given value or range, preferably within 10%, and even more preferably within 5%, or within 3%, or within 2%, or within 1%, or within 0.5%. The quantities given here are approximate quantities, meaning that the meaning of "about," "approximately," and "roughly" may be implied even without specific mention of them.

[0107] Unless otherwise defined, all terms used herein (including technical and scientific terms) have the same meaning as commonly understood by those skilled in the art. It is understood that these terms, such as those defined in commonly used dictionaries, should be interpreted as having a meaning consistent with the relevant art and the background or context of this disclosure, and should not be interpreted in an idealized or overly formal manner, unless specifically defined in the embodiments of this disclosure.

[0108] In some embodiments disclosed herein, terms such as “connection” and “interconnection” are used to refer to two structures in direct contact, unless otherwise defined. This can also refer to two structures that are not in direct contact, with another structure disposed between them. Furthermore, these terms can also include cases where both structures are movable or both structures are fixed.

[0109] In a diagram, similar elements and / or features may have the same element symbol. Elements of the same type can be distinguished by adding letters or numbers after the element symbol to differentiate similar elements and / or features.

[0110] Figure 1 A schematic diagram of a power conversion circuit according to an embodiment of the present invention is shown. For example... Figure 1 As shown, the power conversion circuit 100 is used to convert the input voltage VIN into the output voltage VOUT, and includes a transformer TM, a resonant inductor LR, a resonant capacitor CR, an input capacitor CIN, an upper bridge transistor 110, a lower bridge transistor 120, a detection circuit 130, a feedback circuit 140, a control circuit 150, and a gate drive circuit 160.

[0111] The transformer TM includes a primary coil PS and a secondary coil SS, wherein the primary coil PS is coupled to the resonant node NR. A resonant inductor LR is coupled between the switching node SW and the primary coil PS, and a resonant capacitor CR is coupled between the resonant node NR and ground. According to one embodiment of the invention, the resonant inductor LR can be replaced by the leakage inductance of the primary coil PS of the transformer TM. In other words, the primary coil PS can be coupled between the switching node SW and the resonant node NR.

[0112] like Figure 1As shown, the input capacitor CIN is coupled between the input voltage VIN and ground. The upper bridge drive signal HS drives the upper bridge transistor 110 to turn on and off, providing the input voltage VIN to the switching node SW. The lower bridge drive signal LS drives the lower bridge transistor 120 to turn on and off, coupling the switching node SW to ground. According to some embodiments of the present invention, the upper bridge transistor 110 and the lower bridge transistor 120 form a half-bridge circuit to drive the primary coil PS and the resonant capacitor CR.

[0113] The detection circuit 130 is coupled to the resonant node NR to generate a current detection signal ICR and a voltage detection signal VCR. According to some embodiments of the present invention, the current detection signal ICR represents the current flowing through the resonant capacitor CR, and the voltage detection signal VCR represents the voltage across the resonant capacitor CR. According to one embodiment of the present invention, the detection circuit 130 may include a detection resistor coupled between the resonant capacitor CR and ground. Figure 1 (Not shown), where the voltage across the sensing resistor is the current sensing signal ICR. According to another embodiment of the present invention, the first sensing capacitor and the second sensing capacitor ( Figure 1 The capacitor voltage divider circuit (not shown) can be coupled between the resonant capacitor CR and the ground terminal to divide the voltage of the resonant node NR and generate a voltage detection signal VCR.

[0114] Figure 2 A schematic diagram of a detection circuit according to an embodiment of the present invention is shown. Figure 2 As shown, the detection circuit 200 includes a first capacitor C1, a first resistor R1, and an integrator 210. The first capacitor C1 and the first resistor R1 are connected in series with... Figure 1 The resonant node NR and the ground terminal are connected, and the voltage across the first resistor R1 is the current detection signal ICR. Integrator 210 integrates the current detection signal ICR to generate a voltage detection signal VCR, where the voltage detection signal VCR corresponds to the voltage of the resonant node NR. According to some embodiments of the present invention, the detection circuit 200 corresponds to... Figure 1 The detection circuit 130.

[0115] Back Figure 1The feedback circuit 140 is used to compare the feedback voltage VFB with the reference voltage VREF to generate a compensation signal COMP. According to some embodiments of the invention, the feedback voltage VFB is proportional to the output voltage VOUT. According to some embodiments of the invention, the feedback circuit 140 may include an error amplifier, with the positive terminal receiving the reference voltage VREF and the negative terminal receiving the feedback voltage VFB. The feedback circuit 140 compares the output voltage VOUT with the reference voltage VREF to generate the compensation signal COMP. This description uses the feedback voltage VFB to generate the compensation signal COMP and is not intended to limit the scope in any way. According to other embodiments of the invention, the feedback circuit 140 may also compare the output voltage VOUT with the reference voltage VREF to generate the compensation signal COMP.

[0116] According to some embodiments of the present invention, the feedback circuit 140 generates a compensation signal COMP using the difference between the feedback voltage VFB and the reference voltage VREF, such that the output voltage VOUT reaches a target value and the feedback voltage VFB is equal to the reference voltage VREF. According to one embodiment of the present invention, when the feedback voltage VFB exceeds the reference voltage VREF, the feedback circuit 140 decreases the compensation signal COMP. According to another embodiment of the present invention, when the reference voltage VREF exceeds the feedback voltage VFB, the feedback voltage increases the compensation signal COMP. According to one embodiment of the present invention, the feedback circuit 140 may include a voltage divider circuit to divide the output voltage VOUT to generate the feedback voltage VFB.

[0117] The control circuit 150 generates an upper bridge gate drive signal HSW and a lower bridge gate drive signal LSW based on the current detection signal ICR, the voltage detection signal VCR, the compensation signal COMP, and the voltage of the switching node SW. The gate drive circuit 160 generates an upper bridge drive signal HS based on the upper bridge gate drive signal HSW, and generates a lower bridge drive signal LS based on the lower bridge gate drive signal LSW.

[0118] like Figure 1 As shown, the power conversion circuit 100 further includes a rectifier circuit 170. The rectifier circuit 170 includes a first rectifier element D1, a second rectifier element D2, and an output capacitor COUT. The first rectifier element D1 is coupled between the first node N1 of the secondary coil SS and the ground terminal. The second rectifier element D2 is coupled between the second node N2 of the secondary coil SS and the ground terminal. The output capacitor COUT is coupled between the intermediate node NC of the secondary coil SS and the ground terminal, and the output voltage VOUT is generated at the intermediate node NC.

[0119] According to some embodiments of the present invention, the first rectifier element D1 and the second rectifier element D2 rectify the energy of the secondary coil SS into a first current ID1 and a second current ID2, respectively, and provide them to the output capacitor COUT, thereby generating an output voltage VOUT. According to some embodiments of the present invention, the power conversion circuit 100 may be an LLC resonant power conversion circuit.

[0120] Figure 3 A schematic diagram of a control circuit according to an embodiment of the present invention is shown. Figure 3 As shown, the control circuit 300 includes a first delay circuit 310, a first AND gate AND1, a first flip-flop FF1, a lower bridge conduction control circuit 320, a second flip-flop FF2, and a first comparator CMP1.

[0121] The first flip-flop FF1 enables the upper bridge gate drive signal HSW based on the output signal of the inverted lower bridge gate drive signal LSB, which is delayed by the first delay circuit 310, and the clock signal CLK. When Figure 1 When the compensation signal COMP generated by the feedback circuit 140 does not exceed the current detection signal ICR, the first comparator CMP1 resets the first flip-flop FF1 and disables the upper bridge gate drive signal HSW. The lower bridge conduction control circuit 320 sets or resets the second flip-flop FF2 based on the inverted upper bridge gate drive signal HSB (the inverted version of the upper bridge gate drive signal HSW), the voltage detection signal VCR, and the threshold voltage VTH, thereby generating the lower bridge gate drive signal LSW and the inverted lower bridge gate drive signal LSB.

[0122] Figure 4 The following diagram shows a waveform of a power conversion circuit according to an embodiment of the present invention. Figure 1 The power conversion circuit 100 and Figure 3 The control circuit 300 is described in detail below. Figure 4 As shown, in one switching cycle TSW, the upper bridge gate drive signal HSW is enabled at the initial time t0. At the first time t1, the current detection signal ICR exceeds the compensation signal COMP, thus disabling the upper bridge gate drive signal HSW. After the dead time, the lower bridge gate drive signal LSW is enabled at the second time t2. According to an embodiment of the present invention, the lower bridge transistor 120 can achieve zero-voltage switching (ZVS) when it is turned on at the second time t2 to reduce switching power loss. Then, the lower bridge gate drive signal LSW is disabled at the third time t3, and the current detection signal ICR is zero from the third time t3 to the fourth time t4, indicating that the current flowing through the resonant capacitor CR is zero.

[0123] Figure 5The diagram shows a waveform of a power conversion circuit according to another embodiment of the present invention. Figure 5 As shown, the lower bridge gate drive signal LSW is enabled at an initial time t0, and the upper bridge gate drive signal HSW is enabled only after the lower bridge gate drive signal LSW is disabled (first time t1) and a dead time has elapsed (second time t2). According to an embodiment of the present invention, when the upper bridge gate drive signal HSW is enabled at the second time t2, the upper bridge transistor 110 can achieve zero-voltage switching.

[0124] Figure 6 The diagram shows a waveform of a power conversion circuit according to yet another embodiment of the present invention. Figure 6 As shown, the upper bridge gate drive signal HSW is enabled at an initial time t0 and disabled at a first time t1, while the lower bridge gate drive signal LSW is enabled at half the switching period TSW (i.e., at a second time t2) and disabled at a third time t3. According to an embodiment of the present invention, Figure 6 The conduction periods of both the upper bridge gate drive signal HSW and the lower bridge gate drive signal LSW are less than 50%.

[0125] exist Figure 4 , Figure 5 , Figure 6 In the process, when the upper bridge gate drive signal HSW is enabled, the current detection signal ICR increases, and when the current detection signal ICR exceeds the compensation signal COMP, the upper bridge gate drive signal HSW is disabled.

[0126] Figure 7 A schematic diagram of a control circuit according to another embodiment of the present invention is shown. Figure 7 Control circuit 700 and Figure 3 Compared to the control circuit 300, Figure 3 The lower bridge conduction control circuit 320 is replaced by a second delay circuit 710, a threshold voltage generator 720, and a second comparator CMP2, and Figure 3 The feedback circuit 140 is replaced by an error amplifier EA. In other words, the feedback circuit 140 may include an error amplifier EA. According to an embodiment of the present invention, the control circuit 700 is used to implement... Figure 4 The waveform diagram. In other words, the control circuit 700 first turns on the upper bridge transistor 110, and then turns on the lower bridge transistor 120.

[0127] First, the enabled inverted lower-bridge gate drive signal LSB (i.e., the lower-bridge gate drive signal LSW is disabled) and the clock signal CLK are used to set the first flip-flop FF1 via the first delay circuit 310 and the first AND gate AND1, thereby enabling the upper-bridge gate drive signal HSW. According to an embodiment of the present invention, the delay time of the first delay circuit 310 is used to determine the dead time from when the lower-bridge transistor 120 is not turned on to when the upper-bridge transistor 110 is turned on.

[0128] Error amplifier EA generates a compensation signal COMP based on the difference between feedback voltage VFB and reference voltage VREF. When the current detection signal ICR exceeds the compensation signal COMP, the output signal of the first comparator CMP1 resets the first flip-flop FF1 and disables the upper bridge gate drive signal HSW.

[0129] The second delay circuit 710 delays the inverted upper bridge gate drive signal HSB (enabled state) to set the second flip-flop FF2, thereby enabling the lower bridge gate drive signal LSW. According to one embodiment of the invention, the delay time of the second delay circuit 710 is used to determine the dead time from when the upper bridge transistor 110 is not turned on to when the lower bridge transistor 120 is turned on. The threshold voltage generator 720 generates a threshold voltage VTH based on the input voltage VIN. The second comparator CMP2 compares the voltage detection signal VCR and the threshold voltage VTH, thereby resetting the second flip-flop FF2 and disabling the lower bridge gate drive signal LSW.

[0130] According to one embodiment of the present invention, when the voltage detection signal VCR does not exceed the threshold voltage VTH, the output signal of the second comparator CMP2 resets the second flip-flop FF2, thus preventing the lower bridge transistor 120 from conducting. The relationship between the threshold voltage VTH and the input voltage VIN will be described in detail below.

[0131] Figure 8 The following diagram shows a waveform of a power conversion circuit according to an embodiment of the present invention. Figure 1 The power conversion circuit 100 and Figure 7 The control circuit 700 will be described in detail. Figure 8 As shown, the threshold voltage VTH is greater than half of the input voltage VIN, and the second current ID2 is greater than the first current ID1, resulting in a larger ripple in the output voltage VOUT.

[0132] Figure 9 The diagram shows a waveform of a power conversion circuit according to another embodiment of the present invention. Figure 9 As shown, the threshold voltage VTH is less than half of the input voltage VIN, and the first current ID1 is greater than the second current ID2, resulting in a larger ripple in the output voltage VOUT.

[0133] Figure 10 The diagram shows a waveform of a power conversion circuit according to yet another embodiment of the present invention. Figure 10 As shown, the threshold voltage VTH is close to and slightly less than half of the input voltage VIN, and the first current ID1 is approximately equal to the second current ID2, resulting in a smaller ripple in the output voltage VOUT.

[0134] Will Figure 8 , Figure 9 , Figure 10 In contrast, adjusting the threshold voltage VTH to approximately half the input voltage VIN allows the voltage detection signal VCR to be controlled to approximately half the input voltage VIN. According to some embodiments of the present invention, the on-time of the lower bridge transistor 120 can be controlled using the threshold voltage VTH, thereby controlling the voltage detection signal VCR to approximately half the input voltage VIN and generating a low-ripple output voltage VOUT.

[0135] According to some embodiments of the present invention, when the ripple of the output voltage VOUT is low, the capacitance value of the output capacitor COUT can be reduced. According to some embodiments of the present invention, Figure 1 The power conversion circuit 100 can generate an upper bridge gate drive signal HSW and a lower bridge gate drive signal LSW based on the current detection signal ICR, the voltage detection signal VCR, the compensation signal COMP, the voltage of the switching node SW, and the input voltage VIN, thereby driving the upper bridge transistor 110 and the lower bridge transistor 120. Figure 3 Control circuit 300 and Figure 7 The control circuit 700 can achieve zero-voltage switching to reduce power loss and generate a low-ripple output voltage VOUT to reduce the capacitance value of the output capacitor COUT.

[0136] Figure 11 A schematic diagram of a control circuit according to another embodiment of the present invention is shown. Figure 11 Control circuit 1100 and Figure 7 Compared to control circuit 700, control circuit 1100 removes [the following]. Figure 7 The first AND gate AND1 further includes a trough voltage detection circuit 1110 and a second AND gate AND2. According to an embodiment of the present invention, the control circuit 1100 is used to implement... Figure 5 The waveform diagram. In other words, the control circuit 1100 first turns on the lower bridge transistor 120, and then turns on the upper bridge transistor 110.

[0137] The second delay circuit 710 delays the inverted upper bridge gate drive signal HSB to generate a delayed signal. The second AND gate AND2 performs a logical AND operation on the delayed signal and the trough signal SV to set the second flip-flop FF2, thereby enabling the lower bridge gate drive signal LSW. According to an embodiment of the present invention, the delay time of the second delay circuit 710 is used to determine the dead time from when the upper bridge transistor 110 is not turned on to when the lower bridge transistor 120 is turned on.

[0138] The valley voltage detection circuit 1110, based on the clock signal CLK, detects that the voltage of the switching node SW is at a valley voltage and enables the valley signal SV. According to one embodiment of the present invention, when the voltage of the switching node SW is at a relatively low point, the valley voltage detection circuit 1110 enables the valley signal SV.

[0139] When the voltage detection signal VCR drops below the threshold voltage VTH, the output signal of the second comparator CMP2 resets the second flip-flop FF2 and disables the lower bridge gate drive signal LSW, thereby preventing the lower bridge transistor 120 from conducting. According to some embodiments of the present invention, the threshold voltage VTH is approximately half of the input voltage VIN.

[0140] When the lower bridge transistor 120 is not turned on, the lower bridge gate drive signal LSW is disabled. The enabled inverted lower bridge gate drive signal LSB is used by the first delay circuit 310 to set the first flip-flop FF1, thereby enabling the upper bridge gate drive signal HSW and turning on the upper bridge transistor 110. When the current detection signal ICR exceeds the compensation signal COMP, the output signal of the first comparator CMP1 resets the first flip-flop FF1 and disables the upper bridge gate drive signal HSW, thereby preventing the upper bridge transistor 110 from turning on.

[0141] Figure 12 The illustration shows an embodiment of the present invention. Figure 11 The waveform diagram generated by the control circuit. For example... Figure 12 As shown, at the initial time t0, the lower bridge gate drive signal LSW enables and turns on the lower bridge transistor 120. At the first time t1, the voltage detection signal VCR does not exceed the threshold voltage VTH and the lower bridge transistor 120 is not turned on, and the voltage of the switching node SW rises. At the second time t2, the upper bridge gate drive signal HSW enables and turns on the upper bridge transistor 110. According to an embodiment of the present invention, since the current originally flowing through the lower bridge transistor 120 turns on the parasitic diode of the upper bridge transistor 110, causing the voltage of the switching node SW to rise at the first time t1, the upper bridge transistor 110 turns on at the second time t2, achieving zero-voltage switching.

[0142] After the upper-bridge transistor 110 is turned on, the current detection signal ICR continues to rise. At the third time t3, the current detection signal ICR exceeds the compensation signal COMP, thus disabling the upper-bridge gate drive signal HSW. When the lower-bridge gate drive signal LSW is enabled again at the fourth time t4, the trough voltage detection circuit 1110 enables the lower-bridge gate drive signal LSW and turns on the lower-bridge transistor 120 only when the voltage of the switching node SW is at a relatively low point, thereby reducing the power loss when the lower-bridge transistor 120 is turned on.

[0143] Figure 13 A flowchart of a control method according to an embodiment of the present invention is shown. The following description of control method 1300 will be accompanied by… Figure 1 The power conversion circuit 100 will be described in detail.

[0144] First, the output voltage VOUT is compared with the reference voltage VREF using the feedback circuit 140 to generate a compensation signal COMP (step S1310). Using the detection circuit 130, a current detection signal ICR is generated based on the current flowing through the resonant capacitor CR (step S1320). Using the detection circuit 130, a voltage detection signal VCR related to the voltage across the resonant capacitor CR is generated (step S1330). Using the control circuit 150, the upper bridge transistor 110 and the lower bridge transistor 120 are driven based on the current detection signal ICR, the voltage detection signal VCR, the compensation signal COMP, and the input voltage VIN (step S1340).

[0145] According to one embodiment of the present invention, when the upper bridge transistor 110 is turned on and the current detection signal ICR exceeds the compensation signal COMP, the upper bridge transistor 110 is turned off. According to another embodiment of the present invention, when the voltage detection signal VCR does not exceed the threshold voltage VTH, the lower bridge transistor 120 is turned off. According to one embodiment of the present invention, the threshold voltage VTH is adjusted based on half of the input voltage VIN. According to one embodiment of the present invention, Figure 11 The trough voltage detection circuit 1110 detects whether the voltage of the switching node SW is at a relatively low point, and determines the timing for turning off the lower bridge transistor 120. In other words, step S1340 can also drive the upper bridge transistor 110 and the lower bridge transistor 120 based on the current detection signal ICR, the voltage detection signal VCR, the compensation signal COMP, the input voltage VIN, and the voltage of the switching node SW.

[0146] This invention proposes a power conversion circuit and its control method, enabling the LLC resonant power conversion circuit to have a wider range of output voltages and achieve zero-voltage switching to reduce switching power loss. Furthermore, the proposed power conversion circuit and its control method can detect the voltage at the switching node and turn on the lower bridge transistor at a relatively low point, further contributing to reduced power loss. Moreover, the voltage across the resonant capacitor can be adjusted by adjusting the threshold voltage, thereby balancing the current of the rectifier components and reducing output voltage ripple. Lower output voltage ripple also allows for the use of a smaller output capacitor.

[0147] While the embodiments and advantages of this disclosure have been disclosed above, it should be understood that any person skilled in the art can make modifications, substitutions, and refinements without departing from the spirit and scope of this disclosure. Furthermore, the scope of protection of this disclosure is not limited to the processes, machines, manufacturing methods, material compositions, apparatuses, methods, and steps described in the specific embodiments of this specification. Any person skilled in the art can understand, from the disclosure of some embodiments of this disclosure, current or future developed processes, machines, manufacturing methods, material compositions, apparatuses, methods, and steps, as long as they can perform substantially the same function or obtain substantially the same results in the embodiments described herein, they can be used according to some embodiments of this disclosure. Therefore, the scope of protection of this disclosure includes the above-described processes, machines, manufacturing methods, material compositions, apparatuses, methods, and steps. In addition, each claim constitutes an individual embodiment, and the scope of protection of this disclosure also includes combinations of various claims and embodiments.

Claims

1. A power conversion circuit, characterized in that, include: A transformer includes a primary coil and a secondary coil, wherein the primary coil is coupled between a switching node and a resonant node; A resonant capacitor is coupled between the aforementioned resonant node and a ground terminal; An on-bridge transistor provides an input voltage to the aforementioned switching node based on an on-bridge drive signal; A lower bridge transistor, based on a lower bridge drive signal, couples the aforementioned switching node to the aforementioned ground terminal; A rectifier circuit converts the energy of the secondary coil into an output voltage. A feedback circuit compares the above output voltage with a reference voltage to generate a compensation signal; A detection circuit is coupled to the aforementioned resonant node to generate a current detection signal and a voltage detection signal; as well as A control circuit generates the upper bridge drive signal and the lower bridge drive signal based on the current detection signal, the voltage detection signal, the compensation signal and the input voltage. When the aforementioned upper bridge transistor is turned on and the aforementioned current detection signal exceeds the aforementioned compensation signal, the aforementioned control circuit turns off the aforementioned upper bridge transistor. When the voltage detection signal does not exceed a threshold voltage, the control circuit turns off the lower bridge transistor.

2. The power conversion circuit as described in claim 1, characterized in that, The detection circuit described above detects the current flowing through the resonant capacitor and generates the current detection signal described above. The voltage detection signal is related to the voltage across the resonant capacitor.

3. The power conversion circuit as described in claim 1, characterized in that, The above control circuit includes: A first comparator compares the current detection signal and the compensation signal to generate an output signal; The control circuit described above does not turn on the upper bridge transistor based on the output signal.

4. The power conversion circuit as described in claim 1, characterized in that, The above control circuit includes: A second comparator compares the voltage detection signal and the threshold voltage to generate an output signal; The aforementioned control circuit, based on the aforementioned output signal, does not turn on the aforementioned lower bridge transistor, thereby reducing the ripple of the aforementioned output voltage.

5. The power conversion circuit as described in claim 4, characterized in that, The threshold voltage is adjusted based on half of the input voltage.

6. The power conversion circuit as described in claim 5, characterized in that, The above rectifier circuit includes: One output capacitor; A first rectifier element rectifies the energy of the secondary coil into a first current; and A second rectifier element rectifies the energy of the secondary coil into a second current; The first current and the second current are used to charge the output capacitor to generate the output voltage. The directions of the first current and the second current are the same.

7. The power conversion circuit as described in claim 6, characterized in that, The voltage detection signal mentioned above is close to the threshold voltage mentioned above; When the voltage detection signal is close to half of the input voltage, the magnitudes of the first current and the second current are similar, thereby reducing the ripple of the output voltage.

8. The power conversion circuit as described in claim 1, characterized in that, The above control circuit includes: A valley voltage detection circuit is used to detect when the voltage across the lower bridge transistor is at a relatively low point and generate a valley signal. The control circuit described above turns on the lower bridge transistor based on the valley signal to reduce the switching loss of the lower bridge transistor.

9. The power conversion circuit as described in claim 1, characterized in that, When the lower-bridge transistor is not turned on and a dead time has elapsed, the upper-bridge transistor turns on to achieve zero-voltage switching.

10. The power conversion circuit as described in claim 1, characterized in that, When the upper bridge transistor is not turned on and a dead time has elapsed, the lower bridge transistor turns on to achieve zero voltage switching.

11. The power conversion circuit as described in claim 1, characterized in that, The detection circuit described above includes a resistor and a capacitor connected in series, wherein the voltage across the resistor is the current detection signal.

12. The power conversion circuit as described in claim 11, characterized in that, The above detection circuit includes: An integrator integrates the current detection signal to generate the voltage detection signal.

13. The power conversion circuit as described in claim 1, characterized in that, The above detection circuit includes: A detection resistor is connected in series between the aforementioned resonant capacitor and the aforementioned grounding terminal; The voltage across the aforementioned detection resistor is the aforementioned current detection signal.

14. The power conversion circuit as described in claim 1, characterized in that, The above detection circuit includes: A capacitor voltage divider circuit is coupled to the two ends of the aforementioned resonant capacitor; The aforementioned capacitor voltage divider circuit is used to divide the voltage across the resonant capacitor, thereby generating the aforementioned voltage detection signal.

15. A control method, characterized in that, A power conversion circuit is used to control a power conversion circuit, wherein the power conversion circuit includes a resonant capacitor coupled between a resonant node and a ground terminal, a transformer including a primary coil and a secondary coil, an upper-bridge transistor that provides an input voltage to a switching node, a lower-bridge transistor that couples the switching node to the ground terminal, and a rectifier circuit that converts the energy of the secondary coil into an output voltage, wherein the primary coil is coupled between the switching node and the resonant node, and wherein the control method includes: A compensation signal is generated by comparing the above output voltage with a reference voltage; A current detection signal is generated based on the current flowing through the aforementioned resonant capacitor; Generate a voltage detection signal related to the voltage across the aforementioned resonant capacitor; and Based on the aforementioned current detection signal, voltage detection signal, compensation signal, and input voltage, the aforementioned upper bridge transistor and the aforementioned lower bridge transistor are driven; When the aforementioned upper bridge transistor is turned on and the aforementioned current detection signal exceeds the aforementioned compensation signal, the aforementioned upper bridge transistor is turned off. When the voltage detection signal does not exceed a threshold voltage, the lower bridge transistor is turned off.

16. The control method as described in claim 15, characterized in that, The above control methods further include: Detecting the voltage across the aforementioned lower-bridge transistor; and When the voltage across the lower bridge transistor is a trough voltage, the lower bridge transistor is turned on to reduce the switching loss of the lower bridge transistor.

17. The control method as described in claim 15, characterized in that, When the lower-bridge transistor is not turned on and a dead time has elapsed, the upper-bridge transistor turns on to achieve zero-voltage switching.

18. The control method as described in claim 15, characterized in that, When the upper bridge transistor is not turned on and a dead time has elapsed, the lower bridge transistor turns on to achieve zero voltage switching.

19. The control method as described in claim 15, characterized in that, The threshold voltage is adjusted based on half of the input voltage.

20. The control method as described in claim 19, characterized in that, The aforementioned rectifier circuit includes an output capacitor, a first rectifier element that generates a first current, and a second rectifier element that generates a second current. The first current and the second current charge the output capacitor to generate the output voltage. The voltage detection signal mentioned above is close to the threshold voltage mentioned above; When the voltage detection signal is close to half of the input voltage, the magnitudes of the first current and the second current are similar, thereby reducing the ripple of the output voltage.

Images