Method for detecting section structure of semiconductor

Abstract

The invention discloses a semiconductor section structure detection method, and the method comprises the steps: cutting a wafer provided with a semiconductor device structure, and obtaining a to-be-detected semiconductor sample; fixing the semiconductor sample by using an adhesive, and grinding until the to-be-detected cross section of the device structure is exposed; carrying out etching treatment on the surface of the section to be detected and forming height differences among different material structures in the section to be detected; bombarding the section to be detected through plasma; and detecting the device structure in the to-be-detected section bombarded by the plasma through a scanning electron microscope. By adopting the method, the detection accuracy of the section structure of the semiconductor device can be improved.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of semiconductor manufacturing, in particular to a detection method of a semiconductor cross-section structure. BACKGROUND

[0002] The detection of a semiconductor cross-section structure is a crucial step in a semiconductor device manufacturing process, which plays an important role in quality control, fault analysis, performance evaluation, reliability verification, etc. of a semiconductor device. At present, a scanning electron microscope (SEM) with high resolution is generally used to observe the cross-section structure and morphology of a semiconductor device.

[0003] In the prior art, before performing a detection process on the cross-section structure of a semiconductor device prepared on a wafer with a <100> crystal orientation in a semiconductor device manufacturing process, a slicing process is performed, that is, cutting (i.e. cleaving or slicing) along the direction of the <100> crystal orientation. In the slicing process, due to the characteristics of silicon, it may crack along the 45-degree direction (i.e. the <110> crystal orientation direction). The crack is not perpendicular to the pattern (i.e. device design pattern or device structure) on the <100> crystal orientation, thereby producing a side shadow when directly observed using an SEM, which affects the accuracy of the observation results of the cross-section structure and morphology of the semiconductor device on the <100> crystal orientation, and may result in low accuracy of key dimension measurement on the semiconductor cross-section sample.

[0004] Therefore, how to improve the accuracy of the detection of the cross-section structure of a semiconductor device needs to be solved. SUMMARY

[0005] The present application provides a detection method of a semiconductor cross-section structure, which can improve the accuracy of the detection of the cross-section structure of a semiconductor device. The specific scheme is as follows: In a first aspect, the present application provides a detection method of a semiconductor cross-section structure, which comprises: cutting a wafer with a semiconductor device structure to obtain a semiconductor sample to be detected; fixing the semiconductor sample using an adhesive and grinding to expose a cross-section to be detected of a device structure; etching the surface of the cross-section to be detected and forming a height difference between different material structures in the cross-section to be detected; bombarding the cross-section to be detected by plasma; and detecting the device structure in the cross-section to be detected bombarded by plasma by a scanning electron microscope.

[0006] Optionally, the plasma is generated based on raw gas containing oxygen and / or argon.

[0007] Optionally, when the plasma is generated based on raw gas containing oxygen and argon, the flow rate of the oxygen ranges from 6 to 10 standard cubic centimeters per minute, and the flow rate of the argon ranges from 1 to 4 standard cubic centimeters per minute.

[0008] Optionally, the power applied to the plasma during the oxygen-containing plasma bombardment ranges from 20 to 60 watts.

[0009] Optionally, the bombardment time for the oxygen-containing plasma bombardment ranges from 1 to 6 minutes.

[0010] Optionally, the flowability of the adhesive used to fix the semiconductor sample meets a preset flowability requirement.

[0011] Optionally, the transparency of the adhesive used to fix the semiconductor sample meets a preset transparency requirement.

[0012] Optionally, the adhesive is AB glue.

[0013] Optionally, the fixing of the semiconductor sample using the adhesive and the grinding to expose the cross section to be detected of the device structure include: using AB glue to coat the semiconductor sample after cutting and allowing the AB glue to enter the opening generated by the cutting; performing baking treatment after the coating with the AB glue; and performing grinding treatment along the direction perpendicular to the <100> crystal direction of the pattern after the baking, until the cross section to be detected of the device structure is exposed.

[0014] Optionally, the baking time parameter of the baking treatment is adjusted to be not more than 70% of the original baking parameter.

[0015] Compared with the prior art, the present application has the following advantages: The method for detecting the cross section structure of a semiconductor provided by the embodiments of the present application includes the following steps: cutting a wafer provided with a device structure to obtain a semiconductor sample to be detected; fixing the semiconductor sample by coating with adhesive and grinding to expose the cross section to be detected of the device structure; performing etching treatment on the surface of the cross section to be detected and forming a height difference between different material structures in the cross section to be detected; performing plasma bombardment on the cross section to be detected; and detecting the structure in the cross section to be detected bombarded by the plasma by using a scanning electron microscope. The semiconductor device to be observed can be protected from damage in the grinding process by fixing the semiconductor sample by using adhesive after cutting, and the boundary between the ground sample and the adhesive can be made clear when the sample is imaged by plasma bombardment after the grinding, so that the cross section structure and the topography of the semiconductor device can be accurately observed by using the image, and the accuracy of the key dimensions measured on the semiconductor cross section sample is high. BRIEF DESCRIPTION OF DRAWINGS

[0016] Figure 1is a schematic diagram of a scanning electron microscope (SEM) detection image in a split grinding scene in an existing semiconductor cross-section structure detection technology.

[0017] Figure 2 is a flowchart of a semiconductor cross-section structure detection method provided by an embodiment of the present application.

[0018] Figure 3 is a schematic diagram of a comparison between SEM detection images obtained before and after plasma bombardment according to an embodiment of the present application. DETAILED DESCRIPTION

[0019] In order for those skilled in the art to better understand the technical solutions of the present application, the present application will be described clearly and completely below in combination with the drawings in the embodiments of the present application. However, the present application can be implemented in many other ways different from the description below, and therefore, all other embodiments obtained by those skilled in the art based on the embodiments provided by the present application without creative labor should belong to the scope of protection of the present application.

[0020] It should be noted that the terms "first", "second", and the like in the claims, the specification and the drawings of the present application are used to distinguish similar objects, and are not intended to describe a specific order or sequence. The data used in this way can be interchangeable under appropriate circumstances, so that the embodiments of the present application described herein can be implemented in an order other than that illustrated or described herein. In addition, the terms "include", "have" and their variants are intended to cover non-exclusive inclusion, for example, a process, method, system, product or device including a series of steps or units does not have to be limited to those steps or units clearly listed, but can include other steps or units not clearly listed or inherent to these processes, methods, products or devices.

[0021] In order to facilitate the understanding of the embodiments of the present application, some concepts related to the embodiments are given.

[0022] Wafer: is the basic material in semiconductor manufacturing, used to make integrated circuits, various chips, etc. It can be a thin sheet-shaped crystal made of high-purity single crystal silicon, or a thin sheet-shaped crystal made of materials such as silicon carbide, gallium nitride, etc.

[0023] Crystal direction: refers to a specific direction of atomic arrangement in a crystal, represented by a crystal direction index. Crystal direction includes but is not limited to: <100> crystal direction, <110> crystal direction, <111> crystal direction. Crystals grown along the <110> crystal direction generally have low surface energy, are easy to form grains, have fast growth speed, and have excellent electrical properties. Crystals grown along the <110> crystal direction have high electron mobility. Crystals grown along the <111> crystal direction have excellent structural symmetry.

[0024] Scanning Electron Microscope (SEM): Also known as scanning electron microscope. It is an observation method between transmission electron microscopy and optical microscopy. SEM uses a narrow, focused high-energy electron beam to scan the sample. Through the interaction between the beam and the sample material, various physical information is excited. This excited physical information is collected, magnified, and re-imaged to obtain an image that characterizes the microscopic contours and / or morphology of the sample.

[0025] Buffered oxide etch (BOE): a chemical used in semiconductor manufacturing to etch silicon dioxide. ) and silicon nitride ( Materials such as hydrofluoric acid (e.g., HF concentration of 49%) and ammonium fluoride (...). It is a mixture of aqueous solutions in a certain proportion. Through the buffering effect of ammonium fluoride, the hydrogen ion concentration in the solution is stabilized, thereby achieving precise control of the etching rate of the material.

[0026] Example 1 The first embodiment of the present application provides a kind of detection method of semiconductor cross-section structure.Semiconductor cross-section structure detection is an important process link of semiconductor device manufacturing, generally first through slicing process and grinding process to prepare cross-section sample, then using scanning electron microscope to observe cross-section structure.In practical application, wafer of <100> crystal direction is commonly used semiconductor base material, carrier mobility of this crystal direction is higher, interface state is less, especially used for preparing semiconductor device structure Power VDMOS (Vertical Double-diffused Metal-Oxide-Semiconductor, vertical double-diffused metal oxide semiconductor), the device is a kind of power MOSFET (metal oxide semiconductor field effect transistor) device.For the wafer based on <100> crystal direction semiconductor device made of slicing process before cross-section structure detection, <100> crystal direction wafer is cracked in the direction along <100> crystal direction, due to the characteristics of silicon material itself, it can produce the fracture along the 45 degree direction (that is, <110> crystal direction) of Notch (notch), on the one hand, it can cause the side shadow when directly observed with SEM, so that the device measurement on <100> crystal direction is not accurate.On the other hand, after slicing, even if fracture is produced in <110> crystal direction, since the prepared semiconductor device structure is <100> crystal direction, it needs to be ground along <100> crystal direction (i.e. sample processing), in grinding process, <110> crystal direction is easy to be damaged by the crack under greater stress, device structure is easy to be damaged.

[0027] Please refer to Figure 1The figure shows the existing <100> A schematic diagram of scanning electron microscope (SEM) images obtained during the grinding of crystallographically oriented cleavage fragments, wherein (a) <100> A schematic diagram of a wafer fractured at a 45-degree angle to the notch during dicing; the circular area represents the wafer, and the center of the wafer is the die area, also known as the device area or circuit area. This area contains multiple independent dies, each of which is a complete integrated circuit with a specific function, such as a CPU, memory, or sensor. These dies are formed during wafer fabrication through processes such as photolithography, etching, and doping. To inspect and analyze the device structure in the central area, it is necessary to expose it first. Diagram (a) also schematically shows the planar structure (i.e., the planar pattern) and the cross-sectional structure (cross-sectional pattern). Along the diagram... <100> Cut into small pieces, such as 1x1 cm. However, due to <110> The interplanar spacing of the crystal orientation is relatively large, making it most susceptible to cracking under stress. Therefore, during the cutting process, it is easy to crack along a 45-degree angle, as shown in (a). <110> The fracture direction is not perpendicular to the original structure (pattern) of the device being inspected. Therefore, direct SEM observation will produce a side shadow, as shown in Figure (b) where a side shadow is observed directly with SEM. This affects the measurement of the original device structure and profile. Before SEM observation, it is necessary to follow the direction of the fracture. <100> The sample is ground along the crystal orientation, as shown in section (c). <110> Cracks in the crystal direction will be subject to greater stress, which can easily damage the device structure.

[0028] To address the above problems, this embodiment provides a method for detecting semiconductor cross-sectional structures. Please refer to [the relevant documentation]. Figure 2 The figure shows a flowchart of the detection method for the semiconductor cross-sectional structure. Figure 2 The method for detecting the semiconductor cross-sectional structure shown includes steps S201 to S205.

[0029] Step S201: The wafer with the semiconductor device structure is cut to obtain the semiconductor sample to be tested.

[0030] Specifically, the wafer is diced into semiconductor samples suitable for testing using precision dicing equipment. The semiconductor device structure is as follows: <100> Wafer fabrication with crystal orientation, dicing along <100> The semiconductor sample is obtained by cutting along the crystal orientation.

[0031] Step S202: Fix the semiconductor sample with an adhesive and grind it to expose the cross section to be tested, revealing the device structure.

[0032] Specifically, the device structure of the semiconductor sample needs to be exposed by a grinding process before it can be detected and analyzed. Since the device structure is manufactured along the <100> crystal direction, the grinding process will be along the <100> crystal direction.

[0033] Specifically, an adhesive (i.e., glue) is used to fix the semiconductor sample before grinding. Since the aforementioned cutting process can cause cracks on the <110> crystal surface, if the <110> crystal surface is directly ground to the <100> crystal surface direction, it will be subjected to strong grinding stress and the device structure is likely to be damaged. Therefore, using an adhesive to fix the semiconductor sample before grinding can protect the device structure during the grinding process, so that the upper edge of the device is not damaged. The adhesive has flowability, so that the adhesive can be filled into the opening generated by the slicing. Further, the adhesive has a certain degree of transparency, so that it is convenient to judge whether the grinding position is correct from the plane during the grinding process. Specifically, the flowability index of the adhesive used to fix the semiconductor sample meets the preset flowability requirement. The flowability index can be, but is not limited to, viscosity, slump, consistency, etc. Further, the transparency index of the adhesive used to fix the semiconductor sample meets the preset transparency requirement. The transparency and flowability of the adhesive can be quantitatively represented by specific physical quantities, so as to more accurately evaluate and compare the performance of different glues. The transparency index of the adhesive can be, but is not limited to, light transmittance (the higher the light transmittance value, the better the transparency), haze (the lower the haze value, the better the transparency), refractive index (the closer to the refractive index of air, the better the transparency), color depth (the smaller the color depth, the better the transparency), etc. For example, the adhesive has a light transmittance of 95%. In practice, the adhesive can also be selected according to some properties of the adhesive before and / or after curing to meet the requirements of sample grinding and SEM detection. For example, before curing, the adhesive should not have a noticeable odor, and the flowability of the adhesive should meet the requirement that the adhesive can be completely filled into the opening structure of the sample. For example, after curing, the curing time of the adhesive should not exceed 20 minutes; and after curing, the adhesive should be transparent so as to facilitate the judgment of whether the grinding position is correct from the plane during the grinding process. For example, after curing, the adhesive should have a certain hardness and corrosion resistance to ensure that the adhesive does not collapse during the grinding process. The above-mentioned adhesive properties can be combined with each other without conflict.

[0034] Preferably, the adhesive is AB glue. AB glue is a two-component adhesive composed of a base (component A) and a hardener (component B). After mixing, it can be baked at elevated temperature or cured at room temperature. AB glue provides strong adhesion, firmly fixing the semiconductor material on the grinding equipment, preventing movement or falling during grinding, and ensuring processing accuracy. It is suitable for various semiconductor materials such as silicon wafers, gallium arsenide, and gallium nitride, meeting the fixing needs of different materials. AB glue also has good chemical corrosion resistance, resisting chemical erosion during grinding, and a short curing time, allowing for quick fixing and improving production efficiency. AB glue has low shrinkage during curing, reducing stress caused by shrinkage and avoiding damage to the semiconductor material.

[0035] Taking AB glue as an example, after applying the adhesive and allowing it to flow into the opening, the adhesive is baked at elevated temperature. The adhesive hardens after baking, and the boundary of the AB glue and the boundary of the device are clearly distinguished, making it easier to observe the device structure in subsequent steps.

[0036] Specifically, the process of fixing the semiconductor sample with adhesive and grinding to expose the device structure of the detected cross-section includes: applying AB glue to the cut semiconductor sample and allowing it to flow into the opening created by the cut; baking after applying AB glue; and grinding along the <100> crystal direction perpendicular to the pattern until the detected cross-section is exposed. In practical applications, the baking time of the adhesive can be controlled, for example, to ensure that the hardness of the cured glue is not too high. A high hardness of the glue can create a height difference between the device structure and the adhesive during grinding, making it easier to observe. Preferably, the baking time is adjusted to be no more than 70% of the original baking parameter.

[0037] Step S203: etching the surface of the detected cross-section to form a height difference between different material structures in the detected cross-section.

[0038] Specifically, the surface of the detected cross-section is etched by a cleaning and etching solution BOE in the semiconductor process, and the oxide and other impurities on the surface are removed to form a height difference between different materials and different structures in the detected cross-section, thereby improving the image effect obtained under the scanning electron microscope.

[0039] Step S204: bombarding the detected cross-section with plasma.

[0040] Since the adhesive is fixed to the semiconductor sample in the foregoing step, the soft texture of the adhesive can deform during the grinding process, and the adhesive is sensitive to the electron beam, which can also deform the adhesive during the SEM observation process. The deformation of the adhesive makes the boundary between the semiconductor sample and the adhesive unclear, thereby making the imaging effect of the semiconductor device cross-section sample under the scanning electron microscope poor, affecting the accuracy of the observation results of the interface structure and the morphology of the semiconductor device, and possibly leading to low accuracy of the key dimension measurement on the cross-section sample. Therefore, in this step, the cross-section to be detected is bombarded by plasma, which can remove the adhesive at the boundary, including physical bombardment removal and / or oxidation reaction removal, thereby reducing the influence of the adhesive on the image.

[0041] Specifically, the plasma is generated based on raw gas containing oxygen and / or argon. Considering that the main component of the adhesive is C (carbon) element, and the semiconductor sample does not contain carbon, the chemical reaction of the oxygen-containing plasma can be introduced, so that the adhesive can be oxidized without affecting the semiconductor sample, thereby obtaining a clear boundary at the boundary between the adhesive and the sample. In addition, the plasma generated by argon can also remove the adhesive. Argon can be ionized to form plasma under the action of high-frequency electric field, which contains high-energy ions and electrons and other particles. These high-energy particles accelerate under the action of electric field, bombard the surface of the adhesive layer, and gradually separate the molecules in the adhesive layer layer by layer through physical impact, so that the adhesive layer becomes small particles or gaseous substances, thereby clearing part of the adhesive; and when the high-energy particles in the argon plasma bombard the surface of the adhesive layer, the chemical bonds on the surface of the adhesive layer are broken, generating a large number of free radicals. These free radicals have high reactivity and can react with oxygen or other gases in the air to generate volatile substances, thereby further promoting the removal of the adhesive. The parameters of the plasma generated by using argon and using oxygen need to be fine-tuned. Considering that the atomic weight of argon is larger than that of oxygen, a smaller power supply power can be used.

[0042] Preferably, a plasma containing oxygen and argon can be used. When the plasma is generated based on a raw gas containing oxygen and argon, the flow rate of the oxygen ranges from 6 to 10 standard cubic centimeters per minute, and the flow rate of the argon ranges from 1 to 4 standard cubic centimeters per minute; the power applied to the plasma when the oxygen-containing plasma is bombarded ranges from 20 to 60 watts; and the bombardment time when the oxygen-containing plasma is bombarded ranges from 1 to 6 minutes. A set of preferred parameters in the process of plasma bombardment: the power is 40 watts, the flow rate of oxygen is 8 sccm (standard cubic centimeters per minute), the flow rate of argon is 2 sccm, and the bombardment time is 300 seconds. After the oxygen ions and the adhesive injected in the semiconductor sample are fully reacted, subsequent SEM observation is performed. Compared with Etch ion etching, which may lose the device while removing the adhesive, the plasma bombardment in this embodiment does not affect the profile, boundary, etc. of the device of the semiconductor sample.

[0043] Exemplarily, before SEM imaging, the cross section of the adhesive-coated and ground semiconductor sample to be detected can be cleaned by generating plasma through a plasma cleaner, an ion cleaning device, or the like.

[0044] Exemplarily, the baking time of the adhesive and the plasma bombardment time can be adjusted according to the reaction speed requirement at the boundary to improve the observation accuracy and efficiency. For example, the baking time is shortened, so that the AB glue hardness is lower, thereby generating a height difference between the device and the sample when the sample is ground. A lower power is selected to generate oxygen plasma, so that the reaction at the boundary of the sample is the fastest, thereby removing the AB glue at the boundary without affecting the device.

[0045] In step S205, the device structure in the cross section to be detected bombarded by the plasma is detected by a scanning electron microscope.

[0046] Specifically, by introducing the bombardment of the plasma, the adhesive and the device boundary of the semiconductor sample become sharp, so that the device structure in the cross section to be detected is detected by the SEM, which can improve the image effect and improve the measurement accuracy of the device structure.

[0047] Please refer to Figure 3 , which shows the comparison of the scanning electron microscope detection images with and without plasma bombardment. In the figure, (d) is the SEM image without plasma bombardment, and (e) is the image with plasma bombardment. As can be seen, the boundary between the AB glue and the sample obtained by using the plasma bombardment is sharp.

[0048] So far, the method provided by the embodiment is described. In the method, after the semiconductor sample to be detected is obtained by cutting a wafer, the semiconductor sample is fixed by an adhesive. The observed semiconductor device can be protected from being damaged in the grinding process. After the grinding is completed, the boundary between the ground sample and the adhesive can be made clear by plasma bombardment when the SEM imaging is performed. Therefore, the cross-sectional structure and the topography of the semiconductor device can be accurately observed through the image, and the accuracy of the measured key dimensions on the semiconductor cross-sectional sample is high.

[0049] Although the application is disclosed with the preferred embodiments, it is not intended to limit the application. Any person skilled in the art can make possible changes and modifications without departing from the spirit and scope of the application. Therefore, the protection scope of the application should be subject to the scope defined by the claims of the application.

Claims

1. A method for detecting the cross-sectional structure of a semiconductor, characterized in that, include: The wafer with the semiconductor device structure is cut to obtain the semiconductor sample to be tested; The semiconductor sample was fixed with an adhesive and ground to expose the cross section to be tested, revealing the device structure. The surface of the cross section to be tested is etched to create a height difference between different material structures in the cross section to be tested. The cross section to be tested is bombarded with plasma; The device structure in the cross section to be tested by plasma bombardment is examined using a scanning electron microscope.

2. The method for detecting semiconductor cross-sectional structures according to claim 1, characterized in that, The plasma is a plasma generated based on a feed gas containing oxygen and / or argon.

3. The method for detecting semiconductor cross-sectional structures according to claim 2, characterized in that, When the plasma is generated based on a feed gas containing oxygen and argon, the flow rate of the oxygen is in the range of 6 to 10 standard cubic centimeters per minute, and the flow rate of the argon is in the range of 1 to 4 standard cubic centimeters per minute.

4. The method for detecting semiconductor cross-sectional structures according to claim 2, characterized in that, The power applied to the plasma during the oxygen-containing plasma bombardment is in the range of 20 watts to 60 watts.

5. The method for detecting semiconductor cross-sectional structures according to claim 2, characterized in that, The bombardment time for the oxygen-containing plasma bombardment ranges from 1 to 6 minutes.

6. The method for detecting semiconductor cross-sectional structures according to claim 1, characterized in that, The flowability index of the adhesive used to fix the semiconductor sample meets the preset flowability requirements.

7. The method for detecting semiconductor cross-sectional structures according to claim 6, characterized in that, The transparency index of the adhesive used to fix the semiconductor sample meets the preset transparency requirements.

8. The method for detecting semiconductor cross-sectional structures according to claim 6 or 7, characterized in that, The adhesive is AB glue.

9. The method for detecting semiconductor cross-sectional structures according to claim 8, characterized in that, The step of fixing the semiconductor sample with an adhesive and grinding it to expose the cross-section to be tested, which reveals the device structure, includes: Apply AB glue to the semiconductor sample obtained after cutting, and then inject the AB glue into the opening created by the cutting. After applying AB glue, bake it. After baking, along the perpendicular pattern <100> The crystal direction is ground until the cross section to be tested is exposed.

10. The method for detecting semiconductor cross-sectional structures according to claim 9, characterized in that, Adjust the baking time parameters for the baking process to no more than 70% of the original baking parameters.

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