Band-gap reference circuit and chip

Abstract

The invention provides a band-gap reference circuit and a chip, and the circuit comprises a voltage generation module which is used for generating a first voltage with a positive temperature coefficient and a second voltage with a negative temperature coefficient, and generating a reference voltage with a zero temperature coefficient according to the first voltage and the second voltage; and the load driving module is used for providing load driving capability for the voltage generation module so as to carry out driving buffering on a post-stage circuit. The whole circuit does not contain an operational amplifier clamp and can provide reference voltage with a zero temperature coefficient, so that the power consumption of the band-gap reference circuit is effectively reduced; meanwhile, the load driving module provides load driving capacity for the voltage generation module, so that the output reference voltage has the load driving capacity, and the problems that an existing band-gap reference circuit is high in power consumption and does not have the load driving capacity are solved.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of circuit design, in particular to a bandgap reference circuit and a chip. BACKGROUND

[0002] As a basic module in analog circuits, the bandgap reference circuit is widely used in low dropout linear regulators (LDO), switching power supplies, high-precision comparators, digital-to-analog converters, analog-to-digital converters and other basic analog circuits due to its ability to provide accurate voltage and high temperature stability.

[0003] The existing bandgap reference circuit has a circuit schematic as shown in Figure 1 The existing bandgap reference circuit includes three transistors Q01, Q02 and Q03, three MOS tubes M01, M02 and M03, an operational amplifier B01 and two resistors R01 and R02. By adjusting the resistance values of the resistors R01 and R02, a reference voltage independent of temperature can be obtained.

[0004] Although the existing bandgap reference circuit is simple in structure and easy to implement, the circuit is affected by device mismatch and operational amplifier offset voltage, resulting in low precision of the output reference voltage. At the same time, since the operational amplifier is used to realize the clamping function, the power consumption of the circuit is increased. In addition, the reference voltage output by the existing bandgap reference circuit cannot directly drive the subsequent circuit. SUMMARY

[0005] The present application aims to provide a bandgap reference circuit and a chip to solve the problem of high power consumption and lack of load driving capability of the existing bandgap reference circuit.

[0006] To solve the above technical problems, the present application provides a bandgap reference circuit, which comprises: a voltage generation module for generating a first voltage with a positive temperature coefficient and a second voltage with a negative temperature coefficient, and generating a reference voltage with zero temperature coefficient according to the first voltage and the second voltage; a load driving module for providing the voltage generation module with load driving capability to drive and buffer the subsequent circuit.

[0007] Optionally, in the bandgap reference circuit, the voltage generation module includes a bias circuit, a positive temperature coefficient current generation circuit, a first transistor, a second transistor, a first resistor, a second resistor and a third resistor. The bias circuit is used for generating bias current; the positive temperature coefficient current generating circuit is used for generating current with positive temperature coefficient; the collector of the first transistor is connected with the bias circuit, the emitter of the first transistor is grounded through the first resistor, and the base of the first transistor outputs the reference voltage as the output terminal of the voltage generating module; the collector of the second transistor is connected with the bias circuit, the emitter of the second transistor is grounded, and the base of the second transistor is connected with the positive temperature coefficient current generating circuit; the positive temperature coefficient current generating circuit is connected with the base of the first transistor through the second resistor and the third resistor.

[0008] Optionally, in the bandgap reference circuit, the first resistor, the second resistor and the third resistor have the same resistance; the emitter area ratio of the first transistor and the second transistor is 1:1.

[0009] Optionally, in the bandgap reference circuit, the bias circuit comprises a first transistor, a second transistor, a third transistor, a fourth transistor and a fourth resistor; The source of the first transistor and the source of the second transistor are connected with a power supply voltage, the gate of the first transistor and the gate of the second transistor are connected, and are connected with the first end of the fourth resistor; the drain of the first transistor is connected with the source of the third transistor; the drain of the second transistor is connected with the source of the fourth transistor; the gate of the third transistor and the gate of the fourth transistor are connected, and are connected with the second end of the fourth resistor; the drain of the third transistor is connected with the first end of the fourth resistor; the second end of the fourth resistor is connected with the collector of the first transistor; the drain of the fourth transistor is connected with the collector of the second transistor.

[0010] Optionally, in the bandgap reference circuit, the width-length ratio of the first transistor and the second transistor is the same; the width-length ratio of the third transistor and the fourth transistor is the same.

[0011] Optionally, in the bandgap reference circuit, the load driving module comprises a fifth transistor; the drain of the fifth transistor is connected with a power supply voltage, the gate of the fifth transistor is connected with the bias circuit, and the source of the fifth transistor is connected with the base of the first transistor.

[0012] Optionally, in the bandgap reference circuit, the positive temperature coefficient current generating circuit comprises a third transistor, a fourth transistor and a fifth resistor; The collector of the third transistor is connected with the first end of the second resistor and the base of the second transistor, the second end of the second resistor is connected with the base of the first transistor, the emitter of the third transistor is grounded, and the base of the third transistor is connected with the collector of the fourth transistor; the collector of the fourth transistor is connected with the first end of the third resistor through the fifth resistor, the second end of the third resistor is connected with the base of the first transistor, the emitter of the fourth transistor is grounded, and the base of the fourth transistor is connected with the first end of the third resistor.

[0013] Optionally, in the bandgap reference circuit, the emitter area ratio of the third transistor and the fourth transistor is 8:1; and the emitter area ratio of the first transistor, the second transistor and the fourth transistor is 1:1:1.

[0014] Optionally, in the bandgap reference circuit, the bandgap reference circuit further comprises a temperature compensation module, the temperature compensation module is used for temperature compensation of the reference voltage output by the voltage generation module; and the temperature compensation module comprises a sixth transistor, a seventh transistor and a sixth resistor. The source of the sixth transistor is connected with a power supply voltage, the gate of the sixth transistor is connected with the positive temperature coefficient current generation circuit, and the drain of the sixth transistor is grounded through the sixth resistor; the source of the seventh transistor is grounded, the gate of the seventh transistor is connected with the drain of the sixth transistor, and the drain of the seventh transistor is connected with the positive temperature coefficient current generation circuit.

[0015] Optionally, in the bandgap reference circuit, the bandgap reference circuit further comprises a start module, the start module is used for starting the voltage generation module to output a reference voltage; and the start module comprises an eighth transistor, a ninth transistor and a tenth transistor. The drain of the eighth transistor is connected with the bias circuit, the source of the eighth transistor is grounded, and the gate of the eighth transistor is connected with the drain of the ninth transistor; the source of the ninth transistor is grounded, the gate of the ninth transistor is connected with the base of the first transistor, and the drain of the ninth transistor is connected with the drain of the tenth transistor; the source of the tenth transistor is connected with a power supply voltage, and the gate of the tenth transistor is connected with the drain of the tenth transistor.

[0016] To solve the above technical problems, the application further provides a chip comprising the bandgap reference circuit according to any one of the above.

[0017] The bandgap reference circuit and chip provided by the application comprise a voltage generation module for generating a first voltage with a positive temperature coefficient and a second voltage with a negative temperature coefficient, and generating a reference voltage with a zero temperature coefficient according to the first voltage and the second voltage; and a load driving module for providing a load driving capability to the voltage generation module to drive and buffer a subsequent circuit. Since the entire circuit does not contain an operational amplifier, and the reference voltage with a zero temperature coefficient can be provided, the power consumption of the bandgap reference circuit is effectively reduced; meanwhile, the load driving capability is provided to the voltage generation module by the load driving module, so that the output reference voltage has the load driving capability, and the problem of high power consumption and lack of load driving capability of the existing bandgap reference circuit is solved. BRIEF DESCRIPTION OF DRAWINGS

[0018] Figure 1 The circuit schematic diagram of the existing bandgap reference circuit is shown in FIG. 1. Figure 2 The circuit block diagram of the bandgap reference circuit provided by the embodiment is shown in FIG. 2. Figure 3 The circuit schematic diagram of the bandgap reference circuit provided by the embodiment is shown in FIG. 3. Figure 4 The circuit structure schematic diagram of the bandgap reference circuit provided by the embodiment is shown in FIG. 4. Figure 5 The circuit structure schematic diagram of the bandgap reference circuit provided by the embodiment is shown in FIG. 5. DETAILED DESCRIPTION

[0019] The bandgap reference circuit and chip provided by the application will be further described in detail below in combination with the drawings and specific embodiments. It should be noted that the drawings are very simplified and all use non-precise proportions, and are only used to facilitate and clarify the purpose of assisting the description of the embodiments of the application. In addition, the structures shown in the drawings are often a part of the actual structures. In particular, the emphasis of each drawing needs to be different, and sometimes different proportions are used.

[0020] It should be noted that "first", "second", and the like in the specification and claims of the application and the drawings are used to distinguish similar objects in order to describe the embodiments of the application, and are not used to describe a specific order or sequence, and it should be understood that the structures used in this way can be interchanged under appropriate circumstances. In addition, the terms "include" and "have" and any variations thereof are intended to cover non-exclusive inclusion, for example, a process, method, system, product or device that includes a series of steps or units does not have to be limited to those steps or units clearly listed, but can include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.

[0021] The circuit schematic diagram of the existing bandgap reference circuit is shown in FIG. 1.Figure 1 As shown, it includes three transistors (triodes) Q01, Q02 and Q03, three MOS tubes M01, M02 and M03, an operational amplifier B01 and two resistors R01 and R02. In practical applications, the three MOS tubes M01, M02 and M03 can be PMOS, and the three transistors Q01, Q02 and Q03 can be PNP type BJT. By setting the width-length ratio of the three MOS tubes to be the same, and setting the emitter area ratio of the transistors Q01 and Q02 to be 8:1, so as to have good matching in the later layout design.

[0022] Specifically, as shown in Figure 1 , the sources of the three MOS tubes M01, M02 and M03 are connected to the power supply VDD, the gates are connected to each other and connected to the output terminal Vout of the operational amplifier B01; the drain of M01 is connected to the positive input terminal of the operational amplifier B01, and connected to the emitter of the transistor Q01 through the resistor R01; the drain of M02 is connected to the negative input terminal of the operational amplifier B01, and connected to the emitter of the transistor Q02; the drain of M03 is connected to the emitter of the transistor Q03 through the resistor R02, and a reference voltage Vref is taken out at the drain; the bases and collectors of the three transistors Q01, Q02 and Q03 are grounded.

[0023] Taking the emitter area ratio of Q01 and Q02 as 8:1 as an example, the voltage on the resistor R01 can be derived as

[0024] Among them, represents the base-emitter voltage of the transistor Q01, represents the base-emitter voltage of the transistor Q02, represents the transistor thermal voltage.

[0025] Because there is a voltage with a positive temperature coefficient across the resistor R01, the current in the branch where the resistor R01 is located has a positive temperature coefficient. Through the current mirror composed of the upper MOS tube, the current with a positive temperature coefficient in the branch where the resistor R01 is located is copied to the branch where the resistor R02 is located, and the branch current is denoted as , so that the voltage across the resistor R02 is proportional to the temperature. Because the voltage on the transistor Q03 is a voltage with a negative temperature coefficient, therefore, by adjusting the resistance values of the resistors R01 and R02, a reference voltage independent of temperature can be obtained. The reference voltage output by the bandgap reference circuit can be represented as: ​

[0026] However, existing bandgap reference circuits are affected by device mismatch and operational amplifier offset voltage, resulting in low accuracy of the output reference voltage. At the same time, the use of operational amplifiers to implement the clamping function increases circuit power consumption. In addition, the reference voltage output by existing bandgap reference circuits does not have load driving capability and cannot directly drive subsequent circuits.

[0027] To address the aforementioned shortcomings of existing bandgap reference circuits, this embodiment provides a bandgap reference circuit, such as... Figure 2 As shown, it includes: A voltage generation module is used to generate a first voltage with a positive temperature coefficient and a second voltage with a negative temperature coefficient, and to generate a reference voltage with zero temperature coefficient based on the first voltage and the second voltage. The load drive module is used to provide load drive capability to the voltage generation module in order to drive and buffer the subsequent circuits.

[0028] The bandgap reference circuit provided in this embodiment effectively reduces the power consumption of the bandgap reference circuit because the entire circuit does not contain operational amplifier clamping and can provide a reference voltage with zero temperature coefficient. At the same time, by providing load driving capability to the voltage generation module through the load driving module, the output reference voltage has load driving capability, which solves the problem of high power consumption and lack of load driving capability of existing bandgap reference circuits.

[0029] Preferably, in this embodiment, a negative feedback loop is also established between the load driving module and the voltage generation module, thereby stabilizing the reference voltage output by the voltage generation module and improving the accuracy of the reference voltage.

[0030] Specifically, in this embodiment, such as Figure 3 As shown, the voltage generation module includes a bias circuit, a positive temperature coefficient current generation circuit, a first transistor Q1, a second transistor Q2, a first resistor R1, a second resistor R2, and a third resistor R3.

[0031] The bias circuit is used to generate a bias current; the positive temperature coefficient current generation circuit is used to generate a current with a positive temperature coefficient; the collector of the first transistor Q1 is connected to the bias circuit, the emitter of the first transistor Q1 is grounded through the first resistor R1, and the base of the first transistor Q1 serves as the output terminal of the voltage generation module, outputting the reference voltage V. REF The collector of the second transistor Q2 is connected to the bias circuit, the emitter of the second transistor Q2 is grounded, and the base of the second transistor Q2 is connected to the positive temperature coefficient current generating circuit. The positive temperature coefficient current generating circuit is connected to the base of the first transistor Q1 through the second resistor R2 and the third resistor R3.

[0032] In a specific embodiment, as shown in Figure 4 the bias circuit includes a first transistor M1, a second transistor M2, a third transistor M3, a fourth transistor M4 and a fourth resistor R4.

[0033] The source of the first transistor M1 and the source of the second transistor M2 are connected to a power supply voltage VDD, the gate of the first transistor M1 and the gate of the second transistor M2 are connected to each other and to a first terminal of the fourth resistor R4; the drain of the first transistor M1 is connected to the source of the third transistor M3; the drain of the second transistor M2 is connected to the source of the fourth transistor M4; the gate of the third transistor M3 and the gate of the fourth transistor M4 are connected to each other and to a second terminal of the fourth resistor R4; the drain of the third transistor M3 is connected to the first terminal of the fourth resistor R4; the second terminal of the fourth resistor R4 is connected to the collector of the first transistor Q1; the drain of the fourth transistor M4 is connected to the collector of the second transistor Q2.

[0034] The bias circuit provided in the embodiment provides a bias current in the manner of a current mirror. Of course, in other embodiments, other structures of bias circuit can be provided to provide a bias current, which is not limited in the present application.

[0035] and, as shown in Figure 4 the positive temperature coefficient current generation circuit includes a third transistor Q3, a fourth transistor Q4 and a fifth resistor R5.

[0036] The collector of the third transistor Q3 is connected to the first terminal of the second resistor R2 and the base of the second transistor Q2, the second terminal of the second resistor R2 is connected to the base of the first transistor Q1, the emitter of the third transistor Q3 is grounded, and the base of the third transistor Q3 is connected to the collector of the fourth transistor Q4; the collector of the fourth transistor Q4 is connected to the first terminal of the third resistor R3 through the fifth resistor R5, the second terminal of the third resistor R3 is connected to the base of the first transistor Q1, the emitter of the fourth transistor Q4 is grounded, and the base of the fourth transistor Q4 is connected to the first terminal of the third resistor R3.

[0037] The positive temperature coefficient current generation circuit provided in the embodiment utilizes the characteristics of the transistors as positive temperature coefficient to generate a current I PTAT with positive temperature coefficient.

[0038] Further, in the embodiment, as shown in Figure 4As shown, the load driving module comprises a fifth transistor M5; the drain of the fifth transistor M5 is connected to a power supply voltage VDD, the source of the fifth transistor M5 is connected to the base of the first transistor Q1, and the gate of the fifth transistor M5 is connected to the bias circuit; in this embodiment, the gate of the fifth transistor M5 is connected to the drain of the fourth transistor M4.

[0039] The bandgap reference circuit provided in this embodiment comprises a fifth transistor M5 and a second resistor R2 and a second transistor Q2, which form a negative feedback loop, thereby stabilizing the reference voltage V REF output by the bandgap reference circuit. Meanwhile, since the source of the fifth transistor M5 is connected to the base of the first transistor Q1, that is, the fifth transistor M5 is connected to the output of the bandgap reference circuit and is a source follower with low output impedance, the fifth transistor M5 can have load driving capability and drive the subsequent circuit. Thus, compared with the prior art bandgap reference circuit which needs an external buffer to drive the subsequent circuit, the bandgap reference circuit provided in this embodiment can embed a load driving circuit in the bandgap reference circuit, and only one transistor is needed to realize the load driving function, thereby effectively reducing the overall area and power consumption of the circuit.

[0040] Specifically, when the output reference voltage V REF is disturbed by a positive voltage , the base voltage of the second transistor Q2 will also increase , thereby reducing the gate voltage of the fifth transistor M5 , and the fifth transistor M5 is a source follower, so that the output reference voltage V REF is reduced and maintained in a stable state.

[0041] To ensure that the currents flowing through the first transistor Q1 and the second transistor Q2 are equal, in this embodiment, the width-length ratios of the first transistor M1 and the second transistor M2 are controlled to be the same; and the width-length ratios of the third transistor M3 and the fourth transistor M4 are controlled to be the same.

[0042] In this embodiment, the resistances of the first resistor R1, the second resistor R2 and the third resistor R3 are set to be the same, the emitter area ratios of the first transistor Q1, the second transistor Q2 and the fourth transistor Q4 are set to be 1:1:1, and the emitter area ratio of the third transistor Q3 and the fourth transistor Q4 is set to be 8:1, so as to ensure that a positive temperature coefficient current is generated on the fifth resistor R5.

[0043] When the resistance values of the first resistor R1, the second resistor R2 and the third resistor R3 are the same, the currents of the branches in which the first resistor R1, the second resistor R2 and the third resistor R3 are located have the following relationship:

[0044] wherein, , and represent the currents of the branches in which the first resistor R1, the second resistor R2 and the third resistor R3 are located, respectively, , and represent the base-emitter voltages of the first transistor Q1, the second transistor Q2 and the fourth transistor Q4, respectively.

[0045] When the currents , and are all equal, and because the emitter area ratios of the first transistor Q1, the second transistor Q2 and the fourth transistor Q4 are 1:1:1, according to the characteristics of the transistors, the base-emitter voltages of the first transistor Q1, the second transistor Q2 and the fourth transistor Q4 are also equal, it is further obtained that:

[0046] When the emitter area ratio of the third transistor Q3 to the fourth transistor Q4 is 8:1, it is obtained that:

[0047]

[0048] Therefore, it is obtained that:

[0049] Thus, the final reference voltage V REF is obtained as:

[0050] In practical applications, the first transistor M1, the second transistor M2, the third transistor M3 and the fourth transistor M4 can be PMOS, and the fifth transistor M5 can be NMOS. In addition, the first transistor Q1, the second transistor Q2, the third transistor Q3 and the fourth transistor Q4 can be NPN type BJT.

[0051] Further, in the embodiment, as shown in Figure 5 , the bandgap reference circuit further comprises a temperature compensation module, which is configured to perform temperature compensation on the reference voltage output by the voltage generation module; the temperature compensation module comprises a sixth transistor M6, a seventh transistor M7 and a sixth resistor R6.

[0052] The source of the sixth transistor M6 is connected to the power supply voltage VDD, the gate of the sixth transistor M6 is connected to the positive temperature coefficient current generating circuit, and the drain of the sixth transistor M6 is connected to the sixth resistor R6; the source of the seventh transistor M7 is grounded, the gate of the seventh transistor M7 is connected to the drain of the sixth transistor M6, and the drain of the seventh transistor M7 is connected to the positive temperature coefficient current generating circuit.

[0053] Specifically, the gate of the sixth transistor M6 and the drain of the seventh transistor M7 are both connected to the first end of the third resistor R3, i.e., connected to the base of the fourth transistor Q4.

[0054] The temperature compensation module provided in the embodiment adopts high-low temperature compensation technology to compensate the output reference voltage V REF , thereby improving the stability of the reference voltage V REF output by the bandgap reference circuit.

[0055] Specifically, since the base-emitter voltage V BE of the transistor has a negative temperature characteristic, when the temperature rises, the base voltage of the fourth transistor Q4 will decrease, at this time, the gate-source voltage of the sixth transistor M6 will increase, further increasing the current flowing through the sixth resistor R6; at the same time, the voltage difference across the sixth resistor R6 will also gradually increase, which will increase the gate-source voltage V GS7 of the seventh transistor M7, and further increase the drain current I M7 of the seventh transistor M7, thereby compensating for the decrease of the voltage V BE4 of the fourth transistor Q4. Similarly, when the temperature decreases, the base voltage of the fourth transistor Q4 will increase, thereby decreasing the gate-source voltage of the sixth transistor M6, further decreasing the current flowing through the sixth resistor R6; at the same time, the voltage difference across the sixth resistor R6 will also gradually decrease, which will decrease the gate-source voltage V GS7 of the seventh transistor M7, and further decrease the drain current I M7 of the seventh transistor M7, thereby compensating for the increase of the voltage V BE4 of the fourth transistor Q4. In this way, the reference voltage V REF output by the bandgap reference circuit does not change with temperature, thereby improving the stability of the reference voltage V REF .

[0056] In actual applications, the sixth transistor M6 can be a PMOS, and the seventh transistor M7 can be an NMOS.

[0057] In addition, in the embodiment, the first resistor R1 and the second resistor R2 are connected in series, and the series connection of the first resistor R1 and the second resistor R2 is connected to the first end of the third resistor R3. Figure 5As shown, the bandgap reference circuit further comprises a starting module for starting the voltage generation module to output a reference voltage; the starting module comprises an eighth transistor M8, a ninth transistor M9, and a tenth transistor M10. The drain of the eighth transistor M8 is connected to the biasing circuit, the source of the eighth transistor M8 is grounded, and the gate of the eighth transistor M8 is connected to the drain of the ninth transistor M9; the source of the ninth transistor M9 is grounded, the gate of the ninth transistor M9 is connected to the base of the first transistor Q1, and the drain of the ninth transistor M9 is connected to the drain of the tenth transistor M10; the source of the tenth transistor M10 is connected to the power supply voltage VDD, and the gate of the tenth transistor M10 is connected to the drain of the tenth transistor M10.

[0058] Specifically, the drain of the eighth transistor M8 is connected to the gate of the first transistor M1.

[0059] In actual applications, the tenth transistor M10 can be composed of a plurality of series-connected transistors, for example, the tenth transistor M10 is composed of three series-connected transistors. The series connection of the plurality of transistors is that the drain of a previous transistor is connected to the source of a next transistor, and the gates of all the transistors are short-circuited and connected to the drain of the last transistor.

[0060] The starting module provided in the embodiment outputs a reference voltage V REF of 0 when the circuit is just started, the ninth transistor M9 is cut off, the tenth transistor M10 is turned on, the gate voltage of the eighth transistor M8 is raised and turned on, the gate voltages of the first transistor M1 and the second transistor M2 in the voltage generation module are lowered and turned on, and the degenerate state of the bandgap reference circuit is broken. When the circuit is started, the output reference voltage V REF is raised to turn on the ninth transistor M9, and the gate voltage of the eighth transistor M8 is lowered to cut off the eighth transistor M8, so as not to affect the normal work of the bandgap reference circuit. In this way, the rapid starting of the bandgap reference circuit is realized.

[0061] In actual applications, the eighth transistor M8 and the ninth transistor M9 can be NMOS, and the tenth transistor M10 can be PMOS.

[0062] The bandgap reference circuit provided in the embodiment has low power consumption because no operational amplifier clamping is used in the whole circuit. The bandgap reference circuit provided in the embodiment uses an embedded source follower with small output impedance, and the output reference voltage has load driving capability without an external buffer, which can not only buffer the subsequent circuit but also has low power consumption and area. The bandgap reference circuit provided in the embodiment can make the output reference voltage not susceptible to external voltage interference and always maintain a stable state by introducing a negative feedback loop. The bandgap reference circuit provided in the embodiment can effectively reduce the sensitivity of the reference voltage to the ambient temperature, improve the stability of the reference voltage, and reduce the output voltage fluctuation by using a temperature compensation module to compensate the reference voltage.

[0063] The embodiment also provides a chip including the bandgap reference circuit.

[0064] In actual applications, the chip can be implemented based on an ASIC or an FPGA. In addition, other functional circuits can be integrated on the chip, and the bandgap reference circuit provided in the embodiment can provide a reference voltage for the other functional circuits.

[0065] It should be noted that the embodiments in the specification are described in a progressive manner, each embodiment focuses on the difference from other embodiments, and the same or similar parts of each embodiment can be referred to each other. In addition, the different parts of each embodiment can also be used in combination, and the present application is not limited in this regard.

[0066] The bandgap reference circuit and the chip provided in the embodiment include a voltage generation module configured to generate a first voltage with a positive temperature coefficient and a second voltage with a negative temperature coefficient, and generate a reference voltage with a zero temperature coefficient based on the first voltage and the second voltage; and a load driving module configured to provide the voltage generation module with a load driving capability to drive and buffer a subsequent circuit. Because no operational amplifier clamping is contained in the whole circuit, and the reference voltage with a zero temperature coefficient is provided, the power consumption of the bandgap reference circuit is effectively reduced. At the same time, the load driving module provides the voltage generation module with a load driving capability, so that the output reference voltage has a load driving capability, solving the problem of high power consumption and no load driving capability of the existing bandgap reference circuit.

[0067] The above description is only a description of the preferred embodiments of the present application, and does not limit the scope of the present application. Any modification or modification of the above disclosure made by a person skilled in the art falls within the protection scope of the claims.

Claims

1. A bandgap reference circuit, characterized in that, include: A voltage generation module is used to generate a first voltage with a positive temperature coefficient and a second voltage with a negative temperature coefficient, and to generate a reference voltage with zero temperature coefficient based on the first voltage and the second voltage. The load drive module is used to provide load drive capability to the voltage generation module in order to drive and buffer the subsequent circuits.

2. The bandgap reference circuit according to claim 1, characterized in that, The voltage generation module includes a bias circuit, a positive temperature coefficient current generation circuit, a first transistor, a second transistor, a first resistor, a second resistor, and a third resistor; The bias circuit is used to generate a bias current; the positive temperature coefficient current generating circuit is used to generate a current with a positive temperature coefficient. The collector of the first transistor is connected to the bias circuit, the emitter of the first transistor is grounded through the first resistor, and the base of the first transistor serves as the output terminal of the voltage generation module to output the reference voltage. The collector of the second transistor is connected to the bias circuit, the emitter of the second transistor is grounded, and the base of the second transistor is connected to the positive temperature coefficient current generating circuit; the positive temperature coefficient current generating circuit is connected to the base of the first transistor through the second resistor and the third resistor.

3. The bandgap reference circuit according to claim 2, characterized in that, The first resistor, the second resistor, and the third resistor have the same resistance value; the emitter area ratio of the first transistor and the second transistor is 1:

1.

4. The bandgap reference circuit according to claim 2, characterized in that, The bias circuit includes a first transistor, a second transistor, a third transistor, a fourth transistor, and a fourth resistor; The source of the first transistor and the source of the second transistor are connected to a power supply voltage. The gates of the first transistor and the second transistor are connected together and connected to the first terminal of the fourth resistor. The drain of the first transistor is connected to the source of the third transistor. The drain of the second transistor is connected to the source of the fourth transistor. The gates of the third transistor and the fourth transistor are connected together and connected to the second terminal of the fourth resistor. The drain of the third transistor is connected to the first terminal of the fourth resistor. The second terminal of the fourth resistor is connected to the collector of the first transistor. The drain of the fourth transistor is connected to the collector of the second transistor.

5. The bandgap reference circuit according to claim 4, characterized in that, The first transistor and the second transistor have the same width-to-length ratio; the third transistor and the fourth transistor have the same width-to-length ratio.

6. The bandgap reference circuit according to claim 2, characterized in that, The load drive module includes a fifth transistor; the drain of the fifth transistor is connected to the power supply voltage, the gate of the fifth transistor is connected to the bias circuit, and the source of the fifth transistor is connected to the base of the first transistor.

7. The bandgap reference circuit according to claim 2, characterized in that, The positive temperature coefficient current generating circuit includes a third transistor, a fourth transistor, and a fifth resistor; The collector of the third transistor is connected to the first end of the second resistor and the base of the second transistor. The second end of the second resistor is connected to the base of the first transistor. The emitter of the third transistor is grounded. The base of the third transistor is connected to the collector of the fourth transistor. The collector of the fourth transistor is connected to the first end of the third resistor through the fifth resistor. The second end of the third resistor is connected to the base of the first transistor. The emitter of the fourth transistor is grounded. The base of the fourth transistor is connected to the first end of the third resistor.

8. The bandgap reference circuit according to claim 7, characterized in that, The emitter area ratio of the third transistor and the fourth transistor is 8:1; the emitter area ratio of the first transistor, the second transistor, and the fourth transistor is 1:1:

1.

9. The bandgap reference circuit according to claim 2, characterized in that, The bandgap reference circuit further includes a temperature compensation module, which is used to perform temperature compensation on the reference voltage output by the voltage generation module; the temperature compensation module includes a sixth transistor, a seventh transistor, and a sixth resistor; The source of the sixth transistor is connected to the power supply voltage, the gate of the sixth transistor is connected to the positive temperature coefficient current generating circuit, and the drain of the sixth transistor is grounded through the sixth resistor; the source of the seventh transistor is grounded, the gate of the seventh transistor is connected to the drain of the sixth transistor, and the drain of the seventh transistor is connected to the positive temperature coefficient current generating circuit.

10. The bandgap reference circuit according to claim 2, characterized in that, The bandgap reference circuit further includes a startup module, which is used to start the voltage generation module to output a reference voltage; the startup module includes an eighth transistor, a ninth transistor, and a tenth transistor; The drain of the eighth transistor is connected to the bias circuit, the source of the eighth transistor is grounded, and the gate of the eighth transistor is connected to the drain of the ninth transistor; the source of the ninth transistor is grounded, the gate of the ninth transistor is connected to the base of the first transistor, and the drain of the ninth transistor is connected to the drain of the tenth transistor; the source of the tenth transistor is connected to the power supply voltage, and its gate is connected to its drain.

11. A chip, characterized in that, Includes the bandgap reference circuit as described in any one of claims 1 to 10.

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