Method for calculating transient temperature of three-dimensional microsystem under transient chip power

Abstract

The application discloses a method for calculating transient temperature of a three-dimensional microsystem under transient chip power, and belongs to the microelectronic technical field, comprising the following steps: determining anisotropic equivalent thermal conductivity of a substrate layer and a microsolder pad layer; taking a chip as a heat source, carrying out Fourier series expansion on heat flow density generated by each chip to obtain total heat flow density generated by the upper surface of each substrate layer; constructing a transient thermal analysis model under fixed chip power according to the total heat flow density; and updating chip power of each chip in the transient thermal analysis model in a plurality of continuous time periods to obtain a transient temperature field of the three-dimensional microsystem at all time nodes. Since the application considers the case that chip power in the three-dimensional microsystem changes with time when constructing the transient thermal analysis model under fixed chip power, the calculated temperature has higher precision, and the calculation efficiency is greatly improved.

Description

Technical Field

[0001] This invention belongs to the field of microelectronics technology, specifically relating to a method for calculating the transient temperature of a three-dimensional microsystem under transient chip power. Background Technology

[0002] In today's rapidly developing microelectronics technology, three-dimensional microsystems, by integrating and packaging multiple chips within a three-dimensional space, can significantly improve integration density and reduce size, providing strong support for the development of miniaturized electronic devices. However, with the continuous increase in integration density, the chips inside three-dimensional microsystems generate a large amount of heat, which is difficult to dissipate quickly within the limited space, leading to serious heat accumulation problems. This has become a key factor restricting the performance of three-dimensional microsystems.

[0003] Currently, existing technologies mainly utilize simulation methods such as finite element analysis for the thermal design of three-dimensional microsystems to predict and optimize their temperature distribution. However, this method is computationally inefficient and cannot complete thermal design quickly and efficiently. Summary of the Invention

[0004] To address the aforementioned problems in the prior art, this invention provides a method for calculating the transient temperature of a three-dimensional microsystem under transient chip power. The technical problem to be solved by this invention is achieved through the following technical solution:

[0005] A method for calculating the transient temperature of a three-dimensional microsystem under transient chip power, characterized in that the three-dimensional microsystem includes multiple functional layers, the multiple functional layers include at least one set of substrate layers and micro pad layers stacked alternately, wherein each substrate layer includes multiple chips and a uniformly distributed through-silicon via (TSV) array, and adjacent substrate layers are interconnected through the TSV array and the micro pad layer.

[0006] The method includes:

[0007] Determine the anisotropic equivalent thermal conductivity of the substrate layer and the micropad layer;

[0008] Using the chip as a heat source, the heat flux density generated by each chip is expanded using Fourier series to obtain the total heat flux density generated by the chip on the upper surface of each substrate layer.

[0009] Based on the total heat flux density, a transient thermal analysis model under fixed chip power is constructed.

[0010] The chip power of each chip in the transient thermal analysis model is updated successively over multiple consecutive time periods to obtain the transient temperature field of the three-dimensional microsystem at all time points.

[0011] Compared with the prior art, the beneficial effects of the present invention are as follows:

[0012] The application provides a method for calculating transient temperature of a three-dimensional microsystem under transient chip power, which can be applied to the three-dimensional microsystem comprising one or more groups of alternately stacked substrate layers and micro-bonding pad layers. In the establishment of a transient thermal analysis model under fixed chip power, the application considers the case that the chip power in the three-dimensional microsystem changes with time, breaks through the limitation of the traditional transient thermal analysis model which only considers constant chip power and does not consider the existence of chips between layers, and therefore, the temperature calculated by the transient thermal analysis model has higher accuracy and greatly improves the calculation efficiency.

[0013] The application will be further described in detail below with reference to the accompanying drawings and embodiments. BRIEF DESCRIPTION OF DRAWINGS

[0014] Figure 1 is a flowchart of the method for calculating transient temperature of a three-dimensional microsystem under transient chip power provided by the embodiment of the application;

[0015] Figure 2 is a structural schematic diagram of the three-dimensional microsystem provided by the embodiment of the application;

[0016] Figure 3 is a structural schematic diagram of a TSV unit provided by the embodiment of the application;

[0017] Figure 4 is a sectional view of the TSV unit provided by the embodiment of the application;

[0018] Figure 5 is a structural schematic diagram of a micro-bonding pad unit provided by the embodiment of the application;

[0019] Figure 6 is a schematic diagram of a sheet with a thickness of 1 μm in the micro-bonding pad unit provided by the embodiment of the application;

[0020] Figure 7 is a schematic diagram of the calculation of the transient temperature field of the three-dimensional microsystem at all time nodes provided by the embodiment of the application;

[0021] Figure 8 is a comparison diagram of the calculation of the transient junction temperature of chip C51;

[0022] Figure 9 is a schematic diagram of the absolute error of the calculation of the transient junction temperature of chip C51;

[0023] Figure 10 is a transient temperature field of the upper surface of the fifth functional layer in the HBM at 100 ms;

[0024] Figure 11 ​is the absolute error of the transient temperature field of the upper surface of the 5th functional layer in the HBM at 100 ms. DETAILED DESCRIPTION

[0025] The application will be further described below in connection with specific embodiments, but the embodiments of the application are not limited thereto.

[0026] Figure 1 is a flowchart of a method for calculating the transient temperature of a three-dimensional microsystem under transient chip power provided by an embodiment of the application, Figure 2 is a structural diagram of a three-dimensional microsystem provided by an embodiment of the application. As shown in Figures 1-2 The method for calculating the transient temperature of a three-dimensional microsystem under transient chip power provided by an embodiment of the application, the three-dimensional microsystem includes a plurality of functional layers, and the plurality of functional layers include at least one set of substrate layers and micro-bonding pad layers stacked alternately, wherein each substrate layer includes a plurality of chips and a uniformly distributed TSV (Through Silicon Via) array, and two adjacent substrate layers are interconnected through the TSV array and the micro-bonding pad layer.

[0027] Figure 2 The three-dimensional microsystem shown is an HBM (High Bandwidth Memory), and taking the HBM as an example, the 1st, 3rd, 5th and 7th layers of the 7 functional layers are substrate layers, and the 2nd, 4th and 6th layers are micro-bonding pad layers. The upper surface of each substrate layer is provided with 4 chips. Of course, Figure 2 It is only used to illustrate the structure of the three-dimensional microsystem, and does not limit the size of the three-dimensional microsystem or the number of substrate layers, micro-bonding pad layers or chips in the three-dimensional microsystem.

[0028] The above method includes:

[0029] S1, determining the anisotropic equivalent thermal conductivity of the substrate layer and the micro-bonding pad layer.

[0030] Figure 3 is a structural diagram of a TSV unit provided by an embodiment of the application, Figure 4 is a sectional view of a TSV unit provided by an embodiment of the application, which can be obtained by cutting along a certain plane perpendicular to the TSV axis. As shown in Figures 2-4 The substrate layer further includes a silicon substrate, and the TSV includes a copper column and a layer surrounding the copper column, and the embodiment defines the TSV unit as the smallest repeating unit containing a TSV and the surrounding specific area of the silicon substrate.

[0031] Specifically, the anisotropic equivalent thermal conductivity of the substrate layer is:

[0032] ;

[0033] ;

[0034] wherein,

[0035]

[0036] ;

[0037] wherein, denotes the equivalent thermal conductivity of the substrate layer in the direction or direction, denotes the equivalent thermal conductivity of the substrate layer in the direction, denotes the equivalent thermal conductivity of the substrate layer in the direction or direction, generated by the first portion of the TSV unit, denotes the equivalent thermal conductivity of the substrate layer in the direction or direction, generated by the second portion of the TSV unit, denotes the equivalent thermal conductivity of the substrate layer in the direction or direction, generated by the third portion of the TSV unit, , denotes the thermal conductivity of copper, denotes the thermal conductivity of , denotes the thermal conductivity of the silicon substrate, denotes the radius of the copper pillar, denotes the sum of the layer thickness and the layer thickness, denotes the pitch of adjacent TSVs in the same substrate layer, denotes the volume fraction of the copper pillar in the TSV unit, denotes the volume fraction of the layer in the TSV unit, denotes the volume fraction of the silicon substrate in the TSV unit, denotes the coordinate variable in the direction, wherein, the direction is perpendicular to the direction and both directions form a plane parallel to the plane in which the functional layers are located.

[0038] Please continue to refer to Figure 4 , in order to illustrate the above-mentioned "first portion", "second portion" and "third portion", a first plane, a second plane and a third plane parallel to the plane are introduced in the TSV unit, The direction is defined as the direction perpendicular to the plane where each functional layer is located. Considering the feature that the TSV unit is symmetrically distributed about the central axis, only one side of the central axis of the TSV unit is taken as an example for description. In Figure 4 the first plane is a line segment extending along the direction, the line segment coincides with the central axis of the TSV unit, the second plane is tangent to the outer surface of the copper pillar, and in the direction, the third plane is located on the side of the second plane away from the first plane and is tangent to the layer of the TSV. According to this, the TSV unit is divided into three parts: the first part is the region between the first plane and the second plane, the second part is the region between the second plane and the third plane, and the third part is the region extending from the third plane to the edge of the TSV unit.

[0039] The structure of the other side of the central axis of the TSV unit is also divided according to the above rules, and thus is not described here.

[0040] Figure 5 is a structural schematic diagram of a micro-pad unit provided by an embodiment of the present application. Further, referring to Figure 2 and Figure 5 , the micro-pad layer includes a plurality of solder balls arranged in an array and a filling material, and the micro-pad unit is defined as: the smallest repeating unit containing one solder ball and the filling material in a specific region around the solder ball.

[0041] The anisotropic equivalent thermal conductivity of the micro-pad layer is represented as follows:

[0042] ;

[0043] ;

[0044] ;

[0045] In the formula, kxx represents the equivalent thermal conductivity of the micro-pad layer in the direction or the direction, kyy represents the equivalent thermal conductivity of the micro-pad layer in the direction, h represents the thickness of the micro-pad, d represents the spacing of adjacent solder balls in the same micro-pad layer, λ represents the thermal conductivity of the solder ball, λf represents the thermal conductivity of the filling material, and h0 represents the thickness of the preset part of the sheet in the direction, the sheet being in the micro-pad unit and having a thickness of h0 in the direction. h ​​​​​​​​​​​​​​​Equivalent thermal conductivity in the direction, , R Indicates the radius of the solder ball. express The coordinate variable in the direction.

[0046] Figure 6 This is a preset part in the micro pad unit provided in the embodiments of the present invention. A schematic diagram. For in Thickness in the direction Thin slices, introduced parallel to Regarding the fourth and fifth planes of the sheet, considering the symmetrical distribution of the sheet along the central axis, this embodiment will only illustrate one side of the central axis of the sheet. Figure 6 As shown, from a top-down perspective, the orthographic projection of the fourth plane is a line along... The line segment extending in the direction coincides with the central axis of the micropad unit, and the fifth plane is tangent to the solder balls in the micropad unit. The area between the fourth and fifth planes is the preset area. .

[0047] Preset area on the other side of the central axis of the thin sheet The division rules are completely consistent with the above-mentioned one-sided division, that is, by parallel to The planes that pass through the centerline and the planes that are tangent to the solder ball are defined and will not be described again.

[0048] S2. Using the chip as a heat source, perform a Fourier series expansion on the heat flux density generated by each chip to obtain the total heat flux density generated by the chip on the upper surface of each substrate layer.

[0049] To simplify the calculation, the heat flux density generated by each substrate layer chip is first expanded into a Fourier series, and this Fourier series is used as an approximation of the chip's heat source. Assume the... The upper surface of the first substrate layer has a chip, then for the second... On the first substrate layer The heat flux density generated by each chip is expanded into a Fourier series:

[0050] ;

[0051] In the formula, Indicates the first On the first substrate layer The heat flux density generated by each chip Indicates the first On the first substrate layer The chip power of each chip, Indicates the first On the first substrate layer Each chip Length in the direction, Indicates the first On the first substrate layer Each chip Width in the direction, , By utilizing the orthogonality of the characteristic functions, the Fourier coefficients can be solved. , , , :

[0052] ;

[0053] ;

[0054] ;

[0055]

[0056] In the formula, , They represent the first On the first substrate layer The center of each chip is direction and Coordinates in the direction.

[0057] Therefore, the first Heat flux density on the upper surface of each substrate layer This is the sum of the heat flux densities of all chips in this layer:

[0058] ;

[0059] In the formula, Indicates the first Number of chips on each substrate layer , , , .

[0060] S3. Based on the total heat flux density, construct a transient thermal analysis model under fixed chip power.

[0061] In this embodiment, step S3 includes:

[0062] S31. Based on the total heat flux density, the anisotropic equivalent thermal conductivity of the substrate layer, and the anisotropic equivalent thermal conductivity of the micropad layer, determine the governing equations, boundary conditions, and initial conditions for each functional layer in the three-dimensional microsystem.

[0063] S32. Based on the governing equations, boundary conditions, and initial conditions, determine the first governing equation, first initial condition, and first boundary condition for each functional layer corresponding to the transient temperature rise, as well as the second governing equation and second boundary condition for each functional layer corresponding to the steady-state temperature rise.

[0064] In this embodiment, the transient thermal analysis model needs to consider both the steady-state temperature rise and the transient temperature rise. There may be chip heat sources at the interface between two adjacent functional layers.

[0065] ;

[0066] In the formula, Indicates the first The total heat flux density generated by the chip's heat source on the upper surface of each functional layer Indicates the first The thickness of each functional layer. It should be noted that the total heat flux density of the micropad layer is 0.

[0067] S33. Determine the steady-state temperature rise of each functional layer based on the second governing equation and the second boundary conditions corresponding to each functional layer in the steady-state temperature rise section.

[0068] Among them, the The steady-state temperature rise of each functional layer is expressed as:

[0069] In the formula, , , , , , , and All are Fourier coefficients for the steady-state temperature rise. Indicates the first The zero-order Fourier coefficients of each functional layer Indicates the first Each functional layer regarding coordinate variables The zeroth Fourier coefficients, , They represent the first Each functional layer regarding coordinate variables of Fourier hyperbolic cosine coefficients sum The coefficients of the hyperbolic sine term in the Fourier transform are... , They represent the first Each functional layer regarding coordinate variables of Fourier hyperbolic cosine coefficients sum The coefficients of the hyperbolic sine term in the Fourier transform are... Represents coordinate variables and the order joint Fourier cosine term coefficient of order, denotes the and the order joint Fourier hyperbolic sine term coefficient of order, the intermediate variable , , , , , , , denote the equivalent thermal conductivity of the th functional layer in the , , direction, respectively, denotes the length of the functional layer in the direction, denotes the width of the functional layer in the direction.

[0070] S34, according to the first control equation, the first initial condition and the first boundary condition of each functional layer corresponding to the transient temperature rise part, determine the transient temperature rise of each functional layer.

[0071] The transient temperature rise of the th functional layer is expressed as:

[0072] ;

[0073] In the formula, , denote the equivalent thermal diffusivity of the th functional layer in the , direction, respectively, denotes the characteristic function of the th functional layer in the direction, , and are the coefficients in the characteristic function , denotes the th eigenvalue, denotes the equivalent thermal diffusivity of the th functional layer in the direction, , , , are all Fourier coefficients of the transient temperature rise part, , , and They represent based on The calculated zeroth-order Fourier coefficients, with respect to coordinate variables of Fourier coefficients, with respect to coordinate variables of Fourier coefficients and their relationship with coordinate variables and of Rank and The joint Fourier coefficients of order, where, , , , Indicates the first Average density of each functional layer Indicates the first Average heat capacity of each functional layer.

[0074] S35. Construct a transient thermal analysis model under fixed chip power based on the steady-state temperature rise, transient temperature rise, and ambient temperature of each functional layer:

[0075] ;

[0076] In the formula, , In a three-dimensional microsystem, the first... The total temperature rise of each functional layer Indicates the first Transient temperature rise of each functional layer Indicates the first Steady-state temperature rise of each functional layer Indicates ambient temperature. Indicates the first chip with fixed power The transient temperature of each functional layer.

[0077] S4. The chip power of each chip in the transient thermal analysis model is updated successively in multiple consecutive time periods to obtain the transient temperature field of the three-dimensional microsystem at all time nodes.

[0078] Figure 7 This is a schematic diagram illustrating the calculation of the transient temperature field of a three-dimensional microsystem at all time points, provided by an embodiment of the present invention. Specifically, as shown... Figure 7 As shown, step S4 includes:

[0079] S401. Divide the simulation time into multiple time periods, each of which includes multiple time nodes evenly distributed. For example, Figure 7 The middle division is formed Time period: 、 、 、 、 、 .

[0080] S402, calculating the chip power of each chip at the initial time node based on the ambient temperature , , represents the chip power of the i-th chip on the j-th substrate layer at the initial time node. ,

[0081] S403, substituting the chip power into the transient thermal resolution model under fixed chip power to calculate the junction temperature of each chip at all time nodes.

[0082] S404, let .

[0083] S405, taking the time period as the current time period, and using the junction temperature of each chip at the last two time nodes in the previous time period to estimate the estimated junction temperature of each chip at the central time node in the current time period; wherein, respectively represent the start time node and the end time node of the i-th time period, , , represents the number of time periods.

[0084] S406, calculating the chip power of each chip in the current time period using the estimated junction temperature.

[0085] S407, calculating the difference between the chip power of each chip in the current time period and the chip power of each chip in the previous time period.

[0086] S408, substituting the difference as the chip power into the transient thermal resolution model under fixed chip power to calculate the transient temperature rise from the subsequent time nodes starting from the current time period.

[0087] S409, accumulating the transient temperature rise from the subsequent time nodes starting from the current time period according to the time nodes to obtain the transient temperature field of the i-th functional layer at all time nodes before the end time node under the transient chip power. .

[0088] S410, based on the transient temperature field , the central coordinates of each chip are brought in to obtain the junction temperature of each chip at all time nodes before the end time node . ​​

[0089] S411, Order and return the time period As a step in the current time period, the transient temperature field of the three-dimensional microsystem at all time points is obtained after traversing all time periods.

[0090] In this embodiment, the estimated junction temperature of each chip at the center time node of the current time period is expressed as:

[0091] ;

[0092] In the formula, Indicates the current time period Estimated junction temperature of each chip at the central time node. , They represent the first On the first substrate layer The chip in the previous time period The last two time nodes , The junction temperature below, This indicates the interval between two adjacent time points. Indicates the length of each time period.

[0093] Each chip at the termination time node The transient temperature field under transient chip power at all previous time points is expressed as follows:

[0094]

[0095] In the formula, Indicates ambient temperature. Indicates the first Time period In the middle, the first The temperature rise of each functional layer is caused by the power increase of each chip on each substrate layer. Indicates the first On the first substrate layer Power increase per chip , , Indicates the number of substrate layers. This indicates the number of chips on the substrate layer. Indicates the 0th time period In the middle, the first The temperature rise of each functional layer is caused by the power increase of each chip on each substrate layer. It should be noted that the time point... Previously, the power of each chip was 0.

[0096] Next, the method for calculating the transient temperature of a three-dimensional microsystem under the transient chip power provided by the application is further described through simulation experiments.

[0097] Specifically, the junction temperature of the chip C51 is calculated by using the method provided by the application and the simulation software COMSOL respectively, Figure 8 is a comparison diagram of the results of calculating the transient junction temperature of the chip C51, the horizontal axis represents time (unit: millisecond ms), and the vertical axis represents temperature (unit: Kelvin K), the absolute error of the calculation result of the application relative to the benchmark of the simulation result of COMSOL is calculated, Figure 9 is a schematic diagram of the absolute error of calculating the transient junction temperature of the chip C51, wherein the horizontal axis represents time (unit: millisecond ms), and the vertical axis represents absolute error (unit: Kelvin K), it can be seen that the average absolute error of the calculation result of the application is 0.29 K, and the maximum absolute error is 0.90 K, both of which are lower than 1 K, which shows that the calculation accuracy of the application meets the requirements; at the same time, the calculation time of the application is 0.37 s, while the simulation software COMSOL needs 530 s to complete the calculation, which shows that the calculation efficiency of the application is much higher than that of COMSOL, which is 1432 times of the latter.

[0098] Further, still taking Figure 2 the HBM shown in the figure as an example, the transient temperature field of the upper surface of the 5th functional layer at 100 ms is calculated. Figure 10 is the transient temperature field of the upper surface of the 5th functional layer in the HBM at 100 ms, from Figure 10 it can be seen that the 4 chips on the upper surface of the layer cause temperature rise, and the thermal coupling in the center is also successfully calculated. Similarly, the absolute error of the calculation result of the application is calculated relative to the benchmark of the simulation result of COMSOL, Figure 11 is the absolute error of the transient temperature field of the upper surface of the 5th functional layer in the HBM at 100 ms, obviously, the average absolute error of the calculation result of the application is 0.68 K, and the maximum absolute error is 0.77 K, both of which are less than 1 K, meeting the requirement of calculation accuracy.

[0099] From the above embodiments, the beneficial effects of the application are as follows:

[0100] The application provides a method for calculating the transient temperature of a three-dimensional microsystem under the transient chip power, which can be applied to a three-dimensional microsystem comprising one or more groups of alternately stacked substrate layers and micro-pad layers, when establishing a transient thermal analysis model under a fixed chip power, the application considers the case that the chip power in the three-dimensional microsystem changes with time, breaking through the limitation of the traditional transient thermal analysis model which only considers constant chip power and does not consider the existence of chips between layers, therefore, the temperature calculated by the transient thermal analysis model of the application has higher accuracy, and the calculation efficiency is greatly improved.

[0101] In the description of the application, the terms "first", "second", "third", etc. are used only for descriptive purposes and do not connote or imply relative importance or an ordering or a ranking of the indicated technical features. Thus, a feature defined with "first", "second" or "third" can include one or more of the features implicitly or explicitly. In the description of the application, the term "a plurality" means two or more, unless expressly specified otherwise.

[0102] Reference to terms "one embodiment", "some embodiments", "an example", "a specific example", or "some examples" etc. means that a particular feature, structure, material or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the present application. Descriptive terms of the above-mentioned terms in the specification do not necessarily refer to the same embodiment or example. Moreover, the described particular features, structures, materials or characteristics can be combined in any suitable manner in one or more embodiments or examples. Furthermore, a person skilled in the art can combine and integrate different embodiments or examples described in the specification.

[0103] The above is further detailed description of the present application in combination with specific preferred embodiments, and it cannot be considered that the specific implementation of the present application is limited to these descriptions. For those skilled in the art, without departing from the concept of the present application, a number of simple deductions or replacements can be made, which should be considered as falling within the scope of protection of the present application.

Claims

1. A method of calculating transient temperature of a three-dimensional microsystem under transient chip power, characterized by, The three-dimensional microsystem includes multiple functional layers, each of which includes at least one set of alternately stacked substrate layers and micro pad layers. Each substrate layer includes multiple chips and a uniformly distributed array of through-silicon vias (TSVs). Adjacent substrate layers are interconnected through the TSV array and the micro pad layer. The method includes: Determine the anisotropic equivalent thermal conductivity of the substrate layer and the micropad layer; Using the chip as a heat source, the heat flux density generated by each chip is expanded using Fourier series to obtain the total heat flux density generated by the chip on the upper surface of each substrate layer. Based on the total heat flux density, a transient thermal analysis model under fixed chip power is constructed. The chip power of each chip in the transient thermal analysis model is updated successively over multiple consecutive time periods to obtain the transient temperature field of the three-dimensional microsystem at all time points.

2. The method for calculating the transient temperature of a three-dimensional microsystem under transient chip power according to claim 1, characterized in that, The substrate layer further comprises a silicon substrate, and a TSV unit is a minimum repeating unit comprising a TSV and a specific area of the silicon substrate around the TSV, wherein the TSV comprises a copper pillar and a barrier layer surrounding the copper pillar. layer; The anisotropic equivalent thermal conductivity of the substrate layer is: ； ； in, ； In the formula, Indicates that the substrate layer is in direction or Equivalent thermal conductivity in the direction, Indicates that the substrate layer is in Equivalent thermal conductivity in the direction, Indicates that the substrate layer is in direction or The equivalent thermal conductivity generated by the first part of the TSV unit in the direction. For the substrate layer in direction or The equivalent thermal conductivity generated in the direction by the second part of the TSV unit. For the substrate layer in direction or The equivalent thermal conductivity generated in the direction by the third part of the TSV unit. , Indicates the thermal conductivity of copper. express thermal conductivity, Indicates the thermal conductivity of the silicon substrate. Indicates the radius of the copper pillar. express and The sum of layer thicknesses This indicates the spacing between adjacent TSVs in the same substrate layer. This indicates the volume fraction of copper pillars in the TSV cell. express The volume fraction of the layer in the TSV cell. This indicates the volume fraction of the silicon substrate in the TSV cell. express The coordinate variables in the direction, where, direction and The directions are perpendicular and the plane formed by the two is parallel to the plane where each functional layer is located.

3. The method of claim 2, wherein, The micro pad layer includes multiple solder balls and filler material arranged in an array. The micro pad unit is: the smallest repeating unit containing a solder ball and a specific area of ​​filler material around it. The anisotropic equivalent thermal conductivity of the micropad layer is expressed as follows: ； ； ； wherein represents the equivalent thermal conductivity of the micro-pads layer in the direction or direction, represents the equivalent thermal conductivity of the micro-pads layer in the direction, represents the thickness of the micro-pads layer, represents the pitch of adjacent solder balls in the same micro-pads layer, represents the thermal conductivity of the solder balls, represents the thermal conductivity of the filling material, represents the pre-set portion of the sheet in the micro-pads unit, having a thickness of in the direction, the equivalent thermal conductivity of the sheet in the direction, , R represents the radius of the solder balls, represents the coordinate variable in the direction.

4. The method of claim 3, wherein, The steps for constructing a transient thermal analysis model under fixed chip power based on the total heat flux density include: Based on the total heat flux density, the anisotropic equivalent thermal conductivity of the substrate layer, and the anisotropic equivalent thermal conductivity of the micropad layer, the governing equations, boundary conditions, and initial conditions of each functional layer in the three-dimensional microsystem are determined. Based on the control equations, boundary conditions, and initial conditions, determine the first control equation and first boundary conditions for each functional layer corresponding to the steady-state temperature rise portion, and the second control equation, first initial conditions, and second boundary conditions for each functional layer corresponding to the transient temperature rise portion. The steady-state temperature rise of each functional layer is determined based on the first governing equation and the first boundary condition of each functional layer corresponding to the steady-state temperature rise portion. The transient temperature rise of each functional layer is determined based on the second governing equation, the first initial condition, and the second boundary condition corresponding to each functional layer of the transient temperature rise portion. A transient thermal analysis model under fixed chip power is constructed based on the steady-state temperature rise, transient temperature rise, and ambient temperature of each functional layer: ； In the formula, , In the three-dimensional microsystem, the first The total temperature rise of each functional layer Indicates the first Transient temperature rise of each functional layer Indicates the first Steady-state temperature rise of each functional layer Indicates ambient temperature. The first one, under fixed chip power The transient temperature of each functional layer.

5. The method for calculating the transient temperature of a three-dimensional microsystem under transient chip power according to claim 4, characterized in that, The first The steady-state temperature rise of each functional layer is expressed as: wherein , , , , , , and are Fourier coefficients of the steady-state temperature rise part, denotes the zeroth Fourier coefficient of the th functional layer, denotes the zeroth Fourier coefficient of the th functional layer with respect to the coordinate variable , , denote the th Fourier cosine and sine term coefficients of the th functional layer with respect to the coordinate variable , , , denote the th Fourier cosine and sine term coefficients of the th functional layer with respect to the coordinate variable , , denotes the th and th joint Fourier cosine term coefficient with respect to the coordinate variables , , denotes the th and th joint Fourier sine term coefficient with respect to the coordinate variables , , , , , , , , , denote the equivalent thermal conductivities of the th functional layer in the , , directions, denotes the length of the functional layer in the direction, denotes the width of the functional layer in the direction.

6. The method for calculating the transient temperature of a three-dimensional microsystem under transient chip power according to claim 5, characterized in that, The first The transient temperature rise of each functional layer is represented as follows: In the formula, , Respectively represent the first Each functional layer in , Equivalent thermal diffusivity in the direction, Indicates the first Each functional layer in Characteristic functions in the direction, , and Characteristic function The coefficients in Indicates the first 1 eigenvalue, Indicates the first Each functional layer in Equivalent thermal diffusivity in the direction, , , , All are Fourier coefficients for the transient temperature rise component. , , and They represent based on The calculated zeroth-order Fourier coefficients, with respect to coordinate variables of Fourier coefficients, with respect to coordinate variables of Fourier coefficients and their relationship with coordinate variables and of Rank and Joint Fourier coefficients of order, Indicates time.

7. The method for calculating the transient temperature of a three-dimensional microsystem under transient chip power according to claim 6, characterized in that, The steps of successively updating the chip power of each chip in the transient thermal analysis model over multiple consecutive time periods to obtain the transient temperature field of the three-dimensional microsystem at all time points include: The simulation time is divided into multiple time periods, each of which includes multiple time nodes that are evenly distributed. Initial time node calculated based on ambient temperature. The chip power , Indicates the first On the first substrate layer Each chip at the initial time point The chip power at the lower level; The chip power Substitute the transient thermal analysis model under the fixed chip power into the calculation of the junction temperature of each chip at all time points; make ; Time period Using the current time period as a reference, and leveraging the junction temperatures of each chip at the last two time points of the previous time period, the estimated junction temperatures of each chip at the center time point of the current time period are predicted; among which, They represent the first The start and end times of each time period. , Indicates the number of time periods; The chip power of each chip in the current time period is calculated using the estimated junction temperature; Calculate the difference between the chip power of each chip in the current time period and the chip power of each chip in the previous time period; The difference is substituted into the transient thermal analysis model under the fixed chip power as the chip power to calculate the transient temperature rise at each subsequent time point from the current time period. The transient temperature rise at each subsequent time point from the current time period is accumulated to obtain the first... Each functional layer at the termination time node Transient temperature field under transient chip power at all previous time points ; Based on the transient temperature field By inputting the center coordinates of each chip, we can obtain the position of each chip at the termination time node. Junction temperature at all previous time points; make and return the time period. As a step in the current time period, the transient temperature field of the three-dimensional microsystem at all time points is obtained after traversing all time periods.

8. The method for calculating the transient temperature of a three-dimensional microsystem under transient chip power according to claim 7, characterized in that, The estimated junction temperature of each chip at the current time point is expressed as follows: ； In the formula, Indicates the current time period Estimated junction temperature of each chip at the central time node. , They represent the first On the first substrate layer The chip in the previous time period The last two time nodes , The junction temperature below, This indicates the interval between two adjacent time points. Indicates the length of each time period.

9. The method for calculating the transient temperature of a three-dimensional microsystem under transient chip power according to claim 8, characterized in that, Each chip at the termination time node The transient temperature field under transient chip power at all previous time points is expressed as follows: In the formula, Indicates ambient temperature. Indicates the first Time period In the middle, the first The temperature rise of each functional layer is caused by the power increase of each chip on each substrate layer. Indicates the first On the first substrate layer Power increase per chip , , Indicates the number of substrate layers. Indicates the number of chips on the substrate layer. Indicates the 0th time period In the middle, the first The temperature rise of each functional layer is caused by the power increase of each chip on each substrate layer.

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