A matching generation method, device, equipment, medium and computer product of a passive device network
By dividing passive device networks into series or parallel networks and decomposing parameter values using high-density distribution ranges, and combining continuous fractions to construct topology structures, the problem of automated generation of passive device network design is solved, achieving network scale optimization and circuit design efficiency improvement.
Patent Information
- Application Number
- CN202511452948.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2025-10-13
- Publication Date
- 2026-01-27
- Estimated Expiration
- 2045-10-13
AI Technical Summary
Existing technologies lack automated tools to efficiently and accurately design passive device networks that meet expected design requirements, and the network size is difficult to optimize.
The passive device network is divided into first and second passive device networks connected in series or in parallel. The distribution of equivalent electrical parameter values in the series and parallel network table is used to decompose the network. The matching parameter values are decomposed into decimal and integer parameters using the high-density distribution range. The topology is constructed using a preset table, and the passive device network is constructed by combining continuous fractions.
It enables the automated generation of passive component networks, reducing the workload of designers' manual trials and calculations, reducing network size, and improving the efficiency and quality of circuit design.
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Figure CN120975014B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of integrated circuit design technology, and in particular to a method for matching and generating passive device networks and network groups. 、 Device 、 equipment 、 Media and computer products. Background Technology
[0002] As semiconductor manufacturing technology advances, the size of integrated circuits continues to shrink, and the impact of process deviations on integrated circuit performance is gradually amplified. In order to reduce the impact of process deviations in chip manufacturing on circuit performance, we need to apply matching technology to all aspects of integrated circuit design.
[0003] In the process of integrated circuit design, not only key active devices (such as MOSFETs and bipolar transistors) are also involved. BJT Precise matching is required to ensure circuit performance, and design engineers also need to accurately set the passive device network with specified equivalent electrical parameter values according to the circuit performance requirements; therefore, achieving passive device network matching and generation is of great significance to integrated circuit design.
[0004] However, the market currently lacks tools that can help circuit designers automate the design of passive device networks with specified electrical parameters. When designing matching passive device networks, designers often have to rely on personal experience and manually try to find series and parallel combinations of passive devices to synthesize passive device networks with the required electrical parameter ratios. This method is not only time-consuming and labor-intensive, but also often fails to obtain optimal solutions, making it difficult to promote its application in large-scale production.
[0005] Some relevant studies currently exist, such as those conducted by Kagoshima University in Japan in 2016. Yukinao Isokawa A method for constructing resistor networks with specified resistance values based on series-parallel combinations was proposed; another example is Sameen Ahmed Khan from the Salalah Technical College in the Sultanate of Oman, who discussed a scale of... n The range of the equivalent resistance set of series-parallel nested networks is defined, and a solution is proposed for larger values. n Computer memory will be limited; however, the two methods for constructing resistors mentioned above are currently only at the academic research level and have not been applied to practical simulations. IC The design did not optimize for network scale.
[0006] Therefore, we need to provide an automated generation method for passive device networks with arbitrary specified equivalent electrical parameter values to solve the technical problem that there are currently no automated generation tools available for passive device networks and that the network size is difficult to optimize and reduce. Summary of the Invention
[0007] To address the shortcomings of existing technologies, this invention provides a method for matching and generating passive device networks and network groups. 、 Device 、 equipment 、 Media and computer products designed to address the lack of efficient automation tools in existing technologies. 、 The problem of accurately designing a passive device network whose overall equivalent parameters meet the expected design requirements is addressed, and a practical optimization scheme is proposed to reduce the network size without changing the equivalent electrical parameter values.
[0008] Embodiments of the present invention provide a method for generating a matching passive device network, which generates a corresponding passive device network based on specified matching parameter values; wherein the steps include:
[0009] The passive device network is divided into a first passive device network and a second passive device network that are connected in series or in parallel; wherein, both the first passive device network and the second passive device network are composed of several passive devices of the same type;
[0010] A series-parallel network table is pre-set; wherein, the series-parallel network table sets several series-parallel networks and corresponding equivalent electrical parameter values, and the series-parallel network is a topology structure composed of several passive devices of the same type connected in series and / or in parallel;
[0011] Based on the distribution of equivalent electrical parameter values in the series-parallel network table, the corresponding high-density distribution range is determined.
[0012] The matching parameter values are decomposed using the high-density distribution range; wherein, the parameter part falling within the high-density distribution range is divided into decimal parameters, and the remaining part is divided into integer parameters;
[0013] The first passive device network is equipped with an integer number of unit passive devices, which are uniformly connected in series or parallel.
[0014] In the series-parallel network table, a series-parallel network matching the fractional parameter is searched using the equivalent electrical parameter value, and the topology of the second passive device network is constructed using the searched series-parallel network.
[0015] As a further solution, the passive device is set by a unit resistance, and the matching parameter value corresponds to the equivalent electrical parameter value as a resistance value.
[0016] As a further solution, the passive device is configured using a unit capacitance, and the matching parameter value corresponds to the capacitance value along with the equivalent electrical parameter value.
[0017] As a further solution, the topology of the second passive device network is configured using a ladder network; wherein the ladder network is a two-end pair network composed of several L-shaped networks cascaded together.
[0018] As a further solution, the series-parallel network table constructs series-parallel networks of different sizes in a recursive or continuous fractional manner, and records the topology, size and corresponding equivalent electrical parameter values of the series-parallel networks.
[0019] As a further solution, for different series and parallel networks with the same equivalent electrical parameter values, the series and parallel network table only retains the smallest series and parallel network.
[0020] As a further solution, the series-parallel network consists of a scale of i The first substring parallel network and its size are ni The second substring is composed of a parallel network connected in series or in parallel; among which, n Indicates the scale of the series-parallel network. i Represents a recursive variable. i <n and i It is a positive integer.
[0021] As a further solution, the topology of series-parallel networks is described using postfix expressions.
[0022] As a further solution, when performing network preview or circuit schematic generation on the series-parallel network, a stack structure is used to quickly parse the postfix expression and transform the topology of the series-parallel network into the corresponding binary tree.
[0023] As a further solution, the serial-parallel network table evaluates the binary tree through a post-order traversal to obtain the equivalent electrical parameter values of the corresponding topology.
[0024] As a further solution, the upper and lower boundaries of the high-density distribution range are set according to the coverage that meets the actual needs of the circuit design.
[0025] As a further solution, the matching parameter value is decomposed using the following formula:
[0026] when hour:
[0027]
[0028] when hour:
[0029]
[0030] when hour:
[0031]
[0032] in, Indicates the matching parameter value. Integer parameter, Represents a decimal parameter. Indicates the upper boundary. Indicates the lower boundary. int ( * ) represents the floor function.
[0033] As a further solution, within the allowable error range, when a series-parallel network whose equivalent electrical parameter value matches the decimal parameter is found in the series-parallel network table, the smallest series-parallel network is selected from the found series-parallel networks to construct a second passive device network.
[0034] As a further solution, within the allowable error range, when no series-parallel network with equivalent electrical parameter values matching the decimal parameter is found in the series-parallel network table, the second passive device network is constructed by combining the existing series-parallel networks in the series-parallel network table with the ladder network constructed from continuous fractions.
[0035] As a further solution, within the allowable error range, when no series-parallel network whose equivalent electrical parameter value matches the decimal parameter is found in the series-parallel network table, two or more series-parallel networks are queried in the series-parallel network table, and each series-parallel network is matched with the decimal parameter by the equivalent electrical parameter value after being connected in series and / or in parallel. The two or more series-parallel networks found together construct the second passive device network.
[0036] As a further solution, the equivalent electrical parameter value is sequentially searched in the series-parallel network table for series-parallel networks with equivalent electrical parameter values less than the decimal parameter. The difference between the decimal parameter and the equivalent electrical parameter value is converted into a corresponding continuous fraction, and the continuous fraction is converted into a corresponding ladder network. The series-parallel network and the ladder network are combined in series to obtain the topology of the second passive device network.
[0037] As a further solution, the equivalent electrical parameter value is sequentially searched in the series-parallel network table for series-parallel networks with an equivalent electrical parameter value greater than the decimal parameter. The difference between the equivalent electrical parameter value and the decimal parameter is converted into a corresponding continuous fraction, and the continuous fraction is converted into a corresponding ladder network. The series-parallel network and the ladder network are combined in parallel to obtain the topology of the second passive device network.
[0038] As a further solution, there is still [0 ,indexT Within the specified range, the series-parallel network that minimizes the size of the second passive device network is selected as the updated solution; wherein, the series-parallel network table sorts the series-parallel networks according to the magnitude of their equivalent electrical parameter values. indexT It is represented as the number of series and parallel networks whose equivalent electrical parameter value is less than and closest to the decimal parameter.
[0039] As a further solution, there is still [ indexT+ 1, NUM Within the specified range, the series-parallel network that minimizes the size of the second passive device network is selected as the updated solution; wherein, the series-parallel network table sorts the series-parallel networks according to the magnitude of their equivalent electrical parameter values. indexT Represented as the series-parallel network numbering with equivalent electrical parameter values less than and closest to the decimal parameter, the NUM This indicates the total number of records in the serial and parallel network table.
[0040] As a further solution, based on the updated solutions obtained through screening, the smaller-scale series-parallel network is selected as the final solution.
[0041] As a further solution, the continuous scores are generated through the following steps:
[0042] Step 1: Input the matching parameter values to be converted and accuracy requirements tol ;
[0043] Step 2: Match the parameter values to be converted Decompose into integer parts a and decimal part b ;
[0044] Step 3: Extract the integer part a Save to a continuous fraction sequence;
[0045] Step 4: Calculate the continuous fraction values corresponding to the continuous fraction sequence using the formula for continuous fractions. cf ;
[0046] Step 5: Calculate the continuous score values cf Matching parameter values to be converted The error; among which,
[0047] If the error is greater than the accuracy requirement tol Then find the decimal part. b reciprocal;
[0048] Match the parameter values to be converted Updated to 1st of the countdown / bThen return to step 2;
[0049] Otherwise, output the current consecutive score value. cf And then it ended.
[0050] As a further solution, when the passive device is set through a unit resistor, the continuous fractional sequence is set as follows:
[0051]
[0052] The formula for calculating continuous fractions is:
[0053]
[0054] in, ... The elements with even numbers in the middle are the series resistors of the ladder network. ... The elements with odd numbers are the parallel resistors of the ladder network.
[0055] As a further solution, when the passive device is set via a unit capacitance, the continuous fractional sequence is set as follows:
[0056]
[0057] The formula for calculating continuous fractions is:
[0058]
[0059] in, , ... The elements with even numbers in the middle are the parallel capacitors of the ladder network. , ... The elements with odd numbers are the series capacitors of the trapezoidal network.
[0060] As a further solution, the conversion between odd and even sequences can be achieved by adding 0 elements to the end of the continuous fractional sequence.
[0061] Secondly, the present invention also provides a method for matching and generating passive device network groups, which generates passive device network groups that satisfy the ratio sequence input by the user; wherein the ratio sequence is composed of a number of ratio elements, the passive device network group contains passive device networks that correspond one-to-one with each ratio element, the passive device networks are generated according to specified matching parameter values, and the specified matching parameter values satisfy the ratio relationship of the corresponding ratio elements in the ratio sequence.
[0062] As a further solution, the scale sequence is adjusted proportionally by setting scaling factors, and different scaling factors are iterated to reduce the size of the passive device network group compared to before the adjustment.
[0063] Thirdly, to achieve the above objectives, this application further provides a matching generation apparatus, the apparatus comprising:
[0064] The acquisition module is used to determine the corresponding high-density distribution range based on the distribution of equivalent electrical parameter values in the series-parallel network table.
[0065] The decomposition module is used to obtain a specified matching parameter value and decompose the matching parameter value into decimal parameters and integer parameters according to the high-density distribution range;
[0066] The first generation module is used to set up a first passive device network by connecting passive devices of the same type with integer parameter values in series or parallel.
[0067] The second generation module is used to search for a series-parallel network with the same equivalent electrical parameter value as the fractional parameter in a preset series-parallel network table, and to construct the topology of the second passive device network through the searched series-parallel network.
[0068] The first output module is used to acquire the first passive device network and the second passive device network, and to form a passive device network in series or parallel and output it.
[0069] The second output module is used to generate a passive device network group that satisfies the ratio sequence input by the user; the second output module is optional and configured according to user requirements.
[0070] Wherein, the equivalent electrical parameter values of the passive device network match the specified matching parameter values within the allowable error range, and the series-parallel network is a topology structure composed of several passive devices of the same type connected in series and / or in parallel.
[0071] Fourthly, to achieve the above objectives, this application further provides a matching generation device, characterized in that the device includes: a memory. 、The processor and a computer program stored in the memory and executable on the processor, the computer program being configured to implement a matching generation method for a passive device network as described in any of the preceding claims, or to implement a matching generation method for a group of passive device networks as described in any of the preceding claims.
[0072] Fifthly, to achieve the above objectives, this application further provides a storage medium, which is a computer-readable storage medium storing a computer program. When the computer program is executed by a processor, it implements a method for matching and generating a passive device network as described in any of the preceding claims, or implements a method for matching and generating a group of passive device networks as described in any of the preceding claims.
[0073] Sixthly, to achieve the above objectives, this application further provides a computer program product, the computer program product comprising a computer program, which, when executed by a processor, implements a method for matching and generating a passive device network as described in any of the preceding claims, or implements a method for matching and generating a group of passive device networks as described in any of the preceding claims.
[0074] Compared with the prior art, the present invention has the following beneficial effects:
[0075] 1 、 This invention splits a passive device network into two interconnected passive device networks, a first passive device network and a second passive device network, connected in series or parallel. By analyzing the distribution of equivalent electrical parameter values in a series-parallel network table, matching parameter values are decomposed into fractional and integer parameters based on a high-density distribution range. Furthermore, a preset series-parallel network table can be used to search for series-parallel networks that match the fractional parameters, thereby achieving automated generation of passive device networks and reducing the amount of manual trial and calculation work required by designers during circuit design.
[0076] 2 、 This invention also addresses the situation where no series-parallel network with equivalent electrical parameter values matching the fractional parameter is found in the series-parallel network table. It constructs a second passive device network by combining existing series-parallel networks in the table with a ladder network built from continuous fractions. Alternatively, it queries two or more series-parallel networks in the table, and connects these networks in series. / The equivalent electrical parameter values after parallel connection match the decimal parameters. Two or more series-parallel networks obtained from the query jointly construct a second passive device network, further enriching the design resources;
[0077] 3 、The series-parallel network table of the present invention automates the construction process by constructing series-parallel networks of different sizes in a recursive or continuous fractional manner. For different series-parallel networks with the same equivalent electrical parameter values, the series-parallel network table only retains the smallest series-parallel network, thereby reducing the size of the automatically generated network.
[0078] 4 、 This invention also describes the topology of series-parallel networks using postfix expressions and quickly parses the postfix expressions using a stack structure, which can transform the topology of series-parallel networks into corresponding binary trees, thereby enabling network preview and circuit schematic generation functions, making the tool more practical for engineering applications.
[0079] 5 、 The present invention can also generate a passive device network group that satisfies the ratio sequence input by the user, and adjust the ratio sequence proportionally by setting a scaling factor, and iterate different scaling factors to reduce the size of the passive device network group compared with the original size, thereby further reducing the network size.
[0080] In summary, the passive device network and network group matching generation method proposed in this invention... 、 Device 、 equipment 、 Media and computer products are not only applicable to various integrated circuit designs, but also significantly reduce the time required from design to implementation, accelerate product development cycles, and improve the overall quality of circuit design. Attached Figure Description
[0081] The accompanying drawings, which are incorporated in and form part of this specification, illustrate embodiments consistent with this application and, together with the description, serve to explain the principles of this application.
[0082] To more clearly illustrate the technical solutions in the embodiments of this application or related technologies, the accompanying drawings used in the description of the embodiments or related technologies will be briefly introduced below. Obviously, for those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0083] Figure 1 This is a flowchart illustrating a matching generation method for a passive device network according to an embodiment of this application.
[0084] Figure 2 This is a schematic diagram of a continuous resistive fractional network topology in a specific embodiment of this application;
[0085] Figure 3 This is a schematic diagram of a capacitor-continuous fractional network topology in a specific embodiment of this application;
[0086] Figure 4 A schematic diagram of generating a binary tree from a postfix expression in a specific implementation example of this application;
[0087] Figure 5 This is a histogram of a series-parallel combination data table in a specific embodiment of this application;
[0088] Figure 6 This is a coverage test plot of the data in the table in a specific embodiment of this application;
[0089] Figure 7 This is a schematic diagram of a voltage sequence in a specific embodiment of this application;
[0090] Figure 8 This is a schematic diagram of the main interface of the automatic resistor generation tool in a specific embodiment of this application;
[0091] Figure 9 This is a schematic diagram of the preview interface of the automatic resistor generation tool in a specific embodiment of this application;
[0092] in, Figure 9 middle A This is the original schematic diagram. Figure 9 middle B This is the adjusted schematic diagram;
[0093] Figure 10 In a specific embodiment of this application, the ratio is 0. . Circuit schematic of 23456;
[0094] Figure 11 For a specific implementation example of this application (0) - 1) Schematic diagram of the accuracy test results for the interval dataset;
[0095] Figure 12 For a specific implementation example of this application (0) - 1) Schematic diagram of unit resistance test results for interval data;
[0096] Figure 13 For a specific implementation example of this application [1] -
[100] Schematic diagram of accuracy test results for interval dataset;
[0097] Figure 14 For a specific implementation example of this application [1] -
[100] Schematic diagram of unit resistance test results for interval dataset;
[0098] Figure 15 This is a schematic diagram of test results for different precision requirements in a specific implementation example of this application;
[0099] Figure 16 This is a schematic diagram of the matching generation device of this application;
[0100] Figure 17 This is a schematic diagram of the structure of the matching generation device for this application.
[0101] The purpose of this application is to achieve 、 The features and advantages will be further explained in conjunction with the embodiments and with reference to the accompanying drawings. Detailed Implementation
[0102] To achieve the objectives of the embodiments of the present invention 、 The technical solutions and advantages are now clearer. The technical solutions in the embodiments of the present invention will be explained clearly below with reference to the accompanying drawings. 、 It is clear that the described embodiments are only a part of, and not all, of the embodiments of the present invention.
[0103] To better understand the technical principles expressed in this application, we need to know some things about " resistors and capacitors ” , " Series-parallel nested networks ” , " Continuous fractions ” Design background.
[0104] Regarding resistors and capacitors, a matched resistor network consists of two or more resistors with fixed resistance values in the circuit diagram, their ratio specified by the design engineer. The matching resistor combinations are determined during the circuit diagram design process by using... PDK The matching is achieved by connecting unit resistors in series and parallel, as defined in [the standard]. Similarly, the matching capacitor network is achieved by connecting unit capacitors in series and parallel; therefore, the matching methods for resistors are also applicable to capacitor matching, only requiring [further adjustments needed]. " Series / in parallel ” Differentiation and unit conversion are required between the two methods. Those skilled in the art can easily adapt the matching generation method of the resistor network to obtain the matching generation method of the capacitor network. Therefore, this embodiment focuses on the matching generation method of the resistor network, and the matching generation method of the capacitor network can be obtained similarly. The matching generation method of the capacitor network will not be described in detail here.
[0105] For nested series-parallel networks, Kagoshima University in Japan proposed a solution in 2016. YukinaoIsokawa It is pointed out that nested series, parallel, and concurrent sequences can be defined recursively, as described below. :
[0106] Definition 1: (1) A single resistor is a circuit; (2) A combination of two resistors connected in series is a circuit, and a combination of two resistors connected in parallel is also a circuit; (3) A combination of two circuits connected in series is a circuit, and a combination of two circuits connected in parallel is also a circuit.
[0107] In the following description, series circuits and parallel circuits are collectively referred to as circuits. By definition, each circuit is either a series combination of several circuits or a parallel combination of several circuits. We refer to the former as... S Type circuit, the latter is called P Type circuit. Consider a circuit composed of... n A circuit consisting of resistors. Using... Cn, Sn, Pn Represents all circuits 、 all S Type circuit 、 all P A collection of type circuits, then .
[0108] We can use it in the following ways " List ” It is used as a data structure to represent circuits.
[0109] Definition 2: (1) Resistance is listed (2) A list is used to represent the combination of multiple resistors in series. A list is used to indicate the combination of multiple resistors connected in parallel. Indicate, (3) if multiple circuits are respectively listed {L 1 L 2... } To represent, the combinations of these circuits connected in series are listed ( s L 1 L 2 ... ) indicates that parallel combinations are represented by a list. express.
[0110] Typically, a circuit is represented as a nested list (i.e., a list of lists), for example... n= Circuits 2, 3, and 4
[0111]
[0112]
[0113]
[0114]
[0115]
[0116]
[0117] and This constitutes all the circuits consisting of 2 resistors. S Indicates series connection. P Indicates parallel connection. and This constitutes all the circuits consisting of 3 resistors. S This indicates that the outermost layer is connected in series. P This indicates that the outermost layer is in parallel. can be or It consists of a resistor connected in series. can be or It consists of a resistor connected in parallel. and This constitutes all the circuits consisting of 4 resistors. S This indicates that the outermost layer is connected in series. P This indicates that the outermost layer is in parallel. can be or Connect one or Composition can also be made from or Similarly, it is constructed by connecting a resistor in series. can be or one in parallel or Composition can also be made from or It consists of a resistor connected in parallel. The scale can be recursively defined according to this rule. n A resistor circuit.
[0118] Regarding consecutive fractions, it is well known that concatenation... n The total resistance of a series of resistors is obtained by adding the individual resistors together, while the resistance of a series of resistors connected in parallel is obtained by adding the individual resistors together. n The total resistance of the resistors is equal to the reciprocal of the sum of their reciprocals.
[0119] Definition 3: Having n Each node and q A circuit with n branches containing only resistors is defined as a series circuit if and only if the equivalent resistance between each pair of nodes can be calculated by applying only the two rules mentioned above. - Parallel circuit.
[0120] like Figure 2 As shown, let's consider a series-parallel circuit called a ladder network, whose equivalent resistance is... Req It can be represented as a continuous fraction, therefore it can be calculated as :
[0121]
[0122] It can be briefly represented by the following sequence.
[0123]
[0124] As a general-purpose resistor Ri Any actual positive or zero value can be assumed. Ri ,or +∞ The preceding form can also be used as a concatenation representation. k A resistor, let .
[0125]
[0126] Similarly, for parallel k A resistor, if let Continued fraction becomes:
[0127]
[0128]
[0129] Taking capacitors as an example, see the attached diagram for a capacitor network topology. Figure 3 The formula for calculating the capacitance ratio is shown below:
[0130]
[0131] The continuous fractional chain obtained according to the above scheme should be [ C0, 1 / C1, C2, 1 / C3, C4... ] , in C 0 , C 2 , C 4 is the parallel part, 1 / C 1 , 1 / C 3 represents a series capacitor, for example... C 1=5 indicates a trapezoidal capacitor network. Here, there should be 5 capacitors connected in series. In actual storage, it can be directly stored as [ C0, C1, C2, C3, C4... Odd-numbered positions indicate series connection, even-numbered positions indicate parallel connection, odd-numbered positions are 0, short circuit is indicated by odd-numbered positions, and even-numbered positions are 0, open circuit is indicated by even-numbered positions.
[0132] Regarding the above formula for calculating continuous fractions, the following explanation is provided:
[0133] Note 1: In the above formulas for calculating continuous fractions of resistance and capacitance, it is assumed that there is no need to distinguish between even and odd values. The principle behind this is:
[0134] When an "odd sequence" appears, simply add a "0" element to the end of the "odd sequence" to convert it into an "even sequence". Then, continue to use the continuous fraction calculation formula corresponding to the "even sequence" without having to set a special continuous fraction calculation formula for odd sequences.
[0135] When an "even sequence" appears, simply add a "0" element to the end of the "even sequence" to transform it into an "odd sequence". Then, you can continue to use the continuous fraction calculation formula corresponding to the "odd sequence" without having to set a special continuous fraction calculation formula for even sequences.
[0136] Note 2: The definitions of "even sequence" and "odd sequence" mainly include parity based on the total number of elements and index based on the element's index (i.e., sequence number). n The method of distinguishing between even and odd numbers; when using a method based on the total number of elements, Figure 2 and Figure 3 This corresponds to an "odd sequence," but when using an element index-based distinction method, Figure 2 and Figure 3 This corresponds to an "even number sequence";
[0137] Therefore, the method of distinguishing between odd and even can be specifically set according to actual needs, including other methods, which are not specifically limited here; it is precisely because this embodiment uses the method of adding "0" at the end that the effect of converting between "odd sequence" and "even sequence" is achieved, thereby adapting to different methods of distinction to enhance the versatility of this embodiment.
[0138] Note 3: Due to the duality between series and parallel connections of resistors and capacitors, their formulas for calculating continuous fractions should theoretically differ in form; however, since the formula for calculating continuous fractions of resistance is based on... Figure 2 The settings are configured, and the formula for calculating the continuous fraction of capacitance is based on... Figure 3 The settings were made, and because Figure 2 and Figure 3 Passive components with the same serial number are connected in a series-parallel dual relationship; therefore, the dual relationship between resistors and capacitors is... Figure 2 and Figure 3 The series and parallel duality between them cancels each other out, so the formulas for calculating the continuous fractions of resistance and capacitance are ultimately similar in form.
[0139] Example 1
[0140] Please see Figure 1Based on the aforementioned technical background and addressing the problems mentioned in the background technology, this embodiment provides a method for generating a matching network of passive devices, which generates a corresponding passive device network according to specified matching parameter values; wherein,
[0141] The passive device network consists of a first passive device network and a second passive device network connected in series or in parallel; both the first passive device network and the second passive device network consist of several passive devices of the same type.
[0142] A pre-set series-parallel network table is provided; wherein, the series-parallel network table sets several series-parallel networks and corresponding equivalent electrical parameter values, and the series-parallel networks are several passive devices of the same type connected in series and parallel. / Or a topology composed of parallel connections;
[0143] Based on the distribution of equivalent electrical parameter values in the series-parallel network table, the corresponding high-density distribution range is determined.
[0144] The matching parameter values are decomposed using the high-density distribution range; wherein, the parameter part falling within the high-density distribution range is divided into decimal parameters, and the remaining part is divided into integer parameters;
[0145] The first passive device network is equipped with an integer number of unit passive devices, which are uniformly connected in series or parallel.
[0146] In the series-parallel network table, a series-parallel network matching the fractional parameter is searched using the equivalent electrical parameter value, and the topology of the second passive device network is constructed using the searched series-parallel network.
[0147] Specifically, this embodiment proposes to use a series-parallel network as a basis and pre-construct a series-parallel network table; when constructing a passive device network with any specified matching parameter value, the passive device network is decomposed into a first passive device network and a second passive device network connected in series or in parallel. Then, based on the distribution of equivalent electrical parameter values in the series-parallel network table, the corresponding high-density distribution range is determined, and the matching parameter values are decomposed through the high-density distribution range: the parameter part falling into the high-density distribution range is divided into decimal parameters, and the rest is divided into integer parameters.
[0148] In a preset series-parallel network table, a series-parallel network matching the fractional parameter is searched using the equivalent electrical parameter value. The topology of the second passive device network is constructed using the searched series-parallel network. The first passive device network can be simply obtained by connecting passive devices with an integer number of parameters in series or parallel.
[0149] If the search fails, firstly, you can look up two or more series-parallel networks in the series-parallel network table, such that these two or more series-parallel networks are connected in series and parallel. / Alternatively, the equivalent electrical parameters after parallel connection can be matched with the decimal parameter within the error range. The two or more series-parallel networks obtained from the query can then be jointly constructed into a second passive device network. Secondly, the decimal parameter can be further decomposed into two parts: one part is the resistor network shown in the table, and the other part is a continuous fraction, ensuring that the series or parallel connection of these two is a decimal parameter within the error range. When constructing the passive device network group, normalization is comprehensively applied. 、 The scaling factor is constructed using factorization and serial-parallel network methods, which will be described in detail in the following embodiment.
[0150] Construction of series-parallel network tables: Based on Yukinao Isokawa According to existing literature, resistor networks constructed with continuous fractions are considered a special type of series-parallel network with alternating series and parallel connections. Therefore, under the same equivalent resistance, series-parallel connections and their combinations can represent a wider range of topologies than continuous fractions. Thus, this embodiment prioritizes finding topologies with fewer unit resistors in series-parallel connections and their combinations. However… Sameen Ahmed KHAN The literature has demonstrated that for larger n The algorithm's complexity is approximately 2. . 55 n And proposes for larger n Computer memory is limited, and the unit resistance can be calculated in real time. n A series-parallel circuit network is impractical. Therefore, this embodiment first needs to construct a table generated by series-parallel combinations, and then use table lookup (…). Look up Table The method can be used to construct resistor networks with arbitrary ratios.
[0151] The resistors in the table can be placed in series, parallel, or a combination of these methods in the circuit. Resistor networks like the Wheatstone bridge, which are neither series nor parallel and are complex to construct with limited practical applications, are not discussed in this embodiment. Each combination considered in this embodiment consists either of series-parallel combinations or parallel-series combinations. This embodiment constructs the series-parallel network table recursively, and the construction algorithm is shown in Table 1.
[0152] Table 1 Algorithm for Constructing Serial-Parallel Networks
[0153]
[0154] Series-parallel networks can be constructed recursively as shown in Table 1. When the number of unit resistors is 1, only a network with an equivalent resistance of 1 can be constructed (row 3). When the number of unit resistors is 2, the two resistors are connected in series to construct a network with an equivalent resistance of 2; the two resistors are connected in parallel to construct a network with an equivalent resistance of 0. . 5's network (line 5). 7 - Line 12 indicates when the unit resistance quantity is n ( > 2) First let i From 1 to n- 1 loop, n Decomposed into i and( ni Then recursively construct... i Unit resistance and ( ni A resistor network with 1 unit resistor is finally made up of a scale of 1. i The resistor network and its size are ( ni The scale of the series or parallel resistor network structure is as follows: n A resistor network.
[0155] For example, when the number of unit resistors is 3, it is first decomposed into two networks: one network consists of 1 unit resistor, and the other network consists of 2 resistors. The 1-unit resistor is constructed using the same method as when the number of unit resistors is 1, and the 2-unit resistors are constructed using the same method as when the number of unit resistors is 2. When the number of unit resistors is 4, it is also decomposed into two networks. This can be either a network consisting of 2 unit resistors and the other network consisting of 2 resistors, or a network consisting of 1 unit resistor and the other network consisting of 3 resistors. The 1-unit resistor is constructed using the same method as when the number of unit resistors is 1, the 2-unit resistors are constructed using the same method as when the number of unit resistors is 2, and the 3-unit resistors are constructed using the same method as when the number of unit resistors is 3. And so on, the networks with a total number of unit resistors can be recursively constructed. NUM A resistor network.
[0156] Constructing resistor networks using the above method will result in resistor networks with different topologies having the same equivalent resistance. For example, an equivalent resistance of 1 can be constructed from 1 unit resistor or from 4 unit resistors. These 4 unit resistors are decomposed into 2 networks, each consisting of 2 unit resistors connected in series, and then these 2 networks are connected in parallel. Therefore, in Algorithm 1, this embodiment traverses the table and retains only the entry with the lowest unit resistance for resistor networks with the same equivalent resistance. Finally, to facilitate subsequent table lookups based on equivalent resistance values, the resistor networks in the table are sorted in ascending order of equivalent resistance.
[0157] The table structure for series-parallel networks is shown in Table 2. Each element in the table records the equivalent resistance value of the resistive network. 、 Number of unit resistors and topology.
[0158] Table 2. Structure of Series-Parallel Networks
[0159]
[0160] Topological structures are represented using postfix expressions, defining symbols. "&” Indicates parallel connection, symbol "+” Indicates series connection, symbol " 1 / n” ( n= 1 , 2 , 3 ,… )express n A unit resistor connected in parallel, symbol "n” ( n= 1 , 2 , 3 ,... )express n A series of unit resistors. The reason for using postfix notation (i.e., the post-order traversal of a binary tree) to describe the topology of the resistor network is that postfix notation has a mature parsing method; both resistor network preview and circuit schematic generation can quickly parse postfix notation using a stack structure. Regarding the parsing of postfix notation, this embodiment uses an equivalent resistance of 1 in the table. . The following explanation uses a resistor network with the topology 4666666667 as an example. The topology of this resistor network is as follows: " 41 & twenty one &+” This expression is an arithmetic expression. " ((4 & 1) + (2 & 1)) ” The suffix representation generates a binary tree such as Figure 4 As shown, by evaluating the binary tree using a post-order traversal, the equivalent resistance value of the resistor network defined by the postfix expression can be obtained as 1. . 4666666667.
[0161] according to Sameen Ahmed KHAN According to the literature, the algorithm complexity for constructing a series-parallel network table is approximately 2. . 55 n Therefore, we can only construct tables of a limited size, making trade-offs between resistance coverage and generation time. This embodiment generates... n= The series and parallel network table of 17 was generated over two weeks, producing a total of 1,529,533 resistor networks. The smallest equivalent resistance value was 1. / The maximum equivalent resistance is 17. The following section provides an in-depth analysis of the resistance distribution and coverage of the series-parallel network tables.
[0162] This embodiment first statistically analyzes the distribution of equivalent resistance values in the table and draws a histogram of the distribution of equivalent resistance values in the table, such as... Figure 5 As shown, the histogram displays the range of equivalent resistance values for the resistor network in the table as [1]. / 17 ,
[17] With 1 as the reference, resistance networks with equivalent resistance greater than 1 and resistance networks with equivalent resistance less than 1 are symmetrically distributed, and decrease exponentially towards both sides. Because the distribution of equivalent resistance values in the table is uneven, this embodiment sets... (Upper boundary) and The lower bound is used to limit the search range of the table, excluding the parts of the table with sparse resistance values from the search range.
[0163] Regarding the resistor network coverage problem in the table, theoretically, it can be enumerated by any... n All series and parallel combined resistor networks composed of unit resistors, but due to algorithm complexity, only a table of series and parallel combined resistor networks with a limited number of resistors can be constructed. Therefore, coverage analysis of the table is necessary. Based on the distribution of equivalent resistance values in the table, which is based on 1, with symmetrical distributions of resistor networks with equivalent resistance greater than 1 and those less than 1, this embodiment randomly generates [1...]. , 1000 different matching parameter values between 17] ratio , respectively in 1 e- 3 、 1 e- 4 、 1 e- 5 、 1 e- 6 、 1 e- 7 、 1 e- 8 、 1 e- 9 、 1 e- The coverage of the data in the table was tested under 8 different error conditions (10 levels). During the coverage test, in order to determine the aforementioned... and The settings require first setting the randomly generated matching parameter values. ratio Convert to decimal parameter Then, search for the decimal parameter in the table. The specific conversion method is as follows:
[0164] 1) When hour
[0165] Formula 4
[0166] 2) When hour
[0167] Formula 5
[0168] 3) When hour
[0169] Formula 6
[0170] in, Indicates the matching parameter value. Represents a decimal parameter. Indicates the upper boundary. Indicates the lower boundary. int ( * ) represents the floor function; Integer parameter, referring to a large integer value. n or its reciprocal 1 / n ( n> 1); The reason for separating bigInt This is because in resistor network design, the equivalent resistance is... n The way to minimize the consumption of a unit resistance in a resistor network is n A series of resistors, with an equivalent resistance of 1. / n The way to minimize the consumption of a unit resistance in a resistor network is n A series of resistors connected in parallel.
[0171] Coverage test results as follows Figure 6 As shown in the figure, the horizontal axis represents the error, starting from 1. e- 3 to 1 e- 10, the vertical axis represents 1000 random numbers processed by Equation 4 - After processing with Equation 6, the percentage of quantities can be directly found in the table. The data in the table shows a high-density distribution, and the boundaries in the figure... bound for n , indicating the upper boundary yes n And the lower boundary It is 1 / n . bound= 2 bound= 5 and bound= 8 indicates that formula 4 should be followed first. - Formula 6 processing ratio After processing, search in the table. In analog integrated circuits, the type with the highest accuracy requirements for matching resistors is the weighted resistor type. DAC Circuit, with a precision requirement of 1 e- 4 and above. Figure 6 The display shows that when the error is controlled within 1... e- 5. The data coverage in the table can reach 90%. % The above demonstrates that the table size is consistent with the simulation. IC The actual design requirements are shown in the figure. Under the same error... bound= The curve with the highest coverage is 2, therefore this embodiment will... Set to 2 and Position 1 / 2. At this point, the data in the table is utilized most efficiently.
[0172] A single-ratio resistor network refers to a resistor network with an equivalent resistance value specified by the user. The algorithm for generating a single-ratio resistor network is shown in Table 3. Specifically, it is first generated according to Equation 4. - Formula 6 ratio Convert to bigInt and Then press number 1 - The algorithm described in lines 8 searches for errors in a series-parallel table. tol Does the range contain an equivalent resistance of ? Resistor network. If there is an error... tol Search within range Then directly convert the error tol Output all matching topologies within the range. If within the error... tol No results found within the range This embodiment proposes using continuous fractions to improve accuracy.
[0173] This embodiment does not simply select the closest element in the table. The solution and The difference is decomposed into continuous fractions. Instead, it is... It is broken down into two parts: one part is the resistor network in the table, and the other part is the continuous fractions. Then proceed to step 15. - The algorithm described in line 31 searches the data in the table sequentially, and when the data in the table is less than... When, find a continuous fraction such that, within the allowable error range, the series connection of the two is: When the data in the table is greater than When, find a continuous fraction such that, within the allowable error range, the parallel combination of the terms is: .
[0174] This is done because: when no results are found in the table... This embodiment will use a continuous fractional resistor network, but the method used by Kagoshima University in Japan... Yukinao Isokawa The proposed resistor network constructed using continuous fractions is a special type of series-parallel network with alternating series and parallel connections. Therefore, continuous fractions are only a subset of series-parallel networks and do not guarantee that the resistor network constructed using continuous fractions uses the fewest unit resistors.
[0175] Based on this, this embodiment decomposes a single resistor network into a series or parallel combination of two resistor networks, in order to find a resistor network combination that consumes less resistance per unit than a single resistor network. For example, a ratio value of 0. . 9. Solve the expression using continuous fractions as follows: " 18 + 1 &” A total of 10 unit resistors are needed, but if the equivalent resistance is 0... . 9 decomposed into an equivalent resistance of 0 . 5 and 0 . 4. Two networks connected in series have an equivalent resistance of 0. . A 5-ohm network consists of two resistors connected in parallel, with an equivalent resistance of 0. . The postfix expression for a 4-bit network is: " 1 / twenty two &” That is, two resistors connected in parallel and then two more resistors connected in parallel in series, requiring a total of 6 unit resistors, which is less than the number of unit resistors consumed by a single continuously implemented network.
[0176] Will bigInt、 The topologies and consecutive fractional topologies found in the table are combined into a unified format to obtain updated solutions. These updated solutions are then added to the updated solution set, prioritized by the number of unit resistors, and then sorted by relative error from low to high when the number of unit resistors is equal. Merging into a unified format essentially involves merging postfix expressions, that is, merging different binary trees into a single large binary tree. For example... " 6 . twenty three ” According to Equation 6, we obtain... bigInt= 5, = 1 . 23, that is " 5 ” and " 1 . twenty three ” The series of " 6 . twenty three ” Assuming the lookup table does not contain... " 1 . twenty three ” This resistor network, but has " 0 . 75 ” This resistor network, " 1 . twenty three ” It can be decomposed into " 0 . 75 ” and " 0 . 48” Serial connection, " 0 . 75 ” The postfix expression is " 31 &” , " 0 . 48 ” It is generated using continuous fractions, and its postfix expression is: " 1 / 31 + 3 & 1 &” Combining these three solutions in a series relationship yields the solution. " 1 / 31 + 3 & 1 & 31 &+ 5 +” .
[0177] This embodiment assumes that the input single ratio is ratio The accuracy is tol The series-parallel combination table is as follows: table There are a total of NUM Item record. First, according to Equation 4 - Formula 6 ratio Convert to bigInt and When the table cannot be found In this embodiment, the minimum number of unit resistors consumed in updating the solution-lumped resistor network is defined as follows: minN At this point, the table will find the closest but smaller value. The index is indexT The algorithm for generating a single ratio resistor network is shown in Table 3. Table 3 provides an algorithm for searching for series-parallel networks with equivalent electrical parameter values less than the decimal parameter (Case 1). Similarly, for searching for series-parallel networks with equivalent electrical parameter values greater than the decimal parameter (Case 2), the relevant parameter range can be modified. Here, only Case 1 is illustrated, and Case 2 will not be described in detail.
[0178] Table 3 Algorithm for generating single-ratio resistor networks
[0179]
[0180] Continuous fractions can express any finite fraction, and their calculation formula is shown in Equation 1. This embodiment uses continuous fractions to compensate for the precision issues of nested tables in series and parallel. The algorithm for generating continuous fractions is shown in Table 4. The first row uses... C Language standard library functions modf The function decomposes a floating-point number into its integer parts. a) and a pure floating-point number in the range of 0 to 1. b The second line represents the integer part obtained from the decomposition (). a Save it to a continuous fraction sequence array, using the method described in Section 3 for representing continuous fraction sequences, i.e. The third line calculates the continuous fraction values represented by the array from the data stored in this array according to Equation 1. cf , 4th - Line 8 calculates the sum of the values. The process ends if the calculated relative error is less than a preset value; otherwise, the reciprocal of the pure floating-point number obtained in the previous step is taken, and the process is repeated until the sum of the consecutive fraction values represented in the consecutive fraction sequence array is reached. The relative error is less than the preset value.
[0181] Table 4 Continuous Fraction Algorithm
[0182]
[0183] The method in this embodiment is mainly based on a lookup table approach combined with continuous fractions, so the execution efficiency is primarily determined by the lookup table algorithm and the continuous fraction algorithm. The table is pre-read and read only once; tests show that the table read time is less than 0. . 5 s When the precision is set to 1 e- Within 5, the lookup table algorithm can directly find the circuit network with the specified ratio value without constructing continuous fractions. The lookup table algorithm has high execution efficiency, therefore the overall algorithm is also very efficient. When higher precision is required, continuous fractions need to be combined, requiring a total of [number] operations. NUM Secondary table lookup algorithm + Continuous fraction algorithm NUM The table size.
[0184] Single ratio test
[0185] Based on the distribution of data in the nested tables, this embodiment uses (0 , 1) 1000 random numbers were randomly generated within the interval [1 , 1000 random numbers were randomly generated within the interval
[100] , forming a test set of 2000 random numbers. The accuracy and the number of unit resistors used were tested on the test set, and the results were compared with those of continuous fractions.
[0186] 1 、 (0 , 1) Precision testing of interval datasets
[0187] In (0 ,1) 1000 random numbers were generated within the specified interval. The required precision is 1. e- 4. Accuracy test results are as follows: Figure 11 As shown in the figure. The results show that the precision of all 1000 data points meets the requirements.
[0188] 2 、 (0 , 1) Test of the number of unit resistors in the interval dataset
[0189] The number of unit resistors consumed by the above 1000 random numbers and the continuous fractions were compared and statistically analyzed. The histogram of the reduction rate of unit resistors is shown below. Figure 12 As shown. Based on the percentage reduction in the number of unit resistors, from 0 to 100. % Every 5 % Count once. Figure 12 The tallest bar indicates a decrease of 0 units in resistance. %~ 5 % The test data accounted for 25% of the total. % Test results show that as the percentage reduction in the number of unit resistors increases, the corresponding proportion of test data also decreases. The method in this embodiment reduces the unit resistance by 90% compared to continuous fractions. % The above test data accounts for 1% . 8 % 50 fewer than continuous fractions % The above test data account for 19%. . 3 % Analysis showed that the maximum unit resistance decreased by 98% across 1000 data points. . 3 % The average number of unit resistors decreased by 25. . 64 % .
[0190] 3 、 [1 , 100] Interval Dataset Accuracy Test
[0191] In [1] , 1000 random numbers were generated within the interval
[100] . The required precision is 1. e- 4. Accuracy test results are as follows: Figure 13 As shown in the figure. The results show that the precision of all 1000 data points meets the requirements.
[0192] 4 、 [1 , 100] Interval Data Set Unit Resistance Quantity Test
[0193] The number of unit resistors consumed by the above 1000 random numbers and the continuous fractions were compared and statistically analyzed. The histogram of the reduction rate of unit resistors is shown below. Figure 14As shown. Based on the percentage reduction in the number of unit resistors, from 0 to 100. % Every 5 % Count once. Figure 14 The tallest bar indicates a decrease of 0 units in resistance. %~ 5 % The test data accounted for 35% of the total. . 4 % Test results show that as the percentage reduction in the number of unit resistors increases, the corresponding proportion of test data also decreases. The method in this embodiment reduces the unit resistance by 90% compared to continuous fractions. % The above test data account for 0%. . 4 % 50 fewer than continuous fractions % The above test data account for 7% . 1 % Analysis showed that the maximum unit resistance decreased by 98% across 1000 data points. . 35 % The number of unit resistors decreased by an average of 15. . 36 % .
[0194] 5 . Testing with different accuracy requirements
[0195] This embodiment selected four randomly generated ratio values and tested the actual accuracy and number of unit resistors under different accuracy requirements. The test results are shown in Table 5. The test results show that, under different accuracy requirements, for the resistor network generated by the same ratio value, the method in this embodiment consumes a different number of unit resistors compared to the continuous fractional method.
[0196] Table 5 Test Results for Different Precision Requirements
[0197]
[0198] To analyze the reduction rate trend of unit resistance under different precision requirements of text processing algorithms, this embodiment randomly selected four data points. Then, it constructed resistance networks for these four data points using both the method described in this embodiment and the continuous fractional method. The number of unit resistances consumed by each method was counted for each data point, and the reduction rate of unit resistance consumed by the method described in this embodiment relative to the continuous fractional method was calculated. A unit resistance reduction rate curve was plotted, as shown below. Figure 15 As shown.
[0199] It should be noted that the above examples are only for understanding this application and do not constitute a limitation on the matching generation method of passive device network provided in this application. Any simple modifications based on this technical concept are within the protection scope of this application.
[0200] Example 2
[0201] Based on Example 1, this example also provides a method for matching and generating passive device network groups. The purpose of this method is to generate passive device network groups that satisfy the proportional sequence according to the user-input proportional sequence, using the network generation method provided in Example 1.
[0202] The scaling sequence consists of several scaling elements. The passive device network group contains passive device networks that correspond one-to-one with each scaling element. The passive device networks are generated according to specified matching parameter values, and the specified matching parameter values satisfy the scaling relationship of the corresponding scaling elements in the scaling sequence.
[0203] In addition, this embodiment also considers the size of the passive device network group. By setting a scaling factor to adjust the proportional sequence proportionally and iterating different scaling factors, the size of the passive device network group is reduced compared to before the adjustment, thereby obtaining a smaller passive device network group that meets the user's needs.
[0204] The design background and design principles of this embodiment will be explained in detail below (taking a resistor network group as an example):
[0205] In simulation IC In design, a common scenario involves designing multiple resistor networks that need to maintain a certain proportional relationship. The key to generating passive component network groups is finding a scaling factor that minimizes the overall number of unit resistors consumed while keeping the proportions of each part constant. For example, to obtain 1... : A ratio of 100 requires 101 unit resistors, but maintaining 1 : Keeping the scale value of 100 unchanged, use a scaling factor of 1. / 10. Scale the original scale to make it 1:1. / 10 : 10. At this point, only 20 unit resistors are needed. This embodiment comprehensively utilizes normalization. 、 Scaling coefficients are constructed using factorization and serial-parallel network methods.
[0206] This embodiment assumes that the total number of proportional elements in the input proportional sequence is . n The proportional sequence is denoted as ratio [0] , ratio [1] ,…,ratio [ n- 1]; The total number of scaling elements in the final scaling factor sequence is m The final scaling factor is denoted as scale [0] scale [1] ,…,scale [ m- 1]; The normalized sequence is denoted as 1. norm [0] ,..., norm [ n- 2). The result of normalization is expressed as a fraction, where the numerator and denominator are both integers. The sequence after converting the floating-point number to a fraction is denoted as... , ,..., The number of unit resistors consumed by the final solution is denoted as... minN This is because during the algorithm's execution, this value needs to be compared with the total number of unit resistors consumed by the newly generated resistor network group. When the total number of unit resistors consumed by the newly generated resistor network group is greater than... minN Small, minN This will be updated to the total number of unit resistors consumed by the newly generated resistor network group, and the update solution will be updated to the newly generated resistor network group. Therefore, the text initializes this variable to a large value of 1. e 9; After scaling the proportional sequence, the number of unit resistors in the resistor network generated by each ratio value is unitNum The number of unit resistances in the entire sequence is allUnitNum The algorithm for generating resistor network groups is shown in Table 6.
[0207] Table 6 Resistor Network Group Generation Algorithm
[0208]
[0209] The first row of Table 6 shows the normalization of the original sequence. ratio [0] is normalized to 1, and the normalization coefficient is 1. / ratio [0], multiply this coefficient by the remaining ratio values in sequence to obtain a new ratio sequence 1. norm [1] ,…, norm [ n- 1). Line 2 converts floating-point numbers in the new scaling sequence into fractions. Line 3 factorizes the sequence one by one, factoring both the numerator and denominator when encountering fractions, and taking the reciprocal of the factorization coefficient of the numerator to obtain the factorization coefficients. Line 4 multiplies the factorization coefficients freely, removing duplicate data to generate a scaling coefficient sequence. Line 5 combines this scaling coefficient sequence with a sequence generated using a series-parallel combination with a scale of 5 to form the final scaling coefficient sequence, removing duplicate coefficients during the merging process. 7. - Line 18 scales the proportional sequence at each scaling factor. For the scaled sequence, the resistor network topology is obtained for each ratio value using the method for generating a single-ratio resistor network. The number of unit resistors in the network topology is recorded. unitNum Adding the unit resistance values for each ratio value gives the total unit resistance value for the entire sequence. allUnitNum If the current solution has a unit resistance quantity minN>allUnitNum Then the current solution is updated to a series of resistor network topologies generated under this scaling factor.
[0210] The specific method for generating the scaling factor of the proportional sequence is as follows: Factorize the numerator and denominator of the fraction, take the reciprocal of the factorization coefficient of the numerator, and multiply the coefficients formed by the factorization by combining them freely to form part of the scaling factor sequence. Then, construct a series-parallel network table of scale 5 according to the method described above, with a total of 35 series-parallel networks. Use the equivalent resistance value of each series-parallel network as another part of the scaling factor sequence. Merge these two scaling factor sequences and remove duplicates to obtain the final proportional sequence scaling factor sequence. Therefore, it is necessary to add the equivalent resistance values of 35 series-parallel networks of scale 5 as the scaling factor of the proportional sequence to handle the case of prime numbers in the proportional sequence. At the same time, considering that too many scaling factors will slow down the program, this embodiment selects a series-parallel network of scale 5 with a total of 35 coefficients, and the coefficient values range from [1]. / 5 , 5]. This embodiment uses a scale of 1. : Example 7 illustrates why a series-parallel network is needed to construct the scaling factor: This ratio, after normalization and factorization, yields scaling factors of only 1 and 1. / 7. At this point, a total of 8 unit resistors are needed; however, if the equivalent resistance values of the series and parallel networks are added, a scaling factor of 1 can be obtained. / 2 (two unit resistors in parallel), transforming the original ratio to 0. . 5:3 . 5. At this point, a total of 7 unit resistors are needed to achieve the desired result.
[0211] The following example illustrates the process of solving for the scaling factor of a typical scaling sequence. For instance, to calculate the scaling factor of a scaling sequence 5... : Scaling factor sequence of 18: First, calculate the first number of the above ratios. " 5 ” Normalize the ratio to 1. : 3 . 6. Next, put 3 . 6. Convert the proportion to fractional form, and convert the ratio to 1. : (36 / 10). Then factorize 36 and take the reciprocal of the factorization value to get 1. / 2 、 1 / 2 、 1 / 3 and 1 / 3; Factorize 10 to get 2 and 5; then factor 1... / 2 、 1 / 2 、 1 / 3 、 1 / 3 、 Multiply 2 and 5 freely to generate a scaling factor sequence, then remove the duplicate values to get 1. / 36 、 1 / 18 、 1 / 12 、 1 / 9 、 1 / 6 、 1 / 4,1 / 3 、 1 / 2 、 5 / 36 、 5 / 18 、 5 / 9 、 5 / 4 、 5 / 3 、 5 / 2 、 10 / 12 、 10 / 9 、 10 / 3 、 1 、 2 、 5 、 10. Merge this sequence with the equivalent resistance value sequence of a series-parallel network table of size 5, remove duplicates, and generate the final scaling factor sequence.
[0212] A typical application of passive device network arrays is voltage sequence generation. This involves using a resistor network to divide a higher supply voltage to obtain the desired voltage value, such as... Figure 7 As shown, there is one AVDD The simulated voltage source now needs to obtain different voltages to power different circuit modules through voltage division using a resistor network. The solution for the voltage sequence can be converted into a resistance ratio sequence solution as follows: Subtract adjacent voltage ratio values one by one to obtain a new sequence, then add the last ratio value of the original voltage sequence to the end of this new sequence. This new sequence is the resistance ratio sequence generated from the original voltage sequence. After generating the resistance ratio sequence, the corresponding resistor network group can be generated using the matching generation method for passive device network groups.
[0213] Understandably, this invention proposes a matching generation method for passive device networks based on series-parallel combination and the principle of continuous fractions, and develops a software tool using this method. The software provides a method for constructing passive device network groups, comprehensively utilizing normalization... 、 Scaling factors are constructed using factorization and series-parallel combination network methods; a preview function is provided for circuit designers to design adjustable circuits. Testing shows that the method proposed in this embodiment can achieve a single ratio. 、 Generation of passive component network groups. The generated passive component network uses a unit resistance while maintaining accuracy. / The number of capacitors is less than when using consecutive fractions directly. In the case of a single ratio, the unit resistance is reduced by an average of 15. . 1 % In multiple scenarios, the unit resistance decreases by an average of 59%. . 75 % .
[0214] Specifically, the main interface of the automatic resistor generation tool is as follows: Figure 8 As shown. The main interface first requires you to enter the ratio value, which can be a single ratio value or multiple ratio values, separated by spaces; next, you need to enter the accuracy requirement; then you can choose between resistance ratio or voltage divider sequence; then you can choose "Library" and "Cell" to specify the unit resistance; finally, click OK Press the button to run the tool, and a preview diagram of the resistor network will be automatically generated.
[0215] When generating the resistor network preview, to present circuit designers with a simple and intuitive circuit topology, we adopted the following strategy for resistor layout in the preview interface:
[0216] The generated circuit network (i.e., postfix expression) is parsed to generate a binary tree data structure. The deepest parallel layer (i.e., the depth of the binary tree) and the deepest series layer (i.e., the maximum number of sibling nodes in the same layer of the binary tree) of the resistor network are counted. The deepest parallel layer determines the height of the preview interface, and the deepest series layer determines the width of the preview interface.
[0217] Using the top left corner of the preview interface as the reference point, when encountering parallel resistors in the resistor network (i.e., postfix expression), the preview interface uses downward expansion.
[0218] Using the top left corner of the preview interface as a reference point, when encountering resistors in series when parsing the resistor network (i.e., the postfix expression), the preview interface expands to the right.
[0219] Preview interface of the automatic resistor generation tool (as shown) Figure 9 As shown, where, Figure 9 middle A This is the original schematic diagram. Figure 9 middleB The diagram shows the adjusted configuration, with horizontal lines representing series connections and vertical lines representing parallel connections. Furthermore, without affecting the overall equivalent resistance, circuit designers are allowed to manually adjust the positions of local resistors, such as swapping the positions of series resistors of the same level left and right, or swapping the positions of parallel resistors of the same level up and down.
[0220] Specifically through Qt Mouse events allow circuit designers to move resistors from one local area of a resistor network to another, effectively swapping the positions of resistors in the two areas.
[0221] for example Figure 9 middle A The designer believes I 1 Parallel I The combination 0 is changed to I Position 3 is more suitable; at this point, the circuit designer can select it using the left mouse button. I 1 Parallel I Select the group labeled 0, then move the mouse over it. I Position 3, to achieve the above position swap, see the transformed version. Figure 9 middle B .
[0222] Of course, the above adjustments can only be made while ensuring that the equivalent resistance value of the resistor network remains unchanged. Specifically:
[0223] 1 、 When a circuit designer selects a local resistor, the program finds the resistor's location in the binary tree based on the resistor number selected by the designer.
[0224] 2 、 Based on the determined position, find its sibling node under the same parent node in the binary tree, and determine whether the resistor at the position where the designer's mouse is moved belongs to one of these sibling nodes; if so, the operation of swapping the resistor position can be performed, the interface is redrawn, and the swap between resistors is completed; otherwise, the operation cannot be performed.
[0225] Click after adjustment "export" Schematic diagram of button generation circuit; where, Figure 10 The ratio shown is 0. . 23456, with a precision of 5 e- The circuit schematic of 5, the final solution is " 41 & 1 + 1 + 1 + 1 & 1 & 1 & 1&” The expression evaluates to 0. . 234567901234568, and 0 . The relative error of 23456 is 3. . 368534519103218 e- 05, Generate the schematic diagram as follows Figure 10 As shown.
[0226] Resistor network group test
[0227] Since the accuracy and number of unit resistors for a single ratiometric resistor network were already tested in Example 1, we will not test the accuracy of the resistor network group again. Instead, we will only test the total number of unit resistors used by the resistor network group and compare it with the number of unit resistors used to directly solve the sequence. Twenty datasets were created, and the test results are shown in Table 7.
[0228] Table 7 Test Results of Resistor Network Group
[0229]
[0230] By scaling the sequence, a new method significantly reduces the number of unit resistors while maintaining the ratios between multiple ratio values. Test results on 10 test sets show a reduction of 59% in the average resistance. . 75 % .
[0231] It should be noted that the above examples are only for understanding this application and do not constitute a limitation on the matching generation method of passive device network groups provided in this application. Any simple modifications based on this technical concept are within the protection scope of this application.
[0232] Example 3
[0233] This application also provides a matching generation apparatus, please refer to... Figure 16 It includes:
[0234] The acquisition module 10 is used to determine the corresponding high-density distribution range based on the distribution of equivalent electrical parameter values in the series-parallel network table;
[0235] Decomposition module 20 is used to obtain a specified matching parameter value and decompose the matching parameter value into decimal parameters and integer parameters according to the high-density distribution range;
[0236] The first generation module 30 is used to set up a first passive device network by connecting passive devices of the same type with integer parameter values in series or parallel.
[0237] The second generation module 40 is used to search for a series-parallel network that matches the fractional parameter in a preset series-parallel network table with equivalent electrical parameter values, and to construct the topology of the second passive device network through the searched series-parallel network.
[0238] The first output module 50 acquires the first passive device network and the second passive device network, and connects them in series or parallel to form a passive device network and outputs it.
[0239] The second output module 60 is used to generate a passive device network group that satisfies the ratio sequence input by the user; the second output module is optional and configured according to user requirements.
[0240] The equivalent electrical parameter values of the passive device network match the specified matching parameter values within the allowable error range. The series-parallel network consists of several passive devices of the same type connected in series and parallel. / A topology consisting of parallel connections.
[0241] The matching generation apparatus provided in this application employs the matching generation method for a passive device network in Embodiment 1 or the matching generation method for a passive device network group in Embodiment 2. This addresses the technical problems in related technologies where no automated generation tools are available for passive device networks, and the network size is difficult to optimize and reduce. Compared with related technologies, the beneficial effects of the matching generation apparatus provided in this application are the same as those of the matching generation method for a passive device network provided in Embodiment 1 or the matching generation method for a passive device network group provided in Embodiment 2. Furthermore, other technical features of the matching generation apparatus are the same as those disclosed in the methods of the above embodiments, and will not be repeated here.
[0242] Example 4
[0243] This application provides a matching generation device, comprising: at least one processor; and a memory communicatively connected to the at least one processor; wherein the memory stores instructions executable by the at least one processor, the instructions being executed by the at least one processor to enable the at least one processor to perform a matching generation method for a passive device network in Embodiment 1 above, or to perform a matching generation method for a passive device network group in Embodiment 2 above.
[0244] The following is for reference. Figure 17 The diagram illustrates a structural schematic suitable for implementing the matching generation device in the embodiments of this application. The matching generation device in the embodiments of this application may include, but is not limited to, devices such as mobile phones. 、 laptop 、 Digital broadcast receiver PDA ( Personal Digital Assistant Personal Digital Assistant PAD ( Portable Application Description Tablet PC PMP ( Portable Media Player Portable multimedia player) 、 Mobile terminals such as in-vehicle terminals (e.g., in-vehicle navigation terminals) and digital devices TV Fixed terminals such as desktop computers. Figure 17 The matching generation device shown is merely an example and should not impose any limitations on the functionality and scope of use of the embodiments of this application.
[0245] like Figure 17 As shown, the matching generation device may include a processing unit 1001 (e.g., a central processing unit). 、 Graphics processors, etc., can be based on the data stored in read-only memory (ROM). ROM : Read Only Memory The program in 1002 or loaded from storage device 1003 into random access memory (RAM) RAM : Random Access Memory The program in 1004 performs various appropriate actions and processes. RAM 1004 also stores various programs and data required for the operation of the matching generation device. Processing device 1001 ROM 1002 and RAM 1004 are interconnected via bus 1005. Input / Output ( I / O Interface 1006 is also connected to the bus. Typically, the following systems can be connected to... I / O Interface 1006: Includes, for example, a touchscreen 、 touchpad 、 keyboard 、 mouse 、 Image sensor 、 microphone 、 accelerometer 、 Input devices 1007 such as gyroscopes; including, for example, liquid crystal displays (LCDs). LCD : Liquid Crystal Display ) 、 speaker 、 Output device 1008 such as a vibrator; including, for example, magnetic tape 、 Storage device 1003 such as a hard disk; and communication device 1009. Communication device 1009 allows the text intent reconstruction device to communicate wirelessly or wiredly with other devices to exchange data. Although the figure shows a matching generation device with various systems, it should be understood that it is not required to implement or have all the systems shown. More or fewer systems may be implemented alternatively.
[0246] Specifically, according to the embodiments disclosed in this application, the processes described above with reference to the flowcharts can be implemented as computer software programs. For example, embodiments disclosed in this application include a computer program product comprising a computer program carried on a computer-readable medium, the computer program containing program code for performing the methods shown in the flowcharts. In such embodiments, the computer program can be downloaded and installed from a network via a communication device, or installed from storage device 1003, or from... ROM 1002 is installed. When the computer program is executed by the processing device 1001, it performs the functions described above as defined in the method of the embodiments disclosed in this application.
[0247] The matching generation device provided in this application employs a matching generation method for a passive device network in Embodiment 1 or a matching generation method for a passive device network group in Embodiment 2. This addresses the technical problems in related technologies where no automated generation tools are available for passive device networks, and the network size is difficult to optimize and reduce. Compared with related technologies, the beneficial effects of the matching generation device provided in this application are the same as those of the matching generation method for a passive device network provided in the above embodiments. Furthermore, other technical features of this matching generation device are the same as those disclosed in the methods of the above embodiments, and will not be repeated here.
[0248] It should be understood that the parts disclosed in this application can be used in hardware. 、 software 、 This is achieved through firmware or a combination thereof. Specific features are described in the above description of the embodiments. 、 structure 、 Materials or features may be combined in any suitable manner in one or more embodiments or examples.
[0249] The above are merely specific embodiments of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.
[0250] This application provides a computer-readable storage medium having computer-readable program instructions (i.e., a computer program) stored thereon, the computer-readable program instructions being used to execute a passive device network matching generation method according to the above embodiments.
[0251] The computer-readable storage medium provided in this application may be, for example, a... U Disk, but not limited to electric 、 magnetic 、 Light 、 electromagnetic 、 Infrared or semiconductor systems、 A system or device, or any combination thereof. More specific examples of computer-readable storage media may include, but are not limited to, electrical connections having one or more wires. 、 Portable computer disk 、 harddisk 、 Random access memory (RRAM) RAM : Random Access Memory ) 、 Read-only memory (ROM) ROM : Read Only Memory ) 、 Erasable Programmable Read-Only Memory (EPROM) EPROM : Erasable Programmable Read Only Memory (or flash memory) 、 optical fiber 、 Portable Compact Disk Read-Only Memory (PDI-ROM) CD-ROM : CD-Read Only Memory ) 、 Optical storage devices 、 Magnetic storage devices, or any suitable combination thereof. In this embodiment, the computer-readable storage medium can be any tangible medium containing or storing a program that can be executed by an instruction execution system. 、 The system or device uses or is used in conjunction with it. Program code contained on a computer-readable storage medium can be transmitted using any suitable medium, including but not limited to: wires. 、 optical cable RF ( Radio Frequency (RF) etc., or any suitable combination of the above.
[0252] The aforementioned computer-readable storage medium may be included in the matching generation device; or it may exist independently and not be assembled into the matching generation device.
[0253] The aforementioned computer-readable storage medium carries one or more programs, which, when executed by the matching generation device, cause the matching generation device to: acquire specified matching parameter values and generate a corresponding passive device network; wherein the passive device network consists of a first passive device network and a second passive device network connected in series or in parallel.
[0254] Computer program code for performing the operations of this application may be written in one or more programming languages or a combination thereof, including object-oriented programming languages. — Such as Java, Smalltalk, C++ + It also includes conventional procedural programming languages. — Such as "C” A programming language or similar. The program code can be executed entirely on the user's computer. 、 Partially executed on the user's computer、 Execute as a standalone package 、 It may execute partly on the user's computer, partly on the remote computer, or entirely on the remote computer or server. In cases involving a remote computer, the remote computer can be connected to any type of network. —— Including local area network (LAN) LAN : Local Area Network ) or wide area network ( WAN : Wide Area Network ) — It can connect to the user's computer, or it can connect to an external computer (e.g., by using an Internet service provider to connect via the Internet).
[0255] The flowcharts and block diagrams in the accompanying drawings illustrate systems according to various embodiments of this application. 、 Possible architectures for implementing methods and computer program products 、 Functions and operations. In this respect, each box in a flowchart or block diagram can represent a module. 、 A segment or part of the code, the module 、 A program segment or part of the code contains one or more executable instructions for implementing a specified logical function. It should also be noted that in some alternative implementations, the functions marked in the blocks may occur in a different order than those shown in the accompanying drawings. For example, two consecutively shown blocks can actually be executed substantially in parallel, and sometimes they can be executed in reverse order, depending on the functions involved. It should also be noted that the block diagram and... / Or each box in the flowchart, as well as the block diagram and / The combination of boxes in a flowchart can be implemented using a dedicated hardware-based system that performs the specified function or operation, or it can be implemented using a combination of dedicated hardware and computer instructions.
[0256] The modules described in the embodiments of this application can be implemented in software or hardware. The names of the modules do not necessarily limit the functionality of the unit itself.
[0257] The readable storage medium provided in this application is a computer-readable storage medium that stores computer-readable program instructions (i.e., a computer program) for executing the above-described method for matching and generating passive device networks. This solves the technical problems in related technologies where there are no automated generation tools available for passive device network matching and generation, and the network size is difficult to optimize and reduce. Compared with related technologies, the beneficial effects of the computer-readable storage medium provided in this application are the same as those of the passive device network matching and generation method provided in the above embodiments, and will not be repeated here.
[0258] This application also provides a computer program product, including a computer program that, when executed by a processor, implements a method for matching and generating a passive device network as described in Embodiment 1 above, or a method for matching and generating a group of passive device networks as described in Embodiment 2.
[0259] The computer program product provided in this application solves the technical problem in related technologies where there are no automated generation tools available for passive device network matching generation, and the network size is difficult to optimize and reduce. Compared with related technologies, the beneficial effects of the computer program product provided in this application are the same as those of the generation method provided in the above embodiments, and will not be repeated here.
[0260] The above are only some embodiments of this application and do not limit the patent scope of this application. All equivalent structural transformations made under the technical concept of this application and using the contents of the specification and drawings of this application, or direct / indirect applications in other related technical fields, are included in the patent protection scope of this application.
Claims
1. A method for generating a matching network for passive devices, characterized in that, Generate the corresponding passive device network based on the specified matching parameter values; wherein the steps include: The passive device network is divided into a first passive device network and a second passive device network that are connected in series or in parallel; wherein, both the first passive device network and the second passive device network are composed of several passive devices of the same type; A pre-set series-parallel network table is provided; wherein, the series-parallel network table sets several series-parallel networks and corresponding equivalent electrical parameter values, and the series-parallel networks are several passive devices of the same type connected in series and parallel. / Or a topology composed of parallel connections; Based on the distribution of equivalent electrical parameter values in the series-parallel network table, the corresponding high-density distribution range is determined. The matching parameter values are decomposed using the high-density distribution range; wherein, the parameter part falling within the high-density distribution range is divided into decimal parameters, and the remaining part is divided into integer parameters; The first passive device network is equipped with an integer number of unit passive devices, which are uniformly connected in series or parallel. In the series-parallel network table, a series-parallel network matching the fractional parameter is searched using the equivalent electrical parameter value, and the topology of the second passive device network is constructed using the searched series-parallel network.
2. The matching generation method for a passive device network according to claim 1, characterized in that, The passive device is set by a unit resistance, and the matching parameter value and the equivalent electrical parameter value correspond to the resistance value.
3. The matching generation method for a passive device network according to claim 1, characterized in that, The passive device is configured using a unit capacitance, and the matching parameter value corresponds to the capacitance value, which is the equivalent electrical parameter value.
4. The matching generation method for a passive device network according to claim 1, characterized in that, The topology of the second passive device network is configured using a ladder network; wherein the ladder network is a two-end pair network composed of several L-shaped networks cascaded together.
5. The matching generation method for a passive device network according to claim 1, characterized in that, The series-parallel network table constructs series-parallel networks of different sizes in a recursive or continuous fractional manner, and records the topology, size and corresponding equivalent electrical parameter values of the series-parallel networks.
6. The matching generation method for a passive device network according to claim 5, characterized in that, For different series and parallel networks with the same equivalent electrical parameter values, the series and parallel network table only retains the smallest series and parallel network.
7. The matching generation method for a passive device network according to claim 5, characterized in that, The series-parallel network consists of a scale of i The first substring parallel network and its size are ni The second substring is composed of a parallel network connected in series or in parallel; among which, n Indicates the scale of the series-parallel network. i Represents a recursive variable. i <n and i It is a positive integer.
8. The matching generation method for a passive device network according to claim 5, characterized in that, The topology of a series-parallel network is described using postfix expressions.
9. The matching generation method for a passive device network according to claim 8, characterized in that, When performing network preview or circuit schematic generation on the series-parallel network, the postfix expression is quickly parsed using a stack structure, and the topology of the series-parallel network is transformed into the corresponding binary tree.
10. The matching generation method for a passive device network according to claim 9, characterized in that, The serial-parallel network table evaluates the binary tree through a post-order traversal to obtain the equivalent electrical parameter values of the corresponding topology.
11. The matching generation method for a passive device network according to claim 1, characterized in that, The upper and lower boundaries of the high-density distribution range are set according to the coverage required to meet the actual needs of the circuit design.
12. The matching generation method for a passive device network according to claim 11, characterized in that, The matching parameter value is decomposed using the following formula: when hour: when hour: when hour: in, Indicates the matching parameter value. Integer parameter, Represents a decimal parameter. Indicates the upper boundary. Indicates the lower boundary. int ( * ) represents the floor function.
13. The matching generation method for a passive device network according to claim 1, characterized in that, Within the allowable error range, when a series-parallel network whose equivalent electrical parameter value matches the decimal parameter is found in the series-parallel network table, the smallest series-parallel network is selected from the found series-parallel networks to construct the second passive device network.
14. The matching generation method for a passive device network according to claim 1, characterized in that, Within the allowable error range, if no series-parallel network with equivalent electrical parameter values matching the decimal parameter is found in the series-parallel network table, then the second passive device network is constructed by combining the existing series-parallel networks in the series-parallel network table with the ladder network constructed from continuous fractions.
15. The matching generation method for a passive device network according to claim 1, characterized in that, Within the allowable error range, when no series-parallel network whose equivalent electrical parameter value matches the decimal parameter is found in the series-parallel network table, two or more series-parallel networks are queried in the series-parallel network table, and each series-parallel network is matched with the decimal parameter by the equivalent electrical parameter value after being connected in series and / or in parallel. The two or more series-parallel networks found together construct the second passive device network.
16. The matching generation method for a passive device network according to claim 14, characterized in that, In the series-parallel network table, sequentially search for series-parallel networks whose equivalent electrical parameter values are less than the decimal parameter. The difference between the decimal parameter and the equivalent electrical parameter value is converted into a corresponding continuous fraction, and the continuous fraction is converted into a corresponding ladder network. The series-parallel network and the ladder network are combined in series to obtain the topology of the second passive device network.
17. The matching generation method for a passive device network according to claim 16, characterized in that, The system then searches the series-parallel network table for series-parallel networks whose equivalent electrical parameter values are greater than the decimal parameter. The difference between the equivalent electrical parameter value and the decimal parameter is converted into a corresponding continuous fraction, and the continuous fraction is converted into a corresponding ladder network. The series-parallel network and the ladder network are then combined in parallel to obtain the topology of the second passive device network.
18. The matching generation method for a passive device network according to claim 17, characterized in that, Still [0, indexT] Within the range, the series-parallel network that minimizes the size of the second passive device network is selected as the updated solution; wherein, the series-parallel network table sorts the series-parallel networks according to the magnitude of their equivalent electrical parameter values, the... indexT It is represented as the number of series and parallel networks whose equivalent electrical parameter value is less than and closest to the decimal parameter.
19. The matching generation method for a passive device network according to claim 17, characterized in that, Still [indexT+1, NUM] Within the range, the series-parallel network that minimizes the size of the second passive device network is selected as the updated solution; wherein, the series-parallel network table sorts the series-parallel networks according to the magnitude of their equivalent electrical parameter values, the... indexT Represented as the series-parallel network numbering with equivalent electrical parameter values less than and closest to the decimal parameter, the NUM This indicates the total number of records in the serial and parallel network table.
20. A method for generating a matching network of passive devices according to any one of claims 18-19, characterized in that, Based on the updated solutions obtained through screening, the smaller-scale series-parallel network is selected as the final solution.
21. The matching generation method for a passive device network according to claim 14, characterized in that, The continuous fractions are generated through the following steps: Step 1: Input the matching parameter values to be converted and accuracy requirements tol ; Step 2: Match the parameter values to be converted Decompose into integer parts a and decimal part b ; Step 3: Extract the integer part a Save to a continuous fraction sequence; Step 4: Calculate the continuous fraction values corresponding to the continuous fraction sequence using the formula for continuous fractions. cf ; Step 5: Calculate the continuous scores cf Matching parameter values to be converted The error; among which, If the error is greater than the accuracy requirement tol Then find the decimal part. b reciprocal; Match the parameter values to be converted Updated to 1st of the countdown / b Then return to step 2; Otherwise, output the current consecutive score. cf And then it ended.
22. The matching generation method for a passive device network according to claim 21, characterized in that, When the passive device is set through a unit resistor, the continuous fractional sequence is set as follows: The formula for calculating continuous fractions is: in, ... The elements with even numbers in the middle are the series resistors of the ladder network. ... The elements with odd numbers are the parallel resistors of the ladder network.
23. The matching generation method for a passive device network according to claim 21, characterized in that, When the passive device is set using a unit capacitance, the continuous fractional sequence is set as follows: The formula for calculating continuous fractions is: in, ... The elements with even numbers in the middle are the parallel capacitors of the ladder network. ... The elements with odd numbers are the series capacitors of the trapezoidal network.
24. The matching generation method for a passive device network according to claim 21, characterized in that, The conversion between odd and even sequences is achieved by adding zero elements to the end of the continuous fractional sequence.
25. A matching generation apparatus, characterized in that, The device includes: The acquisition module is used to determine the corresponding high-density distribution range based on the distribution of equivalent electrical parameter values in the series-parallel network table. The decomposition module is used to obtain a specified matching parameter value and decompose the matching parameter value into decimal parameters and integer parameters according to the high-density distribution range; The first generation module is used to set up a first passive device network by connecting passive devices of the same type with integer parameter values in series or parallel. The second generation module is used to search for a series-parallel network with the same equivalent electrical parameter value as the fractional parameter in a preset series-parallel network table, and to construct the topology of the second passive device network through the searched series-parallel network. The first output module is used to acquire the first passive device network and the second passive device network, and to form a passive device network in series or parallel and output it. The second output module is used to generate a passive device network group that satisfies the ratio sequence input by the user; the second output module is optional and configured according to user requirements. Wherein, the equivalent electrical parameter values of the passive device network match the specified matching parameter values within the allowable error range, and the series-parallel network is a topology structure composed of several passive devices of the same type connected in series and / or in parallel.
26. A matching generation device, characterized in that, The device includes: a memory, a processor, and a computer program stored in the memory and executable on the processor, the computer program being configured to implement a matching generation method for a passive device network as claimed in any one of claims 1 to 24.
27. A storage medium, characterized in that, The storage medium is a computer-readable storage medium, and a computer program is stored on the storage medium. When the computer program is executed by a processor, it implements a matching generation method for a passive device network as described in any one of claims 1 to 24.
28. A computer program product, characterized in that, The computer program product includes a computer program that, when executed by a processor, implements a matching generation method for a passive device network as described in any one of claims 1 to 24.
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