Transistor power device with integrated diode temperature sensor

Abstract

The embodiment of the invention relates to a transistor power device with an integrated diode temperature sensor. A transistor power device includes a substrate having a front surface opposite a back surface; at least a first trench extending within the substrate, the gate region in a surface portion of the first trench; and at least a second trench extending within the substrate, the first conductive region at a surface portion of the second trench. At least a first surface portion of the first conductive region is doped with a first conductivity type and at least a second surface portion of the first conductive region is doped with a second conductivity type to define a cathode terminal and an anode terminal of the diode element integrated in the second trench, respectively. A protection element is integrated within the second trench, arranged between the first conductive region and the substrate, forming a shielding element for the diode element with respect to the substrate.

Description

TECHNICAL FIELD

[0001] The present solution relates to a semiconductor power device, in particular a transistor device, having an integrated temperature sensor, in particular made of a diode element. BACKGROUND

[0002] It is known the need to implement temperature monitoring in electronic devices or systems, in particular for analog power applications, in order to control and improve the operation of the same electronic devices or systems.

[0003] In particular, it is known the use of diodes as temperature sensing elements, in which the substantially linear dependence on temperature of the corresponding forward bias is exploited.

[0004] In this regard, US2023 / 0134063 A1 describes a known solution of a power device, in particular of the trench-gate field-effect transistor type, in which a diode element for temperature sensing is formed within a corresponding trench.

[0005] With reference to Figure 1 , the power device, generally designated 1, comprises a substrate 2 of a semiconductor material, for example silicon, having a front surface 2a extending on a horizontal plane xy and a back surface 2b parallel to the front surface 2a and opposite with respect to the front surface 2a along a vertical axis z perpendicular to the horizontal plane xy.

[0006] The power device 1 comprises first trenches, in particular gate trenches 4, extending in the direction of the vertical axis z starting from the front surface 2a within the substrate 2 and having a longitudinal main extension along a first horizontal axis (in Figure 1 , designated axis x) of the horizontal plane xy.

[0007] Surface portions of these gate trenches 4 are occupied by gate regions 6 of an electrically conductive material, in particular polysilicon, which are part of the corresponding transistor cells of the power device 1.

[0008] These gate regions 6 are separated from the substrate 2 by an insulating layer 8, in particular of dielectric material, which coats the inner walls of the gate trenches 4; this insulating layer 8 has a first, smaller thickness in the above-mentioned surface portions of the gate trenches 4, where it defines the gate oxide of the transistor cells, and a second, greater thickness in the deep portions of the same gate trenches 4 below the surface portions with respect to the vertical axis z.

[0009] An electrically conductive region 9, made of polysilicon, placed below and electrically insulated from the same gate regions 6, so-called "field plate" regions, is located within the above-mentioned deep portions of the gate trenches 4 inside the insulating layer 8.

[0010] For each transistor unit, the power device 1 further includes: a body region 10 having a first conductivity type, such as p-type, disposed laterally to the gate trench 4, adjacent to the front surface 2a of the substrate 2; and a source region 12 having a second conductivity type, such as n-type, disposed within the body region 10 on the same front surface 2a.

[0011] Suitable contact elements (not shown here) electrically contact the gate region 6 and source region 12 of the transistor unit, defining the gate and source terminals of the power device 1.

[0012] Furthermore, at the rear surface 2b of the substrate 2, the power device 1 includes a conductive layer 13, which represents the drain terminal of the same power device 1.

[0013] The power device 1 also includes a second trench, specifically a diode trench 14, which extends from the front surface 2a within the substrate 2 in the direction of the vertical axis z, and also has a first horizontal axis x longitudinal main extension along the horizontal plane xy parallel to the gate trench 4.

[0014] These diode trenches 14 are filled at the bottom by a conductive filling region 15, specifically polysilicon, which is separated from the substrate 2 by a first insulating layer 16 (e.g., silicon oxide or silicon nitride) that internally coats the walls of the same diode trenches 14.

[0015] The diode conductive region 18, which is also made of polysilicon, is arranged on the front surface 2a relative to the interior of the aforementioned filled conductive region 15, and is separated from the same filled conductive region 15 by, for example, a second insulating layer 19, which is also made of silicon oxide.

[0016] Specifically, the first surface portion 18a of the aforementioned diode conductive region 18 is doped with a first conductivity type dopant (n); and the second surface portion 18b of the same diode conductive region 18 is doped with a second conductivity type dopant (p), so as to define the cathode terminal and anode terminal of the diode element integrated in one of the diode trenches of the respective aforementioned diode trenches 14.

[0017] In detail, the aforementioned first surface portion 18a and second surface portion 18b of the diode conductive region 18 are aligned along the first horizontal axis x, and are separated along the same first horizontal axis x by the same separating surface portion of the diode conductive region 18.

[0018] As the same Figure 1 As shown, the power device 1 also includes a third trench, specifically a separate trench 20, which extends from the front surface 2a within the substrate 2 in the direction of the vertical axis z, and also has a longitudinal main extension along a first horizontal axis x parallel to the gate trench 4 and the diode trench 14.

[0019] These separation trenches 20 are filled by electrically conductive regions 22, in particular by polysilicon, which are separated from the substrate 2 by an insulating layer 23, which covers the inner walls of the same separation trenches 20.

[0020] In Figure 1 In the illustrated example, two separation trenches 20 are arranged between the respective diode trench 14 (corresponding to a transistor cell) and the respective gate trench 4; however, it is evident that other configurations with a different number of such gate trenches 4, diode trenches 14 and separation trenches 20 are equally possible.

[0021] Furthermore, in a manner not illustrated in detail, the separation trenches 20 can completely surround the diode trench 14, for example with an annular shape around the same diode trench 14.

[0022] During operation of the power device 1, the electrically conductive regions 22 of these separation trenches 20 can be maintained at a suitable electric potential, for example corresponding to that of the “field plate” electrically conductive regions 9.

[0023] However, the Applicant has realized that, at least in certain applications, the operation of the diode element can be disturbed by external conditions, in particular by the biasing of the drain terminal of the power device 1. For example, this can happen in the case in which the power device 1 is used for automotive applications, as a power stage, whose drain terminal is electrically coupled to the battery of the motor vehicle.

[0024] Therefore, the temperature sensing performed by the diode element can be affected by the above-mentioned external disturbances, leading to possible errors in the sensing signal provided, and therefore to malfunctions of the control logic based on the same sensing signal. SUMMARY

[0025] The present solution generally aims at overcoming the limitations of the known systems.

[0026] According to the present solution, therefore, a transistor power device is provided. BRIEF DESCRIPTION OF DRAWINGS

[0027] For a better understanding of the present disclosure, a preferred embodiment thereof will now be described, purely by way of non-limiting example, and with reference to the attached drawings, in which:

[0028] Figure 1 is a schematic plan view of a portion of a transistor device according to a first embodiment of the present solution;

[0029] Figure 2 is a schematic plan view of a portion of a transistor device according to a first embodiment of the present solution;

[0030] Figure 3A is a schematic cross-sectional view of the portion of the transistor device according to the first embodiment of the present solution, taken along the cross-sectional line A-A’; Figure 2schematic cross-sectional view of a portion of the device of

[0031] Figure 3B is a schematic plan view of a portion of the transistor device according to the second embodiment of the present solution, taken along the cross-sectional line B-B'; Figure 2 schematic cross-sectional view of a portion of the device of

[0032] Figure 4 is a schematic plan view of a portion of the transistor device according to the second embodiment of the present solution, taken along the cross-sectional line B-B';

[0033] Figure 5A is a schematic cross-sectional view of a portion of the device of Figure 4 schematic cross-sectional view of a portion of the device of

[0034] Figure 5B is a schematic cross-sectional view of a portion of the device of Figure 4 schematic cross-sectional view of a portion of the device of

[0035] Figures 6A-6C and Figures 7A-7C in subsequent steps of the corresponding manufacturing method, Figure 2 schematic cross-sectional view of a portion of the device of

[0036] Figures 8A-8C and Figures 9A-9C in subsequent steps of the corresponding manufacturing method, Figure 4 schematic cross-sectional view of a portion of the device of DETAILED DESCRIPTION

[0037] As will be described hereinafter, one aspect of the present solution envisages the provision of a protection or shielding element within the same trench in which the diode element is formed (for temperature sensing associated with the transistor power device) in an embedded or integrated manner, with the aim of protecting the diode element from external disturbances (for example related to the battery voltage in the case of automotive applications).

[0038] Reference is made to Figure 2 , Figure 3A and Figure 3B A first embodiment of a transistor-type power device (herein denoted 1), provided with a diode element and the aforesaid protection or shielding element, is now described, again denoted by 1; in order to avoid repetitions, the general implementation of the power device 1 will not be described again, and reference can be made to what has already been described in detail for the Figure 1 embodiment of the present solution (generally, similar elements will be denoted with the same reference numerals, and will not be described in detail again).

[0039] In particular, Figure 2In the illustrative plan view only the diode trenches 14 are shown, in this case present in a number and parallel to each other along the first horizontal axis x, as well as the associated separation trenches 20, which in this example have a continuous ring extending around the same diode trenches 14. In particular, in the illustrated embodiment the diode trenches 14 have an end along the first horizontal axis x which is connected to the ring of the separation trenches 20.

[0040] As shown, within each diode trench 14 extending vertically in the substrate 2 of the power device 1, there is a filling conductive region 15, in particular made of polysilicon, separated from the substrate 2 by a first insulating layer 16, for example of silicon oxide or silicon nitride, which internally coats the lower and lateral walls of the same diode trench 14. Figure 3A

[0041] This filling conductive region 15 defines a remaining opening of the diode trench 14, here denoted 30, which is substantially filled by a diode conductive region 18, also of polysilicon, arranged with respect to the aforementioned filling conductive region 15 internally of the front surface 2a of the substrate 2, separated from the same filling conductive region 15 by a second insulating layer 19, for example also of silicon oxide.

[0042] In particular, this second insulating layer 19 covers the lower wall of the aforementioned remaining opening 30 defined by the filling conductive region 15.

[0043] As previously discussed, at least a first surface portion 18a of the diode conductive region 18 is doped with a doping of first conductivity type (n); and at least a second surface portion 18b of the same diode conductive region 18 is doped with a doping of second conductivity type (p), to define respectively a cathode terminal and an anode terminal of a diode element, here denoted 32, integrated in the diode trench 14.

[0044] In particular, in Figure 3A the first metallization 34 is shown which defines the aforementioned cathode terminal of the diode element 32, arranged with a separation distance above the front surface 2a of the substrate 2 and electrically contacts the first surface portion 18a of the diode conductive region 18 through a vertical contact element 35.

[0045] In the illustrated embodiment, the aforementioned first metallization 34 also contacts the filling conductive region 15 through another vertical contact element 35', so that this filling conductive region 15 is at the same potential as the aforementioned cathode terminal.

[0046] In the same Figure 3A ​Also shown is a second metallization 37 which defines the aforesaid anode terminal of the diode element 32, which is also arranged at a certain separation distance above the front surface 2a of the substrate 2 and is electrically contacted to the second surface portion 18b of the diode conductive region 18 through a respective vertical contact element 38.

[0047] According to one aspect of the present solution, the aforesaid protection or shielding element, here denoted 40, is also formed within the diode trench 14.

[0048] This protection element 40 is made of an electrically conductive material, in particular doped polysilicon.

[0049] The protection element 40 is formed on the sidewall of the aforesaid remaining opening 30 defined by the filling conductive region 15, thus generally arranged between the diode conductive region 18 (separated therefrom by the second insulating layer 19) and the substrate 2, thus forming a shield or shielding element for the diode element 32 with respect to the same substrate 2.

[0050] For example, this protection element 40 has a maximum width in the horizontal plane xy, in a direction perpendicular to the vertical axis z, at a greater distance from the front surface 2a of the substrate 2 (generally having a wedge-shaped shape, tapering towards the same front surface 2a), for example comprised between 100 nm and 200 nm.

[0051] More in detail, in the direction of the first horizontal axis x (as shown in the preceding Figure 3A figures), the protection element 40 is arranged between the second insulating layer 19 and the filling conductive region 15, in direct contact with the same filling conductive region 15. Therefore, the protection element 40 is set at the same electrical potential as the filling conductive region 15, which in the example previously discussed also corresponds to the electrical potential of the cathode terminal of the diode element 32.

[0052] As shown in the preceding Figure 3B figures, in the direction of the second horizontal axis y (orthogonal to the first horizontal axis x and together with the same first horizontal axis x defining the horizontal plane xy), the same protection element 40 is arranged between the second insulating layer 19 and the first insulating layer 16.

[0053] With reference to Figure 4 and Figures 5A-5B A second embodiment of the power device 1 is now described, which differs from the first embodiment previously described due to the different arrangement and integration implementation of the protection element 40 within the respective diode trench 14.

[0054] In Figure 4In the illustrated example, the two diode trenches 14 are shown as being surrounded by a separation trench 20, having a ring shape in the horizontal plane xy (however, again, different arrangements and configurations can be envisaged, for example as regards the number of the aforementioned diode trenches 14 and separation trenches 20).

[0055] Differently from what discussed for the first embodiment, in general this second embodiment envisages an etching in the gate region of the power device 1 to form the diode region; as a result, in this case, the insulation of the inner side wall of the remaining opening 30 (in particular along the direction of the second horizontal axis y) has a smaller thickness with respect to the thickness of the first insulating layer 16; in fact, in this case, the insulation is a function of the gate oxide thickness.

[0056] As Figure 5A shown (with reference to the section along the first horizontal axis x), in this embodiment, therefore within the diode trench 14 there is a gate conductive region, here denoted 42, for example also of polysilicon (in particular formed with the same material as the gate region 6).

[0057] The gate conductive region 42 is separated from the filling conductive region 15 by an insulating layer 8 (defined in the aforementioned Figure 1 and corresponding to the gate oxide, having a reduced thickness).

[0058] In this case, the gate conductive region 42 also contributes to defining the aforementioned remaining opening 30 within the same diode trench 14.

[0059] In this case, the protection element 40 is arranged in contact with this gate conductive region 42; in this embodiment, the protection element 40 is therefore biased by biasing the same gate conductive region 42.

[0060] In particular, as Figure 5A shown, the first metallization 34 defining the cathode terminal of the diode element 32, in addition to electrically contacting the first surface portion 18a of the diode conductive region 18 through the vertical contact element 35 and the filling conductive region 15 through the further vertical contact element 35', also contacts the aforementioned gate conductive region 42 through yet another vertical contact element 35".

[0061] The protection element 40 is again separated from the diode conductive region 18 by a second insulating layer 19 of dielectric material, for example silicon oxide or silicon nitride. The same protection element 40 is arranged, along the first horizontal axis x, between the gate conductive region 42 and the aforementioned second insulating layer 19.

[0062] As Figure 5B shown (with reference to the direction along the second horizontal axis y), differently from what discussed for the first embodiment, in this case the protection element 40 is arranged in contact with the filling conductive region 15. Figure 3BThe solution described in the middle differs in that the protection element 40 is insulated both with respect to the conductive region 15 and with respect to the substrate 2 by the aforementioned insulating layer 8 and also by the first insulating layer 16.

[0063] It should be noted that, Figure 5B A second metallization 37 is also shown, which defines the anode terminal of the diode element 32, which is electrically contacted by a respective vertical contact element 38 to the second surface portion 18b of the diode conductive region 18.

[0064] With reference to the schematic Figures 6A-6C (corresponding to a section along the second horizontal axis y) and Figures 7A-7C (corresponding to a section along the first horizontal axis x), a possible manufacturing method of the protection element 40 with reference to the aforementioned first embodiment is now described (it should be noted that, for simplicity of explanation, only the method steps related to the manufacturing of the protection element 40 are described).

[0065] In particular, as Figure 6A and Figure 7A indicated, a first step involves the etching of the trench previously formed inside the diode trench 14 which fills the conductive region 15, for the formation of the remaining opening 30. In one possible implementation, this etching is carried out in the direction of the vertical axis z, with a thickness comprised between 0.3 pm and 1 pm, for example about 0.7 pm.

[0066] As Figure 7A indicated, in the direction of the first horizontal axis x, the remaining opening 30 is delimited by the remaining wall portion of the conductive region 15, which is not included in the trench etching. As Figure 6A indicated, in the direction of the second horizontal axis y, the same remaining opening 30 is instead delimited by the first insulating layer 16, which internally coats the wall of the diode trench 14.

[0067] Subsequently, the manufacturing method envisages the formation of the protection element 40 at the internal wall of the aforementioned remaining opening 30.

[0068] In particular, as Figure 6B and Figure 7B indicated, a deposition of polysilicon is performed (thickness comprised between 100 nm and 200 nm), for example suitably doped with phosphorus atoms, with a doping dose for example of about 1011atoms / cm2. 21 3 .

[0069] Subsequently, the previously deposited polysilicon is etched (so-called “etch-back”), for example with an etching mixture Cl / HBr / O2, and the end point is on the first insulating layer 16 (i.e. on the silicon oxide or silicon nitride which forms the same first insulating layer 16).

[0070] ​This etching causes the definition of a protective element 40 on the walls of the remaining opening 30, which has a wedge shape, tapering towards the front surface 2a of the substrate 2.

[0071] As Figure 6C and Figure 7C indicated, the manufacturing method then continues with the following method steps: growth of a second insulating layer 19, for example with a thickness of 30 nm, by ISSG (In Situ Steam Generation) within the remaining opening 30 and on the previously formed protective element 40, at a temperature of 1150 °C; filling of the remaining opening 30 by forming a diode conductive region 18 of undoped polysilicon, for example with a thickness comprised between 400 nm and 5000 nm; planarization of the same diode conductive region 18 by CMP (Chemical Mechanical Polishing); definition of a first surface portion 18a and of a second surface portion 18b of the aforesaid diode conductive region 18 by implantation of dopants, of first (n) and second (p) conduction type, respectively, for example of arsenic atoms with a dopant dose of about 10 15 atoms / cm 2 and an implantation energy of 30 keV, and of boron atoms with a dopant dose of about 10 15 atoms / cm 2 and an implantation energy of 7 keV, respectively, to define the cathode and the anode of the diode element 32, respectively.

[0072] As Figures 8A-8C indicated (with reference to the section along the second horizontal axis y) and Figures 9A-9C indicated (with reference to the section along the first horizontal axis x), the manufacturing method is substantially similar to the second embodiment (thus not described in detail again).

[0073] Again, unlike what discussed for the first embodiment, the opening of the diode region envisages etching in the gate region; thus, on the internal side walls of the remaining opening 30, the insulation from the substrate 2 has a smaller thickness. Moreover, in this case, the manufacturing method envisages the insulating layer 8 with a smaller thickness defining the insulating layer between the gate conductive region 42 and the filling conductive region 15. The inner side of the diode trench 14 is also insulated from the substrate 2 by the first insulating layer 16 (also indicated as Figure 9A .

[0074] As Figure 8B and Figure 9B indicated, when the protective element 40 is formed, in this case in contact with the gate conductive region 42, the protective element 40 does not directly contact the filling conductive region 15, neither laterally nor downwardly.

[0075] As Figure 8C and Figure 9CThe previously described steps are then performed (growth of the dielectric material by ISSG at a temperature of 1150 °C) to form the second insulating layer 19.

[0076] The manufacturing process then continues with steps similar to those previously described, in particular filling the previously described remaining openings 30 with a diode conductive region 18 and defining a diode element 32 starting from this diode conductive region 18.

[0077] From the foregoing description, the advantages of the proposed solution are evident.

[0078] In any case, it is important to emphasize that this solution advantageously allows the formation of a protection element integrated within the diode trench of a transistor power device, which protects the diode element operating as a temperature sensor from external disturbances (for example from the drain voltage of the same transistor power device).

[0079] Advantageously, this protection element does not envisage manufacturing process steps substantially different from the standard manufacturing process of the power device, resulting in a minimum increase in manufacturing time and costs.

[0080] Finally, it is clear that modifications and variants can be made to what is described and illustrated herein, without thereby departing from the scope of the present disclosure as defined in the annexed claims.

[0081] In particular, it is important to emphasize that the described solution can be advantageously applied in general to any power device in which it is necessary to form a diode temperature sensor element in an integrated manner (for example for different types of vertical trench MOSFET devices).

[0082] A transistor power device (1) comprising: a substrate (2) of semiconducting material having a front surface (2a) extending in a horizontal plane (xy) and a back surface (2b) opposite to the front surface (2a) along a vertical axis (z) transverse to the horizontal plane (xy); at least a first trench (4) extending within the substrate (2) from the front surface (2a) in the direction of the vertical axis (z) and having a longitudinal main extension along a first horizontal axis (x) of the horizontal plane (xy), a gate region (6) of conductive material of a transistor cell of the power device (1) being arranged in a surface portion of the first trench (4); at least a second trench (14) extending within the substrate (2) from the front surface (2a) in the direction of the vertical axis (z) parallel to the first trench (4), a first conductive region (18) being arranged at a surface portion of the second trench (14), wherein at least a first surface portion (18a) of the first conductive region (18) is doped with a first conductivity type (n) and at least a second surface portion (18b) of the first conductive region (18) is doped with a second conductivity type (p) to define respectively a cathode terminal and an anode terminal of a diode element (32) integrated in the second trench (14), characterized in that it further comprises a protective element (40) of conductive material integrated within the second trench (14), arranged between the first conductive region (18) and the substrate (2) and configured to define a shielding element of the diode element (32) with respect to the substrate (2).

[0083] The protective element (40) is made of polysilicon and has a wedge shape tapering towards the front surface (2a).

[0084] The device further comprises a first metallization (34) arranged above the front surface (2a) of the substrate (2) electrically contacting the first surface portion (18a) of the first conductive region (18) through a vertical contact element (35); wherein the first metallization (34) further contacts the protective element (40) through a further vertical contact element (35', 35"), so that the protective element (40) is at the same electrical potential as the first surface portion (18a).

[0085] The second trench (14) is filled at the bottom by a second conductive region (15) separated from the substrate (2) by a first insulating layer (16); wherein the second conductive region (15) defines a remaining opening (30) of the second trench (14), wherein the first conductive region (18) is arranged insulated from the second conductive region (15).

[0086] The protective element (40) is arranged at a sidewall of the remaining opening (30); and wherein the first conductive region (18) can be separated from the protective element (40) by a second insulating layer (19).

[0087] The protective element (40) is arranged in contact with the second conductive region (15), interposed between the second insulating layer (19) and the second conductive region (15).

[0088] A third conductive region (42) is present within the second trench (14), contributing to define the remaining opening (30) within the second trench (14); wherein the protective element (40) is arranged in contact with the third conductive region (42), interposed between the second insulating layer (19) and the third conductive region (42).

[0089] The device comprises a first metallization (34) which electrically contacts the second conductive region (15) and the third conductive region (42) through respective vertical contact elements (35', 35").

[0090] The third conductive region (42) is separated from the second conductive region (15) by a third insulating layer (8).

[0091] The device further comprises at least one third trench (20) which extends within the substrate (2) starting from the front surface (2a) in the direction of the vertical axis (z) and has a longitudinal main extension along a first horizontal axis (x) parallel to the first and second trenches (4, 14); wherein the third trench (20) is filled by a respective conductive region (22) separated from the substrate (2) by a respective insulating layer (23) coating the inner walls of the third trench (20).

[0092] A conductive region (9) is present within a deep portion of the first trench (4) arranged below the surface portion, arranged below the gate region (6) and electrically insulated therefrom; wherein the conductive region (9) is configured to be biased at the same potential as the respective conductive region (22) within the third trench (20).

[0093] The device comprises a plurality of transistor cells, each transistor cell of the plurality of transistor cells comprising: a respective first trench (4) having a respective gate region (6) within; at least a body region (10) arranged laterally of the first trench (4), adjacent to the front surface (2a) of the substrate (2) and separated from the gate region (6) by a gate oxide region (8); and at least a source region (12) arranged within the body region (10) at the front surface.

[0094] A method for manufacturing a transistor power device (1) comprising: providing a substrate (2) of semiconductor material having a front surface (2a) extending in a horizontal plane (xy) and a back surface (2b) opposite to the front surface (2a) along a vertical axis (z) transverse to the horizontal plane (xy); forming at least a first trench (4) extending within the substrate (2) from the front surface (2a) in the direction of the vertical axis (z) and having a longitudinal main extension along a first horizontal axis (x) of the horizontal plane (xy), a gate region (6) of conductive material of a transistor cell of said power device (1) being arranged in a surface portion of the first trench (4); forming at least a second trench (14) extending within the substrate (2) from the front surface (2a) in the direction of the vertical axis (z) parallel to the first trench (4), a first conductive region (18) being arranged in a surface portion of the second trench (14), wherein at least a first surface portion (18a) of said first conductive region (18) is doped with a first conductivity type (n) and at least a second surface portion (18b) of said first conductive region (18) is doped with a second conductivity type (p) to define respectively a cathode terminal and an anode terminal of a diode element (32) integrated in said second trench (14), characterized by further comprising: forming a protective element (40) of conductive material integrated within the second trench (14), arranged between said first conductive region (18) and said substrate (2) and configured to define a shielding element of the diode element (32) with respect to the substrate (2).

[0095] The method further comprises: filling said second trench (14) with a second conductive region (15) separated from the substrate (2) by a first insulating layer (16); and etching said second conductive region (15) to define a remaining opening (30); wherein forming said protective element (40) comprises depositing a conductive material within said remaining opening (30) and performing an etching of said conductive material for defining the protective element (40) at the sidewalls of the remaining opening (30).

[0096] The method comprises: after forming the protective element (40), growing a second insulating layer (19) within the remaining opening (30) and on the protective element (40); forming the first conductive region (18) within the remaining opening (30); and defining said first and second surface portions (18a, 18b) of said first conductive region (18) by implanting dopants of the first and second conductivity types (n, p) respectively to define said diode element (32).

[0097] The various embodiments described above can be combined to provide further embodiments. These and other changes can be made to the embodiments in light of the above-detailed description. The described embodiments are to be considered in all respects as illustrative and not restrictive, and all changes coming within the meaning and equivalency range of the appended claims are intended to be embraced therein. The claims are not to be limited to the described embodiments, which are presented for illustrative purposes only.

Claims

1. A transistor power device, comprising: A substrate having a front surface and a rear surface opposite to the front surface; At least a first trench extends from the front surface toward the rear surface within the substrate, and the gate region of the conductive material of the transistor cell of the power device is disposed in the surface portion of the first trench; At least a second trench extends from the front surface toward the rear surface within the substrate, and a first conductive region is disposed at a surface portion of the second trench, wherein at least a first surface portion of the first conductive region is doped with a first conductivity type, and at least a second surface portion of the first conductive region is doped with a second conductivity type, to define a cathode terminal and an anode terminal of a diode element integrated in the second trench, respectively. as well as A protective element, integrated within the second trench, is disposed between the first conductive region and the substrate and is configured to define a shielding element for the diode element relative to the substrate, the protective element comprising a conductive material.

2. The transistor power device of claim 1, wherein the protection element comprises polysilicon and has a wedge shape that tapers towards the front surface.

3. The transistor power device according to claim 1, further comprising: A first metallization portion is disposed above the front surface of the substrate; The first vertical component directly contacts the element. as well as The second vertical direct contact element is adjacent to the first vertical direct contact element. The first metallized portion makes electrical contact with the first surface portion of the first conductive region through the first vertical direct contact element, and The first metallized portion also contacts the protective element through the second vertical direct contact element, so that the protective element is at the same potential as the first surface portion.

4. The transistor power device according to claim 1, further comprising: The second conductive region exists at the bottom of the second trench; as well as First insulating layer, The second conductive region is separated from the substrate through the first insulating layer, and The second conductive region defines the remaining opening of the second trench, wherein the first conductive region is arranged to be insulated from the second conductive region.

5. The transistor power device according to claim 4, further comprising: Second insulating layer, The protective element is arranged on the sidewall of the remaining opening, and The first conductive area is separated from the protective element through the second insulating layer.

6. The transistor power device of claim 5, wherein the protection element is arranged to contact the second conductive region and is inserted between the second insulating layer and the second conductive region.

7. The transistor power device according to claim 5, further comprising: The third conductive region within the second trench helps to define the remaining opening within the second trench. The protective element is arranged to contact the third conductive region and is inserted between the second insulating layer and the third conductive region.

8. The transistor power device according to claim 7, comprising a first metallization portion that electrically contacts the second conductive region and the third conductive region via corresponding vertical direct contact elements.

9. The transistor power device according to claim 7, further comprising: The third insulating layer, The third conductive region is separated from the second conductive region by the third insulating layer.

10. The transistor power device according to claim 1, further comprising: At least a third trench extends within the substrate from the front surface toward the rear surface, the third trench being adjacent to the first trench and the second trench; The third trench is filled with a corresponding conductive region, which is separated from the substrate by a corresponding insulating layer coating the inner wall of the third trench.

11. The transistor power device of claim 10, wherein a conductive region exists within a deep portion of the first trench disposed below the surface portion, the conductive region being disposed below the gate region and electrically insulated from the gate region; wherein the conductive region is configured to be biased at the same potential as the corresponding conductive region within the third trench.

12. The transistor power device according to claim 1, comprising a plurality of transistor units, each of the plurality of transistor units comprising: A corresponding first trench, wherein the corresponding first trench has a corresponding gate region; At least a body region is disposed laterally in the first trench, adjacent to the front surface of the substrate, and separated from the gate region by the gate oxide region; as well as At least the source region is arranged within the body region at the front surface.

13. A method for manufacturing a transistor power device, comprising: A substrate for providing semiconductor material has a front surface extending in a horizontal plane and a rear surface opposite to the front surface along a vertical axis transverse to the horizontal plane; At least a first trench is formed, the first trench extending from the front surface in the direction of the vertical axis in the substrate and having a longitudinal main extension along a first horizontal axis of the horizontal plane, wherein the gate region of the conductive material of the transistor cell of the power device is arranged in the surface portion of the first trench. At least a second trench is formed, the second trench extending from the front surface of the substrate in the direction parallel to the first trench on the vertical axis, and a first conductive region is disposed on a surface portion of the second trench, wherein at least a first surface portion of the first conductive region is doped with a first conductivity type, and at least a second surface portion of the first conductive region is doped with a second conductivity type, to respectively define the cathode terminal and anode terminal of a diode element integrated in the second trench. It also includes: a protective element forming a conductive material, the protective element being integrated within the second trench, disposed between the first conductive region and the substrate, and configured to define a shielding element for the diode element relative to the substrate.

14. The method of claim 13, further comprising: The second trench is filled at the bottom with a second conductive region, which is separated from the substrate by a first insulating layer; And etching the second conductive region to define the remaining opening; The formation of the protective element includes depositing a conductive material within the remaining opening and performing etching of the conductive material to define the protective element at the sidewall of the remaining opening.

15. The method of claim 14, comprising: After the protective element is formed, a second insulating layer is grown inside the remaining opening and on the protective element; The first conductive region is formed within the remaining opening; The diode element is defined by implanting dopants of the first conductivity type and the second conductivity type into the first surface portion and the second surface portion of the first conductive region, respectively.

16. A transistor power device, comprising: A substrate having a front surface and a rear surface opposite to the front surface; A first trench, within the substrate, extends from the front surface toward the rear surface; A second trench is located within the substrate and adjacent to the first trench, the second trench extending from the front surface toward the rear surface; A first conductive region is disposed on a surface portion of the second trench, the surface portion comprising: The first surface portion of the first conductive region is doped with a first conductivity type; and The second surface portion of the first conductive region is doped with a second conductivity type; A protective element is integrated within the second trench and disposed between the first conductive region and the substrate. The protective element comprises a conductive material.

17. The transistor power device of claim 16, wherein the protection element comprises a triangular cross-section.

18. The transistor power device of claim 16, further comprising: The first metallization portion is adjacent to the front surface of the substrate; The first vertical component directly contacts the element. as well as The second vertical direct contact element is adjacent to the first vertical direct contact element. The first metallized portion makes electrical contact with the first surface portion of the first conductive region through the vertical direct contact element. The first metallized portion also contacts the protective element through the second vertical direct contact element, so that the protective element is at the same potential as the first surface portion.

19. The transistor power device of claim 16, further comprising: A second conductive region exists at the bottom of the second trench; and First insulating layer, The second conductive region is separated from the substrate through the first insulating layer, and The first conductive region is insulated from the second conductive region.

20. The transistor power device of claim 19, further comprising: Second insulating layer, The first conductive region is separated from the protective element through the second insulating layer, and The protective element is arranged to contact the second conductive region and is inserted between the second insulating layer and the second conductive region.

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