Chip component and method for manufacturing the same
By pre-preparing the external electrodes and using roller coating and dip coating processes to automatically coat the external electrodes, the problem of cumbersome preparation process for multi-faceted external electrodes of chip components is solved, thereby improving production efficiency and product quality.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- SHENZHEN ZHENHUA FU ELECTRONICS
- Filing Date
- 2025-07-03
- Publication Date
- 2026-07-24
AI Technical Summary
In the existing technology, the process of fabricating external electrodes on multiple surfaces of chip components is cumbersome, resulting in low production efficiency and quality problems such as misalignment of external electrodes, inconsistent dimensions, and exposed ceramic.
When fabricating chip components, an outer electrode is prefabricated on the carrier layer, and then the inner layer structure, the second outer layer structure, and the first outer layer structure are stacked to reduce the number of steps in fabricating the outer electrode. Roller coating and dip coating processes are used to automatically coat the outer electrode, and high-precision tooling fixtures are used to ensure alignment accuracy.
This reduces the number of steps in the manufacturing and flipping of the external electrode, improving production efficiency, reducing operational complexity, enhancing the alignment accuracy of the external electrode and product quality, and reducing exposed ceramic.
Smart Images

Figure CN120980894B_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of component manufacturing technology, and more specifically, to a chip component and a method for manufacturing the same. Background Technology
[0002] Chip components (such as chip resistors, capacitors, inductors, and filters) are widely used in modern electronic devices due to their advantages of high reliability, high integration density, and high performance. Their manufacturing process includes steps such as slurry preparation, molding, stacking, lamination, cutting, sintering, and external electrode preparation. Among these, external electrode preparation is a crucial step. It typically employs methods such as screen printing, dip coating, or roller coating to uniformly coat the surface or end faces of a ceramic blank. High-temperature sintering then bonds the conductive particles together to form a dense conductive layer, followed by electroplating (such as with nickel or tin) to enhance conductivity and solderability. However, for chip components requiring external electrodes on all six sides and with complex electrode designs, screen printing has significant limitations. This method requires multiple operations such as feeding, printing, baking, changing sides, and unloading to prepare the external electrodes for each side, resulting in cumbersome processes and low production efficiency.
[0003] It should be noted that the information disclosed in the background section above is only used to enhance the understanding of the background of this application, and therefore may include information that does not constitute prior art known to those skilled in the art. Summary of the Invention
[0004] The purpose of this application is to provide a chip component and its manufacturing method, aiming to solve the technical problem of low production efficiency due to complicated processes when fabricating external electrodes on multiple surfaces of chip components in related technologies.
[0005] To achieve the above objectives, the technical solution adopted in this application is as follows:
[0006] This application provides a method for manufacturing a surface-mount component, comprising:
[0007] An inner layer structure is fabricated, the inner layer structure including a dielectric layer and an internal electrode disposed on the surface of the dielectric layer;
[0008] A first outer layer structure and a second outer layer structure are prepared. The first outer layer structure includes a first carrier layer and a first external electrode disposed on a surface of the first carrier layer. The second outer layer structure includes a second carrier layer and a second external electrode disposed on a surface of the second carrier layer.
[0009] The second outer layer structure, the inner layer structure, and the first outer layer structure are stacked to prepare a stacked monomer;
[0010] The stacked monomers are sintered to obtain a sintered body, which includes two first outer surfaces disposed opposite to each other and a plurality of second outer surfaces without electrodes. The two first outer surfaces are respectively provided with first outer electrodes and second outer electrodes.
[0011] An external electrode is fabricated on the second outer surface to obtain a component blank;
[0012] A surface metal layer is prepared on the surface of the first external electrode, the second external electrode, and the external electrode.
[0013] In some implementations, the fabrication of the first outer layer structure and the second outer layer structure includes:
[0014] The first support layer is prepared using ceramic slurry or carbon film slurry, and a first external electrode is prepared on one surface of the first support layer;
[0015] The second carrier layer is prepared using carbon film slurry, and a second external electrode is prepared on one surface of the second carrier layer.
[0016] In some implementations, the step of stacking the second outer layer structure, the inner layer structure, and the first outer layer structure to prepare a stacked monomer includes:
[0017] The second outer layer structure, the inner layer structure, and the first outer layer structure are stacked sequentially from bottom to top to form a stacked blank.
[0018] The laminated blank is cut to form multiple laminated units.
[0019] In some implementations, the step of stacking the second outer structure, the inner structure, and the first outer structure sequentially from bottom to top to form a stacked blank includes:
[0020] The inner layer structure is stacked on the surface of the second carrier layer where the second outer electrode is located, so that the other surface of the second carrier layer facing away from the second outer electrode is exposed.
[0021] The first outer layer structure is stacked on top of the inner layer structure to form a preliminary stack;
[0022] Pressure is applied to the preliminary laminate using an isostatic pressing method to form the laminated blank.
[0023] In some implementations, sintering the stacked monomers includes:
[0024] The laminated monomers are sintered in an oxygen atmosphere.
[0025] In some implementations, the step of fabricating an external electrode on the second outer surface to obtain a component blank includes:
[0026] A conductive layer is prepared on the second outer surface;
[0027] The conductive layer is baked to form the external electrode.
[0028] In some implementations, the fabrication of the conductive layer on the second outer surface includes:
[0029] The conductive layer is prepared by coating silver paste onto the second outer surface.
[0030] In some implementations, before forming the surface metal layer on the surfaces of the first external electrode, the second external electrode, and the external electrode, the manufacturing method further includes:
[0031] The component blank is subjected to a firing operation.
[0032] In some implementations, the fabrication of the inner layer structure includes:
[0033] The dielectric layer is prepared using a ceramic slurry;
[0034] An internal electrode is fabricated on the surface of the dielectric layer.
[0035] This application provides a surface mount component, which is manufactured using any of the surface mount component manufacturing methods described above.
[0036] The main advantages of the chip components and manufacturing method provided in this application are:
[0037] This application pre-fabricates the first and second external electrodes before stacking the second outer layer structure, the inner layer structure, and the first outer layer structure. This reduces the fabrication of two external electrodes on each of the six sides of the chip component, thereby reducing the number of flipping and alignment operations, reducing process steps, lowering operational complexity, reducing production time, and improving production efficiency. Attached Figure Description
[0038] To more clearly illustrate the technical solutions in the embodiments of this application, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0039] Figure 1 This is a schematic flowchart of a method for manufacturing chip components provided in an embodiment of this application;
[0040] Figure 2 This is a schematic diagram of the structure of the chip component provided in the embodiments of this application;
[0041] Figure 3 This is a schematic diagram of the structure of the chip component provided in the embodiments of this application from another perspective;
[0042] Figure 4 This is a schematic diagram of the structure of the first external electrode provided in an embodiment of this application;
[0043] Figure 5 This is a schematic diagram of the structure of the second external electrode provided in an embodiment of this application;
[0044] Figure 6 This is a schematic diagram of the structure of the third external electrode provided in an embodiment of this application;
[0045] Figure 7 This is a schematic diagram of the structure of the fourth external electrode provided in an embodiment of this application;
[0046] Figure 8 This is a schematic diagram of the structure of the fifth external electrode provided in the embodiments of this application;
[0047] Figure 9 This is a schematic diagram of the structure of the sixth external electrode provided in the embodiment of this application.
[0048] Explanation of key figure labels:
[0049] 100. Surface mount component; 101. First external electrode; 102. Second external electrode; 103. Third external electrode; 104. Fourth external electrode; 105. Fifth external electrode; 106. Sixth external electrode. Detailed Implementation
[0050] To make the technical problems, technical solutions, and beneficial effects to be solved by this application clearer, the following detailed description is provided in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and are not intended to limit the scope of this application.
[0051] In related technologies, surface-mount components (such as surface-mount resistors, capacitors, inductors, and filters) are widely used in modern electronic devices due to their advantages of high reliability, high integration density, and high performance. Their manufacturing process includes steps such as slurry preparation, molding, stacking, lamination, cutting, sintering, and external electrode preparation. Among these, external electrode preparation is a crucial step. It typically employs methods such as screen printing, dip coating, or roller coating to uniformly coat the surface or end faces of a ceramic blank. Subsequently, high-temperature sintering allows the conductive particles to bond and form a dense conductive layer, followed by electroplating (such as with nickel or tin) to enhance conductivity and solderability. However, for surface-mount components requiring external electrodes on all six sides and with complex electrode designs, screen printing has significant limitations. This method requires multiple operations such as feeding, printing, baking, changing sides, and unloading to prepare the external electrodes on each side, resulting in cumbersome processes and low production efficiency. Furthermore, insufficient alignment accuracy can easily lead to quality problems such as misalignment of external electrodes, inconsistent dimensions, and exposed ceramic, affecting the electrical performance and reliability of the components.
[0052] Therefore, this application provides a chip component 100 and its manufacturing method to solve the problems in the related technology. The manufacturing method of the chip component and the chip component provided in this application will be described in detail below with reference to the accompanying drawings.
[0053] See Figure 1 As shown in the embodiments of this application, the method for manufacturing chip components can be used to manufacture chip resistors, capacitors, inductors or filters. The manufacturing method may include at least some or all of the following steps S100 to S602.
[0054] Step S100: Prepare an inner layer structure, which includes a dielectric layer and an internal electrode disposed on the surface of the dielectric layer.
[0055] Step S200: Prepare a first outer layer structure and a second outer layer structure. The first outer layer structure includes a first carrier layer and a first external electrode 101 disposed on a surface of the first carrier layer. The second outer layer structure includes a second carrier layer and a second external electrode 102 disposed on a surface of the second carrier layer.
[0056] Step S300: Stack the second outer layer structure, the inner layer structure and the first outer layer structure to prepare a stacked monomer;
[0057] Step S400: Sinter the stacked monomers to obtain a sintered body. The sintered body includes two first outer surfaces arranged opposite to each other and a plurality of second outer surfaces without electrodes. The two first outer surfaces are respectively provided with a first outer electrode 101 and a second outer electrode 102.
[0058] Step S500: Prepare an external electrode on the second outer surface to obtain a component blank.
[0059] Step S600: Prepare a surface metal layer on the surface of the first external electrode 101, the second external electrode 102 and the external electrode.
[0060] The manufacturing method of the chip component provided in this application pre-fabricates the first external electrode 101 and the second external electrode 102 before stacking the second outer layer structure, the inner layer structure and the first outer layer structure. In this way, for the chip component 100 that needs to have external electrodes on all six sides, the subsequent fabrication of external electrodes on two sides can be reduced, thereby reducing multiple flipping and alignment operations, reducing process steps, reducing operational complexity, reducing production time and improving production efficiency.
[0061] In step S100, when fabricating the internal electrode on the surface of the dielectric layer, the internal electrode can be fabricated on only one surface of the dielectric layer, i.e., an internal electrode is fabricated on one side of each dielectric layer. There can be multiple internal layer structures, and the specific number can be designed according to needs. When there are multiple internal layer structures, in step S300, the multiple internal layer structures are stacked sequentially; when multiple internal layer structures are stacked, the surface of each dielectric layer with the internal electrode faces the same direction, and the multiple internal layer structures remain located between the second outer layer structure and the first outer layer structure. It should be noted that in some other possible embodiments, internal electrodes can also be fabricated on both sides of the dielectric layer.
[0062] In some embodiments, for step 100, the method for preparing the inner layer structure includes:
[0063] Step S101: Prepare a dielectric layer using a ceramic slurry. The dielectric layer prepared in this way can have insulation properties and provide the required dielectric constant. For example, the ceramic slurry is prepared into a dielectric layer by a casting process.
[0064] Step S102: Fabricate an internal electrode on the surface of the dielectric layer. For example, an internal electrode is fabricated on one surface of the dielectric layer using silver paste via screen printing, thus obtaining a dielectric layer with printed internal electrodes. It is understood that when there are multiple inner layer structures, multiple dielectric layers can be fabricated first, and then internal electrodes can be fabricated on the surface of each dielectric layer. This facilitates mass production, reduces operational complexity, shortens production time, and improves production efficiency.
[0065] In some embodiments, the method for preparing the first outer layer structure and the second outer layer structure in step S200 includes:
[0066] Step S201: Prepare a first carrier layer using a ceramic slurry or a carbon film slurry, and prepare a first external electrode 101 on one surface of the first carrier layer, thus obtaining the first outer layer structure. For example, the first external electrode 101 can be prepared on only one surface of the first carrier layer, meaning that only one of the two opposing surfaces of the first carrier layer has the first external electrode 101. Firstly, the first carrier layer can be prepared from a ceramic slurry using a casting process; alternatively, the first carrier layer can be prepared from a carbon film slurry using a casting process. The thickness of the first carrier layer prepared from the carbon film slurry can be 20μm-50μm, specifically 20μm, 25μm, 30μm, 35μm, 40μm, 45μm, or 50μm. The carbon film slurry can include graphite powder, a binder, and an organic solvent. The carbon film slurry can be prepared by ball milling to uniformly mix the graphite powder, binder, and organic solvent. Then, according to a preset pattern, electrode paste (e.g., silver paste) can be printed onto the surface of the first carrier layer using a printing process to form the first external electrode 101. It is understood that step S201 can be executed after step S102; furthermore, the preset pattern used for the first external electrode 101 can be designed to be regular or irregular as needed; the appearance of the first external electrode 101 is shown in [reference needed]. Figure 4 As shown.
[0067] Step S202: A second carrier layer is prepared using a carbon film paste, and a second external electrode 102 is prepared on one surface of the second carrier layer, thus obtaining the second outer layer structure. For example, the second external electrode 102 is prepared only on one surface of the second carrier layer, meaning that only one of the two opposing surfaces of the second carrier layer has the second external electrode 102. First, the carbon film paste can be prepared into a second carrier layer using a casting process. The thickness of the second carrier layer made with the carbon film paste can be 20μm-50μm, specifically 20μm, 25μm, 30μm, 35μm, 40μm, 45μm, or 50μm. The carbon film paste can include graphite powder, binder, and organic solvent. The carbon film paste can be prepared by ball milling to uniformly mix the graphite powder, binder, and organic solvent. Then, according to a preset pattern, electrode paste (e.g., silver paste) can be printed onto the surface of the second carrier layer using a printing process to form the second external electrode 102. It is understandable that the preset pattern used for the second external electrode 102 can be designed to be regular or irregular as needed. See [reference needed] for the external shape of the second external electrode 102. Figure 5 As shown.
[0068] It should be noted that when the first support layer is prepared using ceramic slurry, the first support layer and the dielectric layer can have the same structure. Therefore, when preparing multiple dielectric layers, the first support layer can also be prepared. When the first support layer is prepared using carbon film slurry, the first support layer and the second support layer can have the same structure. Therefore, the first and second support layers can be prepared first, and then the first external electrode 101 and the second external electrode 102 can be prepared. This facilitates mass production, reduces operational complexity, shortens production time, and improves production efficiency. When the support layer (first support layer and / or second support layer) is prepared using carbon film slurry, the support layer can act as a sacrificial layer. During the sintering of the laminated monomers, the sacrificial layer can react with oxygen to generate carbon dioxide, thereby removing it and exposing the external electrodes (first external electrode 101 and / or second external electrode 102) on the support layer.
[0069] In some embodiments, for step S300, the method of stacking a second outer layer structure, an inner layer structure, and a first outer layer structure to prepare a stacked monomer includes:
[0070] Step S301: The second outer layer structure, the inner layer structure, and the first outer layer structure are stacked sequentially from bottom to top to form a stacked blank. This allows for the fabrication of chip components through stacking. Since there are multiple inner layer structures, these multiple inner layer structures are located between the second outer layer structure and the first outer layer structure.
[0071] For step S301, the method of stacking the second outer layer structure, the inner layer structure, and the first outer layer structure sequentially from bottom to top to form a stacked blank includes:
[0072] Step S3011: The inner layer structure is stacked on the surface of the second carrier layer where the second external electrode 102 is located, so that the other surface of the second carrier layer facing away from the second external electrode 102 is exposed. This allows the second carrier layer to protect the second external electrode 102 and ensure the integrity of the second external electrode 102 during sintering. Multiple inner layer structures are located on the surface of the second carrier layer where the second external electrode 102 is located, thus exposing the other surface of the second carrier layer facing away from the second external electrode 102; no electrode is located on the other surface of the second carrier layer facing away from the second external electrode 102. For example, step S3011 can be executed after step S202.
[0073] Step S3012: The first outer layer structure is stacked on top of the inner layer structure to form a preliminary laminate, thus the inner layer structure is sandwiched between the first and second outer layer structures. For example, the preliminary laminate can also be called a block. It should be noted that when the first support layer of the first outer layer structure is prepared using ceramic slurry, the surface of the first support layer with the first external electrode 101 faces away from the inner layer structure, and the other surface of the first support layer faces the inner layer structure; when the first support layer of the first outer layer structure is prepared using carbon film slurry, the surface of the first support layer with the first external electrode 101 faces the inner layer structure, and the other surface of the first support layer faces away from the inner layer structure.
[0074] Step S3013: Apply isostatic pressing to the preliminary laminate to form a laminated green body. Isostatic pressing is a process of compacting materials by applying uniform pressure in a liquid or gaseous medium. Isostatic pressing can apply uniform pressure from all directions, reducing internal stress concentration and improving the density and consistency of the laminated green body. During the application of pressure using isostatic pressing, the maximum temperature is 70℃-80℃. This temperature range helps soften the binder (such as organic binder) in the ceramic green body, making it easier to deform and bond under pressure. The holding pressure is 10MPa-30MPa, which ensures sufficient compaction between layers, removes voids, and improves density. The holding time is 2min-10min, which avoids excessive material deformation or excessive binder flow due to prolonged holding time. In isostatic pressing, the "maximum temperature" refers to the temperature maintained during the holding pressure process. Specifically, it refers to the ambient temperature of the preliminary laminated body during the application of 10MPa-30MPa pressure and the holding time of 2min-10min. During isostatic pressing, the preliminary laminate is placed in a sealed pressure vessel, where uniform pressure is transmitted through a liquid (such as water or oil) while the laminate is heated to 70°C-80°C and maintained at that temperature to ensure full bonding between the layers and eliminate voids. For example, during the isostatic pressing process, the temperature can be 70°C, 75°C, or 80°C; the holding pressure can be 10 MPa, 20 MPa, or 30 MPa; and the holding time can be 2 min, 3 min, 5 min, 6 min, or 10 min; where min represents minutes.
[0075] Step S302: Cut the laminated blank to form multiple laminated units. After performing step S3013, step S302 can be performed to cut the laminated blank into multiple unit structures, i.e., laminated units.
[0076] Before performing step S400, the manufacturing method of the chip component also includes:
[0077] Step S310: Perform a debinding process on the laminated monomers. Debinding involves heat-treating the laminated blanks after cutting them to remove adhesives and other organic matter, ensuring that the ceramic body will not develop defects (such as cracks or pores) due to residual organic matter during subsequent sintering. For example, the laminated monomers can be placed on a firing plate and heated to perform the debinding process. The other surface of the second supporting layer, facing away from the second external electrode 102, is in contact with the firing plate; that is, the second external electrode 102 is not in contact with the firing plate. This prevents the second external electrode 102 from melting and sticking to the firing plate during sintering. Step S310 can be performed after step S302, and after completing step S310, step S400 can be performed.
[0078] In some embodiments, step S400, the method for sintering the laminated monomers includes: sintering the laminated monomers in an oxygen-containing atmosphere, which allows the preparation of a support layer (a first support layer and / or a second support layer) using a carbon film slurry. This slurry reacts with oxygen to generate carbon dioxide, thereby removing the support layer and exposing the external electrodes (a first external electrode 101 and / or a second external electrode 102). After debinding, the laminated monomers placed on the sintering plate are then sintered. During sintering, the other surface of the second support layer in the laminated monomers, facing away from the second external electrode 102, contacts the sintering plate. Sintering is carried out in an oxygen-containing environment, with a maximum sintering temperature of 850℃-900℃ and a holding time of 15min-120min. "Maximum temperature" refers to the temperature maintained during the heat preservation process; for example, the temperature during the heat preservation process is 850℃, 870℃, or 900℃; the heat preservation time is 15min, 30min, 45min, 60min, 90min, 100min, or 120min. After sintering, the sintered body forms a ceramic body (i.e., a sintered body) having a first external electrode 101 and a second external electrode 102, which are arranged opposite to each other. The sintered body may have six outer surfaces, two of which are called first outer surfaces and the other four are called second outer surfaces; the first external electrode 101 is located on one of the first outer surfaces, and the second external electrode 102 is located on the other first outer surface.
[0079] In some embodiments, the method for preparing an external electrode on the second outer surface in step S500 to obtain a component blank includes:
[0080] Step S501: Prepare a conductive layer on the second outer surface.
[0081] Step S502: Bake the conductive layer to form an external electrode.
[0082] There are four second outer surfaces, divided into two subgroups. Each subgroup has two second outer surfaces, which are arranged opposite to each other. The outer electrodes on the two outer surfaces in one subgroup are the third outer electrode 103 and the fourth outer electrode 104, respectively; the outer electrodes on the two outer surfaces in the other subgroup are the fifth outer electrode 105 and the sixth outer electrode 106, respectively. This method of fabricating outer electrodes on the second outer surfaces to obtain a component blank is used to fabricate four outer electrodes. The fabrication of the third outer electrode 103, the fourth outer electrode 104, the fifth outer electrode 105, and the sixth outer electrode 106 all require steps S501 and S502. That is, when fabricating outer electrodes on the second outer surfaces, steps S501 and S502 need to be repeated. For example, when fabricating the third outer electrode 103, steps S501 and S502 need to be performed; when fabricating the fourth outer electrode 104, steps S501 and S502 also need to be performed. It should be noted that the third external electrode 103, the fourth external electrode 104, the fifth external electrode 105, and the sixth external electrode 106 can be connected to the internal electrode as needed. The first external electrode 101, the second external electrode 102, the third external electrode 103, the fourth external electrode 104, the fifth external electrode 105, and the sixth external electrode 106 can be connected to each other or not; the specific design can be customized as needed, and this application does not impose any limitations.
[0083] For step S501, when preparing the conductive layer on the second outer surface, the sintered body with the first outer electrode 101 and the second outer electrode 102 can be fixed in a tooling fixture to ensure the accuracy of the position during the preparation of the conductive layer. The tooling fixture includes, but is not limited to, paper tape, thin plastic sheet, and jig board (JIG board). When the tooling fixture is designed with paper tape or thin plastic sheet, the size of the holes on the tooling fixture for placing the sintered body is 30μm-100μm smaller than the size of the sintered body, and the size of the holes on the tooling fixture for placing the sintered body is 30μm, 50μm, 60μm, or 100μm smaller than the size of the sintered body. When the tooling fixture is a JIG board, the size of the holes on the tooling fixture for placing the sintered body is 5μm-20μm larger than the size of the sintered body, and the size of the holes on the tooling fixture for placing the sintered body is 5μm, 10μm, 15μm, or 20μm larger than the size of the sintered body. The shape of the pores is adapted to the shape of the sintered body. The accuracy of the pore size is controlled within ±3μm, that is, the actual size of the pores is within ±3 micrometers of the designed size.
[0084] In some embodiments, the method for preparing a conductive layer on the second outer surface in step S501 includes: coating silver paste onto the second outer surface to prepare the conductive layer. Exemplarily, the silver paste can be coated onto the second outer surface using a roller coating process or an adhesive coating process, thereby achieving the preparation of the conductive layer.
[0085] After the conductive layer is prepared, the sintered body with the conductive layer is removed from the tooling fixture, and then step S502 is performed to bake the conductive layer to evaporate the organic solvent in the silver paste. It is understood that the pattern used for the external electrodes can be designed to be regular as needed. The patterns of the third external electrode 103, the fourth external electrode 104, the fifth external electrode 105, and the sixth external electrode 106 can be found in [reference needed]. Figures 6 to 9 As shown. When baking the conductive layer, the baking temperature is 100℃-140℃, and the time is 10min-40min, that is, baking is carried out continuously for 10min to 40min at the baking temperature; for example, the baking temperature is 100℃, 110℃, 120℃, 130℃ or 140℃; the time can be 10min, 15min, 20min, 25min, 30min, 35min or 40min.
[0086] In some embodiments, before performing step S600, that is, before preparing the surface metal layer on the surfaces of the first external electrode 101, the second external electrode 102 and the external electrode, the method for manufacturing wafer components further includes step S510, performing a burn-in operation on the component blank.
[0087] When preparing the external electrodes on the second outer surface, the third external electrode 103 and the fourth external electrode 104 can be prepared first, followed by the fifth external electrode 105 and the sixth external electrode 106. After preparing the third external electrode 103 and the fourth external electrode 104, an initial burn-in operation can be performed on them. After preparing the fifth external electrode 105 and the sixth external electrode 106, i.e., after external electrodes are prepared on all the second outer surfaces, the third external electrode 103, the fourth external electrode 104, the fifth external electrode 105, and the sixth external electrode 106 are then subjected to a burn-in operation. The burn-in operation utilizes high temperature (450℃-750℃) to completely decompose the organic components in the slurry used to prepare the external electrodes, thereby achieving a good connection between the external electrodes and the internal electrodes.
[0088] The following section, in conjunction with the above descriptions of steps S501, S502, and S510, provides a detailed description of the preparation and burning-off operation of the external electrode on the second outer surface.
[0089] 1. Fabrication of the third external electrode 103 and the fourth external electrode 104
[0090] Step S501: Fix the sintered body having the first external electrode 101 and the second external electrode 102 in a tooling fixture; apply silver paste to a second external surface by a roller coating process or an adhesive coating process to prepare a conductive layer for forming the third external electrode 103.
[0091] Step S502: The conductive layer used to form the third external electrode 103 is baked to dry the silver paste, thereby forming the third external electrode 103. The baking temperature is 100℃-130℃, and the time is 10min-40min. For example, the baking temperature is 100℃, 110℃, 120℃, 125℃, or 130℃; the time can be 10min, 15min, 20min, 25min, 30min, 35min, or 40min.
[0092] Step S501: With the second outer surface having the third outer electrode 103 facing down and the other opposite second outer surface facing up, silver paste is applied to the upward-facing second outer surface by a roller coating process or an adhesive coating process to prepare a conductive layer for forming the fourth outer electrode 104.
[0093] Step S502: The conductive layer used to form the fourth external electrode 104 is baked to dry the silver paste, thereby forming the fourth external electrode 104. The baking temperature is 100℃-130℃, and the baking time is 10min-40min. For example, the baking temperature is 100℃, 110℃, 120℃, 125℃, or 130℃; the baking time can be 10min, 15min, 20min, 25min, 30min, 35min, or 40min.
[0094] Step S510: After the third external electrode 103 and the fourth external electrode 104 are prepared, the third external electrode 103 and the fourth external electrode 104 are initially sintered using a tunnel furnace. The number of sintering temperature zones is 7-9, the sintering temperature is 450℃-600℃, and the holding time is 10min-30min. The sintering temperature zone refers to the set temperature control area in the tunnel furnace used for sintering the external electrodes. A tunnel furnace is a continuous heat treatment equipment, typically divided into multiple temperature zones, each with independently controllable temperature to achieve gradual heating, holding, and cooling of the product. The number of 7-9 sintering temperature zones indicates that the sintering process section of the tunnel furnace is divided into 7 to 9 independent temperature control areas. The burning end temperature of 450℃-600℃ refers to the temperature required for the initial burning of the third external electrode 103 and the fourth external electrode 104, and the holding temperature is maintained at this burning end temperature; for example, the burning end temperature is 450℃, 500℃, 550℃, 575℃ or 600℃; the holding time is 10min, 15min, 20min, 25min or 30min.
[0095] 2. Fabrication of the fifth external electrode 105 and the sixth external electrode 106
[0096] Step S501: Fix the sintered body having a first external electrode 101, a second external electrode 102, a third external electrode 103, and a fourth external electrode 104 in a tooling fixture. Apply silver paste to a second external surface using a roller coating process or an adhesive coating process to prepare a conductive layer for forming the fifth external electrode 105.
[0097] Step S502: The conductive layer used to form the fifth external electrode 105 is baked to dry the silver paste, thereby forming the fifth external electrode 105. The baking temperature is 100℃-140℃, and the time is 10min-40min. For example, the baking temperature is 100℃, 110℃, 120℃, 130℃, or 140℃; the time can be 10min, 15min, 20min, 25min, 30min, 35min, or 40min.
[0098] Step S501: With the second outer surface having the fifth outer electrode 105 facing down and the other second outer surface facing up, silver paste is applied to the upward-facing second outer surface by a roller coating process or an adhesive coating process to prepare a conductive layer for forming the sixth outer electrode 106.
[0099] Step S502: The conductive layer used to form the sixth external electrode 106 is baked to dry the silver paste, thereby forming the sixth external electrode 106. The baking temperature is 100℃-140℃, and the baking time is 10min-40min. For example, the baking temperature is 100℃, 110℃, 120℃, 130℃, or 140℃; the baking time can be 10min, 15min, 20min, 25min, 30min, 35min, or 40min.
[0100] Step S510: After preparing the fifth external electrode 105 and the sixth external electrode 106, the third external electrode 103, the fourth external electrode 104, the fifth external electrode 105, and the sixth external electrode 106 are subjected to final firing at the ends using a tunnel furnace. The number of firing temperature zones is 7-9, the firing temperature is 620℃-720℃, and the holding time is 10min-30min. For example, the firing temperature is 620℃, 650℃, 680℃, 700℃, or 720℃; the holding time is 10min, 15min, 20min, 25min, or 30min.
[0101] By repeating steps S501, S502, and S510, the preparation and burning-off operation of the external electrode on the second outer surface are completed.
[0102] In some embodiments, for step S600, the method of preparing a surface metal layer on the surfaces of the first external electrode 101, the second external electrode 102, and the external electrode includes:
[0103] Step S601: Prepare a first metal layer on the surfaces of the first external electrode 101, the second external electrode 102, and the external electrodes. For example, the first metal layer is prepared on the surfaces of the first external electrode 101, the second external electrode 102, the third external electrode 103, the fourth external electrode 104, the fifth external electrode 105, and the sixth external electrode 106 by electroplating. The material of the first metal layer is nickel; the electroplating time is 60 min-120 min, specifically, the electroplating time can be 60 min, 80 min, 90 min, 100 min, 110 min, or 120 min; the thickness of the first metal layer is 2 μm-8 μm, specifically, the thickness of the first metal layer is 2 μm, 3 μm, 4 μm, 5 μm, 6 μm, or 8 μm.
[0104] Step S602: A second metal layer is prepared on the surface of the first metal layer, wherein the surface metal layer includes the first metal layer and the second metal layer. After the second metal layer is prepared, the chip device 100 is formed. For example, after the first metal layer is prepared on the surfaces of the first external electrode 101, the second external electrode 102, the third external electrode 103, the fourth external electrode 104, the fifth external electrode 105, and the sixth external electrode 106, the second metal layer is prepared on the first metal layer by electroplating metal. The material of the second metal layer is tin. The electroplating time is 60 min-120 min, specifically, the electroplating time can be 60 min, 80 min, 90 min, 100 min, 110 min, or 120 min. The thickness of the second metal layer is 6 μm-12 μm, specifically, the thickness of the second metal layer is 6 μm, 7 μm, 8 μm, 9 μm, 10 μm, or 12 μm.
[0105] This application provides a surface mount component 100, manufactured using the surface mount component manufacturing method provided in any of the above embodiments. (In conjunction with...) Figure 2 and Figure 3 As shown, the chip component 100 includes a ceramic body and a first external electrode 101, a second external electrode 102, a third external electrode 103, a fourth external electrode 104, a fifth external electrode 105 and a sixth external electrode 106 disposed on the outer surface of the ceramic body.
[0106] In summary, the chip component 100 and its manufacturing method provided in this application begin manufacturing the first external electrode 101 and the second external electrode 102 during the preparation of the carrier layer. Then, the third external electrode 103, the fourth external electrode 104, the fifth external electrode 105, and the sixth external electrode 106 are prepared using automated coating methods such as roller coating and / or dip coating. This reduces production steps and improves automation and production efficiency. Furthermore, the roller coating and / or dip coating process, combined with high-precision tooling fixtures, ensures the alignment accuracy of the external electrodes, produces uniformly sized external electrodes, and reduces the occurrence of exposed ceramic.
[0107] It should be understood that, in the embodiments of this application, unless otherwise expressly specified and limited, the terms "connection," "fixed connection," "contact," etc., should be interpreted broadly. Those skilled in the art can understand the specific meanings of the various terms in the embodiments of this application according to the specific circumstances.
[0108] For example, the "connection" can be a fixed connection, a rotating connection, a flexible connection, a sliding connection, a one-piece molding, an electrical connection, a contact connection, or other connection methods; it can be a direct connection, or an indirect connection through an intermediate medium, or a connection within two components or an interaction between two components.
[0109] For example, a "fixed connection" can be a component that can be directly or indirectly fixedly connected to another component; a fixed connection can include mechanical connection, welding, bonding or integral molding, etc., wherein mechanical connection can include riveting, bolting, threaded connection, keying, snap-fit connection, locking connection, plugging, etc., and bonding can include adhesive bonding and solvent bonding, etc.
[0110] It should also be understood that the “parallel” or “perpendicular” described in the embodiments of this application can be understood as “approximately parallel” or “approximately perpendicular”.
[0111] It should also be understood that the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Features specified as "first" or "second" may explicitly or implicitly include one or more of that feature.
[0112] In the embodiments of this application, unless otherwise expressly specified and limited, "above" or "below" the second feature can mean that the first feature and the second feature are in direct contact, or that the first feature and the second feature are in indirect contact through an intermediate medium. Furthermore, "above," "on top of," and "over" the second feature can mean that the first feature is directly above or diagonally above the second feature, or simply that the first feature is at a higher horizontal level than the second feature. "Below," "below," and "under" the second feature can mean that the first feature is directly below or diagonally below the second feature, or simply that the first feature is at a lower horizontal level than the second feature.
[0113] It should also be understood that the terms “length,” “width,” “up,” “down,” “front,” “back,” “left,” “right,” “vertical,” “horizontal,” “top,” “bottom,” “inner,” and “outer,” etc., indicate the orientation or positional relationship (if any) based on the orientation or positional relationship shown in the accompanying drawings, and are only for the convenience of describing this application and simplifying the description, and are not intended to indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of this application.
[0114] The above description is merely a specific embodiment of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the technical scope disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of protection of the claims. In conclusion, the above description is merely a preferred embodiment of the technical solution of this application and is not intended to limit the scope of protection of this application. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this application should be included within the scope of protection of this application.
Claims
1. A method for manufacturing a surface-mount component, characterized in that, include: An inner layer structure is fabricated, the inner layer structure including a dielectric layer and an internal electrode disposed on the surface of the dielectric layer; Fabricating a first outer layer structure and a second outer layer structure, wherein the first outer layer structure includes a first carrier layer and a first external electrode disposed on a surface of the first carrier layer, and the second outer layer structure includes a second carrier layer and a second external electrode disposed on a surface of the second carrier layer; the fabrication of the first outer layer structure and the second outer layer structure includes: fabricating the first carrier layer using a ceramic slurry or a carbon film slurry, and fabricating the first external electrode on a surface of the first carrier layer; fabricating the second carrier layer using a carbon film slurry, and fabricating the second external electrode on a surface of the second carrier layer; The second outer layer structure, the inner layer structure, and the first outer layer structure are stacked to prepare a stacked monomer; The laminated monomers are sintered to obtain a sintered body, the sintered body including two first outer surfaces disposed opposite each other and a plurality of second outer surfaces without electrodes, the two first outer surfaces respectively being provided with first outer electrodes and second outer electrodes; the sintering of the laminated monomers includes: placing the laminated monomers in an oxygen atmosphere for sintering; An external electrode is fabricated on the second outer surface to obtain a component blank; A surface metal layer is prepared on the surface of the first external electrode, the second external electrode, and the external electrode.
2. The method for manufacturing a surface-mount component as described in claim 1, characterized in that, The step of stacking the second outer layer structure, the inner layer structure, and the first outer layer structure to prepare a stacked monomer includes: The second outer layer structure, the inner layer structure, and the first outer layer structure are stacked sequentially from bottom to top to form a stacked blank. The laminated blank is cut to form multiple laminated units.
3. The method for manufacturing a surface-mount component as described in claim 2, characterized in that, The step of stacking the second outer layer structure, the inner layer structure, and the first outer layer structure sequentially from bottom to top to form a stacked blank includes: The inner layer structure is stacked on the surface of the second carrier layer where the second outer electrode is located, so that the other surface of the second carrier layer facing away from the second outer electrode is exposed. The first outer layer structure is stacked on top of the inner layer structure to form a preliminary stack; Pressure is applied to the preliminary laminate using an isostatic pressing method to form the laminated blank.
4. The method for manufacturing a surface-mount component as described in claim 1, characterized in that, The step of fabricating an external electrode on the second outer surface to obtain a component blank includes: A conductive layer is prepared on the second outer surface; The conductive layer is baked to form the external electrode.
5. The method for manufacturing a surface-mount component as described in claim 4, characterized in that, The preparation of a conductive layer on the second outer surface includes: The conductive layer is prepared by coating silver paste onto the second outer surface.
6. The method for manufacturing a surface-mount component as described in claim 4 or 5, characterized in that, Before forming the surface metal layer on the surfaces of the first external electrode, the second external electrode, and the external electrode, the manufacturing method further includes: The component blank is subjected to a firing operation.
7. The method for manufacturing a surface-mount component according to any one of claims 1-3, 4 and 5, characterized in that, The preparation of the inner layer structure includes: The dielectric layer is prepared using a ceramic slurry; An internal electrode is fabricated on the surface of the dielectric layer.
8. A surface-mount component, characterized in that, It is manufactured using the manufacturing method of any one of claims 1-7.