Solar cell preparation method, solar cell, laminated cell and photovoltaic module

Abstract

The invention relates to the technical field of solar cells, in particular to a solar cell preparation method, a solar cell, a laminated cell and a photovoltaic module. The preparation method comprises the following steps: preparing a tunneling oxide layer on a first surface of a substrate; depositing polycrystalline silicon on the surface of the tunneling oxide layer along the thickness direction under a first deposition condition, and gradually reducing to a second deposition condition from the first deposition condition; and performing phosphorus diffusion doping on the polycrystalline silicon layer under a first doping condition, and converting the polycrystalline silicon layer into a doped polycrystalline silicon layer. According to the method, the polycrystalline silicon layer with the gradually-changed crystallization rate is formed by setting the deposition conditions to be gradually reduced, so that the doped polycrystalline silicon layer with the gradually-changed doping concentration is formed during phosphorus diffusion, the side, close to the substrate, of the doped polycrystalline silicon layer has the low doping concentration, diffusion of phosphorus atoms can be effectively blocked, the risk that the phosphorus atoms penetrate through the substrate in an expanding mode is reduced, and the passivation level is improved. Meanwhile, the side, away from the substrate, of the doped polycrystalline silicon layer has high doping concentration, metal contact is facilitated, and the conversion efficiency is improved.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of solar cells, in particular to a solar cell preparation method, a solar cell, a stacked cell and a photovoltaic module. BACKGROUND

[0002] A solar cell (or a photoelectric cell, a photovoltaic cell) is a kind of photoelectric semiconductor wafer that directly generates electricity by using sunlight. When sunlight shines on the surface of the solar cell, photons are absorbed and electrons are excited to form an electric current, generating electric energy. Among them, the TOPCon (Tunnel Oxide Passivated Contact) cell is a kind of high-efficiency solar cell that has attracted much attention in the photovoltaic field in recent years.

[0003] The TOPCon cell is a kind of tunnel oxide passivation contact solar cell based on the principle of selective carrier. The cell structure is generally an N-type silicon substrate cell, a layer of tunnel oxide layer is prepared on the back surface of the cell, and then a layer of doped polysilicon layer is deposited, and the two together form a passivation contact structure. This structure can selectively allow the majority carriers to pass through the back surface and block the minority carriers, thereby effectively reducing surface recombination and metal contact recombination, thereby achieving higher photoelectric conversion efficiency.

[0004] At present, the crystallization rate and doping concentration of the doped polysilicon layer are low. Directly increasing the crystallization rate is easy to cause the problem of film explosion, affecting the passivation level. Directly increasing the doping concentration is easy to cause the substrate doping concentration to be too high, resulting in serious internal expansion and even expansion through phenomenon, thereby reducing the open-circuit voltage, fill factor and conversion rate of the cell. SUMMARY

[0005] The present application provides a solar cell preparation method, a solar cell, a stacked cell and a photovoltaic module, aiming to.

[0006] In a first aspect, the present application provides a solar cell preparation method, which comprises: preparing a tunnel oxide layer on a first surface of a substrate; depositing a polysilicon layer on the surface of the tunnel oxide layer along the thickness direction under a first deposition condition, and gradually reducing the first deposition condition to a second deposition condition; performing phosphorus diffusion doping on the polysilicon layer under a first doping condition, so as to convert the polysilicon layer into a doped polysilicon layer.

[0007] In a possible design, the first deposition condition is linearly reduced to the second deposition condition.

[0008] In a possible design, in the first deposition condition, the deposition temperature is 580-630 ℃, the silane flow rate is 1000-1800 sccm, and the deposition pressure is 300-400 mTorr. In the second deposition condition, the deposition temperature is 530-580 ℃, the silane flow rate is 600-1000 sccm, and the deposition pressure is 200-300 mTorr. In the process of depositing the polysilicon layer along the surface of the tunneling oxide layer in the thickness direction, the deposition time from the first deposition condition to the second deposition condition is 850-1700 s.

[0009] In a possible design, in the process of performing phosphorus diffusion doping on the polysilicon layer in the first doping condition, the preparation method further includes: The phosphorus diffusion doping on the polysilicon layer is performed by using phosphorus oxychloride as a phosphorus source, and the phosphorus oxychloride is carried by nitrogen.

[0010] In a possible design, in the first doping condition, the diffusion temperature is 800-850 ℃, the diffusion time is 15-30 min, and the nitrogen flow rate is 1200-1800 sccm.

[0011] In a possible design, after the process of performing phosphorus diffusion doping on the polysilicon layer in the first doping condition, the preparation method further includes: The diffusion temperature is increased to 880-930 ℃, and the diffusion time is 30-50 min.

[0012] The embodiment of the present application provides a solar cell in a second aspect, and the solar cell is manufactured by using the solar cell preparation method. A substrate, the substrate has a first surface; A tunneling oxide layer, the tunneling oxide layer is arranged on the first surface; A doped polysilicon layer, the doped polysilicon layer is arranged on a side of the tunneling oxide layer away from the first surface, the crystallization rate of the doped polysilicon layer on a side away from the substrate is greater than the crystallization rate on a side close to the substrate, and the doping concentration of the doped polysilicon layer on the side away from the substrate is greater than the doping concentration on the side close to the substrate.

[0013] In a possible design, the doping concentration of the doped polysilicon layer on the side away from the substrate is 3×10 20 atom / cm 3 -5×10 20 atom / cm 3 .

[0014] In a possible design, the doping concentration of the doped polysilicon layer near the side of the substrate is 1*10 20 atom / cm 3 -2*10 20 atom / cm 3 .

[0015] In a possible design, the crystallization rate of the doped polysilicon layer far from the side of the substrate is 90%-95%.

[0016] In a possible design, the crystallization rate of the doped polysilicon layer near the side of the substrate is 85%-90%.

[0017] In a possible design, the doping concentration of the tunneling oxide layer is 1*10 19 atom / cm 3 -2*10 19 atom / cm 3 .

[0018] In a possible design, the thickness of the polysilicon layer is 85 nm-170 nm.

[0019] Embodiments of the present application provide a laminated battery in a third aspect, which comprises a top battery, an intermediate connecting layer and a bottom battery, wherein the intermediate connecting layer is connected between the top battery and the bottom battery. The top battery is one of a perovskite battery, a cadmium telluride solar cell, a copper indium gallium selenide solar cell or a gallium arsenide solar cell, and the bottom battery is the above-mentioned solar cell.

[0020] Embodiments of the present application provide a photovoltaic module in a fourth aspect, which comprises a first cover plate, a first adhesive film, a battery string, a second adhesive film and a second cover plate arranged in layers. The battery string comprises a plurality of electrically connected solar cells or laminated batteries, wherein the solar cell is the above-mentioned solar cell, and the laminated battery is the above-mentioned laminated battery.

[0021] The beneficial effects of embodiments of the present application are that by adjusting the deposition conditions, the side of the doped polysilicon layer near the substrate has a low crystallization rate, which can effectively block the diffusion of phosphorus atoms, reduce the risk of phosphorus atoms damaging the tunneling oxide layer, thereby reducing the risk of phosphorus atoms penetrating the substrate, thereby facilitating the improvement of the passivation level. At the same time, the side of the prepared doped polysilicon layer far from the substrate has a high crystallization rate and a high phosphorus doping concentration, which is conducive to metal contact and reduces the risk of metal recombination, thereby facilitating the improvement of the photoelectric conversion efficiency of the solar cell.

[0022] It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the application, as claimed. BRIEF DESCRIPTION OF DRAWINGS

[0023] Figure 1 Cross-sectional schematic view of a photovoltaic module according to the present application; Figure 2 Cross-sectional schematic view of a solar cell according to the present application; Figure 3 Graph showing the gradual decrease of the deposition conditions in the preparation of a solar cell according to the present application in one embodiment; Figure 4 Graph showing the gradual decrease of the deposition conditions in the preparation of a solar cell according to the present application in another embodiment; Figure 5 3D microscope image of the doped poly layer in a solar cell of Comparative Set 2; Figure 6 3D microscope image of the doped poly layer in a solar cell of Example 1; Figure 7 Graph showing the distribution of the doping concentration in the doped poly layer in a solar cell of Comparative Set 3; Figure 8 Graph showing the distribution of the doping concentration in the doped poly layer in a solar cell of Example 1.

[0024] REFERENCE NUMERALS: 100 - photovoltaic module; 101 - first superstrate; 102 - first encapsulant; 103 - string of cells; 104 - second encapsulant; 105 - second superstrate; 10 - solar cell; 11 - substrate; 11a - first side; 11b - second side; 12 - tunnel oxide layer; 13 - doped poly layer; 14 - back surface anti-reflective layer; 15 - back surface electrode; 16 - emitter; 17 - passivation layer; 18 - front surface anti-reflective layer; 19 - front surface electrode.

[0025] The accompanying drawings, which are incorporated in and form part of this specification, illustrate embodiments consistent with this application and, together with the description, serve to explain the principles of this application. Detailed Implementation

[0026] To better understand the technical solution of this application, the embodiments of this application will be described in detail below with reference to the accompanying drawings.

[0027] It should be understood that the described embodiments are merely some, not all, of the embodiments in this application. All other embodiments obtained by those skilled in the art based on the embodiments in this application without inventive effort are within the scope of protection of this application.

[0028] The terminology used in the embodiments of this application is for the purpose of describing particular embodiments only and is not intended to be limiting of this application. The singular forms “a,” “the,” and “the” used in the embodiments of this application and the appended claims are also intended to include the plural forms unless the context clearly indicates otherwise.

[0029] It should be understood that the term "and / or" used in this article is merely a description of the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A existing alone, A and B existing simultaneously, and B existing alone. Additionally, the character " / " in this article generally indicates that the preceding and following related objects have an "or" relationship.

[0030] It should be noted that the directional terms such as "upper," "lower," "left," and "right" described in the embodiments of this application are used to describe the angles shown in the accompanying drawings and should not be construed as limiting the embodiments of this application. Furthermore, in the context, it should be understood that when it is mentioned that an element is connected "upper" or "lower" to another element, it can be directly connected to the other element "upper" or "lower," or indirectly connected to the other element "upper" or "lower" through an intermediate element.

[0031] In the field of photovoltaic power generation technology, photovoltaic modules are the core components that convert solar energy into electrical energy. Figure 1 The diagram shows the structure of a photovoltaic module 100. The photovoltaic module 100 includes a first cover plate 101, a first encapsulant film 102, a battery string 103, a second encapsulant film 104, and a second cover plate 105 stacked along its thickness direction Z. The first cover plate 101 and the battery string 103 are sealed and fixed together by the first encapsulant film 102, and the second cover plate 105 and the battery string 103 are sealed and fixed together by the second encapsulant film 104.

[0032] Specifically, the first cover plate 101 and / or the second cover plate 105 can be photovoltaic glass with high light transmittance, such as double-coated glass. The first cover plate 101 and the second cover plate 105 are used to protect the internal encapsulation material and the battery string 103 from mechanical damage and external environmental corrosion, and have waterproof and moisture-proof capabilities. During the lamination process of the photovoltaic module 100, the first encapsulant film 102 and the second encapsulant film 104 are used to encapsulate the battery string 103, preventing the external environment from affecting the performance of the battery string 103, and at the same time, they can also bond the first cover plate 101, the battery string 103 and the second cover plate 105 into a whole.

[0033] The battery string 103 can be one or more. If there are multiple battery strings 103, they can be connected in series, in parallel, or in a mixed configuration. A mixed configuration means that multiple battery strings 103 are connected in both series and parallel, which can provide higher voltage and capacity. One end of the busbar is connected to the battery string 103, and the other end is connected to the junction box to lead the electrical energy generated by the photovoltaic module 100 to an external load.

[0034] The materials of the first film 102 and the second film 104 can be one of the following: ethylene-vinyl acetate copolymer (EVA), polyolefin elastomer (POE), polyvinyl butyral (PVB), etc., or they can be EPE film (EVA-POE-EVA co-extrusion structure) or EP film (EVA-EP co-extrusion structure).

[0035] It is understood that other layers may be provided between the first cover plate 101 and the first adhesive film 102, between the first adhesive film 102 and the battery string 103, between the battery string 103 and the second adhesive film 104, and between the second adhesive film 104 and the second cover plate 105. The specific number of layers of the photovoltaic module 100 can be set according to the actual situation, and this embodiment does not limit it.

[0036] In this embodiment, the photovoltaic module 100 connects individual solar cells 10 in series and parallel, encapsulates them, and connects them with external wires to form a solar cell module 10 that can be used independently as a photovoltaic power source. The photovoltaic module 100 absorbs sunlight and uses the photovoltaic effect to directly convert solar radiation energy into the required electrical energy output.

[0037] Figure 2 This is a cross-sectional schematic diagram of a solar cell. Along the thickness direction Z of the solar cell 10, the substrate 11 has a first surface 11a and a second surface 11b that are arranged opposite to each other.

[0038] In some embodiments, the material of the substrate 11 can be an elemental semiconductor material. Specifically, the elemental semiconductor material is composed of a single element, such as silicon. The elemental semiconductor material can be monocrystalline, polycrystalline, amorphous, or microcrystalline (possessing both monocrystalline and amorphous states is called microcrystalline). For example, silicon can be at least one of monocrystalline silicon, polycrystalline silicon, amorphous silicon, or microcrystalline silicon.

[0039] In some embodiments, the substrate 11 may be an N-type semiconductor substrate. The N-type semiconductor substrate is doped with an N-type element, which may be at least one of group V elements such as phosphorus (P), bismuth (Bi), antimony (Sb), or arsenic (As).

[0040] In some embodiments, the first surface 11a of the substrate 11 can be the back surface, and the second surface 11b can be the front surface. When the solar cell 10 is a single-sided cell, the second surface 11b can be the light-receiving surface for receiving incident light, and the first surface 11a serves as the back surface. When the solar cell 10 is a bi-sided cell, both the first surface 11a and the second surface 11b of the substrate 11 can serve as light-receiving surfaces and can be used to receive incident light. The first surface 11a can also receive incident light, but its efficiency in receiving incident light is somewhat lower than that of the second surface 11b.

[0041] The second surface 11b has a textured surface, which is a regular pyramidal textured surface. The sloping surface of the textured surface can increase the internal reflection of incident light, thereby improving the absorption and utilization rate of incident light by the substrate 11, and thus improving the cell efficiency of the solar cell 10.

[0042] The first surface 11a of the substrate 11 is sequentially formed with a tunneling oxide layer 12, a doped polysilicon layer 13, a back antireflection layer 14 and a back electrode 15, and the second surface 11b of the substrate 11 is sequentially formed with an emitter 16, a passivation layer 17, a front antireflection layer 18 and a front electrode 19.

[0043] The tunneling oxide layer 12 and the doped polycrystalline silicon layer 13 on the first surface 11a of the substrate 11 form a passivation contact structure. This passivation contact structure can avoid direct contact between the substrate 11 and the back electrode 15. This passivation contact structure can selectively allow majority carriers to pass through the back side and block minority carriers from passing through, thereby reducing the risk of back recombination. This allows the solar cell 10 to maintain a high open-circuit voltage while achieving a higher short-circuit current density and fill factor, thereby improving the efficiency of the solar cell 10.

[0044] As the crystallinity and doping concentration of the doped polycrystalline silicon layer 13 increase, the passivation level and fill factor of the solar cell 10 can be further improved, thereby increasing the photoelectric conversion efficiency of the solar cell 10.

[0045] However, directly increasing the crystallization rate of the doped polycrystalline silicon layer 13 can easily lead to doping film bursting. Directly increasing the doping concentration will cause the doping elements to diffuse inward and spread severely, affecting the passivation effect and the battery conversion efficiency.

[0046] It should be noted that crystallinity refers to the volume fraction of grains in the doped polycrystalline silicon layer 13, reflecting the ratio of crystalline to amorphous states in the film. Increasing crystallinity can improve carrier mobility, reduce crystal defects, and lower the contact resistance of the metal electrode, thereby increasing the open-circuit voltage and fill factor of the solar cell 10 and improving its photoelectric conversion efficiency. The crystallinity of the doped polycrystalline silicon layer 13 can be measured using Raman spectroscopy.

[0047] Therefore, this application provides a method for preparing a solar cell 10. By optimizing the polycrystalline silicon deposition process and the dopant diffusion process, the crystallization rate and doping concentration are improved while the internal diffusion depth is reduced, thus solving the problem of film bursting and improving the fill factor and photoelectric conversion efficiency of the solar cell 10.

[0048] Specifically, the method for fabricating solar cell 10 may include: S1: The first surface 11a and the second surface 11b of the substrate 11 are texturized to form a first base on the first surface 11a and a second base on the second surface 11b, thereby reducing the reflectivity of the first surface 11a and the second surface 11b and removing mechanical damage to the first surface 11a and the second surface 11b of the substrate 11.

[0049] Understandably, the first surface 11a of the substrate 11 is the backlight surface, and the second surface of the substrate 11 is the light-receiving surface. Texturing can also be performed separately on the second surface 11b of the substrate 11. Figure 2 The illustration is based on the example of texturing on the second side of the substrate.

[0050] S2: Boron diffusion is performed on substrate 11 to form a PN junction, thereby realizing the conversion of light energy into electrical energy.

[0051] S3: Alkali polishing removes excess PN junctions on the first surface 11a to prevent short circuits caused by the formation of a diffusion layer around the first surface 11a. S4: Continue to deposit SiO2 on the first surface 11a to form a tunneling oxide layer 12 to provide good interface passivation.

[0052] S5: Polycrystalline silicon is deposited on the surface of the tunnel oxide layer 12 along the thickness direction Z under the first deposition conditions, and the first deposition conditions are gradually reduced to the second deposition conditions to form a polycrystalline silicon layer. The crystallinity of the polycrystalline silicon layer gradually decreases in the direction closer to the substrate 11.

[0053] S6: Under the first doping condition, the polysilicon layer is subjected to phosphorus diffusion doping to transform the polysilicon layer into a doped polysilicon layer 13.

[0054] S7: An Al2O3 electrode is deposited on the emitter 16 of the second surface 11b to form a passivation layer 17; S8: SiNx is deposited on the passivation layer 17 to form a front anti-reflection layer 18. By utilizing the thin film interference principle, the reflection of light is reduced, thereby reducing the light reflection on the first surface 11a and improving the conversion efficiency of the solar cell 10.

[0055] S9: SiNx is deposited on the doped polysilicon layer 13 to form a back antireflection layer 14.

[0056] S10: Screen printing and sintering are performed on the back antireflection layer 14 to form the back electrode 15. Screen printing and sintering are performed on the front antireflection layer 18 to form the front electrode 19. The front electrode 19 and the back electrode 15 can collect the current generated in the PN junction of the solar cell 10 due to light and transfer it to an external load.

[0057] In other embodiments, solar cells 10 may also be prepared using other preparation processes, which are not limited to this embodiment.

[0058] In step S5, a low-pressure chemical vapor deposition (LPCVD) process can be used to deposit polycrystalline silicon, forming a polycrystalline silicon layer on the surface of the tunneling oxide layer 12.

[0059] Understandably, polycrystalline silicon layers prepared at higher deposition temperatures have lower crystallinity, and higher silane flow rates and deposition pressures can increase the formation rate of polycrystalline silicon layers, resulting in even lower crystallinity. That is, during the deposition of the polycrystalline silicon layer in step S5, as the deposition conditions gradually decrease, a polycrystalline silicon layer with a gradually changing crystallinity can be formed. Specifically, the crystallinity of the side of the polycrystalline silicon layer furthest from the substrate 11 is higher than the crystallinity of the side closer to the substrate 11.

[0060] In step S6, the phosphorus diffusion process, because the crystallinity of the polysilicon layer on the side farther from the substrate 11 is higher than that on the side closer to the substrate 11, phosphorus atoms diffuse faster on the side of the polysilicon layer with higher crystallinity and slower on the side with lower crystallinity. This results in a doped polysilicon layer 13 with a gradually changing doping concentration after phosphorus diffusion. That is, the doping concentration on the side of the doped polysilicon layer farther from the substrate 11 is higher than that on the side closer to the substrate 11.

[0061] In this embodiment, by adjusting the deposition conditions, the side of the doped polycrystalline silicon layer 13 closest to the substrate 11 has a low crystallinity, which effectively blocks the diffusion of phosphorus atoms, reduces the doping concentration of the tunneling oxide layer 12, and lowers the risk of phosphorus atoms damaging the tunneling oxide layer 12. This reduces the risk of phosphorus atoms penetrating the substrate 11, thereby improving the passivation level. Simultaneously, the side of the prepared doped polycrystalline silicon layer 13 furthest from the substrate 11 has a high crystallinity and a high phosphorus doping concentration, which is beneficial for metal contact and reduces the risk of metal recombination, thus improving the photoelectric conversion efficiency of the solar cell 10.

[0062] It should be noted that metal contact refers to TOPCon (Tunnel Oxide Passivated Contact). In the battery manufacturing process, the connection between the metal electrode and the semiconductor material, metal recombination refers to the recombination phenomenon of electrons and holes occurring at the interface between the metal electrode and the semiconductor material and in related areas during battery operation.

[0063] In some embodiments, in the solar cell 10 prepared according to the preparation method of this embodiment, the crystallinity of the doped polycrystalline silicon layer 13 on the side away from the substrate 11 is 90%-95%, and the crystallinity of the doped polycrystalline silicon layer 13 on the side close to the substrate 11 is 85%-90%.

[0064] For example, the crystallinity of the doped polysilicon layer 13 on the side away from the substrate 11 can be 91%, 92%, 93%, 93%, 94%, 95%, etc. The crystallinity of the doped polysilicon layer 13 on the side close to the substrate 11 can be 85%, 86%, 87%, 88%, 89%, 90%, etc.

[0065] In some embodiments, in the solar cell 10 prepared according to the preparation method of this embodiment, the doping concentration of the polycrystalline silicon layer 13 on the side away from the substrate 11 is 3 × 10⁻⁶. 20 atom / cm 3 -5×10 20 atom / cm 3 The doping concentration of the polysilicon layer 13 on the side closest to the substrate 11 is 1 × 10⁻⁶. 20 atom / cm 3 -2×10 20 atom / cm 3 .

[0066] For example, the doping concentration of the polysilicon layer 13 on the side away from the substrate 11 can be 3 × 10⁻⁶. 20 atom / cm 3 4×10 20 atom / cm 3 5×1020 atom / cm 3 The doping concentration of the polysilicon layer 13 near the substrate 11 can be 1 × 10⁻⁶. 20 atom / cm 3 2×10 20 atom / cm 3 wait.

[0067] In some embodiments, in step S5, under the first deposition conditions, the deposition temperature can be 580℃-630℃, the silane flow rate can be 1000 sccm-1800 sccm, and the deposition pressure can be 300 mTorr-400 mTorr. Under the second deposition conditions, the deposition temperature can be 530℃-580℃, the silane flow rate can be 600 sccm-1000 sccm, and the deposition pressure can be 200 mTorr-300 mTorr.

[0068] For example, in the first deposition conditions, the deposition temperature can be 580℃, 585℃, 590℃, 595℃, 600℃, 605℃, 610℃, 615℃, 620℃, 625℃, or 630℃. The specific temperature can be set according to the actual situation, and this embodiment does not limit it.

[0069] In the first deposition condition, the silane flow rate is 1000 sccm, 1100 sccm, 1200 sccm, 1300 sccm, 1400 sccm, 1500 sccm, 1600 sccm, 1700 sccm, and 1800 sccm. The specific flow rate can be set according to the actual situation, and this embodiment does not limit it.

[0070] In the first deposition condition, the deposition pressure is 300 mTorr, 310 mTorr, 320 mTorr, 330 mTorr, 340 mTorr, 350 mTorr, 360 mTorr, 370 mTorr, 380 mTorr, 390 mTorr, and 400 mTorr. The specific pressure can be set according to the actual situation, and this embodiment does not limit it.

[0071] In the second deposition condition, the deposition temperature can be 530℃, 540℃, 550℃, 560℃, 570℃, or 580℃. The specific temperature can be set according to the actual situation, and this embodiment does not limit it.

[0072] In the second deposition condition, the silane flow rate can be 600 sccm, 700 sccm, 800 sccm, 900 sccm, or 1000 sccm. The specific flow rate can be set according to the actual situation, and this embodiment does not limit it.

[0073] In the second deposition condition, the deposition pressure can be 200 mTorr, 210 mTorr, 220 mTorr, 230 mTorr, 240 mTorr, 250 mTorr, 260 mTorr, 270 mTorr, 280 mTorr, 290 mTorr, or 300 mTorr. The specific pressure can be set according to actual conditions, and this embodiment does not impose any limitations.

[0074] In this embodiment, the first and second deposition conditions in the polycrystalline silicon deposition are in a low-pressure environment, which helps to reduce byproducts of the gas phase reaction and optimize the grain structure within the polycrystalline silicon layer.

[0075] In this embodiment, by gradually reducing the deposition temperature during polysilicon deposition from 580°C-630°C to 530°C-580°C, gradually reducing the silane flow rate during polysilicon deposition from 1000 sccm-1800 sccm to 600 sccm-1000 sccm, and gradually reducing the deposition pressure during polysilicon deposition from 300 mTorr-400 mTorr to 200 mTorr-300 mTorr, a polysilicon layer with gradually varying crystallinity is formed on the surface of the tunneling oxide layer 12. This allows for the formation of a doped polysilicon layer 13 with gradually varying doping concentration during phosphorus diffusion. Specifically, along the direction close to the substrate 11, the crystallinity of the doped polysilicon layer 13 gradually decreases, and the doping concentration of the doped polysilicon layer 13 gradually decreases, thereby reducing the doping concentration of the polysilicon layer 13.

[0076] This reduces the risk of damaging the tunneling oxide layer 12, while also facilitating metal contact between the back electrode 15 and the doped polycrystalline silicon layer 13, reducing internal crystal defects, improving carrier lifetime, and enhancing the performance of the 10 solar cells.

[0077] In some embodiments, in step S5, the deposition conditions gradually decrease from the start of deposition (i.e., from the first deposition conditions) to the end of deposition (when the conditions change to the second deposition conditions). The first deposition conditions may decrease linearly and gradually to the second deposition conditions.

[0078] For example, refer to Figure 3 , Figure 3 The graph shows the gradual changes in deposition temperature, silane flow rate, and deposition pressure in one embodiment, where the changes in deposition temperature, silane flow rate, and deposition pressure are all linear. The graph illustrates that when depositing polycrystalline silicon on the surface of the tunneling oxide layer 12, the total deposition time is 1400 s, the deposition temperature gradually decreases linearly from 610°C to 570°C, the silane flow rate gradually decreases linearly from 1500 sccm to 1000 sccm, and the deposition pressure gradually decreases linearly from 350 mTorr to 280 mTorr.

[0079] Figure 4The graph shows the gradual changes in deposition temperature, silane flow rate, and deposition pressure in another embodiment, where the changes in deposition temperature, silane flow rate, and deposition pressure are all linear. The figure illustrates that when depositing polycrystalline silicon on the surface of the tunneling oxide layer 12, the total deposition time is 1520 s, the deposition temperature gradually decreases linearly from 600°C to 560°C, the silane flow rate gradually decreases linearly from 1600 sccm to 1000 sccm, and the deposition pressure gradually decreases linearly from 330 mTorr to 300 mTorr.

[0080] Alternatively, in other embodiments, the total deposition time, the starting and ending temperatures of deposition, the starting and ending flow rates of silane, and the starting and ending pressures of deposition can be set to other values, which can be set according to the actual situation. This embodiment does not limit these values.

[0081] Alternatively, in other embodiments, the deposition temperature, silane flow rate, and deposition pressure can vary gradually in a curve. Specific settings can be determined according to actual conditions, and this embodiment does not impose limitations thereon.

[0082] In some embodiments, step S6 may further include: phosphorus diffusion of a polycrystalline silicon layer using phosphorus oxychloride as a phosphorus source, wherein the phosphorus oxychloride is carried by nitrogen gas. Alternatively, in other embodiments, other gases may be used to carry phosphorus oxychloride, and the specific method can be determined according to actual conditions; this embodiment does not limit the method.

[0083] In some embodiments, under the first doping conditions, the diffusion temperature is 800℃-850℃, the diffusion time is 15min-30min, and the nitrogen flow rate is 1200sccm-1800sccm.

[0084] For example, in the first doping condition, the diffusion temperature can be 800℃, 810℃, 820℃, 830℃, 840℃, 850℃, etc. The specific temperature can be set according to the actual situation, and this embodiment does not limit it.

[0085] In the first doping condition, the diffusion time can be 15 min, 16 min, 17 min, 18 min, 19 min, 20 min, 21 min, 22 min, 23 min, 24 min, 25 min, 26 min, 27 min, 28 min, 29 min, 30 min, etc. The specific time can be set according to the actual situation, and this embodiment does not impose any limitations.

[0086] In the first doping condition, the nitrogen flow rate can be 1200 sccm, 1300 sccm, 1400 sccm, 1500 sccm, 1600 sccm, 1700 sccm, 1800 sccm, etc. The specific flow rate can be set according to actual conditions, and this embodiment does not impose any limitations.

[0087] In this embodiment, the nitrogen flow rate is set at 1200 sccm-1800 sccm. By increasing the nitrogen flow rate, the amount of phosphorus diffusion source is increased, which is conducive to the full diffusion of phosphorus source, thereby improving the overall doping concentration of the doped polycrystalline silicon layer 13.

[0088] In some embodiments, after performing phosphorus diffusion doping on the polycrystalline silicon layer under the first doping condition in step S6, the preparation method further includes: increasing the diffusion temperature to 880℃-930℃ and the diffusion time to 30min-50min. That is, after performing phosphorus diffusion doping on the polycrystalline silicon layer under the first doping condition, a high temperature of 880℃-930℃ is used for diffusion, and the diffusion time is 30min-50min.

[0089] For example, the temperature for high-temperature propulsion can be 880℃, 890℃, 900℃, 910℃, 920℃, or 930℃. The high-temperature propulsion time can be 30min, 32min, 34min, 36min, 38min, 40min, 42min, 44min, 46min, 48min, or 50min, etc., and can be set according to the actual situation. This embodiment does not limit the specific time.

[0090] In this embodiment, by setting a high temperature of 880℃-930℃ for propagation, the diffusion rate of doped elements inward is increased, thereby raising the overall doping concentration of the polycrystalline silicon layer 13. Phosphorus doping forms substitutional defects, allowing gas within the polycrystalline silicon layer to be released from these defects. This can disrupt the continuity of the polycrystalline silicon layer, release stress, suppress film bursting, and to a certain extent increase the doping concentration, leading to better contact, reduced contact resistance, and improved battery conversion efficiency.

[0091] In summary, this embodiment gradually reduces the deposition temperature, silane flow rate, and deposition pressure during deposition, resulting in fewer crystal nuclei in the polycrystalline silicon layer. This allows for larger grains to grow during subsequent phosphorus diffusion. Furthermore, the polycrystalline silicon layer exhibits a gradient in its crystal nuclei and grain size, with fewer nuclei and grains near the substrate 11 (i.e., the crystallinity of the polycrystalline silicon layer gradually decreases along the direction closest to the substrate 11). Increasing the phosphorus diffusion concentration and advance temperature can increase the grain size, but the number of grains remains relatively unchanged. This, in turn, improves the overall crystallinity and doping concentration of the doped polycrystalline silicon layer 13, leading to better contact and improved conversion efficiency.

[0092] This application also provides a solar cell 10, fabricated using the method described above. The solar cell 10 includes a substrate 11, a tunneling oxide layer 12, and a doped polycrystalline silicon layer 13. The substrate 11 has a first surface 11a. The tunneling oxide layer 12 is disposed on the first surface 11a, and the doped polycrystalline silicon layer 13 is disposed on the side of the tunneling oxide layer 12 facing away from the first surface 11a. The crystallinity of the doped polycrystalline silicon layer 13 gradually decreases towards the substrate 11, and the doping concentration of the doped polycrystalline silicon layer 13 gradually decreases.

[0093] In this embodiment, the solar cell 10 is formed with a polycrystalline silicon layer 13 that has a gradually changing crystallinity and a gradually changing doping concentration through the preparation method described above. The doping concentration of the polycrystalline silicon layer 13 on the side closer to the substrate 11 is less than the doping concentration on the side farther away from the substrate 11, which reduces the risk of phosphorus diffusion into the crystalline silicon substrate 11 and reduces the risk of metal recombination, thereby improving the photoelectric conversion efficiency of the solar cell 10.

[0094] In some embodiments, the crystallinity of the doped polysilicon layer 13 on the side away from the substrate 11 is 90%-95%, and the crystallinity of the doped polysilicon layer 13 on the side closer to the substrate 11 is 85%-90%.

[0095] For example, the crystallinity of the doped polysilicon layer 13 on the side away from the substrate 11 can be 91%, 92%, 93%, 93%, 94%, or 95%. The crystallinity of the doped polysilicon layer 13 on the side close to the substrate 11 can be 85%, 86%, 87%, 88%, 89%, or 90%.

[0096] In some embodiments, in the solar cell 10 prepared according to the preparation method of this embodiment, the doping concentration of the polycrystalline silicon layer 13 on the side away from the substrate 11 is 3 × 10⁻⁶. 20 atom / cm 3 -5×10 20 atom / cm 3 The doping concentration of the polysilicon layer 13 on the side closest to the substrate 11 is 1 × 10⁻⁶. 20 atom / cm 3 -2×10 20 atom / cm 3 .

[0097] For example, the doping concentration of the polysilicon layer 13 on the side away from the substrate 11 can be 3 × 10⁻⁶. 20 atom / cm 3 4×10 20 atom / cm 3 5×10 20 atom / cm 3The doping concentration of the polysilicon layer 13 near the substrate 11 can be 1 × 10⁻⁶. 20 atom / cm 3 2×10 20 atom / cm 3 wait.

[0098] In some embodiments, in the solar cell 10 prepared according to the preparation method of this embodiment, the doping concentration of the tunneling oxide layer 12 is 1×10⁻⁶. 19 atom / cm 3 -2×10 19 atom / cm 3 .

[0099] For example, the doping concentration of the tunneling oxide layer 12 can be 1×10⁻⁶. 19 atom / cm 3 2×10 19 atom / cm 3 wait.

[0100] Currently, in solar cells fabricated using conventional methods, the doping concentration of the tunneling oxide layer 12 is typically 2 × 10⁻⁶. 19 atom / cm 3 -3×10 19 atom / cm 3 In this embodiment, by adjusting the deposition conditions, the side of the doped polycrystalline silicon layer 13 closest to the substrate 11 has a low crystallinity, which effectively blocks phosphorus atoms from diffusing into the tunneling oxide layer 12, thereby reducing the doping concentration of the tunneling oxide layer 12. This results in the doping concentration of the tunneling oxide layer 12 in the solar cell 10 prepared by the method of this embodiment being 1 × 10⁻⁶. 19 atom / cm 3 -2×10 19 atom / cm 3 Furthermore, this embodiment reduces the risk of phosphorus atoms penetrating the substrate 11 by lowering the doping concentration of the tunneling oxide layer 12, thereby improving the passivation level. In some embodiments, the thickness of the doped polysilicon layer 13 is 85 nm-170 nm.

[0101] For example, the thickness of the doped polysilicon layer 13 can be 85nm, 90nm, 100nm, 110nm, 120nm, 130nm, 140nm, 150nm, 160nm, 170nm, etc. The specific thickness can be set according to the actual situation, and this embodiment does not limit it.

[0102] In this embodiment, the thickness of the doped polysilicon layer 13 is set between 85nm and 170nm, which makes the thickness of the doped polysilicon layer 13 moderate, reduces the risk of parasitic absorption, reduces the risk of energy loss, and improves photoelectric efficiency.

[0103] Table 1 below compares some performance data of the solar cell 10 prepared using the method provided in this embodiment with that prepared using conventional methods. Three groups of solar cells 10 prepared using conventional methods are included as a comparison group, and two groups of solar cells 10 prepared using the method of this embodiment are examples. It should be noted that the only differences between the comparison groups and the examples are the deposition and diffusion processes; all other process steps are the same, and will not be repeated here.

[0104] In the preparation process of control group 1, the deposition time for polycrystalline silicon was 1500 s, the deposition temperature was 600 ℃, the silane flow rate was 1400 sccm, and the deposition pressure was 300 mTorr. For phosphorus diffusion, the diffusion temperature was 800 ℃, the diffusion time was 20 min, the nitrogen flow rate was 1400 sccm, the high-temperature propulsion temperature was 880 ℃, and the high-temperature propulsion time was 30 min.

[0105] In the preparation process of control group 2, the deposition time for polycrystalline silicon was 1500 s, the deposition temperature was 580 ℃, the silane flow rate was 1200 sccm, and the deposition pressure was 300 mTorr. For phosphorus diffusion, the diffusion temperature was 800 ℃, the diffusion time was 20 min, the nitrogen flow rate was 1400 sccm, the high-temperature propulsion temperature was 880 ℃, and the high-temperature propulsion time was 30 min.

[0106] In the preparation process of control group 3, the deposition time for polycrystalline silicon was 1500 s, the deposition temperature was 580 ℃, the silane flow rate was 1200 sccm, and the deposition pressure was 300 mTorr. For phosphorus diffusion, the diffusion temperature was 800 ℃, the diffusion time was 20 min, the nitrogen flow rate was 1400 sccm, the high-temperature propulsion temperature was 920 ℃, and the high-temperature propulsion time was 30 min.

[0107] In the preparation process of Example 1, during polycrystalline silicon deposition, the deposition time was 1400 s, the deposition temperature gradually decreased from 610 °C to 570 °C, the silane flow rate gradually decreased from 1500 sccm to 1000 sccm, and the deposition pressure gradually decreased from 350 mTorr to 280 mTorr. During phosphorus diffusion, the diffusion temperature was 800 °C, the diffusion time was 20 min, the nitrogen flow rate was 1600 sccm, the high-temperature propulsion temperature was 910 °C, and the high-temperature propulsion time was 30 min.

[0108] In the preparation process of Example 2, during polycrystalline silicon deposition, the deposition time was 1520 s, the deposition temperature gradually decreased from 600℃ to 560℃, the silane flow rate gradually decreased from 1600 sccm to 1000 sccm, and the deposition pressure gradually decreased from 330 mTorr to 300 mTorr. During phosphorus diffusion, the diffusion temperature was 800℃, the diffusion time was 20 min, the nitrogen flow rate was 1500 sccm, the high-temperature propulsion temperature was 915℃, and the high-temperature propulsion time was 30 min.

[0109] Table 1

[0110] As shown in Table 1, in comparison group 1, the crystallinity of solar cell 10 is 90%, and the doping concentration of the polycrystalline silicon layer 13 is 3.1 × 10⁻⁶. 20 atom / cm 3 The conversion efficiency is 26.40%, the open-circuit voltage is 0.7416V, the short-circuit current is 14.147A, the fill factor is 84.25%, and the series resistance is 0.00081Ω.

[0111] In comparison group 2, the crystallinity of solar cell 10 is 93%, and the doping concentration of the polycrystalline silicon layer 13 is 3.0 × 10⁻⁶. 20 atom / cm 3 The conversion efficiency is 26.31%, the open-circuit voltage is 0.7420V, the short-circuit current is 14.139A, the fill factor is 83.98%, and the series resistance is 0.00088Ω.

[0112] In comparison group 3, the crystallinity of solar cell 10 is 90%, and the doping concentration of the polycrystalline silicon layer 13 is 3.9 × 10⁻⁶. 20 atom / cm 3 The conversion efficiency is 26.13%, the open-circuit voltage is 0.7398V, the short-circuit current is 14.132A, the fill factor is 84.69%, and the series resistance is 0.00121Ω.

[0113] In Example 1, the crystallinity of solar cell 10 is 93%, and the doping concentration of the polycrystalline silicon layer 13 is 3.8 × 10⁻⁶. 20 atom / cm 3 The conversion efficiency is 26.45%, the open-circuit voltage is 0.7421V, the short-circuit current is 14.136A, the fill factor is 84.41%, and the series resistance is 0.00077Ω.

[0114] In Example 2, the crystallinity of solar cell 10 is 94%, and the doping concentration of the polycrystalline silicon layer 13 is 3.9 × 10⁻⁶. 20 atom / cm 3The conversion efficiency is 26.47%, the open-circuit voltage is 0.7425V, the short-circuit current is 14.133A, the fill factor is 84.46%, and the series resistance is 0.00075Ω.

[0115] Therefore, as can be seen from Table 1, the crystallinity, conversion efficiency, open-circuit voltage, fill factor, and series resistance of Example 1 are all superior to those of Comparative Groups 1, 2, and 3. Similarly, the crystallinity, doping concentration, conversion efficiency, open-circuit voltage, fill factor, and series resistance of Example 2 are all superior to those of Comparative Groups 1, 2, and 3. Therefore, the performance of the solar cells 10 prepared by the preparation method provided in Examples 1 and 2 is superior to the performance of the solar cells 10 prepared by conventional methods in Comparative Groups 1, 2, and 3.

[0116] also, Figure 5 The image shows a 3D microscopic image of the polycrystalline silicon layer 13 in the solar cell 10 of control group 2. Compared with control group 1, control group 2 adjusted the deposition temperature to 580℃ and the silane flow rate to 1200 sccm, forming a solar cell 10 with a higher crystallinity. The test found that control group 2 had a more serious film bursting phenomenon, which affected the fill factor and reduced the conversion efficiency of control group 2 by 0.09% compared with control group 1.

[0117] Figure 6 The image shows a 3D microscope image of the polycrystalline silicon layer 13 in the solar cell 10 of Example 1. The image shows that Example 1 has a high crystallinity and high doping concentration on the side away from the substrate 11. The polycrystalline silicon layer 13 also does not have a film bursting phenomenon. Furthermore, the open circuit voltage and fill factor of Example 1 are better than those of the control group 1. The conversion efficiency of Example 1 is 0.05% higher than that of the control group 1.

[0118] Figure 7 To illustrate the doping concentration distribution curves in Comparative Group 3, by adjusting the phosphorus diffusion temperature to 920℃, a doped polycrystalline silicon layer 13 with a higher doping concentration was obtained. However, the conversion efficiency was 0.27% lower than that of Comparative Group 1. Figure 7 ECV testing showed that it had developed perforation.

[0119] Figure 8 The graph shown in Example 1 illustrates the doping concentration distribution. The graph shows that the doped polysilicon layer 13 forms a gradient structure with a low doping concentration near the substrate 11 and a high doping concentration far from the substrate 11, and there is no penetration phenomenon.

[0120] Therefore, the preparation method of this embodiment improves the overall crystallinity and doping concentration while reducing the internal diffusion depth by adjusting the polycrystalline silicon deposition process and the phosphorus diffusion process, thereby solving the problem of film bursting and improving the fill factor and battery efficiency.

[0121] This application also provides a tandem solar cell, which includes a top cell, an intermediate connecting layer, and a bottom cell, with the intermediate connecting layer connecting the bottom cell and the top cell. The top cell is one of a perovskite solar cell, a cadmium telluride solar cell 10, a copper indium gallium selenide solar cell 10, or a gallium arsenide solar cell 10, and the bottom cell is one of the aforementioned solar cells 10.

[0122] The intermediate interconnect layer is typically selected from transparent materials with high refractive index. An effective intermediate interconnect layer needs high light transmittance to reduce light reflection and absorption at the interconnect layer interface, and good conductivity to reduce the impact of series resistance on device performance. For example, transparent conductive metal oxide thin films (ITO) can be used as intermediate interconnect layers.

[0123] The above description is merely a preferred embodiment of this application and is not intended to limit this application. Various modifications and variations can be made to this application by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this application should be included within the protection scope of this application.

Claims

1. A method for preparing a solar cell, characterized in that, The preparation method includes: A tunneling oxide layer (12) is prepared on the first surface (11a) of the substrate (11). Polycrystalline silicon is deposited on the surface of the tunneling oxide layer (12) along the thickness direction (Z) under a first deposition condition, and the first deposition condition is gradually reduced to a second deposition condition; The polysilicon layer is subjected to phosphorus diffusion doping under the first doping condition to transform the polysilicon layer into a doped polysilicon layer (13).

2. The method for preparing a solar cell according to claim 1, characterized in that, The first deposition conditions decrease linearly to the second deposition conditions.

3. The method for preparing a solar cell according to claim 1, characterized in that, In the first deposition conditions, the deposition temperature is 580℃-630℃, the silane flow rate is 1000sccm-1800sccm, and the deposition pressure is 300mTorr-400mTorr; In the second deposition conditions, the deposition temperature is 530℃-580℃, the silane flow rate is 600sccm-1000sccm, and the deposition pressure is 200mTorr-300mTorr; When polycrystalline silicon is deposited on the surface of the tunneling oxide layer (12) along the thickness direction (Z), the deposition time from the first deposition condition to the second deposition condition is 850s-1700s.

4. The method for preparing a solar cell according to claim 1, characterized in that, In the step of performing phosphorus diffusion doping on the polycrystalline silicon layer under the first doping condition, the preparation method further includes: The polycrystalline silicon layer is subjected to phosphorus diffusion using phosphorus oxychloride as the phosphorus source, and the phosphorus oxychloride is carried by nitrogen gas.

5. The method for preparing a solar cell according to claim 1, characterized in that, In the first doping conditions, the diffusion temperature is 800℃-850℃, the diffusion time is 15min-30min, and the nitrogen flow rate is 1200sccm-1800sccm.

6. The method for preparing a solar cell according to claim 5, characterized in that, After the step of performing phosphorus diffusion doping on the polycrystalline silicon layer under the first doping condition, the preparation method further includes: The diffusion temperature was increased to 880℃-930℃, and the diffusion time was 30min-50min.

7. A solar cell, said solar cell (10) being manufactured using the solar cell (10) preparation method according to any one of claims 1 to 6, characterized in that, The solar cell (10) includes: A substrate (11) having a first surface (11a); A tunneling oxide layer (12) is disposed on the first surface (11a). A doped polysilicon layer (13) is disposed on the side of the tunneling oxide layer (12) away from the first surface (11a). The crystallinity of the doped polysilicon layer (13) on the side away from the substrate (11) is greater than that on the side closer to the substrate (11). The doping concentration of the doped polysilicon layer (13) on the side away from the substrate (11) is greater than that on the side closer to the substrate (11).

8. The solar cell according to claim 7, characterized in that, The doping concentration of the doped polycrystalline silicon layer (13) on the side away from the substrate (11) is 3 × 10⁻⁶. 20 atom / cm 3 -5×10 20 atom / cm 3 .

9. The solar cell according to claim 7, characterized in that, The doping concentration of the doped polycrystalline silicon layer (13) on the side closest to the substrate (11) is 1×10⁻⁶. 20 atom / cm 3 -2×10 20 atom / cm 3 .

10. The solar cell according to claim 7, characterized in that, The crystallinity of the doped polycrystalline silicon layer (13) on the side away from the substrate (11) is 90%-95%.

11. The solar cell according to claim 7, characterized in that, The crystallinity of the doped polycrystalline silicon layer (13) on the side closest to the substrate (11) is 85%-90%.

12. The solar cell according to claim 7, characterized in that, The doping concentration of the tunneling oxide layer (12) is 1×10⁻⁶. 19 atom / cm 3 -2×10 19 atom / cm 3 .

13. The solar cell according to claim 7, characterized in that, The thickness of the doped polycrystalline silicon layer (13) is 85nm-170nm.

14. A stacked battery, characterized in that, The stacked battery includes a top battery, an intermediate connecting layer, and a bottom battery, wherein the intermediate connecting layer connects the top battery and the bottom battery. The top cell is one of a perovskite cell, a cadmium telluride solar cell, a copper indium gallium selenide solar cell, or a gallium arsenide solar cell, and the bottom cell is the solar cell (10) according to any one of claims 7 to 10.

15. A photovoltaic module, characterized in that, The photovoltaic module (100) includes a first cover plate (101), a first encapsulant film (102), a battery string (103), a second encapsulant film (104), and a second cover plate (105) stacked together. The battery string (103) includes a plurality of electrically connected solar cells (10) or tandem cells, wherein the solar cells (10) are the solar cells (10) according to any one of claims 7 to 13, and the tandem cells are the tandem cells according to claim 14.

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