Solar cell and assembly

Abstract

The invention relates to a silicon solar cell which comprises a silicon substrate containing an antimony element and a carrier separation layer formed on the silicon substrate, and the carrier separation layer is provided with the antimony element in at least partial region of one side close to the silicon substrate to form an antimony-containing layer; the peak concentration of the antimony element in the antimony-containing layer is a1, and a1 is equal to or larger than 1E13atoms / cm < 3 >.

Description

[0001] This application is a divisional application of case no. 202410564554.8, with the application date of May 8, 2024, and the title of A solar cell and assembly. TECHNICAL FIELD

[0002] The present application relates to the field of solar photovoltaics, and in particular to a silicon wafer, and to a solar cell and a cell assembly. BACKGROUND

[0003] Currently, in a silicon solar cell, a substrate is usually a silicon wafer doped with n-type or p-type. P-type and n-type semiconductors are formed at different positions of the silicon wafer, and then electrodes are formed on the p-type and n-type semiconductor regions, respectively, to form electrodes. When light enters the silicon cell substrate, electron-hole pairs are generated. The free electron-hole pairs are separated by carriers, so that electrons are concentrated near the n-pole and holes are concentrated near the p-pole. The electrodes are connected to an external circuit, and an electric current can be output.

[0004] In the prior art, a p-type substrate or an n-type substrate is usually used as a photovoltaic semiconductor substrate. The p-type substrate is usually doped with boron or gallium. The n-type substrate is usually doped with phosphorus. SUMMARY

[0005] N-type semiconductor substrates have the advantage of long minority carrier diffusion length and are used in silicon solar cells to generate electricity. Compared with p-type substrates, more carriers are collected, and the efficiency is correspondingly higher. N-type substrates are usually doped with phosphorus. However, both N-type doped semiconductor substrates and P-type doped semiconductor substrates have the problem of reduced efficiency due to poor passivation. Therefore, the present application aims to solve the problem of poor passivation in the prior art.

[0006] The present inventors have found that when antimony is doped into a silicon substrate, the antimony will overflow into the semiconductor layer to some extent, and the antimony in the semiconductor layer will form Si bonds, inhibit the formation of bubbles in the semiconductor layer, avoid the formation of voids, effectively improve the passivation, and solve the problem of carrier transport inhibition.

[0007] The present application relates to the following content:

[0008] 1. A silicon solar cell, comprising:

[0009] a silicon substrate containing antimony, and

[0010] a carrier separation layer formed on the silicon substrate, wherein

[0011] The carrier separation layer has an antimony-containing layer formed in at least a portion of the region on the side closest to the silicon substrate;

[0012] The peak concentration of antimony in the antimony-containing layer is a1, and a1 is equal to or greater than 1E13 atoms / cm². 3 .

[0013] 2. The silicon solar cell according to claim 1, wherein,

[0014] The concentration of antimony in the silicon substrate is denoted as 'a', and the range of 'a' is 1E13 to 1E18 atoms / cm³. 3 ;or

[0015] The concentration of antimony in the antimony-containing layer is greater than or equal to 1E13 atoms / cm³. 3 The thickness d1 of the region is greater than 2nm.

[0016] 3. The silicon solar cell according to claim 1 or 2, wherein,

[0017] The carrier separation layer is selected from a doped semiconductor layer, a molybdenum oxide layer, or a PEDOT:PSS layer.

[0018] When the carrier separation layer is a doped semiconductor layer, an interface passivation layer is provided between the silicon substrate and the carrier separation layer. Preferably, the material of the interface passivation layer is selected from one or more of silicon oxide, aluminum oxide, silicon nitride, molybdenum oxide, or intrinsic amorphous silicon.

[0019] 4. The silicon solar cell according to any one of items 1 to 3, wherein the concentration of antimony in the antimony-containing layer of the carrier separation layer gradually decreases from the side closer to the silicon substrate to the side opposite to the silicon substrate.

[0020] 5. The silicon solar cell according to any one of items 2 to 4, wherein a / a1 is defined as u, and u ranges from 0.8 to 1E10, preferably from 2 to 1E9, more preferably from 10 to 1E8, and more preferably from 100 to 1E7.

[0021] 6. The silicon solar cell according to any one of items 3 to 5, wherein,

[0022] The silicon substrate has a B in at least a portion of the region on the side near the interface passivation layer. x Elements, forming elements containing B x layer,

[0023] The B-containing x Layer B x The concentration of the element is greater than 1E17 atoms / cm³ 3 The thickness d2 of the region is greater than 20 nm.

[0024] 7. The silicon solar cell according to item 6, wherein,

[0025] B in the doped semiconductor layer x The concentration of the element is b, and the range of b is 1E18~5E22 atoms / cm³. 3 ,

[0026] The B-containing x B in the layer x The peak concentration of the element is b1.

[0027] b / b1 is defined as v, and the range of v is 0.5 to 1E10, preferably 2 to 1E9, further preferably 10 to 1E8, and most preferably 100 to 1E5.

[0028] 8. The silicon solar cell according to item 7, wherein,

[0029] Let b1 / a1 be defined as w, where w>1, preferably w>100, preferably w>1000, and even more preferably 1E3 to 1E8.

[0030] 9. The silicon solar cell according to item 6, wherein,

[0031] Let d2 / d1 be defined as x, where x is greater than or equal to 1, preferably in the range of 10 to 1E8, and more preferably in the range of 20 to 1E7.

[0032] 10. The silicon solar cell according to any one of items 6 to 9, wherein,

[0033] The interface passivation layer contains antimony, and the peak concentration of antimony in the interface passivation layer is a2, where a2 ranges from 1E13 to 1E18 atoms / cm. 3 , and / or

[0034] The interface passivation layer contains B x Element, B in the interface passivation layer x The peak concentration of the element is b2, and the range of b2 is 1E19~1E22 atoms / cm. 3 ,

[0035] Preferably, b2 / a2 is defined as y, where y>1, and preferably the range of y is 10 to 1E9.

[0036] 11. The silicon solar cell according to any one of items 6 to 10, wherein,

[0037] The B x When the element is selected from Group 5 or Group 6, the concentration of antimony in the antimony-containing layer is equal to or greater than 1E13 atoms / cm³.3 The thickness d1 of the region of w is 2 nm or more, preferably the range of w is 1E4 to 1E8.

[0038] 12. The silicon solar cell according to item 11, wherein

[0039] The concentration of B x element in the doped semiconductor layer is 1E19 to 5E22 atoms / cm 3 ; preferably the B x element is phosphorus element, in which case the concentration of phosphorus element in the phosphorus containing layer is greater than 1E17 atoms / cm 3 The thickness d2 of the region of w is 20 nm or more, preferably 30 nm or more, 40 nm or more, or 50 nm or more, further preferably the thickness d2 is 120 nm or more, 200 nm or more, or 300 nm or more.

[0040] 13. The silicon solar cell according to any one of items 6 to 10, wherein

[0041] The concentration of B x element in the doped semiconductor layer is 1E18 to 5E21 atoms / cm 3 The thickness d1 of the region of w is 3 nm or more, preferably the range of w is 1E3 to 1E7.

[0042] 14. The silicon solar cell according to item 13, wherein

[0043] The concentration of B x element in the doped semiconductor layer is 1E18 to 5E21 atoms / cm 3 , preferably the B x element is boron element, in which case the concentration of boron element in the boron containing layer is greater than 1E17 atoms / cm 3 The thickness d2 of the region of w is 30 nm or more, preferably 40 nm or more, 50 nm or more, further preferably the thickness d2 is 100 nm or more, 200 nm or more, 300 nm or more, 400 nm or more, 500 nm or more, 600 nm or more, 700 nm or more, 800 nm or more, 900 nm or more, 1000 nm or more, 1100 nm or more, or 1200 nm or more.

[0044] 15. The silicon solar cell according to any one of items 3 to 14, wherein

[0045] When the doped semiconductor layer is a P-type doped semiconductor layer, and an N-type doped semiconductor layer is formed in the other side of the silicon substrate away from the P-type doped semiconductor layer, the peak concentration of antimony element in the antimony containing layer is a 1pa / a 1p defined as u p , u p ranges from 0.8 to 1E10, preferably from 2 to 1E9, further preferably from 10 to 1E8, and preferably from 100 to 1E7; or

[0046] when the doped semiconductor layer is an N-type doped semiconductor layer, and a P-type doped semiconductor layer is formed on the other side of the silicon substrate opposite to the N-type doped semiconductor layer, the peak concentration of antimony in the antimony-containing layer is a 1n a / a 1n defined as u n , u n ranges from 0.8 to 1E10, preferably from 2 to 1E9, further preferably from 10 to 1E8, and preferably from 100 to 1E7.

[0047] 16. The silicon solar cell according to item 15, wherein

[0048] when the doped semiconductor layer is a P-type doped semiconductor layer, and an N-type

[0049] doped semiconductor layer is formed on the other side of the silicon substrate opposite to the P-type doped semiconductor layer, the concentration of antimony in the antimony-containing layer is equal to or greater than 1E13 atoms / cm 3 in a region having a thickness d 1p of 3 nm or more; or

[0050] when the doped semiconductor layer is an N-type doped semiconductor layer, and a P-type doped semiconductor layer is formed on the other side of the silicon substrate opposite to the N-type doped semiconductor layer, the concentration of antimony in the antimony-containing layer is equal to or greater than 1E13 atoms / cm 3 in a region having a thickness d 1n of 2 nm or more.

[0051] In a preferred mode, the carrier separation layer and the interface passivation layer are formed on the back side of the silicon substrate, forming a PN junction with the silicon substrate.

[0052] 17. The silicon solar cell according to any one of items 3 to 14, wherein

[0053] the interface passivation layer comprises a first interface passivation layer and a second interface passivation layer, the first interface passivation layer and the second interface passivation layer being formed on both sides of the silicon substrate, the doped semiconductor layer comprises a first doped semiconductor layer and a second doped semiconductor layer, the first doped semiconductor layer and the second doped semiconductor layer being formed on the side of the first interface passivation layer distal to the silicon substrate and on the side of the second interface passivation layer distal to the silicon substrate, respectively, the first doped semiconductor layer being doped with a third main group element, and the second doped semiconductor layer being doped with a fifth main group or a sixth main group element,

[0054] The area of ​​the first doped semiconductor layer is smaller or larger than the area of ​​the second doped semiconductor layer;

[0055] The first doped semiconductor layer has antimony elements in at least a portion of its region near the first interface passivation layer to form a first antimony-containing layer, and the second doped semiconductor layer has antimony elements in at least a portion of its region near the second interface passivation layer to form a second antimony-containing layer.

[0056] The peak concentration of antimony in the first antimony-containing layer is a. 1p , and a 1p Equal to or greater than 1E13 atoms / cm 3 The peak concentration of antimony in the second antimony-containing layer is a. 1n , and a 1n Equal to or greater than 1E13 atoms / cm 3 .

[0057] 18. The silicon solar cell according to claim 17, wherein,

[0058] The concentration of antimony in the first antimony-containing layer is greater than or equal to 1E13 atoms / cm³. 3 The thickness d of the region 1p The concentration of antimony in the second antimony-containing layer is greater than or equal to 1E13 atoms / cm³. 3 The thickness d of the region 1n , that is, d 1p ≥d 1n ;

[0059] Preferably, the concentration of antimony in the first antimony-containing layer is greater than or equal to 1E13 atoms / cm². 3 The thickness d of the region 1p The antimony concentration in the second antimony-containing layer is greater than 2nm, and the concentration of antimony is equal to or greater than 1E13 atoms / cm. 3 The thickness d of the region 1n It is 3nm or larger.

[0060] 19. The silicon solar cell according to claim 17 or 18, wherein the concentration of antimony in the antimony-containing layer of the first doped semiconductor layer gradually decreases in the direction from the side near the silicon substrate to the side opposite to the silicon substrate, and the concentration of antimony in the antimony-containing layer of the second doped semiconductor layer gradually decreases in the direction from the side near the silicon substrate to the side opposite to the silicon substrate.

[0061] 20. The silicon solar cell according to any one of items 17 to 19, wherein,

[0062] will a / a 1p Defined as up , u p is in the range of 0.8 to 1E10, preferably 2 to 1E9, further preferably 10 to 1E8, preferably 100 to 1E7;

[0063] a / a 1n is defined as u n , u n is in the range of 0.8 to 1E10, preferably 2 to 1E9, further preferably 10 to 1E8, preferably 100 to 1E7.

[0064] 21. The silicon solar cell according to any one of items 17 to 20, wherein,

[0065] the silicon substrate has B xp element in at least a part of the region near the side of the first interface passivation layer, forming a B xp containing layer;

[0066] the silicon substrate has B xn element in at least a part of the region near the side of the second interface passivation layer, forming a B xn containing layer;

[0067] the concentration of B xp element in the B xp containing layer is greater than 1E17 atoms / cm 3 , and the thickness d 2p of the region is 30 nm or more;

[0068] the concentration of B xn element in the B xn containing layer is greater than 1E17 atoms / cm 3 , and the thickness d 2n of the region is 20 nm or more.

[0069] 22. The silicon solar cell according to item 21, wherein,

[0070] the B xp element is an element selected from the third main group, and the concentration of B xp element in the first doped semiconductor layer is b p , b p is in the range of 1E18 to 5E21 atoms / cm 3 ,

[0071] the peak concentration of B xp element in the B xp containing layer is b 1p ,

[0072] the B xnThe element is an element selected from the fifth main group or the sixth main group, the concentration of the B xn The concentration of the element is b n , b n is in the range of 1E19 to 5E22 atoms / cm 3 ,

[0073] The peak concentration of the B xn element in the B xn containing layer is b 1n ,

[0074] b p / b 1p is defined as v p , v p is in the range of 1 to 1E10, preferably 2 to 1E9, further preferably 10 to 1E8, preferably 100 to 1E5,

[0075] b n / b 1n is defined as v n , v n is in the range of 0.5 to 1E10, preferably 2 to 1E9, further preferably 10 to 1E8, preferably 100 to 1E5.

[0076] 23. The silicon solar cell according to item 22, wherein

[0077] b 1p / a 1p is defined as w p , w p > 1, preferably > 100, preferably more than 1000, preferably in the range of 1E3 to 1E8, further preferably in the range of 1E3 to 1E7;

[0078] b 1n / a 1n is defined as w n , w n > 1, preferably > 100, preferably more than 1000, preferably in the range of 1E3 to 1E8, further preferably in the range of 1E4 to 1E8.

[0079] 24. The silicon solar cell according to any one of items 21 to 23, wherein

[0080] d 2p / d 1p is equal to or more than 1, preferably in the range of 10 to 1E8, further preferably in the range of 20 to 1E7,

[0081] d 2n / d 1n is equal to or more than 1, preferably in the range of 10 to 1E8, further preferably in the range of 20 to 1E7;

[0082] preferably and / or d 2p > d 2n , preferably d 2p - d 2n ≥ 5 nm, preferably ≥ 10 nm.

[0083] 25. The silicon solar cell according to any one of items 17 to 24, wherein

[0084] the first interface passivation layer contains an antimony element, a peak concentration of the antimony element in the first interface passivation layer is a 2p , a 2p is in the range of 1E13 to 1E18 atoms / cm 3 , and / or

[0085] the first interface passivation layer contains a B xp element, a peak concentration of the B xp element in the first interface passivation layer is b 2p , b 2p is in the range of 1E19 to 1E22 atoms / cm 3 ,

[0086] preferably b 2p / a 2p > 1, preferably 10 to 1E9;

[0087] the second interface passivation layer contains an antimony element, a peak concentration of the antimony element in the second interface passivation layer is a 2n , a 2n is in the range of 1E13 to 1E18 atoms / cm 3 , and / or

[0088] the second interface passivation layer contains a B xn element, a peak concentration of the B xn element in the second interface passivation layer is b 2n , b 2n is in the range of 1E19 to 1E22 atoms / cm 3 ,

[0089] preferably b 2n / a 2n > 1, preferably 10 to 1E9.

[0090] 26. The silicon solar cell according to item 21, wherein

[0091] the B xn element is a phosphorus element, in which case a concentration of the phosphorus element in the B xn containing layer is greater than 1E17 atoms / cm3 the thickness d of the region 2n is 20 nm or more, preferably 30 nm or more, 40 nm or more, or 50 nm or more, and further preferably the thickness d 2n is 120 nm or more, 200 nm or more, or 300 nm or more; or

[0092] the B xp element is a boron element, in which case the B xp concentration in the layer is greater than 1E17 atoms / cm 3 the thickness d of the region 2p is 30 nm or more, preferably 40 nm or more, 50 nm or more, and further preferably the thickness d 2p is 100 nm or more, 200 nm or more, 300 nm or more, 400 nm or more, 500 nm or more, 600 nm or more, 700 nm or more, 800 nm or more, 900 nm or more, 1000 nm or more, 1100 nm or more, or 1200 nm or more.

[0093] 27. The silicon solar cell according to any one of items 3 to 14, wherein,

[0094] the interface passivation layer includes a first interface passivation layer and a second interface passivation layer, which are formed on the side of the silicon substrate, respectively, and the doped semiconductor layer includes a first doped semiconductor layer and a second doped semiconductor layer, which are formed on the side of the first interface passivation layer away from the silicon substrate and on the side of the second interface passivation layer away from the silicon substrate, respectively,

[0095] the first doped semiconductor layer is doped with a third main group element, and the second doped semiconductor layer is doped with a fifth main group or sixth main group element,

[0096] the first interface passivation layer and the first doped semiconductor layer form a p-type region, and the second interface passivation layer and the second doped semiconductor layer form an n-type region;

[0097] the first doped semiconductor layer has an antimony element in at least a part of the region on the side close to the first interface passivation layer, forming a first antimony-containing layer, and the second doped semiconductor layer has an antimony element in at least a part of the region on the side close to the second interface passivation layer, forming a second antimony-containing layer,

[0098] the peak concentration of the antimony element in the first antimony-containing layer is a 1p atoms / cm 3 , and a 1p is equal to or greater than 1E13 atoms / cm 3 , and the peak concentration of the antimony element in the second antimony-containing layer is a 1n atoms / cm3 and a 1n is equal to greater than 1E13 atoms / cm 3 .

[0099] 28. The silicon solar cell according to item 27, wherein

[0100] the concentration of antimony element in the first antimony containing layer is equal to greater than 1E13 atoms / cm 3 the thickness d 1p of the region where the concentration of antimony element in the second antimony containing layer is equal to greater than 1E13 atoms / cm 3 the thickness d 1n , i.e. d 1p ≥ d 1n ;

[0101] Preferably the concentration of antimony element in the first antimony containing layer is equal to greater than 1E13 atoms / cm 3 the thickness d 1p of the region where the concentration of antimony element in the second antimony containing layer is equal to greater than 1E13 atoms / cm 3 the thickness d 1n is equal to or greater than 3 nm.

[0102] 29. The silicon solar cell according to item 27 or 28, wherein the concentration of antimony element in the antimony containing layer of the first doped semiconductor layer gradually decreases in the direction from the side close to the silicon substrate to the side opposite to the silicon substrate, and the concentration of antimony element in the antimony containing layer of the second doped semiconductor layer gradually decreases in the direction from the side close to the silicon substrate to the side opposite to the silicon substrate.

[0103] 30. The silicon solar cell according to any one of items 27 to 29, wherein

[0104] a / a 1p is defined as u p , u p is in the range of 0.8 to 1E10, preferably 2 to 1E9, further preferably 10 to 1E8, preferably 100 to 1E7;

[0105] a / a 1n is defined as u n , u n is in the range of 0.8 to 1E10, preferably 2 to 1E9, further preferably 10 to 1E8, preferably 100 to 1E7.

[0106] 31. The silicon solar cell according to any one of items 27 to 30, wherein

[0107] The silicon substrate has a B in at least a portion of the region on the side near the first interface passivation layer. xp Elements, forming elements containing B xp layer;

[0108] The silicon substrate has a B in at least a portion of the region on the side near the second interface passivation layer. xn Elements, forming elements containing B xn layer;

[0109] The B-containing xp Layer B xp The concentration of the element is greater than 1E17 atoms / cm³ 3 The thickness d of the region 2p 30nm and above;

[0110] The B-containing xn Layer B xn The concentration of the element is greater than 1E17 atoms / cm³ 3 The thickness d of the region 2n It is above 20nm.

[0111] 32. The silicon solar cell according to claim 31, wherein,

[0112] The B xp The element is selected from Group 3, and B in the first doped semiconductor layer xp The concentration of the element is b p b p The range is 1E18 to 5E21 atoms / cm 3 ,

[0113] The B-containing xp B in the layer xp The peak concentration of the element is b 1p atoms / cm 3 ,

[0114] The B xn The element is selected from Group 5 or Group 6, and B in the second doped semiconductor layer xn The concentration of the element is b n b n The range is 1E19 to 5E22 atoms / cm 3 ,

[0115] The B-containing xn B in the layer xn The peak concentration of the element is b 1n atoms / cm 3 ,

[0116] b p / b 1p defined as v p , v p ranges from 1 to 1E10, preferably from 2 to 1E9, further preferably from 10 to 1E8, preferably from 100 to 1E5,

[0117] defined as b n / b 1n defined as v n , v n ranges from 0.5 to 1E10, preferably from 2 to 1E9, further preferably from 10 to 1E8, preferably from 100 to 1E5.

[0118] 33. The silicon solar cell according to item 32, wherein

[0119] defined as b 1p / a 1p defined as w p , w p > 1, preferably > 100, preferably more than 1000, preferably from 1E3 to 1E8, further preferably from 1E3 to 1E7;

[0120] defined as b 1n / a 1n defined as w n , w n > 1, preferably > 100, preferably more than 1000, preferably from 1E3 to 1E8, further preferably from 1E4 to 1E8.

[0121] 34. The silicon solar cell according to any one of items 31 to 33, wherein

[0122] d 2p / d 1p is equal to or more than 1, preferably from 10 to 1E8, further preferably from 20 to 1E7,

[0123] d 2n / d 1n is equal to or more than 1, preferably from 10 to 1E8, further preferably from 20 to 1E7;

[0124] preferably d 2p > d 2n , preferably d 2p - d 2n ≥ 5 nm, preferably ≥ 10 nm.

[0125] 35. The silicon solar cell according to any one of items 27 to 34, wherein

[0126] the first interface passivation layer contains antimony elements, a peak concentration of the antimony elements in the first interface passivation layer is a 2p , preferably a 2pin the range of 1E13 to 1E18 atoms / cm 3 , and / or

[0127] The first interface passivation layer contains B xp element, the peak concentration of B xp element in the first interface passivation layer is b 2p , preferably b 2p in the range of 1E19 to 1E22 atoms / cm 3 ,

[0128] Preferably, b 2p / a 2p >1, preferably 10 to 1E9.

[0129] The second interface passivation layer contains Sb 2n element, the peak concentration of Sb 2n element in the second interface passivation layer is a 3 in the range of 1E13 to 1E18 atoms / cm xn , and / or

[0130] The second interface passivation layer contains B xn element, the peak concentration of B 2n element in the second interface passivation layer is b 2n in the range of 1E19 to 1E22 atoms / cm 3 ,

[0131] Preferably, b 2n / a 2n >1, preferably 10 to 1E9.

[0132] 36. The silicon solar cell according to item 35, wherein

[0133] The B xn element is phosphorus element, and the concentration of phosphorus element in the B xn containing layer is greater than 1E17 atoms / cm 3 The thickness d 2n of the region is greater than 20 nm, preferably greater than 30 nm, greater than 40 nm, or greater than 50 nm, and further preferably the thickness d 2n is greater than 120 nm, greater than 200 nm, or greater than 300 nm; or

[0134] The B xp element is boron element, and the concentration of boron element in the B xp containing layer is greater than 1E17 atoms / cm 3 The thickness d 2p30 nm or more, preferably 40 nm or more, 50 nm or more, further preferably thickness d 2p 100 nm or more, 200 nm or more, 300 nm or more, 400 nm or more, 500 nm or more, 600 nm or more, 700 nm or more, 800 nm or more, 900 nm or more, 1000 nm or more, 1100 nm or more, or 1200 nm or more.

[0135] 37. The battery according to any one of items 27 to 36, wherein the p-type region and the n-type region have a separation region therebetween, and a base passivation layer is provided in the separation region of the p-type region and the n-type region, the base passivation layer covering the separation region of the silicon substrate that is not covered by the p-type region and the n-type region,

[0136] an antimony-containing region is formed in a region of the base passivation layer close to the silicon substrate, the antimony-containing region having a concentration of antimony elements of a3, a3 being greater than 1E13 atoms / cm 3 thickness d 1钝化层 ,

[0137] d 1钝化层 ≤ d 1n ≤ d 1p ,

[0138] Preferably, the d 1钝化层 ≥ 1 nm.

[0139] 38. The battery according to item 37, wherein an intrinsic separation region is provided in the separation region of the p-type region and the n-type region, the intrinsic separation region covering the separation region of the silicon substrate that is not covered by the p-type region and the n-type region, and

[0140] the intrinsic semiconductor layer containing antimony elements and the intrinsic semiconductor layer not containing antimony elements are sequentially included in the separation region of the silicon substrate in a direction away from the silicon substrate;

[0141] Preferably, the intrinsic region interface passivation layer, the intrinsic semiconductor layer containing antimony elements, and the intrinsic semiconductor layer not containing antimony elements are sequentially included in the direction toward the back surface from the silicon substrate;

[0142] the intrinsic semiconductor layer containing antimony elements has a concentration of antimony elements of a3, a3 being greater than 1E13 atoms / cm 3 thickness d 1i ,

[0143] d 1i ≤ d 1n ≤ d 1p ;

[0144] Preferably, the d 1i ≥ 2 nm.

[0145] Preferably, the intrinsic zone interface passivation layer contains antimony element in the region close to the silicon substrate, the concentration of the antimony element contained in the intrinsic zone interface passivation layer is a3, a3 is greater than 1E13 atoms / cm 3 The thickness d 1钝化层 of the region 1钝化层 ≤d 1n ≤d 1p , preferably the d 1钝化层 ≥2nm.

[0146] 39. The battery according to item 38, wherein an intrinsic zone side interface passivation layer is provided between the intrinsic spacer region and the p-type region or the n-type region.

[0147] 40. The silicon solar cell according to any one of items 3 to 14,

[0148] The doped semiconductor layer is an N-type doped semiconductor layer to form an N-type region,

[0149] It further comprises:

[0150] A P-region electrode formed on the side of the silicon substrate having the N-type doped semiconductor layer and arranged spaced apart from the N-type doped semiconductor layer; and

[0151] A BSF layer formed in the silicon substrate corresponding to the P-region electrode, and the BSF layer and the P-region electrode have the same metal element, the peak concentration of the antimony element in the antimony-containing layer is a 1n , a / a 1n is defined as u n , the range of u n is 0.8 to 1E10, preferably 2 to 1E9, further preferably 10 to 1E8, preferably 100 to 1E7.

[0152] 41. The silicon solar cell according to item 40, wherein,

[0153] The concentration of the antimony element in the antimony-containing layer is equal to or greater than 1E13 atoms / cm 3 The thickness d 1n of the region is 2nm or more.

[0154] 42. The silicon solar cell according to item 40 or 41, wherein,

[0155] a / a 1n is defined as u n , the range of u n is 0.8 to 1E10, preferably 2 to 1E9, further preferably 10 to 1E8, preferably 100 to 1E7.

[0156] 43. The silicon solar cell according to any one of items 40 to 42, wherein,

[0157] The silicon substrate has a B in at least a portion of the region on the side near the interface passivation layer. xn Elements, forming elements containing B xn Layer; the layer containing B xn Layer B xn The concentration of the element is greater than 1E17 atoms / cm³ 3 The thickness d of the region 2n It is above 20nm.

[0158] 44. The silicon solar cell according to claim 43, wherein,

[0159] The B xn The element is selected from Group 5 or Group 6, and B in the N-type doped semiconductor layer xn The concentration of the element is b n b n The range is 1E19 to 5E22 atoms / cm 3 ,

[0160] The B-containing xn B in the layer xn The peak concentration of the element is b 1n ,

[0161] b n / b 1n Defined as v n v n The range is 0.5 to 1E10, preferably 2 to 1E9, further preferably 10 to 1E8, and most preferably 100 to 1E5.

[0162] 45. The silicon solar cell according to claim 44, wherein,

[0163] b 1n / a 1n Defined as w n w n >1, preferably >100, preferably greater than 1000, preferably 1E3 to 1E8, and even more preferably 1E4 to 1E8.

[0164] 46. ​​The silicon solar cell according to claim 43, wherein,

[0165] d 2n / d 1n The value is greater than or equal to 1, preferably 10 to 1E8, and more preferably 20 to 1E7.

[0166] 47. The silicon solar cell according to any one of items 40 to 46, wherein,

[0167] The interface passivation layer contains antimony element, the peak concentration of antimony element in the interface passivation layer is a 2n , preferably a 2n ranges from 1E13 to 1E18 atoms / cm 3 , and / or

[0168] The interface passivation layer contains B xn element, the peak concentration of B xn element in the interface passivation layer is b 2n , preferably b 2n ranges from 1E19 to 1E22 atoms / cm 3 ,

[0169] Preferably b 2n / a 2n >1, preferably 10 to 1E9.

[0170] 48. The silicon solar cell according to item 44, wherein,

[0171] The B xn element is phosphorus element, at this time the thickness d xn of the region in the B 3 containing layer where the concentration of phosphorus element is greater than 1E17 atoms / cm 2n is 20 nm or more, preferably 30 nm or more, 40 nm or more, or 50 nm or more, further preferably the thickness d 2n is 120 nm or more, 200 nm or more, or 300 nm or more.

[0172] 49. A solar cell module comprising the silicon solar cell according to any one of items 1 to 48. BRIEF DESCRIPTION OF DRAWINGS

[0173] Figure 1 is a conventional TOPCon cell structure diagram;

[0174] Figure 2 is a detail diagram of the passivation contact structure containing antimony element;

[0175] Figure 3 is a local TOPCon cell structure diagram containing antimony element;

[0176] Figure 4 is a back contact cell structure diagram containing antimony element;

[0177] Figure 5 is a back contact cell structure diagram containing antimony element;

[0178] Figure 6is a back contact cell structure diagram containing antimony element;

[0179] Figure 7 is a back contact cell structure diagram containing antimony element;

[0180] Figure 8 is a back contact cell (HPBC structure) structure diagram containing antimony element.

[0181] Reference signs:

[0182] 1 silicon substrate, 2 interface passivation layer, 3 doped semiconductor layer, 4 antimony-containing layer, 5 B-containing layer x 21 first interface passivation layer, 31 first doped semiconductor layer, 41 first antimony-containing layer, 51 B-containing layer xp 22 second interface passivation layer, 32 second doped semiconductor layer, 42 second antimony-containing layer, 52 B-containing layer xn 6 substrate passivation layer, 7 intrinsic region interface passivation layer, 8 intrinsic semiconductor layer containing antimony element, 9 intrinsic semiconductor layer not containing antimony element, 10 intrinsic region side surface interface passivation layer, 11 P region electrode. DETAILED DESCRIPTION

[0183] The following embodiments of the present application are merely used to illustrate the specific embodiments of realizing the present application, and these embodiments should not be understood as limiting the present application. Any changes, modifications, substitutions, combinations, simplifications made without departing from the spirit and principle of the present application are regarded as equivalent replacement modes, which fall within the protection scope of the present application.

[0184] The specific embodiments of the present application will be described in more detail below. However, it should be understood that the present application can be implemented in various forms and should not be limited by the embodiments described herein. On the contrary, these embodiments are provided so that the present application can be more thoroughly understood and the scope of the present application can be completely conveyed to those skilled in the art.

[0185] It should be noted that some terms are used in the specification and claims to refer to particular components. Those skilled in the art should understand that the same component can be referred to by different terms. The specification and claims of the present application do not distinguish components by the difference in terms, but by the difference in function. As mentioned throughout the specification and claims, "including" or "comprising" is an open term, which should be interpreted as "including but not limited to". The subsequent description of the specification is a preferred embodiment for implementing the present application, but the description is for the purpose of the general principles of the specification, and is not intended to limit the scope of the present application. The protection scope of the present application is defined by the appended claims.

[0186] As used herein, "substantially free of," with respect to a particular component, is used to denote that the particular component is not deliberately formulated into the composition and / or is only present as a contaminant or in trace amounts. Thus, the total amount of the particular component resulting from any inadvertent contamination of the composition is less than 0.05%, preferably less than 0.01%. Most preferred are compositions wherein the amount of the particular component is not detectable by standard analytical methods.

[0187] As used in this specification, "a" or "an" can mean one or more. As used in the claims, the word "a" or "an" when used in conjunction with the word "comprising" can mean one or more than one.

[0188] The term "or" is used in its inclusive sense (and not in its exclusive sense) unless the application clearly indicates otherwise; that is, unless the context clearly dictates otherwise, the term "or" is used in the sense that the word is used to mean either or both. As used herein, "another" can mean at least a second or more.

[0189] In the present application, the front side of a silicon substrate refers to the surface facing the sunlight under normal working conditions of the cell, while the back side refers to the surface of the other side of the silicon substrate opposite to the front side.

[0190] As understood by those skilled in the art, a silicon wafer generally refers to a raw material bare silicon wafer, and a silicon substrate generally refers to a part formed from the silicon wafer in the cell. A light absorber generally refers to a functional body in the cell for absorbing photons, generating photo-generated carriers, and separating the photo-generated carriers, which includes the silicon substrate for absorbing light and generating photo-generated carriers, and a region (e.g., a tunneling layer and a doped polycrystalline layer in a TOPCON structure) for separating the carriers generated by the silicon substrate. It can be understood that a simple emission reduction layer, and other functional layers, and electrodes do not belong to the light absorber. As understood by those skilled in the art, the light absorber or the silicon substrate can be recovered from the cell, and the silicon substrate defined in the present application can be obtained by peeling off different stacked structures.

[0191] In the present application, a doped region can also be used to separate photo-generated carriers, such as a region diffused with a third main group element (boron element) in the following TOPCon cell.

[0192] That is, the silicon substrate is obtained from a bare silicon wafer, and the silicon substrate includes a silicon bulk portion and a doped region portion, wherein the silicon bulk portion is a body region which is not doped in the cell process and has the same properties as the bare silicon wafer as the raw material. The doped region can be a doped region which is different from the doped element and has substantially the same properties and parameters as the body region, such as a doped region formed by direct doping or internal diffusion doping in the bare silicon wafer. In addition, in some cases, the doped region is a region where the antimony element or the doped element, such as a third main group element and a fifth main group element, specifically, for example, B or P, is concentrated, and in some cases, the doped region can be substantially the same as the body region, that is, mainly includes an antimony element doped region.

[0193] In the structure cell with at least part of TOPCon (for example, TOPCon cell, partial TOPCon cell, back contact hybrid cell and TBC cell), the silicon substrate generally includes a doped region formed in at least one side surface of the silicon substrate, and the performance of this doped region portion is the same as that of the bare silicon wafer as the raw material. The doped region can be a doped region which is different from the doped element and has substantially the same properties and parameters as the body region, that is, the antimony element concentration, the resistivity change rate, the resistivity offset rate and the like are substantially the same. Such a doped region can be formed by direct doping of the bare silicon wafer using the direct doping described in detail below, or can be formed by doping the doped element into the bare silicon wafer through layers such as a doped passivation layer and an interface passivation layer. In the present application, the doped region for the structure cell with at least part of TOPCon generally refers to a region formed by direct doping or internal diffusion doping in the raw material silicon wafer, wherein the internal diffusion doping is formed by a doped polysilicon layer called a doping layer into the inside of the bare silicon wafer through a tunneling layer called a passivation layer.

[0194] In the present application, the silicon wafer itself is not further limited, and can be a silicon wafer obtained after machining and slicing of a silicon rod after the end of rod drawing (which can also be referred to as a bare silicon wafer). The silicon substrate in the present application can be a partial silicon substrate recovered by peeling from a battery assembly, as long as it has a certain shape and can be in a sheet shape, i.e., the size of one face is greater than that of a face perpendicular thereto, and is flat or plate-shaped. The size of the silicon wafer or silicon substrate of the present application is also not limited, and the silicon wafer or silicon substrate can be of any size, and the partial silicon substrate recovered by peeling the light absorber from the battery assembly and peeling the other layer structure. In addition, those skilled in the art can understand that during peeling, if part of the doped region is damaged, as long as part of the doped region still exists, it should also be understood as the silicon substrate described in the present application, and the battery with such a silicon substrate is also a battery defined in the present application. For example, in a specific embodiment, the length of at least one side of the silicon wafer or silicon substrate (including the partial silicon substrate recovered by peeling the other layer structure) of the present application is greater than 156 mm, for example, it can be 158±2 mm, (160±2) mm, (165±2) mm, (170±2) mm, (175±2) mm, (180±2) mm, (185±2) mm, 190±2 mm, (195±2) mm,

[0195] (200±2) mm, (205±2) mm, (210±2) mm, (215±2) mm, (220±2) mm,

[0196] (225±2) mm, (230±2) mm, (235±2) mm, (240±2) mm, (245±2) mm,

[0197] (250±2) mm, (255±2) mm, (260±2) mm, (265±2) mm, (270±2) mm,

[0198] (275±2) mm, and any range between these values. For example, in a specific embodiment, the thickness of the silicon wafer or light silicon substrate (including the partial silicon substrate recovered by peeling the other layer structure) of the present application is at least 40-170 μm, for example, it can be 40 μm, 50 μm, 60 μm, 70 μm, 80 μm, 90 μm, 100 μm, 110 μm, 120 μm, 130 μm, 140 μm, 150 μm, 160 μm. In a specific embodiment, the size of the partial silicon substrate recovered by peeling the other layer structure can be smaller than the above-mentioned size, as long as the concentration of antimony element, the resistance, the resistance rate of change, the average resistance shift rate, etc. defined in the present application can be detected.

[0199] In the present application, the concentration of antimony element in the silicon wafer, silicon substrate or carrier separation layer (e.g. doped semiconductor layer, molybdenum oxide layer, PEDOT:PSS layer) can be detected by any method known to those skilled in the art, which can be selected by those skilled in the art based on the requirements, for example, it can be detected by SIMS, ICP-MS, GDMS, etc., preferably by ICP-MS method. Those skilled in the art can understand that the concentration of antimony element in the silicon wafer or silicon substrate can refer to the concentration of antimony element at any site on the surface of the silicon wafer, silicon substrate or carrier separation layer, or the average of the concentration of antimony element at multiple positions, or the average of the concentration of antimony element on the entire silicon wafer, silicon substrate or carrier separation layer. Those skilled in the art can select the above-mentioned any site for detection based on the actual situation based on the detection conditions and the instrument used, or calculate the average of multiple sites after detecting multiple sites as the concentration of antimony element. In a specific embodiment, the concentration of antimony element refers to the average value detected in the thickness direction of the silicon wafer, silicon substrate or carrier separation layer, for example, the concentration of antimony element in the silicon wafer is detected in a thickness direction by the SIMS method, and the average value in the thickness direction is calculated.

[0200] In the present application, the concentration of antimony element in the silicon substrate detected as described above is considered as a; the at least partial region of the carrier separation layer close to the silicon substrate has a maximum value of the concentration of antimony element in the antimony-containing layer detected by the above-mentioned method, i.e. the peak concentration of antimony element in the antimony-containing layer is a1.

[0201] In the present application, the concentration of B x , B xn , B xp in the silicon substrate can be detected by any method known to those skilled in the art, which can be selected by those skilled in the art based on the requirements, for example, it can be detected by SIMS, ICP-MS, GDMS, etc., preferably by ICP-MS method. Those skilled in the art can understand that the concentration of B x , B xn , B xp in the silicon substrate can refer to the concentration of B x , B xn , B xp at any site on the surface of the doped region of the silicon substrate, or the average of the concentration of B x , B xn , B xp at multiple positions, or the average of the concentration of B x , B xn , B xpThe average value of the concentration. The skilled person in the art can select any of the above-mentioned sites for detection based on the actual situation according to the detection conditions and the instrument used, or can detect multiple sites and then calculate the average value of the multiple sites as the concentration of B x , B xn , B xp . In a specific embodiment, the concentration of B x , B xn , B xp refers to the average value detected in the thickness of the doped region of the silicon substrate, for example, the concentration of B x , B xn , B xp is detected in the thickness direction of the doped region of the silicon substrate by the SIMS method, and the average value in the thickness direction is calculated.

[0202] The skilled person in the art can fully understand that the above-mentioned detection of the silicon wafer or silicon substrate can be detection of a silicon wafer or silicon substrate of any size, detection of a bare silicon wafer obtained by cutting after the end of the drawing of a silicon rod, or detection of a peeled silicon substrate peeled from a battery or module after other layer structures are peeled off, as long as the detection results obtained after the detection according to the method described in the present application fall within the scope of the present application, and are considered to be within the scope of the silicon wafer, solar cell, cell string or solar module claimed in the present application.

[0203] In the present application, the detection method of whether the silicon wafer or silicon substrate contains a certain element can be detected by SIMS, ICP-MS, GDMS, etc., and the metal element is preferably detected by ICP-MS method. In the present application, the solar cell is also referred to as a battery.

[0204] In a specific embodiment of the present application, only antimony element is doped as the fifth main group doping element in the silicon wafer (e.g. bare silicon wafer) or silicon substrate of the present application to replace the doping of phosphorus element. In this case, the skilled person in the art can understand that depending on the different sources of the silicon wafer raw material, the silicon wafer or silicon substrate itself can contain other elements, such as any one or two or three of phosphorus, gallium, germanium, but only actively dope antimony element as the fifth main group doping element to replace phosphorus element doping.

[0205] Figure 1 A conventional TOPCon cell is shown, which includes a silicon substrate 1, an interface passivation layer 2 and a doped semiconductor layer 3 in sequence. The existing solar cell has the problem of reduced efficiency due to poor passivation.

[0206] In view of the problems in the prior art, the present application provides a silicon solar cell, such as Figure 2As shown, it includes: a silicon substrate 1, the silicon substrate 1 containing an antimony element, and a carrier separation layer formed on the silicon substrate 1, wherein the carrier separation layer has an antimony element forming an antimony-containing layer 4 in at least a partial region on a side close to the silicon substrate 1, the peak concentration of the antimony element in the antimony-containing layer 4 is a1, and a1 is equal to greater than 1E13 atoms / cm 3 For example, the peak concentration of the antimony element in the antimony-containing layer 4 can be 1E13 atoms / cm 3 , 5E13 atoms / cm 3 , 1E14 atoms / cm 3 , 5E14 atoms / cm 3 , 1E15 atoms / cm 3 , 5E15 atoms / cm 3 , 1E16 atoms / cm 3 , 5E16 atoms / cm 3 , 1E17 atoms / cm 3 , 5E17 atoms / cm 3 , 1E18 atoms / cm 3 , and any value between these values.

[0207] The peak concentration of the antimony element in the antimony-containing layer 4 is equal to greater than 1E13 atoms / cm 3 , the proportion of bubbles present in the carrier separation layer in the prior art can be reduced, and the passivation problem and electrical transmission of the carrier separation layer can be taken into account, while improving the mechanical properties of the cell, thereby improving the efficiency of the solar cell.

[0208] In some specific embodiments, the concentration of the antimony element in the silicon substrate 1 is a, a ranges from 1E13 to 1E18 atoms / cm 3 , for example, it can be 1E13 atoms / cm 3 , 5E13 atoms / cm 3 , 1E14 atoms / cm 3 , 5E14 atoms / cm 3 , 1E15 atoms / cm 3 , 5E15 atoms / cm 3 , 1E16 atoms / cm 3 , 5E16 atoms / cm 3 , 1E17 atoms / cm 3 , 5E17 atoms / cm 3 , 1E18 atoms / cm 3 , and any value between these values.

[0209] Since the present application dopes the silicon substrate 1 with Sb element, the defect is less due to low concentration doping, which can improve the charge mobility of the silicon substrate and reduce the resistivity of the silicon substrate; secondly, the Sb element can reduce the differentiation of the band edge level of the crystalline silicon caused by doping, and the Sb element doping ionization rate is higher.

[0210] In some specific embodiments, the concentration of the Sb element in the antimony-containing layer 4 is equal to or greater than 1E13 atoms / cm 3 The thickness d1 of the region is 2nm or more, for example, it can be 2nm, 5nm, 10nm, 15nm, 20nm, 25nm, 30nm, and any value between these values.

[0211] In some specific embodiments, a / a1 is defined as u, and u ranges from 0.8 to 1E10, for example, it can be 0.8, 0.9, 1, 2, 5, 10, 50, 100, 500, 1000, 1E5, 5E5, E6, 5E6, 1E7, 5E7, 1E8, 5E8, 1E9, 5E9, 1E10, and any value between these values.

[0212] In some specific embodiments, u is 2 to 1E9. In some specific embodiments, u is 10 to 1E8. In some specific embodiments, u is 100 to 1E7.

[0213] In some specific embodiments, no interface passivation layer is provided between the silicon substrate and the carrier separation layer, and at this time, u ranges from 1 to 2, for example, u can be 1, 1.1, 1.2, 1.3, 1.4, 1.5, 1.6, 1.7, 1.8, 1.9, 2.0. By setting u in the above range, the concentration of Sb that escapes from the silicon substrate into the carrier separation layer can be ensured to reach the preset value, thereby reducing the bubble ratio and improving the passivation effect.

[0214] In some specific embodiments, an interface passivation layer with impurity adsorption function is provided between the silicon substrate and the carrier separation layer, and at this time, u ranges from 0.8 to 1E10, for example, it can be 0.8, 0.9, 1, 2, 5, 10, 50, 100, 500, 1000, 1E5, 5E5, E6, 5E6, 1E7, 5E7, 1E8, 5E8, 1E9, 5E9, 1E10, and any value between these values. By setting u in the above range, the concentration of Sb that escapes from the silicon substrate into the carrier separation layer can be ensured to reach the preset value, thereby reducing the bubble ratio and improving the passivation effect.

[0215] In some embodiments, an interface passivation layer which does not have the function of adsorbing impurities is arranged between the silicon substrate and the carrier separation layer, and u is in the range of 2-1E9, for example, can be 2, 3, 4, 5, 6, 7, 8, 9, 10, 50, 100, 500, 1000, 1E5, 5E5, E6, 5E6, 1E7, 5E7, 1E8, 5E8, 1E9, and any value between these values. By setting u in the above range, the antimony concentration that escapes from the silicon substrate into the carrier separation layer can reach a preset value, thereby reducing the bubble proportion and improving the passivation effect.

[0216] The concentration of the antimony element in the silicon substrate 1 is in the range of 1E13-1E18 atoms / cm 3 , and / or the thickness d1 of the region in which the concentration of the antimony element in the antimony-containing layer 4 is equal to or greater than 1E13 atoms / cm 3 is 2 nm or more. Since the recombination at the interface between the carrier separation layer and the silicon substrate mainly comes from a certain thickness of the carrier separation layer close to the silicon substrate, by controlling the concentration of the antimony element in the above range, the proportion of bubbles in the 2-nm-thick range can be reduced, the recombination problem caused by bubbles in the bottom layer of the carrier separation layer can be further improved, the passivation problem of the entire carrier separation layer can be basically solved, and thus the efficiency of the solar cell can be improved.

[0217] In the present application, the carrier separation layer can be selected from a doped semiconductor layer, a molybdenum oxide layer, a PEDOT:PSS layer, etc. When the carrier separation layer is a doped semiconductor layer 3, an interface passivation layer 2 is arranged between the silicon substrate 1 and the carrier separation layer. The interface passivation layer 2 can further improve the interface passivation effect of the silicon substrate and the carrier separation layer.

[0218] The materials and thicknesses of the doped semiconductor layer 3 and the interface passivation layer 2 can be known materials and thicknesses in the prior art. For example, the thickness of the doped semiconductor layer 3 can be 50-300 nm; the material of the doped semiconductor layer 3 can be selected from one or more of polycrystalline silicon, amorphous silicon, or microcrystalline silicon. The thickness of the interface passivation layer 2 can be 0.1-5 nm; the material of the interface passivation layer 2 can be selected from one or more of silicon oxide, aluminum oxide, silicon nitride, molybdenum oxide, or intrinsic amorphous silicon. Since the recombination at the interface between the carrier separation layer and the interface passivation layer mainly comes from a certain thickness of the carrier separation layer close to the interface passivation layer, the above parameter range can reduce the proportion of bubbles in the 2-nm-thick range, further improve the recombination problem caused by bubbles in the bottom layer of the carrier separation layer, basically solve the passivation problem of the entire carrier separation layer, and thus improve the efficiency of the solar cell.

[0219] In some specific embodiments, the antimony concentration in the antimony-containing layer 4 of the carrier separation layer gradually decreases from the side closer to the silicon substrate 1 to the side opposite to the silicon substrate 1. This arrangement is primarily because a higher antimony concentration closer to the silicon substrate 1 results in fewer bubbles, thus reducing recombination problems caused by bubbles. Without bubbles in the silicon substrate, the escape of antimony from the silicon substrate does not affect the passivation of the silicon substrate. Furthermore, surface recombination has a significant impact on overall recombination; therefore, a higher antimony concentration closer to the surface in the carrier separation layer 4 leads to better passivation at the interface.

[0220] Furthermore, such as Figure 2 As shown, the silicon substrate 1 has a B layer in at least a partial region on the side near the interface passivation layer 2. x Elements, forming elements containing B x Layer 5. Among them, B x The element can be a Group 5 (e.g., phosphorus) or Group 6 (e.g., sulfur) element, or a Group 3 element, such as boron or aluminum. This is because at least a portion of the region near the interface passivation layer 2 contains B... x Elements that can form emitters or high / low junctions in silicon substrate 1 can passivate and further improve battery performance.

[0221] In some specific implementations, containing B x B in layer 5 x The concentration of the element is greater than 1E17 atoms / cm³ 3 The thickness d2 of the region is greater than 20nm, for example, it can be 20nm, 50nm, 100nm, 200nm, 500nm, 1μm, 2μm, 5μm, and any value between these values.

[0222] In some specific embodiments, B in the doped semiconductor layer 3 x The concentration of the element is b, and the range of b is 1E18~5E22 atoms / cm³. 3 The one containing B x B in layer 5 x The peak concentration of the element is 1 atom / cm³. 3 Let b / b1 be defined as v, where v ranges from 0.5 to 1E10. For example, it can be 0.5, 0.6, 0.7, 0.8, 0.9, 1, 2, 5, 10, 50, 100, 500, 1000, 1E5, 5E5, E6, 5E6, 1E7, 5E7, 1E8, 5E8, 1E9, 5E9, 1E10, or any value between these ranges. In some specific embodiments, v is 2 to 1E9. In some specific embodiments, v is 10 to 1E8. In some specific embodiments, v is 100 to 1E5.

[0223] In some embodiments, the phosphorus concentration in the interface passivation layer 2 is higher than the carrier separation layer (doped semiconductor layer 3).

[0224] When B x is phosphorus, v ranges from 0.5 to 1E10. When B x is other elements, v ranges from 1 to 1E10. B x is able to be in-diffused into the silicon substrate 1 to form a preset concentration, such B x elements, depending on their properties, are able to form an emitter or a high-low junction to improve passivation effect. However, B x excessive doping concentration will introduce recombination centers in the silicon substrate 1, thereby reducing the battery performance. In the present application, by controlling the range of v, the passivation effect can be improved without affecting the battery performance.

[0225] In some embodiments, b1 / a1 is defined as w, w>1, for example, can be 10, 100, 1000, 1E4, 5E4, 1E5, 5E5, 1E6, 5E6, 1E7, 5E7, 1E8, and any value between these values. In some embodiments, w>100. In some embodiments, w is greater than 1000. In some embodiments, w is 1E3 to 1E8.

[0226] In the present application, the larger b1 is, the better the passivation effect of the emitter or high-low junction formed is, and the higher the battery performance is, therefore b1 cannot be too small, that is, w cannot be too small, otherwise the passivation effect of the emitter or high-low junction formed will be poor, therefore w should be greater than 1. However, excessive b1 (i.e. w is too large) will introduce recombination centers in the silicon substrate 1, thereby reducing the battery performance. In the present application, by controlling the range of w, the passivation effect can be improved without affecting the battery performance.

[0227] In the present application, by controlling w in the above range, the iVoc of the battery prepared can be improved, which shows that the passivation performance of the battery can be improved. And whether it is for the n-type doped structure or the p-type doped structure formed by the above structure, the passivation performance of the battery formed thereby can be effectively improved.

[0228] In some embodiments, d2 / d1 is defined as x, x is greater than or equal to 1, for example, can be 1, 10, 20, 100, 1000, 1E4, 5E4, 1E5, 5E5, 1E6, 5E6, 1E7, 5E7, 1E8, and any value between these values. In some embodiments, x ranges from 10 to 1E8. In some embodiments, x is 20 to 1E7.

[0229] In the present application, the larger d2 is, the better the passivation effect of the emitter or high-low junction formed is, and the higher the battery performance is, so d2 cannot be too small, that is, x cannot be too small, otherwise the passivation effect of the emitter or high-low junction formed will be poor. However, too high d2 will make the Auger recombination region too wide, thereby reducing the battery performance. In the present application, by controlling the range of x, the passivation effect can be improved without affecting the battery performance.

[0230] In the present application, similar to the effect of w described above, by controlling x in the range described above, the iVoc of the battery prepared can be improved, which shows that the passivation performance of the battery can be improved. And no matter for the n-type doped structure or the p-type doped structure formed by the structure described above, the passivation performance of the battery formed thereby can be effectively improved.

[0231] In some specific embodiments, the peak concentration of the antimony element in the interface passivation layer 2 is a2, and a2 ranges from 1E13 to 1E18 atoms / cm 3 The interface passivation layer 2 contains B x element, and the peak concentration of the B x element in the interface passivation layer 2 is b2, and b2 ranges from 1E19 to 1E22 atoms / cm 3 This is because too low B x element in the interface passivation layer 2 will make the carrier transport efficiency of the interface passivation layer 2 low, and the b2 concentration cannot reach 1E22 atoms / cm 3 above due to the influence of solid solubility. On the other hand, the interface passivation layer 2 has 1E13 to 1E18 atoms / cm 3 antimony element, which can ensure that the antimony element in the carrier separation layer has a preset concentration.

[0232] In some specific embodiments, b2 / a2 is defined as y, and y>1, for example, it can be 1, 2, 5, 10, 50, 100, 500, 1000, 1E5, 5E5, E6, 5E6, 1E7, 5E7, 1E8, 5E8, 1E9, and any value between these values. In some specific embodiments, y ranges from 10 to 1E9.

[0233] In some specific embodiments, the B x element is an element selected from the fifth main group or the sixth main group, the thickness d1 of the region in which the concentration of the antimony element in the antimony-containing layer 4 is equal to or greater than 1E13 atoms / cm 3 is 2nm or more, and w ranges from 1E4 to 1E8. When the B xWhen the element is an element selected from the fifth main group or the sixth main group, the out-diffused antimony element is also a fifth main group element, which increases the effective doping concentration of the carrier separation layer, thereby increasing the electron concentration of the carrier separation layer, improving the passivation and conductivity of the carrier separation layer, reducing the transmission resistance of the carrier separation layer, and reducing the interface resistance between the silicon substrate and the carrier separation layer.

[0234] Further, the concentration of the element B x in the doped semiconductor layer 3 is 1E19 to 5E22 atoms / cm 3 The concentration of the element B x When the element is a phosphorus element, the concentration of the phosphorus element in the phosphorus-containing layer is greater than 1E17 atoms / cm 3 The thickness d2 of the region is 20 nm or more, preferably 30 nm or more, 40 nm or more, or 50 nm or more, and further preferably the thickness d2 is 120 nm or more, 200 nm or more, or 300 nm or more.

[0235] In some specific embodiments, the element B x is an element selected from the third main group, and the concentration of the antimony element in the antimony-containing layer 4 is greater than 1E13 atoms / cm 3 The thickness d1 of the region is 3 nm or more, and preferably w is in the range of 1E3 to 1E7.

[0236] In one specific embodiment, when the carrier separation layer is a silicon thin film, and the element B x is a third main group element, the carrier separation layer is P-type, and thus the antimony element, as a fifth main group element, has a faster doping speed in the carrier separation layer, and the thickness of the antimony-containing layer formed is thicker.

[0237] Further, the concentration of the element B x in the doped semiconductor layer is 1E18 to 5E21 atoms / cm 3 When the element B x is a boron element, the concentration of the boron element in the boron-containing layer is greater than 1E17 atoms / cm 3 The thickness d2 of the region is 30 nm or more, preferably 40 nm or more, 50 nm or more, and further preferably the thickness d2 is 100 nm or more, 200 nm or more, 300 nm or more, 400 nm or more, 500 nm or more, 600 nm or more, 700 nm or more, 800 nm or more, 900 nm or more, 1000 nm or more, 1100 nm or more, or 1200 nm or more.

[0238] As can be understood by those skilled in the art, the above-described silicon solar cell can encompass a solar cell having Figure 2The various types of silicon solar cells of the illustrated structure, as long as the structure of the cell, the concentration of the antimony element in the cell, and the distribution of the element in the cell all meet the above content. For example, the silicon solar cell mentioned in the present application can be a TopCon cell, a local TopCon cell, a back contact cell, an HPBC cell, etc. x The various types of silicon solar cells of the illustrated structure, as long as the structure of the cell, the concentration of the antimony element in the cell, and the distribution of the element in the cell all meet the above content. For example, the silicon solar cell mentioned in the present application can be a TopCon cell, a local TopCon cell, a back contact cell, an HPBC cell, etc.

[0239] In one specific embodiment, the silicon solar cell is a TopCon cell, which has a structure as illustrated, and generally includes a silicon substrate 1 containing an antimony element, an interface passivation layer 2 formed on the silicon substrate 1, a doped semiconductor layer 3 which is a doped semiconductor layer and is formed on the interface passivation layer 2, wherein the doped semiconductor layer 3 has an antimony element forming an antimony-containing layer 4 in at least a partial region on a side close to the silicon substrate 1, the peak concentration of the antimony element in the antimony-containing layer 4 is a1, and a1 is equal to greater than 1E13 atoms / cm Figure 2 The various types of silicon solar cells of the illustrated structure, as long as the structure of the cell, the concentration of the antimony element in the cell, and the distribution of the element in the cell all meet the above content. For example, the silicon solar cell mentioned in the present application can be a TopCon cell, a local TopCon cell, a back contact cell, an HPBC cell, etc. 3 The doped semiconductor layer 3 can be a P-type doped semiconductor layer or an N-type doped semiconductor layer.

[0240] When the doped semiconductor layer 3 is a P-type doped semiconductor layer, and an N-type doped semiconductor layer is formed in the other side of the silicon substrate 1 away from the P-type doped semiconductor layer, the peak concentration of the antimony element in the antimony-containing layer is a 1p , a / a 1p is defined as u p , u p ranges from 0.8 to 1E10, preferably from 2 to 1E9, further preferably from 10 to 1E8, and preferably is 100 to 1E7.

[0241] In one specific embodiment, the thickness d 3 of the region in which the concentration of the antimony element in the antimony-containing layer is equal to greater than 1E13 atoms / cm 1p is 3 nm or more.

[0242] When the doped semiconductor layer 3 is an N-type doped semiconductor layer, and a P-type doped semiconductor layer is formed in the silicon substrate on the other side of the silicon substrate 1 away from the N-type doped semiconductor layer, the peak concentration of the antimony element in the antimony-containing layer is a 1n , a / a 1n is defined as u n , u n ranges from 0.8 to 1E10, preferably from 2 to 1E9, further preferably from 10 to 1E8, and preferably is 100 to 1E7.

[0243] In one specific embodiment, the thickness d 3 of the region in which the concentration of the antimony element in the antimony-containing layer is equal to greater than 1E13 atoms / cm 1nis greater than or equal to 2 nm.

[0244] u, u n or u p Controlled within the above range, both Auger recombination and bubbles can be taken into account. The more the antimony element escapes, the fewer the bubbles, the better the surface passivation, and the semiconductor layer Auger recombination will be reduced.

[0245] In one specific way, the structure shown in Figure 2 is formed on the front or back surface of a silicon substrate. When Figure 2 the structure shown in is formed on the back surface of a silicon substrate, that is, an interface passivation layer is provided on the back surface of the silicon substrate, and a P-type doped semiconductor layer or an N-type doped semiconductor layer is provided on the side of the interface passivation layer away from the silicon substrate. That is, the carrier separation layer and the interface passivation layer are formed on the back surface of the silicon substrate, forming a PN junction with the silicon substrate. At this time, since the gap site of the silicon substrate doped with antimony is less doped, less recombination occurs, Figure 2 the TopCon structure shown in is provided as an emitter on the back surface of the cell, the performance is more advantageous.

[0246] In one specific embodiment, the silicon solar cell is a partial TopCon cell. As shown in Figure 3 , the partial TopCon cell includes: a silicon substrate 1, the silicon substrate 1 containing an antimony element, a first interface passivation layer 21 and a second interface passivation layer 22, which are respectively formed on both sides of the silicon substrate 1, a first doped semiconductor layer 31 and a second doped semiconductor layer 32, which are both doped semiconductor layers and are respectively formed on the side of the first interface passivation layer 21 away from the silicon substrate 1 and the side of the second interface passivation layer 22 away from the silicon substrate 1, and the area of the first doped semiconductor layer 31 is less than or greater than the area of the second doped semiconductor layer 32. In Figure 3 , it is shown that the first doped semiconductor layer 31 is formed on part of the area of the silicon substrate 1, and the second doped semiconductor layer 32 is formed on the entire area of the silicon substrate 1, but those skilled in the art can fully understand that such a structure is only exemplary. Those skilled in the art can design the structure based on their understanding of the partial TopCon cell.

[0247] The first doped semiconductor layer 31 is doped with a third main group element, and the second doped semiconductor layer 32 is doped with a fifth main group or a sixth main group element. Among them, the first doped semiconductor layer 31 has an antimony element on at least part of the side close to the first interface passivation layer 21 to form a first antimony-containing layer 41, and the second doped semiconductor layer 32 has an antimony element on at least part of the side close to the second interface passivation layer 22 to form a second antimony-containing layer 42, the peak concentration of the antimony element in the first antimony-containing layer 41 is a 1p , and a 1p is equal to greater than 1E13 atoms / cm 3The peak concentration of antimony in the second antimony-containing layer 42 is a. 1n , and a 1n Equal to or greater than 1E13 atoms / cm 3 .

[0248] Those skilled in the art will understand that the concentration and distribution of antimony and dopant elements in the first interface passivation layer 21 and the second interface passivation layer 22, as well as the first doped semiconductor layer 31 and the second doped semiconductor layer 32, all satisfy the above description of the interface passivation layer and the doped semiconductor layer.

[0249] In a specific way, targeting Figure 3 The battery shown has an antimony concentration in the first antimony-containing layer that is greater than 1E13 atoms / cm³. 3 The thickness d of the region 1p The concentration of antimony in the second antimony-containing layer is greater than or equal to 1E13 atoms / cm³. 3 The thickness d of the region 1n , that is, d 1p ≥d 1n .

[0250] Specifically, the concentration of antimony in the first antimony-containing layer 41 is greater than or equal to 1E13 atoms / cm³. 3 The thickness d of the region 1p The concentration of antimony in the second antimony-containing layer 42 is greater than 2nm, and is equal to or greater than 1E13 atoms / cm. 3 The thickness d of the region 1n It is 3nm or larger.

[0251] The concentration of antimony in the antimony-containing layer of the first doped semiconductor layer 31 gradually decreases from the side closer to the silicon substrate 1 to the side opposite to the silicon substrate 1, and the concentration of antimony in the antimony-containing layer of the second doped semiconductor layer 32 gradually decreases from the side closer to the silicon substrate 1 to the side opposite to the silicon substrate 1.

[0252] will a / a 1p Defined as u p u p The range is 0.8 to 1E10, preferably 2 to 1E9, more preferably 10 to 1E8, and most preferably 100 to 1E7; a / a 1n Defined as u n u n The range is 0.8 to 1E10, preferably 2 to 1E9, further preferably 10 to 1E8, and most preferably 100 to 1E7.

[0253] The silicon substrate 1 has a B in at least a partial region on the side near the first interface passivation layer 21. xpelement, forming a B-containing xp layer 51; the silicon substrate 1 has, in at least a partial region on the side close to the second interface passivation layer 22, B xn element, forming a B-containing xn layer 52; B xp element in the B-containing xp layer 51 has a concentration greater than 1E17 atoms / cm 3 ; the thickness d of the region in which the B 2p element has a concentration greater than 1E17 atoms / cm xn ; the thickness d of the region in which the B xn element has a concentration greater than 1E17 atoms / cm 3 ; the thickness d of the region in which the B 2n element has a concentration greater than 1E17 atoms / cm

[0254] wherein the B xp element is an element selected from the third main group, the concentration of the B xp element in the first doped semiconductor layer 31 is b p , b p ranging from 1E18 to 5E21 atoms / cm 3 , the B xp element in the B-containing xp layer 51 has a peak concentration of b 1p . The B xn element is an element selected from the fifth or sixth main group, the concentration of the B xn element in the second doped semiconductor layer 32 is b n , b n ranging from 1E19 to 5E22 atoms / cm 3 , the B xn element in the B-containing xn layer 52 has a peak concentration of b 1n . b p / b 1p is defined as v p , v p ranging from 1 to 1E10, preferably from 2 to 1E9, further preferably from 10 to 1E8, and preferably from 100 to 1E5. b n / b 1n is defined as v n , v n ranging from 0.5 to 1E10, preferably from 2 to 1E9, further preferably from 10 to 1E8, and preferably from 100 to 1E5.

[0255] b 1p / a 1p is defined as w p , w p>1, preferably >100, preferably more than 1000, preferably 1E3~1E8, further preferably 1E3~1E7. In the present application, by controlling w 1n / a 1n defined as w n , w n >1, preferably >100, preferably more than 1000, preferably 1E3~1E8, further preferably 1E4~1E8. In the present application, by controlling w p in the above range, the iVocof the prepared battery can be improved, showing that the passivation performance of the battery can be improved. In the present application, by controlling w n in the above range, the iVocof the prepared battery can be improved, showing that the passivation performance of the battery can be improved.

[0256] d 2p / d 1p more than or equal to 1, preferably 10~1E8, further preferably 20~1E7, d 2n / d 1n more than or equal to 1, preferably 10~1E8, further preferably 20~1E7; preferably d 1p ≥d 1n ; and / or d 2p >d 2n , preferably d 2p -d 2n ≥5nm, preferably ≥10nm.

[0257] wherein, since d 2p >d 2n at this time, when light is irradiated onto the silicon substrate, one effective photon will excite one electron-hole pair, and under the separation effect of the PN junction, the electron-hole pair will be separated at the PN junction, forming electron carriers and hole carriers. d 2p >d 2n can ensure the effective separation of the PN junction for carriers. Since the P region is the emitter region, better passivation effect is required, and therefore d 1p ≥d 1n can make more antimony elements overflow, which is beneficial to the passivation of the carrier selection layer interface of the emitter region. The emitter is more important for the battery, i.e. the passivation effect of the emitter is good, which can achieve better battery efficiency.

[0258] In the present application, similar to the effect of the above w p , by controlling d 2p / d 1p in the above range, the iVocof the prepared battery can be improved, showing that the passivation performance of the battery can be improved. In the present application, similar to the effect of the above w n , by controlling d 2n / d 1n By controlling the above range, the iVoc of the prepared battery can be improved, and the passivation performance of the battery can be improved.

[0259] The first interface passivation layer 21 contains the antimony element, and the peak concentration of the antimony element in the first interface passivation layer 21 is a 2p , a 2p ranges from 1E13 to 1E18 atoms / cm 3 . The first interface passivation layer 21 contains the B xp element, and the peak concentration of the B xp element in the first interface passivation layer 21 is b 2p , b 2p ranges from 1E19 to 1E22 atoms / cm 3 . Preferably, b 2p / a 2p >1, preferably 10 to 1E9.

[0260] The second interface passivation layer 22 contains the antimony element, and the peak concentration of the antimony element in the second interface passivation layer 22 is a 2n , a 2n ranges from 1E13 to 1E18 atoms / cm 3 . The second interface passivation layer 22 contains the B xn element, and the peak concentration of the B xn element in the second interface passivation layer 22 is b 2n , b 2n ranges from 1E19 to 1E22 atoms / cm 3 . Preferably, b 2n / a 2n >1, preferably 10 to 1E9.

[0261] When the B xn element is the phosphorus element, at this time the thickness d 2n of the region in which the concentration of the phosphorus element in the B xn containing layer 52 is greater than 1E17 atoms / cm 3 is 20 nm or more, preferably 30 nm or more, 40 nm or more, or 50 nm or more, and further preferably the thickness d 2n is 120 nm or more, 200 nm or more, or 300 nm or more. When the B xp element is the boron element, at this time the thickness d 2p of the region in which the concentration of the boron element in the B xp containing layer 51 is greater than 1E17 atoms / cm 3 is 30 nm or more, preferably 40 nm or more, 50 nm or more, and further preferably the thickness d 2pequal to or greater than 1E13 atoms / cm

[0262] In one embodiment, the silicon solar cell is a back contact cell. Figures 4-7 Several typical structures of back contact cells are shown. The back contact cell includes: a silicon substrate 1 containing antimony element, a first interface passivation layer 21 and a second interface passivation layer 22, which are respectively formed on one side of the silicon substrate 1, a first doped semiconductor layer 31 and a second doped semiconductor layer 32, which are both doped semiconductor layers and are respectively formed on one side of the first interface passivation layer 21 away from the silicon substrate 1 and one side of the second interface passivation layer 22 away from the silicon substrate 1, the first doped semiconductor layer 31 is doped with a third main group element, and the second doped semiconductor layer 32 is doped with a fifth main group or sixth main group element. Among them, the first doped semiconductor layer 31 has antimony element in at least part of the region on the side close to the first interface passivation layer 21 to form a first antimony-containing layer 41, and the second doped semiconductor layer 32 has antimony element in at least part of the region on the side close to the second interface passivation layer 22 to form a second antimony-containing layer 42, the peak concentration of antimony element in the first antimony-containing layer 41 is a 1p , and a 1p is equal to greater than 1E13 atoms / cm 3 , and the peak concentration of antimony element in the second antimony-containing layer 42 is a 1n , and a 1n is equal to greater than 1E13 atoms / cm 3 . The first interface passivation layer 21 and the first doped semiconductor layer 31 form a P-type region, and the second interface passivation layer 22 and the second doped semiconductor layer 32 form an N-type region.

[0263] Among them, the concentration and distribution of antimony element and doping element in the silicon substrate 1, the first interface passivation layer 21 and the second interface passivation layer 22, and the first doped semiconductor layer 31 and the second doped semiconductor layer 32 can refer to the above description of the local TOPCon cell.

[0264] In one embodiment, for the cell shown in Figures 4-7 , the thickness d 3 of the region where the concentration of antimony element in the first antimony-containing layer is equal to or greater than 1E13 atoms / cm 1p is greater than or equal to the thickness d 3 of the region where the concentration of antimony element in the second antimony-containing layer is equal to or greater than 1E13 atoms / cm 1n , that is, d 1p ≥ d1n .

[0265] As shown in Figures 4-7 , the p-type region and the n-type region have a spacing region therebetween, and a base passivation layer 6 is provided in the spacing region of the p-type region and the n-type region, the base passivation layer covering the spacing region of the silicon substrate 1 not covered by the p-type region and the n-type region.

[0266] Further, an antimony-containing region is formed in a region of the base passivation layer 6 close to the silicon substrate 1, the concentration of the antimony element of the antimony-containing region being a3, a3 being greater than 1E13 atoms / cm 3 The thickness d 1钝化层 of the region of the base passivation layer 6 close to the silicon substrate 1 is d 1钝化层 ≤d 1n ≤d 1p , and preferably the d 1钝化层 ≥1nm.

[0267] The thickness d 1钝化层 of the region of the base passivation layer 6 close to the silicon substrate 1 is d 1n ≤d 1p This is because the passivation layer is not an electrically conductive region, so there is less restriction, and a passivation layer such as aluminum oxide / silicon nitride having high passivation quality can be directly used for passivation, so there is no need for too much antimony element to be used to improve the passivation effect of the passivation region for the purpose of reducing bubbles.d 1n The technical effects of d 1p ≤d 1钝化层 ≤d 1n ≤d 1p can be referred to above, and will not be described again here.

[0268] In the present application, by controlling d 3 ≤d 1i ≤d 1i in the above ranges, on the basis of improving the passivation performance of the PN region, the iVoc of the spacing region can be further improved, and the passivation performance of the cell can be improved.

[0269] The spacing region between the p-type region and the n-type region can be an intrinsic spacing region, the intrinsic spacing region covering the spacing region of the silicon substrate 1 not covered by the p-type region and the n-type region, and sequentially comprising an intrinsic semiconductor layer 8 containing an antimony element and an intrinsic semiconductor layer 9 not containing an antimony element from the silicon substrate 1 toward the back surface direction, and preferably sequentially comprising an intrinsic region interface passivation layer 7, the intrinsic semiconductor layer 8 containing an antimony element, and the intrinsic semiconductor layer 9 not containing an antimony element from the silicon substrate toward the back surface direction.

[0270] The concentration of the antimony element of the intrinsic semiconductor layer 8 containing an antimony element is a3, and a3 is greater than 1E13 atoms / cm 1n The thickness d 1p of the region of the intrinsic semiconductor layer 8 containing an antimony element close to the silicon substrate 1 is d 1i≥ 2 nm.

[0271] In the present application, the control of d 1钝化层 ≤ d 1n Therefore, the Sb element can be used to improve the passivation effect of the passivation region without too much Sb element.

[0272] In the present application, the i semiconductor has slightly lower passivation performance, and the heat treatment process of the i layer is not too much in general, so the crystallization structure of the i layer may not be good, and a little more Sb element is needed to improve the passivation effect of the bottom layer, so the control of d 1i ≥ 2 nm can better maintain the passivation effect.

[0273] In the present application, by controlling d 1i ≤ d 1n ≤ d 1p Controlled in the above range, on the basis of improving the passivation performance of the PN region, further can improve the iVoc of the interval region, which shows that the passivation performance of the battery can be improved.

[0274] The region close to the silicon substrate 1 in the intrinsic region interface passivation layer 7 can contain Sb element, and the concentration of the Sb element contained in the intrinsic region interface passivation layer 7 is a3, a3 is greater than 1E13 atoms / cm 3 The thickness d 1钝化层 of the region is d 1钝化层 ≤ d 1n ≤ d 1p , preferably the d 1钝化层 ≥ 2 nm. In the present application, by controlling d 1钝化层 ≤ d 1n ≤ d 1p Controlled in the above range, on the basis of improving the passivation performance of the PN region, further can improve the iVoc of the interval region, which shows that the passivation performance of the battery can be improved.

[0275] Further, an intrinsic region side surface interface passivation layer 10 can be further arranged between the intrinsic interval region and the p-type region or the n-type region. The side surface interface passivation layer 10 can be arranged on the side close to the p-type region, or can be arranged on the side close to the n-type region.

[0276] In one specific embodiment, the silicon solar cell is a back contact cell with HPBC structure. As Figure 8As shown, the back contact cell of the HPBC structure includes: a silicon substrate 1 containing an antimony element, an interface passivation layer 2 formed on the silicon substrate 1, a doped semiconductor layer 3 which is a doped semiconductor layer and is formed on the interface passivation layer 2 and is an N-type doped semiconductor layer to form an N-type region, a P-type electrode 11 formed on the side of the silicon substrate with the N-type doped semiconductor layer and arranged in intervals with the N-type doped semiconductor layer, and a BSF layer formed in the silicon substrate 1 corresponding to the P-type electrode 11, and the BSF layer and the P-type electrode have the same metal element. Among them, the doped semiconductor layer 3 has an antimony element in at least part of the region close to the side of the silicon substrate 1 to form an antimony-containing layer 4, and the peak concentration of the antimony element in the antimony-containing layer 4 is a 1n , and a 1n is equal to greater than 1E13 atoms / cm 3 .

[0277] The P-type electrode can be a metal electrode known in the art that can form a P-type region, such as an aluminum electrode.

[0278] The concentrations and distributions of the antimony element and the doped element in the silicon substrate 1, the interface passivation layer 2, the doped semiconductor layer 3, and the antimony-containing layer 4 can be referred to the above description of the doped element B x is a description of the element part selected from the fifth main group or the sixth main group.

[0279] The present application also provides a solar cell module comprising any one of the above-mentioned silicon solar cells.

[0280] Embodiment

[0281] The materials used in the experiments and the test methods are generally and / or specifically described in the present application. In the following examples, % means wt%, i.e. weight percentage, unless otherwise specified. The reagents or instruments used are not specified by the manufacturer, and are all conventional reagent products that can be obtained commercially.

[0282] Preparation Example

[0283] Silicon wafers doped with different concentrations of antimony and phosphorus were prepared based on the method described in CN117702269A. The concentrations of phosphorus and antimony elements in the prepared silicon wafers are shown in Table 1.

[0284] Bubble test comparison (antimony concentration) of Example 1

[0285] The n-type silicon wafer is polished by an alkali solution, cleaned by an acid, and slowly pulled up and washed by water, and then dried, and then placed in an LPCVD furnace tube to deposit a tunnel oxide layer and an amorphous silicon layer on one side. Then, a crystallization treatment is performed at 900°C. Each tube of experimental wafers contains 1600 silicon wafers, and 12 wafers are extracted from each tube, and whether bubbles appear on the surface of the poly is detected. The statistical data are shown in Table 1.

[0286] Table 1

[0287]

[0288] It can be seen that the number of poly wafers with bubbles is significantly reduced after using the antimony-containing silicon wafer. The number of batches with poly bubbles is also significantly reduced.

[0289] Example 2: Passivation quality test comparison test of boron-doped poly

[0290] The n-type silicon wafer prepared in Example 1 above (using an n-type phosphorus-containing silicon wafer with a phosphorus concentration of 1E15 atoms / cm 3 and an n-type antimony-containing silicon wafer with an antimony concentration of 1E15 atoms / cm 3 ) is polished by an alkali solution, cleaned by an acid, and slowly pulled up and washed by water, and then dried, and then placed in an LPCVD furnace tube to deposit a tunnel oxide layer and an amorphous silicon layer on one side. Then, a boron diffusion doping crystallization treatment is performed (the highest doping temperature is 950°C, and BBr3 source is used for doping). The generated BSG (boron-silicon glass) is removed using HF, and then both sides are coated with an aluminum oxide + silicon nitride film, and then an iVoc test is performed using a Sinton tester. The test results are shown in Table 2.

[0291] Table 2

[0292]

[0293]

[0294] It can be seen that the iVoc of the antimony-containing silicon wafer is significantly increased, indicating that the passivation performance is significantly improved.

[0295] Example 3: Passivation quality test comparison test of phosphorus-doped poly

[0296] The n-type silicon wafer prepared in Example 1 above (using an n-type phosphorus-containing silicon wafer with a phosphorus concentration of 1E15 atoms / cm 3 and an n-type antimony-containing silicon wafer with an antimony concentration of 1E15 atoms / cm 3The n-type antimony-containing silicon wafer is polished by alkali solution, cleaned by acid, washed by water, slowly pulled up, dried, and then put into an LPCVD furnace tube to deposit a tunnel oxide layer and an amorphous silicon layer on one side. Then, phosphorus diffusion doping and crystallization treatment are performed (the highest doping temperature is 850°C, and POCl3 is used as the doping source). HF is used to remove the generated PSG (phosphor-silicon glass), and then aluminum oxide + silicon nitride films are plated on both sides. Then, an iVoc test is performed using a Sinton tester, and the results are shown in Table 3.

[0297] Table 3

[0298] P-poly double sided coupons [b1 / a1] Number of verifications iVoc median (mV) n-type phosphorous containing silicon wafer 40 750 n-type antimony containing silicon wafer 1E3 40 755 n-type antimony containing silicon wafer 1E4 40 756 n-type antimony containing silicon wafer 1E5 40 756 n-type antimony containing silicon wafer 1E6 40 757 n-type antimony containing silicon wafer 1E8 40 758

[0299] It can be seen that the iVoc of the antimony-containing silicon wafer is significantly increased, indicating that the passivation performance is significantly improved.

[0300] Although the above describes the embodiments of the present application, the present application is not limited to the specific embodiments and application fields described above, and the specific embodiments described above are only illustrative and guiding, but not limiting. Those skilled in the art can make many forms under the guidance of the present specification and without departing from the scope protected by the claims of the present application, and all of these belong to the protection of the present application.

Claims

1. A silicon solar cell, comprising: A silicon substrate, wherein the silicon substrate contains antimony, and A carrier separation layer is formed on a silicon substrate, wherein, The carrier separation layer has an antimony-containing layer formed in at least a portion of the region on the side closest to the silicon substrate; The peak concentration of antimony in the antimony-containing layer is a1, and a1 is equal to or greater than 1E13 atoms / cm². 3 .

2. The silicon solar cell according to claim 1, wherein, The concentration of antimony in the silicon substrate is denoted as 'a', and the range of 'a' is 1E13 to 1E18 atoms / cm³. 3 ;or The concentration of antimony in the antimony-containing layer is greater than or equal to 1E13 atoms / cm³. 3 The thickness d1 of the region is greater than 2nm.

3. The silicon solar cell according to claim 1 or 2, wherein, The carrier separation layer is selected from a doped semiconductor layer, a molybdenum oxide layer, or a PEDOT:PSS layer. When the carrier separation layer is a doped semiconductor layer, an interface passivation layer is provided between the silicon substrate and the carrier separation layer. Preferably, the material of the interface passivation layer is selected from one or more of silicon oxide, aluminum oxide, silicon nitride, molybdenum oxide, or intrinsic amorphous silicon.

4. The silicon solar cell according to any one of claims 1 to 3, wherein, The concentration of antimony in the antimony-containing layer of the carrier separation layer gradually decreases from the side closer to the silicon substrate to the side opposite to the silicon substrate.

5. The silicon solar cell according to any one of claims 2 to 4, wherein, Define a / a1 as u, where u ranges from 0.8 to 1E10, preferably from 2 to 1E9, further preferably from 10 to 1E8, and most preferably from 100 to 1E7.

6. The silicon solar cell according to any one of claims 3 to 5, wherein, The silicon substrate has a B in at least a portion of the region on the side near the interface passivation layer. x Elements, forming elements containing B x layer, The B-containing x Layer B x The concentration of the element is greater than 1E17 atoms / cm³ 3 The thickness d2 of the region is greater than 20 nm.

7. The silicon solar cell according to claim 6, wherein, B in the doped semiconductor layer x The concentration of the element is b, and the range of b is 1E18~5E22 atoms / cm³. 3 , The B-containing x B in the layer x The peak concentration of the element is b1. b / b1 is defined as v, and the range of v is 0.5 to 1E10, preferably 2 to 1E9, further preferably 10 to 1E8, and most preferably 100 to 1E5.

8. The silicon solar cell according to claim 7, wherein, Let b1 / a1 be defined as w, where w>1, preferably w>100, preferably w>1000, and even more preferably 1E3 to 1E8.

9. The silicon solar cell according to claim 6, wherein, Let d2 / d1 be defined as x, where x is greater than or equal to 1, preferably in the range of 10 to 1E8, and more preferably in the range of 20 to 1E7.

10. The silicon solar cell according to any one of claims 6 to 9, wherein, The interface passivation layer contains antimony, and the peak concentration of antimony in the interface passivation layer is a2, where a2 ranges from 1E13 to 1E18 atoms / cm. 3 , and / or The interface passivation layer contains B x Element, B in the interface passivation layer x The peak concentration of the element is b2, and the range of b2 is 1E19~1E22 atoms / cm. 3 , Preferably, b2 / a2 is defined as y, where y>1, and preferably the range of y is 10 to 1E9.

11. The silicon solar cell according to any one of claims 6 to 10, wherein, The B x When the element is selected from Group 5 or Group 6, the concentration of antimony in the antimony-containing layer is equal to or greater than 1E13 atoms / cm³. 3 The thickness d1 of the region is 2 nm or more, and preferably the range of w is 1E4 to 1E8.

12. The silicon solar cell according to claim 11, wherein, B in the doped semiconductor layer x The concentration of the element is 1E19~5E22 atoms / cm³ 3 The preferred option is B. x The element is phosphorus, and the concentration of phosphorus in the phosphorus-containing layer is greater than 1E17 atoms / cm. 3 The thickness d2 of the region is 20nm or more, preferably 30nm or more, 40nm or more, or 50nm or more, and more preferably 120nm or more, 200nm or more, or 300nm or more.

13. The silicon solar cell according to any one of claims 6 to 10, wherein, The B x When the element is selected from Group III, the concentration of antimony in the antimony-containing layer is greater than 1E13 atoms / cm³. 3 The thickness d1 of the region is 3 nm or more, and preferably the range of w is 1E3 to 1E7.

14. The silicon solar cell according to claim 13, wherein, B in the doped semiconductor layer x The concentration of the element is 1E18~5E21 atoms / cm³ 3 Preferably, the B x The element is boron, and the concentration of boron in the boron-containing layer is greater than 1E17 atoms / cm. 3 The thickness d2 of the region is 30nm or more, preferably 40nm or more, 50nm or more, and even more preferably 100nm or more, 200nm or more, 300nm or more, 400nm or more, 500nm or more, 600nm or more, 700nm or more, 800nm ​​or more, 900nm or more, 1000nm or more, 1100nm or more, or 1200nm or more.

15. The silicon solar cell according to any one of claims 3 to 14, wherein, When the doped semiconductor layer is a P-type doped semiconductor layer, and an N-type doped semiconductor layer is formed on the side of the silicon substrate away from the P-type doped semiconductor layer, the peak concentration of antimony in the antimony-containing layer is a. 1p , change a / a 1p Defined as u p u p The range is 0.8 to 1E10, preferably 2 to 1E9, more preferably 10 to 1E8, and most preferably 100 to 1E7; or When the doped semiconductor layer is an N-type doped semiconductor layer, and a P-type doped semiconductor layer is formed in the silicon substrate on the side of the silicon substrate away from the N-type doped semiconductor layer, the peak concentration of antimony in the antimony-containing layer is a. 1n , change a / a 1n Defined as u n u n The range is 0.8 to 1E10, preferably 2 to 1E9, further preferably 10 to 1E8, and most preferably 100 to 1E7.

16. The silicon solar cell according to claim 15, wherein, When the doped semiconductor layer is a P-type doped semiconductor layer, and an N-type doped semiconductor layer is formed on the side of the silicon substrate opposite to the P-type doped semiconductor layer, the concentration of antimony in the antimony-containing layer is equal to or greater than 1E13 atoms / cm³. 3 The thickness d of the region 1p 3nm or larger; or When the doped semiconductor layer is an N-type doped semiconductor layer, and a P-type doped semiconductor layer is formed on the side of the silicon substrate opposite to the N-type doped semiconductor layer, the concentration of antimony in the antimony-containing layer is equal to or greater than 1E13 atoms / cm³. 3 The thickness d of the region 1n It is 2nm or larger.

17. The silicon solar cell according to any one of claims 3 to 14, wherein, The carrier separation layer and the interface passivation layer are formed on the back side of the silicon substrate, forming a PN junction with the silicon substrate.

18. The silicon solar cell according to any one of claims 3 to 14, wherein, The interface passivation layer includes a first interface passivation layer and a second interface passivation layer, which are formed on opposite sides of the silicon substrate. The doped semiconductor layer includes a first doped semiconductor layer and a second doped semiconductor layer, which are formed on the side of the first interface passivation layer away from the silicon substrate and the side of the second interface passivation layer away from the silicon substrate, respectively. The first doped semiconductor layer is doped with a Group 3 element, and the second doped semiconductor layer is doped with a Group 5 or Group 6 element. The area of ​​the first doped semiconductor layer is smaller or larger than the area of ​​the second doped semiconductor layer. The first doped semiconductor layer has antimony elements in at least a portion of its region near the first interface passivation layer to form a first antimony-containing layer, and the second doped semiconductor layer has antimony elements in at least a portion of its region near the second interface passivation layer to form a second antimony-containing layer. The peak concentration of antimony in the first antimony-containing layer is a. 1p , and a 1p Equal to or greater than 1E13 atoms / cm 3 The peak concentration of antimony in the second antimony-containing layer is a. 1n , and a 1n Equal to or greater than 1E13 atoms / cm 3 .

19. The silicon solar cell according to claim 18, wherein, The concentration of antimony in the first antimony-containing layer is greater than or equal to 1E13 atoms / cm³. 3 The thickness d of the region 1p The concentration of antimony in the second antimony-containing layer is greater than or equal to 1E13 atoms / cm³. 3 The thickness d of the region 1n , that is, d 1p ≥d 1n .

20. The silicon solar cell according to claim 19, wherein, The silicon substrate has a B in at least a portion of the region on the side near the first interface passivation layer. xp Elements, forming elements containing B xp layer; The silicon substrate has a B in at least a portion of the region on the side near the second interface passivation layer. xn Elements, forming elements containing B xn layer; The B-containing xp Layer B xp The concentration of the element is greater than 1E17 atoms / cm³ 3 The thickness d of the region 2p 30nm and above; The B-containing xn Layer B xn The concentration of the element is greater than 1E17 atoms / cm³ 3 The thickness d of the region 2n It is above 20nm.

21. The silicon solar cell according to any one of claims 3 to 14, wherein, The interface passivation layer includes a first interface passivation layer and a second interface passivation layer, which are respectively formed on one side of the silicon substrate. The doped semiconductor layer includes a first doped semiconductor layer and a second doped semiconductor layer, which are respectively formed on the side of the first interface passivation layer away from the silicon substrate and the side of the second interface passivation layer away from the silicon substrate. The first doped semiconductor layer is doped with a Group 3 element, and the second doped semiconductor layer is doped with a Group 5 or Group 6 element. The first interface passivation layer and the first doped semiconductor layer form a p-type region; The second interface passivation layer and the second doped semiconductor layer form an n-type region; The first doped semiconductor layer has antimony elements in at least a portion of its region near the first interface passivation layer to form a first antimony-containing layer, and the second doped semiconductor layer has antimony elements in at least a portion of its region near the second interface passivation layer to form a second antimony-containing layer. The peak concentration of antimony in the first antimony-containing layer is a. 1p atoms / cm 3 , and a 1p Equal to or greater than 1E13 atoms / cm 3 The peak concentration of antimony in the second antimony-containing layer is a. 1n atoms / cm 3 , and a 1n Equal to or greater than 1E13 atoms / cm 3 .

22. The silicon solar cell according to claim 21, wherein, The concentration of antimony in the first antimony-containing layer is greater than or equal to 1E13 atoms / cm³. 3 The thickness d of the region 1p The concentration of antimony in the second antimony-containing layer is greater than or equal to 1E13 atoms / cm³. 3 The thickness d of the region 1n , that is, d 1p ≥d 1n .

23. The silicon solar cell according to claim 22, wherein, The silicon substrate has a B in at least a portion of the region on the side near the first interface passivation layer. xp Elements, forming elements containing B xp layer; The silicon substrate has a B in at least a portion of the region on the side near the second interface passivation layer. xn Elements, forming elements containing B xn layer; The B-containing xp Layer B xp The concentration of the element is greater than 1E17 atoms / cm³ 3 The thickness d of the region 2p 30nm and above; The B-containing xn Layer B xn The concentration of the element is greater than 1E17 atoms / cm³ 3 The thickness d of the region 2n It is above 20nm.

24. The silicon solar cell according to claim 20 or 23, wherein, d 2p / d 1p Greater than or equal to 1, preferably 10 to 1E8, more preferably 20 to 1E7. d 2n / d 1n Greater than or equal to 1, preferably 10 to 1E8, and more preferably 20 to 1E7; Preferred d 2p >d 2n , preferred d 2p -d 2n ≥5nm, preferably ≥10nm.

25. The battery according to claim 22, wherein, There is a gap between the p-type and n-type regions. A substrate passivation layer is disposed in the gap between the p-type and n-type regions, and the substrate passivation layer covers the gap between the silicon substrate that is not covered by the p-type and n-type regions. An antimony-containing region is formed in the area of ​​the passivation layer near the silicon substrate, and the concentration of antimony in the antimony-containing region is a3, where a3 is greater than 1E13 atoms / cm. 3 The thickness d of the region 1钝化层 , d 1钝化层 ≤d 1n ≤d 1p , Preferably the d 1钝化层 ≥1nm.

26. The battery according to claim 25, wherein, An intrinsic spacer region is provided in the interval between the p-type and n-type regions. This intrinsic spacer region covers the spacer region of the silicon substrate not covered by the p-type and n-type regions. The silicon substrate, in the direction away from the silicon substrate, includes, in sequence, an intrinsic semiconductor layer containing antimony and an intrinsic semiconductor layer not containing antimony in the spaced region. Preferably, the intrinsic region interface passivation layer, an intrinsic semiconductor layer containing antimony, and an intrinsic semiconductor layer without antimony are sequentially included from the silicon substrate toward the back side. The concentration of antimony in the intrinsic semiconductor layer containing antimony is a3, and a3 is greater than 1E13 atoms / cm. 3 The thickness d of the region 1i , d 1i ≤d 1n ≤d 1p ; Preferably the d 1i ≥2nm; Preferably, the intrinsic region passivation layer contains antimony in the region near the silicon substrate, and the concentration of antimony in the intrinsic region passivation layer is a3, where a3 is greater than 1E13 atoms / cm. 3 The thickness d of the region 1钝化层 d 1钝化层 ≤d 1n ≤d 1p Preferably, the d 1钝化层 ≥2nm.

27. The battery according to claim 26, wherein, An intrinsic region side interface passivation layer is provided between the intrinsic interval region and the p-type or n-type region.

28. The silicon solar cell according to any one of claims 3 to 14, The doped semiconductor layer is an N-type doped semiconductor layer to form an N-type region. It also includes: P-region electrodes are formed on the side of the silicon substrate with an N-type doped semiconductor layer and are spaced apart from the N-type doped semiconductor layer. as well as A BSF layer is formed in the silicon substrate corresponding to the P-region electrode, and the BSF layer and the P-region electrode have the same metal element. The peak concentration of antimony in the antimony-containing layer is a. 1n , change a / a 1n Defined as u n u n The range is 0.8 to 1E10, preferably 2 to 1E9, further preferably 10 to 1E8, and most preferably 100 to 1E7.

29. The silicon solar cell according to claim 28, wherein, The silicon substrate has a B in at least a portion of the region on the side near the interface passivation layer. xn Elements, forming elements containing B xn Layer; the layer containing B xn Layer B xn The concentration of the element is greater than 1E17 atoms / cm³ 3 The thickness d of the region 2n It is above 20nm.

30. A solar cell module comprising a silicon solar cell according to any one of claims 1 to 29.

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