Back contact solar cell grid line structure and preparation method thereof

By introducing parallel through-type sub-grids and insulating layers into the back-contact solar cell, the main grid line structure is optimized, solving the problem of poor carrier collection performance and improving the cell's optical performance and current collection efficiency.

CN120981032APending Publication Date: 2025-11-18HENGDIAN GRP DMEGC MAGNETICS CO LTD
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Patent Information

Application Number
CN202510983945.8
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-07-16
Publication Date
2025-11-18

AI Technical Summary

Technical Problem

The existing patterning scheme for back-contact solar cells suffers from poor main grid line structure design, resulting in poor carrier collection performance.

Method used

By introducing a first polarity through-type sub-gate and a second polarity through-type sub-gate parallel to each other in the main gate line structure, and forming an insulating layer and a main gate on their surface, the main gate line structure is optimized to collect carriers in the bottom silicon substrate. The main gate line is formed using non-corrosive or low-corrosive paste or corrosive paste to ensure good ohmic contact.

Benefits of technology

This achieves effective carrier collection in the main grid structure, improving the optical performance and current collection efficiency of the back-contact solar cell.

✦ Generated by Eureka AI based on patent content.

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Abstract

The invention relates to the field of solar cells, and discloses a back contact solar cell grid line structure and a preparation method thereof. The back contact solar cell grid line structure comprises a first polarity through-type auxiliary grid and a second polarity through-type auxiliary grid which are parallel to each other, a first polarity auxiliary grid connected with the first polarity through-type auxiliary grid, a second polarity auxiliary grid connected with the second polarity through-type auxiliary grid, an insulating layer covering the second polarity through-type auxiliary grid, and an insulating layer covering the second polarity through-type auxiliary grid. The first polarity main grid covers the insulating layer, the first polarity penetrating type auxiliary grid and a gap between the insulating layer and the first polarity penetrating type auxiliary grid; and the main grid connecting line is connected with the first polarity main grid and the first polarity auxiliary grid in another adjacent repeating unit. Through structural optimization, the main grid region can play a confluence role and a role of collecting carriers in a silicon substrate at the bottom of the main grid region at the same time, so that the performance of the back contact solar cell can be further improved.
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Description

Technical Field

[0001] This invention relates to the field of solar cells, and more particularly to a back-contact solar cell grid structure and its fabrication method. Background Technology

[0002] Compared to conventional solar cells, back-contact solar cells significantly improve optical performance by moving the front grid lines to the back, forming a fully back-interlocked contact structure. The rationality of the back-side grid patterning scheme is crucial in determining the performance of this solar cell.

[0003] Conventional back-contact solar cell patterning typically employs a main grid paired with a sub-grid to form a "tree-like" structure (e.g., Figure 9 (As shown), but this structure also has obvious problems: First, the main gate width is often relatively wide, and it generally uses non-corrosive or low-corrosive paste, so it does not burn through the passivation antireflection film at the bottom, and can only play a current collection role. This makes it impossible for the carriers in the silicon substrate at the bottom of the main gate to be fully collected, thus causing the EL in this area to turn black, such as... Figure 10 As shown; secondly, if the main gate uses a corrosive slurry, on the one hand, the gold / semi-composite area in this region will be too large (the width of the main gate is relatively large, generally more than 3 times the width of the sub-gate), and on the other hand, it will be impossible to form a cross-symmetrical structure in this region, and the carrier collection performance will still be limited. Summary of the Invention

[0004] To address the aforementioned technical problems, this invention provides a back-contact solar cell grid structure and its fabrication method. Through structural optimization, this invention enables the main grid region to simultaneously function as a current collector and to collect charge carriers from the underlying silicon substrate, thereby further improving the performance of the back-contact solar cell.

[0005] The specific technical solution of the present invention includes: In a first aspect, the present invention provides a back-contact solar cell grid line structure, comprising: A first polarity through-type sub-gate and a second polarity through-type sub-gate (located on the back side of the silicon substrate) are parallel to each other. The first polarity through-type secondary gate (located on the back side of the silicon substrate) connects to the first polarity secondary gate. The second polarity through-type secondary gate (located on the back side of the silicon substrate) connects to the second polarity secondary gate. An insulating layer covering the second polarity through-type sub-gate (used to prevent a short circuit between the second polarity through-type sub-gate at its bottom and the first polarity main gate), The first polarity main gate is covered by the insulating layer, the first polarity through-type secondary gate, and the gap between the two. The main grid connecting line connects the first polarity main grid with the first polarity auxiliary grid in another adjacent repeating unit (the purpose is to make the current of the auxiliary grid of the same polarity on the other side also be collected synchronously by the main grid).

[0006] In the grid line structure of the back contact solar cell in the prior art, the paste forming the main grid is generally non-erodible / low-erodible paste, which mainly plays a role of busbar. However, due to the large width of the main grid (generally more than 3 times the width of the auxiliary grid), and the bottom paste does not form a good ohmic contact with the silicon substrate, the carriers inside the silicon substrate in this region cannot be effectively collected by the main grid, thereby causing poor carrier collection performance in this region, and the EL test presents a blackened result.

[0007] Therefore, the grid line structure is optimized in the present application. In the above grid line structure of the present application, the first polarity through-type auxiliary grid and the second polarity through-type auxiliary grid of the corresponding polarity are first formed in the preset main grid (first polarity main grid and second polarity main grid) region. A good ohmic contact can be formed with the silicon substrate during the subsequent sintering process, thereby collecting the carriers in the bottom silicon substrate. Then, the printed first polarity main grid and second polarity main grid are formed on the surface of the region. Not only can the current in the original two-side auxiliary grid lines be collected, but also the auxiliary grid line current at the bottom of the main grid can be collected, so that the entire cell surface current can be effectively collected.

[0008] In some embodiments, the first polarity main grid, the second polarity main grid and the main grid connecting line are formed by non-erodible paste or low-erodible paste.

[0009] In some embodiments, the first polarity through-type auxiliary grid, the second polarity through-type auxiliary grid, the first polarity auxiliary grid and the second polarity auxiliary grid are formed by erodible paste.

[0010] In some more specific embodiments, the resistivity of the non-erodible paste, the low-erodible paste and the silicon contact is ≥10 mΩ·cm 2 ; the resistivity of the erodible paste and the silicon contact is <10 mΩ·cm 2 .

[0011] Furthermore, the non-erodible paste, the low-erodible paste uses non / low-aluminum-doped silver powder with an aluminum content of ≤0.5wt% as the conductive metal powder, uses resin as the binder, and uses disodium ethylenediaminetetraacetate or stearic acid as the solvent. The erodible paste uses high-aluminum-doped silver powder with an aluminum content of ≥1wt% as the conductive metal powder, uses lead and / or bismuth glass powder with a total content of lead and / or bismuth of ≥1wt% as the binder, and uses terpineol or methyl formate as the solvent.

[0012] In some embodiments, the number of the first polarity auxiliary grid and the second polarity auxiliary grid is multiple, and they are distributed in an alternating manner (i.e. in an interdigital manner) as a whole.

[0013] In some embodiments, the pitch (i.e. lateral pitch) of the first polarity through-type sub-grid and the second polarity through-type sub-grid = the pitch (i.e. longitudinal pitch) between adjacent first polarity sub-grid and second polarity sub-grid.

[0014] The present application further limits the above-mentioned size, aiming to minimize the pitch between adjacent sub-grids as much as possible. If the pitch is too large, the carrier separation and transport distance of the silicon substrate will be too long, reducing the transmission performance.

[0015] In some further preferred embodiments, the pitch of the first polarity through-type sub-grid and the second polarity through-type sub-grid is 100-1000 μm.

[0016] In some embodiments, the area of the insulating layer > the area of the second polarity through-type sub-grid to achieve complete coverage.

[0017] Controlling the area of the insulating layer > the area of the second polarity through-type sub-grid can ensure that the second polarity through-type sub-grid at the bottom of the insulating layer does not short-circuit with the first polarity main grid.

[0018] In some embodiments, the area of the first polarity main grid ≥ the total area of the first polarity through-type sub-grid, the insulating layer and the gap therebetween to achieve complete coverage.

[0019] In a second aspect, the present application provides a preparation method of the above-mentioned back contact solar cell grid line structure, comprising the following steps: S1, forming first polarity through-type sub-grids and second polarity through-type sub-grids parallel to each other on the back surface of a silicon substrate, and the first polarity sub-grids and the second polarity sub-grids; S2, forming an insulating layer on the surface of the second polarity through-type sub-grid; S3, forming a first polarity main grid on the surface of the insulating layer, the first polarity through-type sub-grid and the gap therebetween; S4, forming a main grid connecting line between the first polarity main grid and the first polarity sub-grid in another adjacent repeating unit.

[0020] In some embodiments, the solidification temperature of the paste forming the first polarity main grid is lower than the tolerance temperature of the insulating layer. When using insulating glue to form the insulating layer, since the insulating glue usually cannot tolerate high temperature, in order to avoid the insulating layer from failing due to heat, the solidification temperature of the first polarity main grid paste needs to be controlled to be lower than the tolerance temperature of the insulating layer.

[0021] In a third aspect, the present application provides another different structure of the back contact solar cell grid line structure, which comprises: a plurality of first polarity through-type sub-grids (provided on the back surface of the silicon substrate) and a plurality of second polarity through-type sub-grids (provided on the back surface of the silicon substrate) which are alternately distributed and parallel to each other, and the second polarity through-type sub-grids are connected to each other; a first polarity sub-grid (provided on the back surface of the silicon substrate) connected to the at least one first polarity through-type sub-grid, a second polarity sub-grid (provided on the back surface of the silicon substrate) connected to the at least one second polarity through-type sub-grid, an insulating layer covering the second polarity through-type sub-grids, a first polarity main grid covering the insulating layer, the first polarity through-type sub-grids and the gap therebetween, a main grid connecting line connecting the first polarity main grid and the first polarity sub-grid in another adjacent repeating unit.

[0022] Compared with the previous grid line structure, the main difference of the different structure of the back contact solar cell grid line structure is that the number of the first polarity through-type sub-grids and the second polarity through-type sub-grids is set to be multiple and alternately distributed and parallel to each other. The advantage of this structure is that, since the width of the first polarity main grid and the second polarity main grid is usually relatively large, if there are only two through-type sub-grids at the bottom of the main grid, the distance between the two through-type sub-grids will be long. Therefore, when the width of the main grid is increased, the scheme of providing multiple through-type sub-grids at the bottom of the main grid is provided, which can further ensure the current conduction between the through-type sub-grids.

[0023] In some embodiments, at least one of the first polarity through-type sub-grids is provided with a breaking point to provide space for connecting the adjacent second polarity through-type sub-grids.

[0024] In a fourth aspect, the present application provides a preparation method of the different structure of the back contact solar cell grid line structure, which comprises the following steps: S1, forming at least one first polarity through-type sub-grid, at least one second polarity through-type sub-grid and a first polarity sub-grid and a second polarity sub-grid which are alternately distributed and parallel to each other on the back surface of the silicon substrate; S2, forming an insulating layer on the surface of the second polarity through-type sub-grid; S3, forming a first polarity main grid on the surface of the insulating layer, the first polarity through-type sub-grid and the gap therebetween; S4, forming a main grid connecting line between the first polarity main grid and the first polarity sub-grid in another adjacent repeating unit.

[0025] Compared with the prior art, the beneficial effects of the present application are: (1) In the above-mentioned gate line structure of the present application, the first polarity through-type sub-gate and the second polarity through-type sub-gate of the corresponding polarity are formed in the preset main gate (the first polarity main gate and the second polarity main gate) area first, which can form a good ohmic contact with the silicon substrate in the subsequent sintering process, so as to collect the carriers in the bottom silicon substrate, and then the printed first polarity main gate and the second polarity main gate are formed on the surface of the area, which not only can collect the current in the original two side sub-gate lines, but also can collect the sub-gate line current at the bottom of the main gate, so that the entire cell surface current can be effectively collected.

[0026] (2) When the width of the first and second polarity main gate is large, the number of the first and second polarity through-type sub-gate can be set to multiple and alternately distributed in parallel according to the need, which can effectively reduce the spacing between the first and second polarity through-type sub-gate, so as to further ensure the current conduction between the through-type sub-gate. BRIEF DESCRIPTION OF DRAWINGS

[0027] Figure 1 It is a structure schematic diagram of a back contact solar cell gate line structure after S1 in embodiment 1.

[0028] Figure 2 It is a structure schematic diagram of a semi-finished product structure after S1 in embodiment 1.

[0029] Figure 3 It is a structure schematic diagram of a semi-finished product structure after S2 in embodiment 1.

[0030] Figure 4 It is a structure schematic diagram of a semi-finished product structure after S3 in embodiment 1.

[0031] Figure 5 It is a structure schematic diagram after S1 in embodiment 2.

[0032] Figure 6 It is a structure schematic diagram after S2 in embodiment 2.

[0033] Figure 7 It is a structure schematic diagram after S3 in embodiment 2.

[0034] Figure 8 It is a structure schematic diagram of a back contact solar cell gate line structure in embodiment 2.

[0035] Figure 9 It is a structure schematic diagram of a conventional back contact cell patterning scheme.

[0036] Figure 10 It is a main gate line EL picture of a conventional back contact cell.

[0037] The reference signs are: first polarity sub-grid 1, second polarity sub-grid 2, second polarity main grid 3, insulation layer 4, first polarity main grid 5, main grid connecting line 6, first polarity through-type sub-grid 7, second polarity through-type sub-grid 8. DETAILED DESCRIPTION

[0038] The application is further described below in conjunction with examples.

[0039] General examples In a first aspect, a back contact solar cell grid line structure comprises: first and second polarity through-type sub-grids parallel to each other (provided on the back of a silicon substrate), first polarity sub-grids connected to the first polarity through-type sub-grids (provided on the back of the silicon substrate), second polarity sub-grids connected to the second polarity through-type sub-grids (provided on the back of the silicon substrate), an insulation layer covering the second polarity through-type sub-grids (to prevent the second polarity through-type sub-grids at the bottom from short-circuiting with the first polarity main grid), a first polarity main grid covering the insulation layer, the first polarity through-type sub-grids and the gap therebetween, a main grid connecting line connecting the first polarity main grid to the first polarity sub-grid in another adjacent repeating unit (to enable the current of the same polarity sub-grid on the other side to be collected by the main grid as well).

[0040] In some embodiments, the first polarity main grid, the second polarity main grid and the main grid connecting line are formed of non-corrosive paste or low-corrosive paste.

[0041] In some embodiments, the first polarity through-type sub-grid, the second polarity through-type sub-grid, the first polarity sub-grid and the second polarity sub-grid are formed of corrosive paste.

[0042] In some specific embodiments, the non-corrosive paste, the low-corrosive paste has a resistivity of ≥10 mΩ·cm when in contact with silicon 2 ; and the corrosive paste has a resistivity of <10 mΩ·cm when in contact with silicon 2 .

[0043] In some more specific embodiments, the non-corrosive paste, the low-corrosive paste is formed of non / low-aluminum-doped silver powder with an aluminum content of ≤0.5 wt% as the conductive metal powder, resin as the binder, and disodium ethylenediaminetetraacetate or stearic acid as the solvent.

[0044] In some more specific embodiments, the corrosive slurry is made of high-aluminum silver powder with aluminum content≥1wt% as the conductive metal powder, lead and / or bismuth-containing glass powder with total content of lead and / or bismuth≥1wt% as the binder, and terpineol or methyl formate as the solvent.

[0045] In some embodiments, the number of the first and second polarity sub-grids is multiple, and they are distributed in an alternating manner (i.e., in an interdigital manner) as a whole.

[0046] In some embodiments, the pitch (i.e., the lateral pitch) of the first and second polarity through sub-grids = the pitch (i.e., the longitudinal pitch) between adjacent first and second polarity sub-grids.

[0047] In some further preferred embodiments, the pitch of the first and second polarity through sub-grids is 10-200μm.

[0048] In some further preferred embodiments, the width of the first and second polarity through sub-grids is 5-100μm.

[0049] In some embodiments, the area of the insulating layer > the area of the second polarity through sub-grid to achieve complete coverage.

[0050] In some embodiments, the area of the first polarity main grid ≥ the total area of the first polarity through sub-grid, the insulating layer, and the gap therebetween to achieve complete coverage.

[0051] In some embodiments, the area of the first polarity main grid ≥ the total area of the first polarity through sub-grid, the insulating layer, and the gap therebetween to achieve complete coverage. S1, forming first and second polarity through sub-grids parallel to each other on the back surface of a silicon substrate, and first and second polarity sub-grids; S2, forming an insulating layer on the surface of the second polarity through sub-grid; S3, forming a first polarity main grid on the surface of the insulating layer, the first polarity through sub-grid, and the gap therebetween; S4, forming a main grid connecting line between the first polarity main grid and the first polarity sub-grid in another adjacent repeating unit.

[0052] In some embodiments, the solidification temperature of the slurry for forming the first polarity main grid is lower than the tolerance temperature of the insulating layer.

[0053] In some embodiments, the solidification temperature of the slurry for forming the first polarity main grid is lower than the tolerance temperature of the insulating layer. a plurality of first polarity through-type sub-grids (provided on the back surface of the silicon substrate) and a plurality of second polarity through-type sub-grids (provided on the back surface of the silicon substrate) are alternately distributed and parallel to each other, and the second polarity through-type sub-grids are connected to each other; a first polarity sub-grid (provided on the back surface of the silicon substrate) connected to at least one first polarity through-type sub-grid, a second polarity sub-grid (provided on the back surface of the silicon substrate) connected to at least one second polarity through-type sub-grid, an insulating layer covering the second polarity through-type sub-grids, a first polarity main grid covering the insulating layer, the first polarity through-type sub-grids, and the gap therebetween, a main grid connecting line connecting the first polarity main grid and the first polarity sub-grid in another adjacent repeating unit.

[0054] In some embodiments, at least one of the first polarity through-type sub-grids is provided with a disconnection point to provide space for connecting the adjacent second polarity through-type sub-grids.

[0055] In a fourth aspect, a preparation method of the back contact solar cell grid line structure with the above different structures includes the following steps: S1, forming at least one first polarity through-type sub-grid, at least one second polarity through-type sub-grid, and the first polarity sub-grid and the second polarity sub-grid alternately distributed and parallel to each other on the back surface of the silicon substrate; S2, forming an insulating layer on the surface of the second polarity through-type sub-grid; S3, forming a first polarity main grid on the surface of the insulating layer, the first polarity through-type sub-grids, and the gap therebetween; S4, forming a main grid connecting line between the first polarity main grid and the first polarity sub-grid in another adjacent repeating unit. Specific embodiments Embodiment 1 In this embodiment, the first polarity is a p region, and the second polarity is an n region.

[0057] A back contact solar cell grid line structure, as shown in Figures 1-4 , includes: a first polarity through-type sub-grid (1) and a second polarity through-type sub-grid (1) provided on the back surface of the silicon substrate and parallel to each other (longitudinally parallel in Figure 1 ); a plurality of first polarity sub-grids (horizontally parallel in Figure 1 ) provided on the back surface of the silicon substrate and connected to the first polarity through-type sub-grid, and a plurality of second polarity sub-grids (horizontally parallel in Figure 1 ) provided on the back surface of the silicon substrate and connected to the second polarity through-type sub-grid, and alternately distributed as a whole (i.e., in an interdigital manner); An insulating layer covering the second polarity through-type sub-gate (the area of ​​the insulating layer is greater than the area of ​​the second polarity through-type sub-gate to achieve complete coverage, and is used to prevent the second polarity through-type sub-gate at its bottom from short-circuiting with the first polarity main gate); A first polar main gate covers the insulating layer, the first polar through-type sub-gate, and the gap between them (the area of ​​the first polar main gate = the total area of ​​the first polar through-type sub-gate, the insulating layer, and the gap between them to achieve complete coverage); The main gate connection line connects the first polarity main gate to the first polarity sub-gate in another adjacent repeating cell (the purpose is to ensure that the current of the sub-gate with the same polarity on the other side can also be collected synchronously by the main gate).

[0058] In the above structure, the first polarity main gate, the second polarity main gate, and the main gate connection line are formed of a non-corrosive paste. The first polarity through-type secondary gate, the second polarity through-type secondary gate, the first polarity secondary gate, and the second polarity secondary gate are formed of an etchable paste. Specifically, the resistivity of the non-corrosive paste in contact with silicon is ≥10 mΩ·cm. 2 The non-corrosive slurry uses aluminum-free silver powder as the conductive metal powder, dispersible latex powder as the binder phase, and disodium ethylenediaminetetraacetate as the solvent. The resistivity of the corrosive slurry in contact with silicon is <10 mΩ·cm. 2 Aluminum-doped silver powder (1 wt% aluminum content) was used as the conductive metal powder, lead-containing glass powder (0.5 wt% lead content) was used as the binder phase, and terpineol was used as the solvent.

[0059] In terms of dimensions, the spacing (i.e., lateral spacing) between the first and second polar through-type sub-gates is equal to the spacing (i.e., longitudinal spacing) between adjacent first and second polar through-type sub-gates, preferably 10–200 μm, specifically 50 μm in this case. The preferred width of the first and second polar through-type sub-gates is 5–100 μm, specifically 20 μm in this case.

[0060] A method for fabricating the above-mentioned back-contact solar cell grid structure includes the following steps: S1, such as Figure 2 As shown, a paste of corresponding polarity is printed on the back side of a silicon substrate, thereby forming a first polarity through-type sub-gate, a second polarity through-type sub-gate, and a first polarity sub-gate and a second polarity sub-gate after curing. S2, such as Figure 3 As shown, an insulating adhesive is coated on the surface of the second polarity through-type sub-gate, and an insulating layer is formed after curing. S3, such as Figure 4As shown, a first polarity main gate paste is printed on the insulating layer, the first polarity through-type sub-gate, and the surface between the two, and then cured to form the first polarity main gate. It should be noted that the curing temperature of the first polarity main gate paste is lower than the temperature tolerance of the insulating layer.

[0061] S4, such as Figure 1 As shown, a gate connection line paste is printed on the silicon substrate surface between the first polarity main gate and the first polarity secondary gate in another adjacent repeating unit, thereby forming the gate connection line after curing.

[0062] Example 2 In this embodiment, the first polarity is the p region and the second polarity is the n region.

[0063] A back-contact solar cell grid structure with a different structure, such as Figures 5-8 As shown, it includes: Multiple alternating and parallel first-polarity through-type sub-gates (located on the back side of the silicon substrate) and multiple second-polarity through-type sub-gates (located on the back side of the silicon substrate) are arranged in a manner that... Figure 8 In the diagram, the order from left to right is: second polarity through-type sub-gate, first polarity through-type sub-gate, second polarity through-type sub-gate, and first polarity through-type sub-gate. The first polarity through-type sub-gate on the left has a break point in the middle (i.e., it is divided into two segments) to provide space for a lateral connection between the two second polarity through-type sub-gates (e.g., ...). Figure 5 As shown, the overall structure is H-shaped. Located on the back side of the silicon substrate and the connection is located Figure 8 Multiple first polarity through-type sub-gates on the right side (in) Figure 8 (arranged horizontally in parallel), located on the back side of the silicon substrate and connected to... Figure 8 The multiple second polarity sub-gates on the left side of the second polarity through-type sub-gate (in) Figure 8 The elements are arranged horizontally in parallel (and distributed in an alternating manner, i.e., interdigitated), and are arranged in an alternating manner as a whole. Insulating layer covering the second polarity through-type sub-gate (e.g.) Figure 6 As shown, it is H-shaped, and the area of ​​the insulating layer is greater than the area of ​​the second polarity through-type sub-gate to achieve complete coverage, in order to prevent the second polarity through-type sub-gate at its bottom from short-circuiting with the first polarity main gate; A first polar main gate covers the insulating layer, the first polar through-type sub-gate, and the gap between them (the area of ​​the first polar main gate = the total area of ​​the first polar through-type sub-gate, the insulating layer, and the gap between them to achieve complete coverage); The main gate connection line connects the first polarity main gate to the first polarity sub-gate in another adjacent repeating cell (the purpose is to ensure that the current of the sub-gate with the same polarity on the other side can also be collected synchronously by the main gate).

[0064] In the above structure, the first polarity main grid, the second polarity main grid and the main grid connecting line are formed by non-corrosive paste. The first polarity through-type sub-grid, the second polarity through-type sub-grid, the first polarity sub-grid and the second polarity sub-grid are formed by corrosive paste. Specifically, the resistivity of the non-corrosive paste in contact with silicon is ≥10 mΩ·cm 2 The non-corrosive paste uses aluminum-free silver powder as the conductive metal powder, uses dispersible latex powder as the adhesive phase, and uses disodium ethylenediaminetetraacetate as the solvent. The resistivity of the corrosive paste in contact with silicon is <10 mΩ·cm 2 The aluminum-doped silver powder (aluminum content of 1 wt%) is used as the conductive metal powder, the lead-containing glass powder (lead content of 0.5 wt%) is used as the adhesive phase, and the terpineol is used as the solvent.

[0065] In terms of size, the distance between adjacent first polarity through-type sub-grids and second polarity through-type sub-grids (i.e., lateral distance) = the distance between adjacent first polarity sub-grids and second polarity sub-grids (i.e., longitudinal distance), preferably the distance is 10-200 μm, and in the present case, the distance is 50 μm. The preferred width of the first polarity through-type sub-grid and the second polarity through-type sub-grid is 5-100 μm, and in the present case, the width is 20 μm. A method for preparing the above-mentioned back-contact solar cell grid line structure, comprising the following steps: S1, as shown in Figure 5 , printing the paste of the corresponding polarity on the back surface of the silicon substrate, so that after curing, the first polarity through-type sub-grid, the second polarity through-type sub-grid, the first polarity sub-grid and the second polarity sub-grid are formed in parallel and alternating distribution; S2, as shown in Figure 6 , coating an insulating glue on the surface of the second polarity through-type sub-grid, and forming an insulating layer after curing; S3, as shown in Figure 7 , printing the first polarity main grid paste on the surface of the insulating layer, the first polarity through-type sub-grid and the gap therebetween, so that after curing, the first polarity main grid is formed; it should be noted that the curing temperature of the first polarity main grid paste is lower than the tolerance temperature of the insulating layer.

[0066] S4, as shown in Figure 8 , printing the main grid connecting line paste on the surface of the silicon substrate between the first polarity main grid and the first polarity sub-grid in another adjacent repeating unit, so that after curing, the main grid connecting line is formed.

[0067] Comparative Example 1 A conventional back-contact solar cell, as shown in 9, uses a main grid combined with a sub-grid to form a "dendritic" structure.

[0068] Performance test The electrical performance of the solar cells obtained in each example and comparative example was tested, and the results are shown in Table 1.

[0069] Table 1 Serial No. η (%) V oc (V) J sc (mA / cm 2 )]]> FF (%) Example 1 26.77 746.5 42.36 84.67 Example 2 26.88 747.0 42.42 84.83 Comparative Example 1 Comparative Example 2 26.61 745.8 42.31 84.32 From the comparison of the data in the above table, it can be seen that: First, for example 1, because the through-type auxiliary grid is arranged at the position of the main grid slurry area, the carriers of the silicon substrate at the bottom of the main grid can be fully collected (while the carriers of the silicon substrate at the bottom of the main grid in comparative example 1 cannot be effectively collected), and the main grid slurry is also covered on the surface of the through-type auxiliary grid, which effectively ensures that the current of the through-type auxiliary grid and the two lateral auxiliary grids can be converged to the main grid, so that the electrical performance is higher than that of comparative example 1.

[0070] Secondly, example 2 sets multiple through-type auxiliary grids at the bottom of the main grid, which are alternately and parallelly distributed. Because the width of the first and second polarity main grid is usually relatively large, the distance between the two through-type auxiliary grids at the bottom of the main grid will be long. Therefore, when the width of the main grid increases, the multiple through-type auxiliary grids at the bottom of the main grid can further ensure the current conduction and collection between the through-type auxiliary grids, so that the battery performance is higher than that of example 1 and comparative example 1.

[0071] The raw materials and equipment used in the present application are conventional raw materials and equipment in the art unless otherwise specified; the methods used in the present application are conventional methods in the art unless otherwise specified.

[0072] The above is only a preferred embodiment of the present application, and does not limit the present application in any way. Any simple modification, change and equivalent transformation of the above embodiment according to the technical essence of the present application still belongs to the protection scope of the technical solution of the present application.

Claims

1. A back contact solar cell grid line structure, characterized by comprising: first and second mutually parallel through-type subgrids of a first polarity, first subgrids connected to the first through-type subgrids of a first polarity, second subgrids connected to the second through-type subgrids of a second polarity, an insulating layer covering the second through-type subgrids of a second polarity, a first main grid covering the insulating layer, the first through-type subgrids of a first polarity and the gap therebetween, a main grid connecting line connecting the first main grid to the first subgrids in another adjacent repeating unit.

2. The back contact solar cell grid line structure according to claim 1, wherein: the first and second main grids and the main grid connecting line are formed by non-corrosive or low corrosive paste; the first and second through-type subgrids, the first and second subgrids are formed by corrosive paste.

3. The back contact solar cell grid line structure of claim 1 or 2, wherein: the number of the first and second subgrids is multiple and they are distributed in an alternating manner as a whole.

4. The back contact solar cell grid line structure of claim 1 or 2, wherein: the distance between adjacent first and second through-type subgrids = the distance between adjacent first and second subgrids.

5. The back contact solar cell grid line structure according to claim 1 or 2, wherein: the area of the insulating layer > the area of the second through-type subgrids to achieve complete coverage; the area of the first main grid ≥ the total area of the first through-type subgrids, the insulating layer and the gap therebetween to achieve complete coverage.

6. A method of producing a back contact solar cell grid line structure according to any one of claims 1 to 5, characterized in that comprising: S1, forming first and second mutually parallel through-type subgrids of a first polarity on the back surface of a silicon substrate, and first and second subgrids; S2, forming an insulating layer on the surface of the second through-type subgrids; S3, forming a first main grid on the surface of the insulating layer, the first through-type subgrids of a first polarity and the gap therebetween; S4, forming a main grid connecting line between the first main grid and the first subgrids in another adjacent repeating unit.

7. The method of claim 6, wherein: The curing temperature of the paste forming the first main grid is lower than the tolerance temperature of the insulating layer.

8. A back contact solar cell grid line structure, characterized by comprising: a plurality of first and second mutually alternating parallel through-type subgrids, and the second through-type subgrids are connected to each other; first subgrids connected to at least one first through-type subgrid of a first polarity, second subgrids connected to at least one second through-type subgrid of a second polarity, an insulating layer covering the second through-type subgrids of a second polarity, a first main grid covering the insulating layer, the first through-type subgrids of a first polarity and the gap therebetween, a main grid connecting line connecting the first main grid to the first subgrids in another adjacent repeating unit.

9. The back contact solar cell grid line structure of claim 8, wherein: At least one of the first through-type subgrids of a first polarity is provided with a breaking point to provide space for connecting adjacent second through-type subgrids of a second polarity.

10. A method of producing a back contact solar cell grid line structure according to claim 8 or 9, characterized in that comprising: S1, forming at least one first and at least one second mutually alternating parallel through-type subgrids of a first polarity on the back surface of a silicon substrate, and first and second subgrids; S2, forming an insulating layer on the surface of the second through-type subgrids; S3, forming a first main grid on the surface of the insulating layer, the first through-type subgrids of a first polarity and the gap therebetween; S4, forming a main grid connecting line between the first main grid and the first subgrids in another adjacent repeating unit.