Solar cell and photovoltaic module

Abstract

The invention relates to a solar cell and a photovoltaic module. The solar cell includes a substrate, a first surface including a first region, a second region, and a transition region, the transition region being located between the first region and the second region; the second area comprises a first sub-area and a second sub-area, the first sub-area is connected between the transition area and the second sub-area, and the surface of the first sub-area is an inclined plane; the first passivation layer is arranged in the first region; the first doped semiconductor layer is arranged on one side, deviating from the substrate, of the first passivation layer; the dielectric layer is arranged in the transition region and part of the first region, and the dielectric layer of the first region covers the side, away from the first passivation layer, of the first doped semiconductor layer; the second passivation layer is arranged on the second area, the transition area and part of the first area, and the second passivation layer of the first area covers the side, away from the substrate, of the dielectric layer; and the second doped semiconductor layer is arranged on one side, deviating from the substrate, of the second passivation layer. Electric leakage channels of the solar cell can be reduced.

Description

Technical Field

[0001] This application relates to the field of solar cell technology, and in particular to a solar cell and photovoltaic module. Background Technology

[0002] With the development of solar cell technology, heterojunction back contact (HBC) cells combine the advantages of high open-circuit voltage of heterojunction (HJT) cells and high short-circuit current of interdigitated back contact (IBC) cells, resulting in higher photoelectric conversion efficiency.

[0003] However, the positive and negative electrodes of the HBC battery are both on the back of the battery, making it very difficult to achieve insulation between the positive and negative electrodes, increasing leakage paths, and causing battery failure and module power loss. Summary of the Invention

[0004] Based on this, embodiments of this application provide a solar cell and a photovoltaic module that can reduce leakage current channels in the solar cell and reduce power loss in the solar cell and photovoltaic module.

[0005] On one hand, embodiments of this application provide a solar cell, including:

[0006] The substrate has a first surface and a second surface with opposite sides. The first surface includes a first region, a second region, and a transition region. The transition region is located between the first region and the second region. There is a first distance between the surface of the first region and the second surface, and there is a second distance between the surface of the second region and the second surface. The second distance is less than the first distance. The second region includes a first sub-region and a second sub-region. The first sub-region is connected between the transition region and the second sub-region. The surface of the first sub-region is an inclined surface.

[0007] The first passivation layer is disposed in the first region;

[0008] The first doped semiconductor layer is disposed on the side of the first passivation layer away from the substrate;

[0009] A dielectric layer is disposed in the transition region and a portion of the first region, wherein the dielectric layer in the first region covers the side of the first doped semiconductor layer that is away from the first passivation layer.

[0010] A second passivation layer is disposed in the second region, the transition region and part of the first region, wherein the second passivation layer in the first region covers the side of the dielectric layer away from the substrate.

[0011] The second doped semiconductor layer is disposed on the side of the second passivation layer away from the substrate.

[0012] In one implementation, along the thickness direction of the substrate, there is a third distance between one end of the dielectric layer near the second region and the side surface of the first doped semiconductor layer away from the substrate, the third distance being greater than or equal to the doping depth of the first doped semiconductor layer.

[0013] In one implementation, the third distance is less than or equal to the distance between the end of the first sub-region facing the transition region and the surface of the first doped semiconductor layer facing away from the substrate.

[0014] In one implementation, the transition region includes a third sub-region, which is adjacent to the first region, and the distance between the surface of the third sub-region and the second surface is equal to the distance between the first and second surfaces.

[0015] The end of the dielectric layer facing the substrate is connected to the surface of the third sub-region, and the dielectric layer at least covers the sidewalls of the first passivation layer and the first doped semiconductor layer facing the third sub-region.

[0016] In one implementation, the transition region further includes a fourth sub-region, which is adjacent to the third sub-region and is located on the side of the third sub-region facing the second region; the surface of the fourth sub-region is an inclined surface.

[0017] The dielectric layer extends to the fourth sub-region at one end facing the substrate.

[0018] In one implementation, the surface of the fourth sub-region is a polished surface.

[0019] In one implementation, the surface of the fourth sub-region is textured.

[0020] In one implementation, the transition region further includes a fifth sub-region, which is located between the fourth sub-region and the first sub-region, and the surfaces of the first sub-region and the fourth sub-region both have an angle with the surface of the fifth sub-region.

[0021] The dielectric layer extends from one end toward the second region to the fifth sub-region.

[0022] In one implementation, the surface of the fifth sub-region is parallel to the surface of either the first or second sub-region.

[0023] In one implementation, the surface of the fifth sub-region is a polished surface.

[0024] In one implementation, the surface of the fifth sub-region is textured.

[0025] In one implementation, the dielectric layer includes:

[0026] A first dielectric layer is disposed in the transition region and a portion of the first region, and the first dielectric layer in the first region covers the side of the first doped semiconductor layer away from the first passivation layer.

[0027] The second dielectric layer is located on the side of the first dielectric layer away from the substrate; the second passivation layer of the first region covers the side of the second dielectric layer away from the substrate; wherein the material of the first dielectric layer is different from the material of the second dielectric layer.

[0028] In one implementation, the first dielectric layer comprises either aluminum oxide or silicon oxide; the second dielectric layer comprises silicon nitride, and the thickness of the first dielectric layer is less than the thickness of the second dielectric layer.

[0029] In one implementation, the thickness of the first dielectric layer is 5nm-15nm; the thickness of the second dielectric layer is 60nm-100nm.

[0030] In one implementation, the solar cell further includes:

[0031] A conductive layer is disposed on the side of the first doped semiconductor layer and the second doped semiconductor layer away from the substrate. The conductive layer has an isolation trench. The orthogonal projection of the isolation trench onto the substrate is located in the first region, and at least a portion of the isolation trench extends to the surface of the second doped semiconductor layer away from the substrate.

[0032] In one implementation, the solar cell further includes:

[0033] The first electrode, the orthographic projection of the first electrode onto the substrate is located in the first region, and the first electrode is electrically connected to the conductive layer of the first region;

[0034] The second electrode, whose orthogonal projection onto the substrate is located in the second region, is electrically connected to the conductive layer of the second region.

[0035] On the other hand, embodiments of this application provide a photovoltaic module, including the solar cell of any of the foregoing embodiments of this application.

[0036] The solar cell and photovoltaic module provided in this application include a solar cell comprising a substrate having opposing first and second surfaces. The first surface includes a first region, a second region, and a transition region, with the transition region located between the first and second regions. A first distance exists between the surface of the first region and the second surface, and a second distance exists between the surface of the second region and the second surface, the second distance being less than the first distance. The second region includes a first sub-region and a second sub-region, the first sub-region being connected between the transition region and the second sub-region, and the surface of the first sub-region being an inclined surface. A first passivation layer is disposed in the first region, and a first doped semiconductor layer is disposed on the side of the first passivation layer facing away from the substrate. A dielectric layer is disposed in the transition region and a portion of the first region, with the dielectric layer in the first region covering the side of the first doped semiconductor layer facing away from the first passivation layer. A second passivation layer is disposed in the second region, the transition region, and a portion of the first region, with the second passivation layer in the first region covering the side of the dielectric layer facing away from the substrate, and a second doped semiconductor layer is disposed on the side of the second passivation layer facing away from the substrate. In this way, the dielectric layer can insulate the first doped semiconductor layer and the second doped semiconductor layer, which have different conductivity types, between the first doped semiconductor layer and the second passivation layer, thereby reducing the leakage channels of the solar cell and reducing the power loss of the solar cell and photovoltaic module.

[0037] In addition, the end of the dielectric layer facing the second region can be separated from the second region by the first sub-region in the arrangement direction of the first and second regions. This can reduce the size of the dielectric layer extending into the second region, thereby reducing the impact of the dielectric layer on the collection of charge carriers in the second region and improving the collection efficiency of charge carriers in the second region. Attached Figure Description

[0038] Figure 1 This is a schematic diagram of a solar cell structure provided in some embodiments of this application.

[0039] Figure 2 This is a schematic diagram of another structure of a solar cell provided in some embodiments of this application.

[0040] Figure 3 This is another structural schematic diagram of a solar cell provided in some embodiments of this application.

[0041] Figure 4 This is another structural schematic diagram of a solar cell provided in some embodiments of this application.

[0042] Figure 5 This is another structural schematic diagram of a solar cell provided in some embodiments of this application.

[0043] Figure 6This is another structural schematic diagram of a solar cell provided in some embodiments of this application.

[0044] Figure 7 This is a flowchart illustrating the fabrication process of a solar cell provided in some embodiments of this application.

[0045] Explanation of reference numerals in the attached figures:

[0046] 10 - Substrate; 20 - First passivation layer; 30 - First doped semiconductor layer; 40 - Dielectric layer; 50 - Second passivation layer; 60 - Second doped semiconductor layer; 70 - Conductive layer; 80 - First electrode; 90 - Second electrode;

[0047] 11-First surface; 12-Second surface; 41-First dielectric layer; 42-Second dielectric layer; 71-Isolation trench;

[0048] 111 - First Zone; 112 - Second Zone; 113 - Transition Zone;

[0049] 1121 - First sub-region; 1122 - Second sub-region; 1131 - Third sub-region; 1132 - Fourth sub-region; 1133 - Fifth sub-region. Detailed Implementation

[0050] To make the above-mentioned objectives, features, and advantages of this application more apparent and understandable, the specific embodiments of this application are described in detail below with reference to the accompanying drawings. Many specific details are set forth in the following description to provide a thorough understanding of this application. However, this application can be implemented in many other ways different from those described herein, and those skilled in the art can make similar modifications without departing from the spirit of this application. Therefore, this application is not limited to the specific embodiments disclosed below.

[0051] In the description of this application, it should be understood that if terms such as "center", "longitudinal", "lateral", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise", "axial", "radial", "circumferential" appear, these terms indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings, and are only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of this application.

[0052] Furthermore, where the terms "first" and "second" appear, these terms are for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined with "first" or "second" may explicitly or implicitly include at least one of that feature. In the description of this application, where the term "multiple" appears, "multiple" means at least two, such as two, three, etc., unless otherwise explicitly specified.

[0053] In this application, unless otherwise expressly specified and limited, the terms "installation," "connection," "joining," and "fixing," etc., should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral part; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication of two components or the interaction between two components, unless otherwise expressly limited. Those skilled in the art can understand the specific meaning of the above terms in this application based on the specific circumstances.

[0054] In this application, unless otherwise expressly specified and limited, the use of descriptions such as "above" or "below" the second feature indicates that the first and second features are in direct contact or indirect contact via an intermediate medium. Furthermore, "above," "on top of," and "over" the second feature can mean that the first feature is directly above or diagonally above the second feature, or simply that the first feature is at a higher horizontal level than the second feature. Similarly, "below," "below," and "under" the second feature can mean that the first feature is directly below or diagonally below the second feature, or simply that the first feature is at a lower horizontal level than the second feature.

[0055] It should be noted that if an element is referred to as being "fixed to" or "set on" another element, it can be directly on the other element or there may be an intervening element. If an element is considered to be "connected to" another element, it can be directly connected to the other element or there may be an intervening element. If so, the terms "vertical," "horizontal," "upper," "lower," "left," "right," and similar expressions used in this application are for illustrative purposes only and do not represent the only possible implementation.

[0056] With the development of solar cell technology, HBC cells combine the advantages of high open-circuit voltage of HJT cells and high open-circuit current of IBC cells, resulting in high photoelectric conversion efficiency. The highest conversion efficiency achieved in the laboratory has reached 27.81%, making it the technology closest to the theoretical limit of single-crystal silicon cells.

[0057] However, the positive and negative electrodes of the HBC battery are both on the back of the battery, making it very difficult to achieve insulation between the positive and negative electrodes, increasing leakage paths, and causing battery failure and module power loss.

[0058] Figure 1 This is a schematic diagram of a solar cell structure provided in some embodiments of this application.

[0059] In some examples, refer to Figure 1 As shown, in view of the technical problems existing in the related art, this application provides a solar cell. The solar cell may include a substrate 10. The substrate 10 may include a silicon substrate 10.

[0060] In some examples, the silicon substrate 10 can be a silicon wafer. The substrate 10 can have opposing first surfaces 11 and second surfaces 12. The first surface 11 and the second surface 12 can be two opposing surfaces of the substrate 10 along the thickness direction. That is, one of the surfaces along the thickness direction of the substrate 10 can be the first surface 11, and the other surface can be the second surface 12.

[0061] In some examples, refer to Figure 1 As shown, the first surface 11 may include a first region 111. The surface of the first region 111 may be flush with the first surface 11. That is, the first surface 11 may be the surface of the first region 111.

[0062] In some examples, the first surface 11 may include a second region 112. The second region 112 may be located on one side of the first region 111. The second region 112 and the first region 111 may be located on the first surface 11 along a first direction (e.g., Figure 1 Arranged in the direction shown by the x-axis.

[0063] In some examples, the first surface 11 may include a transition region 113. The transition region 113 may be located between the first region 111 and the second region 112. That is, on the first surface 11, the first region 111, the transition region 113, and the second region 112 may be arranged along a first direction x.

[0064] In some examples, refer to Figure 1 As shown, the surface of the first region 111 and the second surface 12 may have a first distance L1. The surface of the second region 112 and the second surface 12 may have a second distance L2. The second distance L2 may be less than the first distance L1. That is, the surface of the second region 112 may be recessed relative to the first surface 11, thereby forming an uneven structure on the first surface 11; wherein, the surface of the first region 111 is flush with the first surface 11, and the surface of the second region 112 is recessed in the first surface 11.

[0065] In some examples, refer to Figure 1 As shown, the second region 112 may include a first sub-region 1121 and a second sub-region 1122. The first sub-region 1121 may be connected between the transition region 113 and the second sub-region 1122. That is, the first sub-region 1121 and the second sub-region 1122 may be arranged along a first direction x, with the end of the first sub-region 1121 facing away from the second sub-region 1122 connected to the transition region 113. The second sub-region 1122 is located at the end of the first sub-region 1121 facing away from the transition region 113.

[0066] In some examples, the surface of the first sub-region 1121 can be an inclined surface. That is, the surface of the first sub-region 1121 can be inclined relative to either the first surface 11 or the second surface 12. Along the thickness direction of the substrate 10 (e.g.) Figure 1 (in the direction shown by the y-axis), the distance between the transition region 113 and the second surface 12 is greater than the distance between the second sub-region 1122 and the second surface 12. The distance between the end of the first sub-region 1121 away from the second sub-region 1122 and the second surface 12 is greater than the distance between the second sub-region 1122 and the second surface 12.

[0067] In some examples, refer to Figure 1 As shown, the solar cell may include a first passivation layer 20. The first passivation layer 20 may be disposed in a first region 111.

[0068] In some examples, the first passivation layer 20 may include a tunneling oxide layer. For example, the first passivation layer 20 may include silicon oxide. It is understood that in some examples of embodiments of this application, the specific material of the first passivation layer 20 is only shown as a specific example and is not intended to limit the specific material of the first passivation layer 20.

[0069] In some examples, the first passivation layer 20 may cover the first region 111.

[0070] In some examples, the solar cell may include a first doped semiconductor layer 30. The first doped semiconductor layer 30 may be disposed on the side of the first passivation layer 20 opposite to the substrate 10. The first doped semiconductor layer 30 may cover the side of the first passivation layer 20 opposite to the substrate 10.

[0071] In some examples, the first doped semiconductor layer 30 may include doped polysilicon.

[0072] In some examples, refer to Figure 1 As shown, in some examples of embodiments of this application, the solar cell may include a dielectric layer 40. The dielectric layer 40 may be disposed in the transition region 113 and a portion of the first region 111. Specifically, the dielectric layer 40 located in the first region 111 covers the side of the first doped semiconductor layer 30 that faces away from the first passivation layer 20.

[0073] In some examples, refer to Figure 1 As shown, the dielectric layer 40 has a continuous hierarchical structure between the first region 111 and the transition region 113. That is, from the first region 111 to the transition region 113, the dielectric layer 40 has no discontinuities or grooves.

[0074] In some examples, refer to Figure 1 As shown, the dielectric layer 40 can cover the sidewalls of the first passivation layer 20 and the first doped semiconductor layer 30 facing the second region 112.

[0075] In some examples, dielectric layer 40 may include an insulating layer.

[0076] In some examples, refer to Figure 1 As shown, the solar cell may include a second passivation layer 50. The second passivation layer 50 may be disposed in the second region 112, the transition region 113, and a portion of the first region 111. Specifically, the second passivation layer 50 in the first region 111 may cover the side of the dielectric layer 40 facing away from the substrate 10.

[0077] In some examples, the second passivation layer 50 may include intrinsic amorphous silicon.

[0078] In some examples, the solar cell may include a second doped semiconductor layer 60. The second doped semiconductor layer 60 may be disposed on the side of the second passivation layer 50 facing away from the substrate 10. The second doped semiconductor layer 60 may cover the side of the second passivation layer 50 facing away from the substrate 10. That is, the second doped semiconductor layer 60 may be disposed in the second region 112, the transition region 113, and a portion of the first region 111. Specifically, the second doped semiconductor layer 60 in the first region 111 may cover the side of the second passivation layer 50 facing away from the substrate 10.

[0079] In some examples, the conductivity type of the second doped semiconductor layer 60 may be opposite to that of the first doped semiconductor layer 30.

[0080] In some examples, the second doped semiconductor layer 60 may include a doped amorphous silicon layer.

[0081] In some examples, the doping type of the second doped semiconductor layer 60 may be the opposite of the doping type of the first doped semiconductor layer 30.

[0082] The solar cell provided in this application includes a substrate 10, which has a first surface 11 and a second surface 12 facing each other. The first surface 11 includes a first region 111, a second region 112, and a transition region 113, with the transition region 113 located between the first region 111 and the second region 112. A first distance L1 exists between the surface of the first region 111 and the second surface 12, and a second distance L2 exists between the surface of the second region 112 and the second surface 112, with the second distance L2 being smaller than the first distance L1. The second region 112 includes a first sub-region 1121 and a second sub-region 1122, with the first sub-region 1121 connected to the transition region 113 and the second region 112. Between two regions, the surface of the first sub-region 1121 is inclined; a first passivation layer 20 is provided in the first region 111, and a first doped semiconductor layer 30 is provided on the side of the first passivation layer 20 away from the substrate 10; a dielectric layer 40 is provided in the transition region 113 and part of the first region 111, the dielectric layer 40 of the first region 111 covering the side of the first doped semiconductor layer 30 away from the first passivation layer 20; a second passivation layer 50 is provided in the second region 112, the transition region 113 and part of the first region 111, the second passivation layer 50 of the first region 111 covering the side of the dielectric layer 40 away from the substrate 10, and a second doped semiconductor layer 60 is provided on the side of the second passivation layer 50 away from the substrate 10. In this way, the dielectric layer 40 can insulate the first doped semiconductor layer 30 and the second doped semiconductor layer 60 with different conductivity types between the first doped semiconductor layer 30 and the second passivation layer 50, which can reduce the leakage path of the solar cell and reduce the power loss of the solar cell and photovoltaic module.

[0083] In addition, the end of the dielectric layer 40 facing the second region 112 can be separated from the second region 112 only in the transition region 113 by the first sub-region 1121 in the arrangement direction of the first region 111 and the second region 112. This can reduce the size of the dielectric layer 40 extending into the second region 112, thereby reducing the impact of the dielectric layer 40 on the collection of carriers in the second region 112 and improving the collection efficiency of carriers in the second region 112.

[0084] In some examples, refer to Figure 1 As shown, along the thickness direction y of the substrate 10, the end of the dielectric layer 40 near the second region 112 can have a third distance L3 between it and the side surface of the first doped semiconductor layer 30 facing away from the substrate 10. That is, the distance by which the dielectric layer 40 extends along the thickness direction y of the substrate 10 from the side surface of the first doped semiconductor layer 30 facing away from the substrate 10 toward the substrate 10 can be the third distance L3.

[0085] In some examples, the third distance L3 can be greater than or equal to the doping depth of the first doped semiconductor layer 30. In other words, the portion of the dielectric layer 40 extending from the side surface of the first doped semiconductor layer 30 away from the substrate 10 along the thickness direction y of the substrate 10 can cover the doping depth of the first doped semiconductor layer 30 along the thickness direction y of the substrate 10.

[0086] In some examples, the third distance L3 can be greater than or equal to the sum of the thicknesses of the first doped semiconductor layer 30 and the first passivation layer 20.

[0087] In some examples, the third distance L3 can be greater than the sum of the thicknesses of the first doped semiconductor layer 30 and the first passivation layer 20.

[0088] In some examples, the third distance L3 can be equal to the sum of the thicknesses of the first doped semiconductor layer 30 and the first passivation layer 20.

[0089] In other words, along the thickness direction y of the substrate 10, the dielectric layer 40 can completely cover the sidewalls of the first doped semiconductor layer 30 and the first passivation layer 20, thereby effectively insulating the first doped semiconductor layer 30 and the second doped semiconductor layer 60 and reducing the leakage current path between the first doped semiconductor layer 30 and the second doped semiconductor layer 60.

[0090] In some examples of embodiments of this application, along the thickness direction y of the substrate 10, a third distance L3 is defined as the distance between the end of the dielectric layer 40 near the second region 112 and the surface of the first doped semiconductor layer 30 facing away from the substrate 10. This third distance L3 is set to be greater than or equal to the thickness of the first doped semiconductor layer 30 and the first passivation layer 20. Thus, along the thickness direction y of the substrate 10, the extension distance of the dielectric layer 40 towards the substrate 10 can be greater than or equal to the diffusion depth of the first doped semiconductor layer 30 along the thickness direction y of the substrate 10. This effectively insulates the first doped semiconductor layer 30 and the second doped semiconductor layer 60, reducing leakage paths in the solar cell and lowering power loss.

[0091] In some examples, refer to Figure 1 As shown, the third distance L3 can be less than or equal to the distance between the end of the first sub-region 1121 facing the transition region 113 and the surface of the first doped semiconductor layer 30 on the side away from the substrate 10.

[0092] In some examples, the third distance L3 can be less than the distance between the end of the first sub-region 1121 facing the transition region 113 and the surface of the first doped semiconductor layer 30 on the side away from the substrate 10. That is, there can be a certain distance between the end of the dielectric layer 40 facing the first sub-region 1121 and the first sub-region 1121, and the end of the dielectric layer 40 facing the first sub-region 1121 does not contact the end of the first sub-region 1121.

[0093] In some examples, the third distance L3 can be equal to the distance between the end of the first sub-region 1121 facing the transition region 113 and the surface of the first doped semiconductor layer 30 on the side away from the substrate 10. That is, the end of the dielectric layer 40 facing the first sub-region 1121 can extend to the end of the first sub-region 1121 where it connects to the transition region 113, and the end of the dielectric layer 40 facing the first sub-region 1121 can contact the end of the first sub-region 1121.

[0094] In some examples of embodiments of this application, by setting the third distance L3 to be less than or equal to the distance between the end of the first sub-region 1121 facing the transition region 113 and the surface of the first doped semiconductor layer 30 on the side away from the substrate 10, the dielectric layer 40 can terminate at the end of the first sub-region 1121 facing the transition region 113, so that neither the first sub-region 1121 nor the second sub-region 1122 is covered by the dielectric layer 40. This avoids the dielectric layer 40 affecting the carrier collection of the first sub-region 1121 and the second sub-region 1122, and can improve the carrier collection efficiency of the second region 112, thereby improving the photoelectric conversion efficiency of solar cells.

[0095] In some examples, refer to Figure 1 As shown, the transition region 113 may include a third sub-region 1131. The third sub-region 1131 may be adjacent to the first region 111. The third sub-region 1131 may be connected to the first region 111.

[0096] In some examples, the distance between the surface of the third sub-region 1131 and the second surface 12 can be equal to the first distance L1. That is, the surface of the third sub-region 1131 can be flush with the surface of the first region 111. The first surface 11 can include the surface of the first region 111 and the surface of the third sub-region 1131.

[0097] In some examples, the end of the dielectric layer 40 facing the substrate 10 may be connected to the surface of the third sub-region 1131. That is, along the thickness direction y of the substrate 10, the dielectric layer 40 may extend toward the substrate 10 and extend to the surface of the third sub-region 1131.

[0098] In some examples, the dielectric layer 40 may at least cover the sidewall of the first passivation layer 20 facing the third sub-region 1131, and the dielectric layer 40 may at least cover the sidewall of the first doped semiconductor layer 30 facing the third sub-region 1131.

[0099] In some examples of embodiments of this application, the third sub-region 1131 of the transition region 113 is configured to be adjacent to the first region 111, and the distance between the surface of the third sub-region 1131 and the second surface 12 is set to be equal to the first distance L1. Thus, when the dielectric layer 40 is deposited, it can be deposited in the third sub-region 1131, such that the dielectric layer 40 at least covers the sidewalls of the first passivation layer 20 and the first doped semiconductor layer 30 facing the third sub-region 1131. The dielectric layer 40 can insulate the first doped semiconductor layer 30 and the second doped semiconductor layer 60, reducing leakage paths in the solar cell and lowering power losses in the solar cell and photovoltaic module.

[0100] Furthermore, since the dielectric layer 40 covers the sidewalls of the first doped semiconductor layer 30 and the first passivation layer 20 facing the third sub-region 1131, compared to extending the dielectric layer 40 entirely to the bottom wall of the second region 112, the sidewalls of the second region 112 are exposed. This reduces the impact of the dielectric layer 40 on the collection of charge carriers in the second region 112, thereby improving the collection efficiency of charge carriers in the second region 112. Moreover, it saves on the amount of dielectric layer 40 used, reducing the processing and manufacturing costs of the solar cell.

[0101] In some examples, refer to Figure 1 As shown, the transition region 113 may include a fourth sub-region 1132. The fourth sub-region 1132 may be adjacent to the third sub-region 1131. The fourth sub-region 1132 may be located on the side of the third sub-region 1131 facing the second region 112. That is, the fourth sub-region 1132 may be connected to the side of the third sub-region 1131 away from the first region 111.

[0102] In some examples, the surface of the fourth sub-region 1132 can be an inclined surface. That is, the end of the fourth sub-region 1132 facing the third sub-region 1131 can be connected to the third sub-region 1131, and the end of the fourth sub-region 1132 away from the third sub-region 1131 can extend toward the second sub-region 1122, thereby making the surface of the fourth sub-region 1132 an inclined surface.

[0103] In some examples, the end of the dielectric layer 40 facing the substrate 10 can extend to the fourth sub-region 1132. That is, after the end of the dielectric layer 40 facing the second region 112 extends to the surface of the third sub-region 1131 along the thickness direction y of the substrate 10, it can continue to extend to the surface of the fourth sub-region 1132 along the inclined direction of the fourth sub-region 1132.

[0104] In some examples of embodiments of this application, a fourth sub-region 1132 is connected to the side of the third sub-region 1131 facing the second sub-region 112, and the surface of the fourth sub-region 1132 is an inclined surface; thus, one end of the dielectric layer 40 facing the substrate 10 can extend to the fourth sub-region 1132. This allows the dielectric layer 40 to cover an area greater than the diffusion depth of the first doped semiconductor layer 30 along the thickness direction y of the substrate 10, thereby improving the insulation performance of the dielectric layer 40 to the first doped semiconductor layer 30 and the second doped semiconductor layer 60, reducing leakage paths between the first doped semiconductor layer 30 and the second doped semiconductor layer 60, and lowering the power loss of the solar cell and photovoltaic module.

[0105] In some examples, refer to Figure 1 As shown, the surface of the fourth sub-region 1132 can be a polished surface. That is, after the fourth sub-region 1132 is formed by grooving the first surface 11 with a laser, the surface of the fourth sub-region 1132 can be polished.

[0106] In some examples of embodiments of this application, the surface of the fourth sub-region 1132 is polished to form a polished surface. This reduces the surface roughness of the fourth sub-region 1132, improves its smoothness, reduces dangling bonds on the surface of the fourth sub-region 1132, and enhances the passivation effect.

[0107] Figure 2 This is a schematic diagram of another structure of a solar cell provided in some embodiments of this application.

[0108] In some examples, refer to Figure 2 As shown, the surface of the fourth sub-region 1132 can be velvety. For example, the surface of the fourth sub-region 1132 can have a pyramidal velvety structure.

[0109] In some embodiments of this application, the surface of the fourth sub-region 1132 is made into a textured surface. This reduces the reflectivity of the fourth sub-region 1132. When laser grooving the fourth sub-region 1132, the textured surface has a higher light absorption rate, requiring only a lower energy laser for grooving, thus simplifying the laser grooving process and improving its efficiency.

[0110] Figure 3 This is another structural schematic diagram of a solar cell provided in some embodiments of this application.

[0111] In some examples, refer to Figure 3 As shown, the transition region 113 may include a fifth sub-region 1133. The fifth sub-region 1133 may be located between the fourth sub-region 1132 and the first sub-region 1121. That is, one end of the fifth sub-region 1133 may be connected to the fourth sub-region 1132, and the other end of the fifth sub-region 1133 may be connected to the first sub-region 1121.

[0112] In some examples, the surface of the fifth sub-region 1133 may form an angle with the surface of the first sub-region 1121, and the surface of the fifth sub-region 1133 may form an angle with the surface of the fourth sub-region 1132. That is, along the arrangement direction x of the first region 111 and the second region 112, the extension direction of the fifth sub-region 1133 may be different from the extension directions of both the first sub-region 1121 and the fourth sub-region 1132. Specifically, the tilt direction of the fourth sub-region 1132 may be the same as the tilt direction of the first sub-region 1121; that is, the surface of the fourth sub-region 1132 may be parallel to the surface of the first sub-region 1121. Alternatively, the tilt direction of the fourth sub-region 1132 may be different from the tilt direction of the first sub-region 1121; that is, the surface of the fourth sub-region 1132 may not be parallel to the surface of the first sub-region 1121.

[0113] It is understood that the term "parallel" mentioned in some examples of embodiments of this application may refer to approximately parallel. Those skilled in the art will understand that due to limitations in the processing technology, there may be certain errors between the surfaces of the fourth sub-region 1132 and the first sub-region 1121. These errors are negligible to those skilled in the art.

[0114] In some examples, refer to Figure 3 As shown, the end of the dielectric layer 40 facing the second region 112 can extend to the fifth sub-region 1133.

[0115] In some examples of embodiments of this application, a fifth sub-region 1133 is provided between the fourth sub-region 1132 and the first sub-region 1121, with the surface of the fifth sub-region 1133 forming an angle with the surfaces of the first sub-region 1121 and the fourth sub-region 1132. This facilitates laser grooving in the second region 112. Furthermore, the dielectric layer 40 extends from one end toward the second region 112 to the fifth sub-region 1133. This improves the insulation performance of the dielectric layer 40 in insulating the first doped semiconductor layer 30 and the second doped semiconductor layer 60, reducing leakage paths in the solar cell.

[0116] In addition, in some examples of embodiments of this application, by setting a fifth sub-region 1133 between the fourth sub-region 1132 and the first sub-region 1121, when the second region 112 is formed by laser grooving, the laser window of laser grooving can be extended to the fifth sub-region 1133 for laser grooving, which can widen the process window of laser process and facilitate the formation of the second region 112 by laser grooving.

[0117] In some examples, refer to Figure 3 As shown, the surface of the fifth sub-region 1133 can be parallel to the surface of either the first region 111 or the second sub-region 1122. That is, the surface of the fifth sub-region 1133 can be parallel to the surface of the first region 111. Alternatively, the surface of the fifth sub-region 1133 can be parallel to the surface of the second sub-region 1122. Or, the surface of the fifth sub-region 1133 can be parallel to the surfaces of both the first region 111 and the second sub-region 1122.

[0118] It is understood that the term "parallel" mentioned in some examples of embodiments of this application may refer to approximately parallel. Those skilled in the art will understand that due to limitations in the processing technology, there may be certain errors between the surfaces of the fifth sub-region 1133 and the first region 111 (or the second sub-region 1122), and these errors are negligible to those skilled in the art.

[0119] In some examples, "parallel" can mean that the surface of the fifth sub-region 1133 extends in the same direction as the surface of the first region 111 (or the second sub-region 1122).

[0120] In some examples of embodiments of this application, the surface of the fifth sub-region 1133 is set to be parallel to the surface of either the first region 111 or the second sub-region 1122. This facilitates the processing and formation of the fifth sub-region 1133 and reduces the manufacturing and processing difficulty of solar cells.

[0121] In some examples, refer to Figure 3 As shown, the surface of the fifth sub-region 1133 can be a polished surface. That is, after the fifth sub-region 1133 is formed by grooving the first surface 11 with a laser, the surface of the fifth sub-region 1133 can be polished.

[0122] In some examples of embodiments of this application, by setting the surface of the fifth sub-region 1133 as a polished surface, the roughness of the surface of the fifth sub-region 1133 can be reduced, the surface smoothness of the fifth sub-region 1133 can be improved, the dangling bonds on the surface of the fifth sub-region 1133 can be reduced, and the passivation effect can be improved.

[0123] Figure 4This is another structural schematic diagram of a solar cell provided in some embodiments of this application.

[0124] In some examples, refer to Figure 4 As shown, the surface of the fifth sub-region 1133 can be velvety. For example, the surface of the fifth sub-region 1133 can have a pyramidal velvety structure.

[0125] In some embodiments of this application, the surface of the fifth sub-region 1133 is made into a textured surface. This reduces the reflectivity of the fifth sub-region 1133. When laser grooving the fifth sub-region 1133, the textured surface has a higher light absorption rate, requiring only a lower energy laser for grooving, thus simplifying the laser grooving process and improving its efficiency.

[0126] Figure 5 This is another structural schematic diagram of a solar cell provided in some embodiments of this application. Figure 6 This is another structural schematic diagram of a solar cell provided in some embodiments of this application.

[0127] In some examples, refer to Figure 5 As shown, the surface of the fourth sub-region 1132 can be velvety. The surface of the fifth sub-region 1133 can be velvety.

[0128] In some examples, refer to Figure 6 As shown, the surface of the fourth sub-region 1132 can be a velvety surface. The surface of the fifth sub-region 1133 can be a polished surface.

[0129] In some examples, refer to Figure 4 As shown, the surface of the fourth sub-region 1132 can be polished. The surface of the fifth sub-region 1133 can be textured.

[0130] In some examples, refer to Figure 3 As shown, the surface of the fourth sub-region 1132 can be a polished surface. The surface of the fifth sub-region 1133 can also be a polished surface.

[0131] In some examples, refer to Figures 1-6 As shown, the dielectric layer 40 may include a first dielectric layer 41. The first dielectric layer 41 may be disposed in the transition region 113 and a portion of the first region 111.

[0132] In some examples, the first dielectric layer 41 of the first region 111 may cover the side of the first doped semiconductor layer 30 away from the first passivation layer 20.

[0133] It is understood that in some examples of the embodiments of this application, the arrangement of the first dielectric layer 41 in the transition region 113 and part of the first region 111 may be the same as, similar to or similar to the arrangement of the dielectric layer 40 in the foregoing embodiments of this application. For details, please refer to the detailed description of the dielectric layer 40 in the foregoing embodiments of this application. The embodiments of this application will not repeat the details.

[0134] In some examples, dielectric layer 40 may include a second dielectric layer 42, which may be located on the side of the first dielectric layer 41 facing away from the substrate 10. The second passivation layer 50 of the first region 111 may cover the side of the second dielectric layer 42 facing away from the substrate 10.

[0135] In some examples, the material of the first dielectric layer 41 can be different from the material of the second dielectric layer 42. This allows the first dielectric layer 41, with its better adhesion, to first cover the third sub-region 1131 and the fourth sub-region 1132 of the transition region 113. This improves the overall adhesion of the dielectric layer 40. It also facilitates sufficient coverage of the sidewalls of the first doped semiconductor layer 30 and the first passivation layer 20 by the dielectric layer 40, thereby reducing leakage paths in the solar cell.

[0136] In addition, a second dielectric layer 42 with better resistance to damp heat can be used to block humid hot water vapor, which can improve the resistance to damp heat of the first doped layer in the first region 111.

[0137] In some examples, the first dielectric layer 41 may include either aluminum oxide or silicon oxide.

[0138] In some examples, the second dielectric layer 42 may include silicon nitride.

[0139] In some examples, the thickness of the first dielectric layer 41 may be less than the thickness of the second dielectric layer 42.

[0140] In some embodiments of this application, either alumina or silicon oxide is used as the first dielectric layer 41, and the thickness of the first dielectric layer 41 is set to be less than that of the second dielectric layer 42. This reduces the amount of hydrogen gas that escapes during subsequent heating after the first dielectric layer 41 is deposited, lowers the risk of the second dielectric layer 42 bursting, ensures the integrity of the second dielectric layer 42, and thus ensures the effectiveness of the second dielectric layer 42 in insulating the first doped semiconductor layer 30 and the second doped semiconductor layer 60. This reduces leakage paths in the solar cell and lowers the power loss of the solar cell and photovoltaic module. Furthermore, it improves the yield rate of the solar cell.

[0141] In some examples, the thickness of the first dielectric layer 41 can be 5nm-15nm.

[0142] In some examples, the thickness of the first dielectric layer 41 can be 7nm-12nm.

[0143] In some examples, the thickness of the first dielectric layer 41 can be 5nm-12nm.

[0144] In some examples, the thickness of the first dielectric layer 41 can be 7nm-15nm.

[0145] In some examples of embodiments of this application, the thickness of the first dielectric layer 41 is set to 5nm-15nm. This allows for effective atomic-level deposition of alumina or silicon oxide, utilizing their superior coverage. This effectively covers the sidewalls of the first doped semiconductor layer 30 and the first passivation layer 20, as well as the third sub-region 1131, the fourth sub-region 1132, and the fifth sub-region 1133, improving insulation performance between the first doped semiconductor layer 30 and the second doped semiconductor layer 60 and reducing leakage paths. Furthermore, setting the thickness of the first dielectric layer 41 to 5nm-15nm reduces hydrogen release during subsequent heating processes after deposition, lowering the risk of the second dielectric layer 42 bursting and improving the yield of the solar cell. This ensures the effectiveness of the second dielectric layer 42 in insulating the first doped semiconductor layer 30 and the second doped semiconductor layer 60, reducing leakage paths in the solar cell and lowering power losses in the solar cell and photovoltaic module.

[0146] In some examples, the thickness of the second dielectric layer 42 can be 60nm-100nm.

[0147] In some examples, the thickness of the second dielectric layer 42 can be 80nm-100nm.

[0148] In some examples of embodiments of this application, the thickness of the second dielectric layer 42 is set to 60nm-100nm. This ensures the heat resistance, moisture resistance, and alkali resistance of the second dielectric layer 42, thereby reducing the risk of external environmental heat and humidity penetrating from the second dielectric layer 42 to the first doped semiconductor layer 30. This enhances the heat and humidity resistance of the first doped semiconductor layer 30 and improves the reliability of the solar cell.

[0149] In some examples, refer to Figures 1-6 As shown, the solar cell may include a conductive layer 70. The conductive layer 70 may be disposed on the side of the first doped semiconductor layer 30 and the second doped semiconductor layer 60 opposite to the substrate 10.

[0150] In some examples, the conductive layer 70 can be a transparent conductive layer 70. For example, the conductive layer 70 may include indium tin oxide (ITO).

[0151] In some examples, refer to Figures 1-6 As shown, the conductive layer 70 may be provided with an isolation groove 71. The orthographic projection of the isolation groove 71 onto the substrate 10 may be located in the first region 111.

[0152] In some examples, at least a portion of the isolation trench 71 may extend to the surface of the second doped semiconductor layer 60 facing away from the substrate 10. In this way, the conductive layer 70 of the first region 111 and the conductive layer 70 of the second region 112 can be isolated by the isolation trench 71, thereby physically ensuring that the conductive layer 70 of the first region 111 and the conductive layer 70 of the second region 112 are insulated, preventing the formation of a leakage path between the conductive layer 70 of the first region 111 and the conductive layer 70 of the second region 112.

[0153] In some examples of embodiments of this application, a conductive layer 70 is provided on the side of the first doped semiconductor layer 30 and the second doped semiconductor layer 60 facing away from the substrate 10, and an isolation trench 71 is provided on the conductive layer 70. The orthogonal projection of the isolation trench 71 onto the substrate 10 is located in the first region 111, and at least a portion of the isolation trench 71 extends to the surface of the second doped semiconductor layer 60 facing away from the substrate 10. In this way, the conductive layer 70 can collect the charge carriers in the first region 111 throughout the first doped semiconductor layer 30, and similarly, the conductive layer 70 can collect the charge carriers in the second region 112 throughout the second doped semiconductor layer 60, thereby improving the charge carrier collection efficiency and the photoelectric conversion efficiency of the solar cell.

[0154] In some examples, refer to Figures 1-6 As shown, the solar cell may include a first electrode 80. The orthographic projection of the first electrode 80 onto the substrate 10 may be located in a first region 111. The first electrode 80 may be electrically connected to the conductive layer 70 of the first region 111.

[0155] In some examples, refer to Figures 1-6 As shown, the solar cell may include a second electrode 90. The orthographic projection of the second electrode 90 onto the substrate 10 may be located in a second region 112. The second electrode 90 may be electrically connected to the conductive layer 70 of the second region 112.

[0156] In some examples of embodiments of this application, a first electrode 80 is provided in a first region 111, which is electrically connected to the conductive layer 70 of the first region 111, and a second electrode 90 is provided in a second region 112, which is electrically connected to the conductive layer 70 of the second region 112. This facilitates the extraction of the photocurrent generated by the solar cell.

[0157] In some examples, the surface of the second sub-region 1122 can be a polished surface.

[0158] In some examples, the surface of the second sub-region 1122 can be velvety.

[0159] In other examples of embodiments of this application, a photovoltaic module is provided, including the solar cell provided in the foregoing embodiments of this application.

[0160] It is understood that the photovoltaic modules provided in this application have the same or corresponding technical features as the solar cells provided in the foregoing embodiments of this application. Therefore, the photovoltaic modules provided in this application can have the same or similar technical effects as the solar cells provided in the foregoing embodiments.

[0161] Figure 7 This is a flowchart illustrating the fabrication process of a solar cell provided in some embodiments of this application.

[0162] In some examples, refer to Figure 7 As shown, the solar cell provided in this application embodiment can be prepared according to the following preparation method.

[0163] s701, the substrate 10 is polished. For example, the first surface 11 can be polished.

[0164] In step s702, a first passivation layer 20 and an intrinsic polysilicon layer are sequentially deposited on the first surface 11. Then, the intrinsic polysilicon layer is diffused to form a first doped semiconductor layer 30; simultaneously, a phosphosilicate glass layer is formed. The phosphosilicate glass layer may be removed, partially retained, or completely retained.

[0165] s703, a mask layer is deposited on the side of the first doped semiconductor layer 30 opposite to the substrate 10. The mask layer may include silicon nitride.

[0166] s704 uses laser technology to remove the mask layer of the preset area of ​​the first surface 11, and uses wet process to remove the first doped semiconductor layer 30 and the first passivation layer 20 of the preset area.

[0167] Thus, a second region 112 and a transition region 113 can be formed in a predetermined area on the first surface 11. After the initial structure of the first region 111, the second region 112 and the transition region 113 is formed, the mask layer can be removed by a chain machine.

[0168] S705 employs a wet process to remove laser damage in the grooved area, simultaneously fabricating the textured surface of the second surface 12 and the textured surface of the second region 112. Then, the mask layer can be removed using hydrogen fluoride (HF).

[0169] In s706, a first dielectric layer 41 is deposited in an atomic layer deposition (ALD) apparatus. Simultaneously, the preparation of alumina or silicon oxide on the second surface 12 can be completed.

[0170] In S707, the second dielectric layer 42 is prepared in a plasma-enhanced chemical vapor deposition (PECVD) furnace. Simultaneously, the silicon nitride and sacrificial layer of the second surface 12 can be prepared. Alternatively, the silicon nitride, silicon oxynitride, and sacrificial layer of the second surface 12 can be prepared simultaneously.

[0171] S708 uses laser technology to perform a second grooving in the second region 112. The grooving can be located at the junction of the second region 112 and the transition region 113. Alternatively, the grooving can be located in the transition region 113.

[0172] Then, the second grooving area can be de-damaged using a wet process to complete the polishing of the second grooving position.

[0173] s709, an intrinsic amorphous silicon layer and a doped amorphous silicon layer are deposited on the second surface 12. Then, the doped amorphous silicon, intrinsic amorphous silicon and dielectric layer 40 on the first region 111 are removed (or partially removed) by laser process, thereby forming a second passivation layer 50 and a second doped semiconductor layer 60.

[0174] The S710 uses a chain machine to remove the oxide layer generated by the laser.

[0175] In step s711, a conductive layer 70 is fabricated on the second surface 12 using a physical vapor deposition (PVD) apparatus. Then, an isolation trench 71 is formed in the conductive layer 70 using a laser process, thereby isolating the conductive layer 70 in the first region 111 and the second region 112.

[0176] In S712, a first electrode 80 is formed in the first region 111 and a second electrode 90 is formed in the second region 112 through screen printing and sintering processes, thereby completing the fabrication of a solar cell.

[0177] In some examples, the main grid lines can be formed by screen printing. There may be at least two main grid lines. One of the two main grid lines may be electrically connected to the first electrode 80; the other of the two main grid lines may be electrically connected to the second electrode 90.

[0178] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0179] The embodiments described above are merely illustrative of several implementation methods of this application, and while the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the patent application. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this application, and these all fall within the protection scope of this application. Therefore, the protection scope of this patent application should be determined by the appended claims.

Claims

1. A solar cell, characterized in that, include: A substrate (10) has opposing first surfaces (11) and second surfaces (12). The first surface (11) includes a first region (111), a second region (112), and a transition region (113). The transition region (113) is located between the first region (111) and the second region (112). The surface of the first region (111) and the second surface (12) have a first distance, and the surface of the second region (112) and the second surface (12) have a second distance, the second distance being less than the first distance. The second region (112) includes a first sub-region (1121) and a second sub-region (1122). The first sub-region (1121) is connected between the transition region (113) and the second sub-region (1122). The surface of the first sub-region (1121) is an inclined surface. A first passivation layer (20) is disposed in the first region (111); A first doped semiconductor layer (30) is disposed on the side of the first passivation layer (20) away from the substrate (10); A dielectric layer (40) is disposed in the transition region (113) and a portion of the first region (111), wherein the dielectric layer (40) in the first region (111) covers the side of the first doped semiconductor layer (30) away from the first passivation layer (20); A second passivation layer (50) is disposed in the second region (112), the transition region (113) and part of the first region (111), wherein the second passivation layer (50) in the first region (111) covers the side of the dielectric layer (40) away from the substrate (10); A second doped semiconductor layer (60) is disposed on the side of the second passivation layer (50) away from the substrate (10).

2. The solar cell according to claim 1, characterized in that, Along the thickness direction of the substrate (10), there is a third distance between one end of the dielectric layer (40) near the second region (112) and the side surface of the first doped semiconductor layer (30) away from the substrate (10), the third distance being greater than or equal to the doping depth of the first doped semiconductor layer (30).

3. The solar cell according to claim 2, characterized in that, The third distance is less than or equal to the distance between the end of the first sub-region (1121) facing the transition region (113) and the surface of the first doped semiconductor layer (30) on the side away from the substrate (10).

4. The solar cell according to claim 1, characterized in that, The transition region (113) includes a third sub-region (1131), which is adjacent to the first region (111), and the distance between the surface of the third sub-region (1131) and the second surface (12) is equal to the first distance. The dielectric layer (40) is connected to the surface of the third sub-region (1131) at one end facing the substrate (10), and the dielectric layer (40) covers at least the sidewalls of the first passivation layer (20) and the first doped semiconductor layer (30) facing the third sub-region (1131).

5. The solar cell according to claim 4, characterized in that, The transition region (113) further includes a fourth sub-region (1132), which is adjacent to the third sub-region (1131) and is located on the side of the third sub-region (1131) facing the second region (112); the surface of the fourth sub-region (1132) is an inclined surface; The dielectric layer (40) extends from one end toward the substrate (10) to the fourth sub-region (1132).

6. The solar cell according to claim 5, characterized in that, The surface of the fourth sub-region (1132) is polished.

7. The solar cell according to claim 5, characterized in that, The surface of the fourth sub-region (1132) is velvety.

8. The solar cell according to claim 5, characterized in that, The transition region (113) further includes a fifth sub-region (1133), which is located between the fourth sub-region (1132) and the first sub-region (1121). The surfaces of the first sub-region (1121) and the fourth sub-region (1132) are both at an angle to the surface of the fifth sub-region (1133). The dielectric layer (40) extends from one end toward the second region (112) to the fifth sub-region (1133).

9. The solar cell according to claim 8, characterized in that, The surface of the fifth sub-region (1133) is parallel to the surface of either the first region (111) or the second sub-region (1122).

10. The solar cell according to claim 8, characterized in that, The surface of the fifth sub-region (1133) is polished.

11. The solar cell according to claim 8, characterized in that, The surface of the fifth sub-region (1133) is velvety.

12. The solar cell according to any one of claims 1-11, characterized in that, The dielectric layer (40) includes: A first dielectric layer (41) is disposed in the transition region (113) and a portion of the first region (111), and the first dielectric layer (41) in the first region (111) covers the side of the first doped semiconductor layer (30) away from the first passivation layer (20). A second dielectric layer (42) is located on the side of the first dielectric layer (41) away from the substrate (10); the second passivation layer (50) of the first region (111) covers the side of the second dielectric layer (42) away from the substrate (10); wherein the material of the first dielectric layer (41) is different from the material of the second dielectric layer (42).

13. The solar cell according to claim 12, characterized in that, The first dielectric layer (41) comprises either aluminum oxide or silicon oxide; the second dielectric layer (42) comprises silicon nitride, and the thickness of the first dielectric layer (41) is less than the thickness of the second dielectric layer (42).

14. The solar cell according to claim 12, characterized in that, The thickness of the first dielectric layer (41) is 5nm-15nm; the thickness of the second dielectric layer (42) is 60nm-100nm.

15. The solar cell according to any one of claims 1-3, characterized in that, The solar cell also includes: A conductive layer (70) is disposed on the side of the first doped semiconductor layer (30) and the second doped semiconductor layer (60) away from the substrate (10). The conductive layer (70) is provided with an isolation trench (71). The orthographic projection of the isolation trench (71) on the substrate (10) is located in the first region (111), and at least a portion of the isolation trench (71) extends to the surface of the second doped semiconductor layer (60) away from the substrate (10).

16. The solar cell according to claim 15, characterized in that, The solar cell also includes: A first electrode (80) is located in the first region (111) on the substrate (10) and is electrically connected to the conductive layer (70) of the first region (111). The second electrode (90) is located in the second region (112) on the orthographic projection of the substrate (10), and is electrically connected to the conductive layer (70) of the second region (112).

17. A photovoltaic module, characterized in that, Includes the solar cell according to any one of claims 1-16.

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