High-voltage LED chip structure and light-emitting element

Abstract

The invention provides a high-voltage LED chip structure and a light-emitting element, the high-voltage LED chip structure sequentially comprises a semiconductor layer, a first insulating layer, an electrode layer, a second insulating layer and a bonding pad electrode from bottom to top, and the electrode layer comprises a first electrode, a second electrode and a third electrode. The plurality of LED light-emitting units are isolated from one another through a semiconductor layer formed by etching; the first electrodes are used for electrically connecting adjacent units in series; the second electrode and the third electrode extend in the current starting direction and the current stopping direction respectively, and multi-point injection and release are achieved. In cooperation with connection of the insulating layer opening and the bonding pad, local current congestion can be effectively reduced, packaging compatibility and thermal reliability are improved, and a new manufacturing process is not needed.

Description

Technical Field

[0001] This disclosure relates to the field of semiconductor packaging technology, and more specifically, to a high-voltage LED chip structure and light-emitting element. Background Technology

[0002] With the widespread adoption of LEDs (Light Emitting Diodes) in applications such as lighting, backlighting, automotive, and plant lighting, high-power, high-brightness, compact, and highly reliable LED chips have become a key focus of research and industrialization. To reduce driving current and simplify driving circuits, high-voltage LED chip structures are gradually becoming an important trend in the industry. The basic principle is to connect multiple light-emitting units in series to form a single chip, adapting to high-voltage, low-current driving.

[0003] However, existing high-voltage LED chips still generally suffer from the following problems: traditional upright high-voltage LED chips have complex structures, long manufacturing processes, redundant electrode bridging structures, and low soldering yield; although flip-chip high-voltage LED chips have better heat dissipation and light emission performance, since the P and N electrodes are usually distributed at both ends of the chip, the current can only be injected from the edge, which can easily cause problems such as excessively high current density at the injection point and uneven current distribution; in the multi-light-emitting unit series (e.g., ≥3 units) structure, the traditional single-point injection or cross-unit pad structure design has the risk of current congestion and connection failure. Summary of the Invention

[0004] This disclosure provides at least one high-voltage LED chip structure and light-emitting element, which can realize cross-unit electrical interconnection and multi-point injection design, significantly reducing the risk of local overheating and congestion, and adapting to flip-chip packaging requirements, improving packaging compatibility and reliability. At the same time, without adding new manufacturing processes, process compatibility is achieved through hierarchical structure optimization and electrode layer interconnection scheme improvement.

[0005] This disclosure provides a high-voltage LED chip structure, which includes, from bottom to top, a semiconductor layer, a first insulating layer, an electrode layer, a second insulating layer, and a pad electrode. The electrode layer includes a first electrode, a second electrode, and a third electrode.

[0006] The semiconductor layer includes a plurality of LED light-emitting units isolated from each other by etched trenches; the first insulating layer is deposited on the semiconductor layer and has a first opening for exposing the N-type semiconductor layer and a second opening for exposing the P-type semiconductor layer for each LED light-emitting unit;

[0007] For each LED light-emitting unit, the first electrode electrically connects the N-type semiconductor layer to the P-type semiconductor layer of the adjacent LED light-emitting unit along the current flow direction through the first opening and the second opening;

[0008] Along the current flow direction, the second electrode is electrically connected to the corresponding P-type semiconductor layer through the second opening of the LED light-emitting unit at the current starting position and extends to cover multiple LED light-emitting units; the third electrode is electrically connected to the corresponding N-type semiconductor layer through the first opening of the LED light-emitting unit at the current ending position and extends to cover multiple LED light-emitting units in the opposite direction of current flow.

[0009] The second insulating layer is deposited on the electrode layer, and a third opening is provided on the LED light-emitting unit to expose the second electrode, or a fourth opening to expose the third electrode;

[0010] The pad electrodes include a P-type pad electrode electrically connected to the second electrode through the third opening, and an N-type pad electrode electrically connected to the third electrode through the fourth opening.

[0011] In one optional embodiment, a metal reflective layer and a third insulating layer are further disposed between the first insulating layer and the electrode layer;

[0012] The metal reflective layer is disposed on the first insulating layer above the P-type semiconductor layer and covers the second opening;

[0013] The third insulating layer is deposited on the metal reflective layer and the first insulating layer, and each LED light-emitting unit has a fifth opening that exposes the metal reflective layer and a sixth opening that exposes the N-type semiconductor layer.

[0014] In one optional embodiment, the LED light-emitting units are arranged symmetrically in the semiconductor layer;

[0015] Along the current flow direction, adjacent LED light-emitting units are electrically connected through at least one of the first electrodes, and there is no electrical connection between the first electrode and the second electrode, or between the first electrode and the third electrode.

[0016] In one optional embodiment, the distance between the first electrode and the second electrode on the surface of the LED light-emitting unit is smaller than the distance between the first electrode and the second electrode on the etching trench.

[0017] On the surface of the LED light-emitting unit, the distance between the first electrode and the third electrode is less than the distance between the first electrode and the third electrode on the etched trench.

[0018] In one optional embodiment, the second electrode is electrically connected only to the P-type semiconductor layer corresponding to the LED light-emitting unit located at the current initiation position along the current flow direction, and is not electrically connected to the multiple LED light-emitting units that extend and cover along the current flow direction.

[0019] The third electrode is electrically connected only to the N-type semiconductor layer corresponding to the LED light-emitting unit located at the current termination position along the current flow direction, and is not electrically connected to the multiple LED light-emitting units that extend and cover in the opposite current flow direction.

[0020] In one optional implementation, the number of LED light-emitting units is 3 or 2n, where n is a positive integer greater than 2.

[0021] In one alternative implementation, the number of the first electrodes is 2n-1 to 2×(2n-1).

[0022] In one optional embodiment, the second electrode and the third electrode each partially cover n LED light-emitting units.

[0023] In one optional embodiment, both the P-type pad electrode and the N-type pad electrode comprise at least two.

[0024] This disclosure also provides a light-emitting device, including at least one LED chip, which is the LED high-voltage chip described in any of the above embodiments;

[0025] At least one encapsulation layer is disposed on the light-emitting surface of the LED chip;

[0026] At least one sealing unit covers the side surface of the LED chip and the bottom surface opposite the light-emitting surface, and exposes at least a portion of the external connecting electrodes of the LED chip.

[0027] This disclosure provides a high-voltage LED chip structure and light-emitting device, comprising, from bottom to top: a semiconductor layer, a first insulating layer, an electrode layer, a second insulating layer, and pad electrodes. The electrode layer includes a first electrode, a second electrode, and a third electrode. The semiconductor layer includes a plurality of LED light-emitting units isolated from each other by etched trenches. The first insulating layer is deposited on the semiconductor layer and has a first opening exposing an N-type semiconductor layer and a second opening exposing a P-type semiconductor layer for each LED light-emitting unit. For each LED light-emitting unit, the first electrode, through the first opening and the second opening, connects the N-type semiconductor layer to the P-type semiconductor layer of the adjacent LED light-emitting unit along the current flow direction. The semiconductor layers are electrically connected. Along the current flow direction, the second electrode, through the second opening of the LED light-emitting unit at the current initiation position, is electrically connected to the corresponding P-type semiconductor layer and extends to cover multiple LED light-emitting units. The third electrode, through the first opening of the LED light-emitting unit at the current termination position, is electrically connected to the corresponding N-type semiconductor layer and extends against the current flow direction to cover multiple LED light-emitting units. The second insulating layer is deposited on the electrode layer and has a third opening on the LED light-emitting unit exposing the second electrode, or a fourth opening exposing the third electrode. The pad electrode is electrically connected to the second electrode through the third opening and to the third electrode through the fourth opening. This design enables cross-unit electrical interconnection and multi-point injection design, significantly reducing the risk of localized overheating and congestion. It also adapts to flip-chip packaging requirements, improving packaging compatibility and reliability. Furthermore, without adding new manufacturing processes, process compatibility is achieved through hierarchical structure optimization and improved electrode layer interconnection schemes.

[0028] To make the above-mentioned objects, features and advantages of this disclosure more apparent and understandable, preferred embodiments are described below in detail with reference to the accompanying drawings. Attached Figure Description

[0029] To more clearly illustrate the technical solutions of the embodiments of this disclosure, the accompanying drawings used in the embodiments will be briefly described below. These drawings are incorporated in and constitute a part of this specification. They illustrate embodiments conforming to this disclosure and, together with the specification, serve to explain the technical solutions of this disclosure. It should be understood that the following drawings only show some embodiments of this disclosure and should not be considered as limiting the scope. Those skilled in the art can obtain other related drawings based on these drawings without creative effort.

[0030] Figure 1 A schematic diagram of a high-voltage LED chip structure according to the present invention is shown;

[0031] Figure 2 It shows Figure 1A cross-sectional view of the chip structure along the AA direction;

[0032] Figure 3 It shows Figure 1 A cross-sectional view of the chip structure along the BB direction;

[0033] Figure 4 A schematic diagram of another high-voltage LED chip structure of the present invention is shown;

[0034] Figure 5 It shows Figure 4 A cross-sectional view of the chip structure along the BB direction;

[0035] Figure 6 A schematic diagram of another high-voltage LED chip structure of the present invention is shown;

[0036] Figure 7 It shows Figure 6 A cross-sectional view of the chip structure along the AA direction;

[0037] Figure 8 It shows Figure 6 A cross-sectional view of the chip structure along the BB direction;

[0038] Figure 9 It shows Figure 6 Another cross-sectional view of the chip structure along the AA direction;

[0039] Figure 10 It shows Figure 6 Another cross-sectional view of the chip structure along the BB direction;

[0040] Figure 11 A schematic diagram of a light-emitting device according to the present invention is shown. Detailed Implementation

[0041] To make the objectives, technical solutions, and advantages of the embodiments of this disclosure clearer, the technical solutions of the embodiments of this disclosure will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this disclosure, and not all of them. The components of the embodiments of this disclosure described and shown in the accompanying drawings can generally be arranged and designed in various different configurations. Therefore, the following detailed description of the embodiments of this disclosure provided in the accompanying drawings is not intended to limit the scope of the claimed disclosure, but merely represents selected embodiments of this disclosure. All other embodiments obtained by those skilled in the art based on the embodiments of this disclosure without inventive effort are within the scope of protection of this disclosure.

[0042] It should be noted that similar labels and letters in the following figures indicate similar items. Therefore, once an item is defined in one figure, it does not need to be further defined and explained in subsequent figures.

[0043] The term "and / or" in this document merely describes an association, indicating that three relationships can exist. For example, A and / or B can represent: A alone, A and B simultaneously, or B alone. Furthermore, the term "at least one" in this document means any combination of at least two of any one or more elements. For example, including at least one of A, B, and C can mean including any one or more elements selected from the set of A, B, and C. "Above" and "below" are relative positions, not specific spatial limitations. Exposure includes direct exposure and spaced exposure; electrical connections include directly formed ohmic contact layer connections as well as indirect electrical connections formed through other conductive dielectric layers.

[0044] This invention discloses a high-voltage LED chip structure, which includes, from bottom to top, a semiconductor layer, a lower insulating layer, and an electrode layer. The electrode layer includes a first electrode, a second electrode, and an interconnect electrode. The semiconductor layer includes a plurality of LED light-emitting units isolated from each other by etched trenches. Each light-emitting unit includes a first semiconductor layer, a second half-semiconductor layer, and a light-emitting layer (not shown in the figure) disposed between the first half-semiconductor layer and the second semiconductor layer. The semiconductor layer of each light-emitting unit is etched to expose the first semiconductor layer.

[0045] One of the first and second semiconductor layers is an N-type doped semiconductor, and the other is a P-type doped semiconductor. The materials of the first and second semiconductor layers include, for example, gallium nitride (GaN), indium gallium nitride (InGaN), gallium arsenide (GaAs), or other materials composed of Group IIIA and Group VA elements, or other suitable materials, but the invention is not limited thereto. The light-emitting layer, for example, has quantum wells (QWs), such as single quantum wells (SQWs), multiple quantum wells (MQWs), or other quantum wells. Holes provided by the P-type doped semiconductor layer and electrons provided by the N-type doped semiconductor layer can combine and release energy in the form of light, with emission wavelengths ranging from ultraviolet to infrared. The light-emitting layer can have one or more quantum well layers, and the peak wavelength of the emission wavelength in the spectrum can be one or more. In some embodiments, the materials of the semiconductor layers include, for example, gallium nitride (GaN), indium gallium nitride (InGaN), gallium arsenide (GaAs), aluminum gallium indium phosphide (AlGaInP), indium aluminum gallium arsenide (InAlGaAs), or other materials composed of Group IIIA and Group VA elements, or other suitable materials.

[0046] An insulating layer is deposited on the top and sidewalls of the semiconductor layer, and each LED light-emitting unit is provided with a first opening exposing the first semiconductor layer and a second opening exposing the second semiconductor layer;

[0047] Interconnect electrodes electrically connect the first semiconductor layer and the second conductor layer of adjacent LED light-emitting units along the current flow direction;

[0048] The first electrode is electrically connected to its first semiconductor layer through a first opening on one of the light-emitting units; the second electrode is electrically connected to its second semiconductor layer through a second opening on the other light-emitting unit; the first electrode extends to cover X light-emitting units and / or the second electrode extends to cover Y light-emitting units, where X≥2 and / or Y≥2; adjacent first electrodes, second electrodes and interconnecting electrodes have a certain distance between them in the horizontal projection.

[0049] The resulting high-voltage chip can be a conventional structure, a vertical structure, or a flip-chip structure.

[0050] In a flip-chip high-voltage structure, pad electrodes are also included, such as at least one first pad electrically connected to the first electrode and at least one second pad electrically connected to the second electrode. An upper insulating layer can be disposed between the pad electrodes and the electrode structure layer. The upper insulating layer covers the upper surface and sidewalls of the electrode structure layer and the isolation trench and has openings that expose the first and second electrodes, respectively. The first and second pads are electrically connected to the first and second electrodes through the openings, respectively. To ensure the stability of the flip chip, the first pad and / or the second pad span at least two light-emitting units in a horizontal projection; or a non-conductive metal bump can be disposed between the first and second pads. The surface of the semiconductor layer structure of the metal bump is flush with, slightly higher than or slightly lower than the surface of the pad electrode. In addition to providing support in the flip structure, the metal bump also provides heat dissipation. The pad electrodes and the metal bumps can be isolated by an insulating layer. The metal bumps can be formed together with the pad electrodes and have the same material layer.

[0051] In another structure, a conductive layer may be disposed between the semiconductor layer and the underlying insulating layer. This conductive layer may be a transparent conductive layer and / or a metallic conductive layer. The transparent conductive layer, also called a current spreading layer, typically has a large area disposed on the second semiconductor layer and forms an ohmic contact. It comprises at least one material selected from the group consisting of indium tin oxide, cadmium tin oxide, antimony tin oxide, zinc oxide, and zinc tin oxide. The metallic conductive layer comprises at least one material selected from the group consisting of Al and Ag.

[0052] The size and position of the metal conductive layer on the semiconductor layer vary depending on the chip structure and its function. For example, the metal conductive layer can be a large-area reflective structure layer covering the second semiconductor layer, whose main function is light reflection. Alternatively, it can include a first conductive layer located on the first semiconductor layer and connected to the electrodes of the first semiconductor layer, and a second conductive layer located on the second semiconductor layer and connected to the electrodes of the second semiconductor layer. Specifically, the first conductive layer is typically located on the exposed first semiconductor layer and forms an ohmic contact with the first semiconductor layer, serving to electrically connect the first semiconductor layer and the first electrode.

[0053] In another structure, an insulating protective layer is disposed between the conductive layer and the second semiconductor layer. This insulating protective layer includes a protective layer and a distributed Bragg insulating layer, and / or the lower insulating layer includes a protective layer and a distributed Bragg insulating layer, and / or the upper insulating layer includes a protective layer and a distributed Bragg insulating layer.

[0054] The protective layer includes a first protective layer and a second protective layer disposed on the upper and lower surfaces of the distributed Bragg insulation layer, and the materials are selected from SiO2 and SiO2. x SiO x N y At least one of HfO2, ZrO2, Nb2O5 and MgF2 from Si3N4, TiO2, Al2O3.

[0055] The distributed Bragg insulating layer is a reflective layer formed by repeated stacking of dielectric layers with different refractive indices, wherein the dielectric layers may include SiO2, SiO2, etc. x SiO x N y The reflective layer can contain HfO2, ZrO2, Nb2O, MgF2, etc., from Si3N4, TiO2, and Al2O3. For example, it can have a structure with alternating stacked TiO2 / SiO2 or SiO2 / Al2O3 layers. This reflective layer can have a reflectivity of, for example, more than 90%, and further more than 95%, for light generated in the active layer 33.

[0056] The number of LED light-emitting units is 3 or 2n, where n is a positive integer greater than or equal to 1, such as 1, 2, 3, 4, 5…n. The number of interconnecting electrodes is 2n-1 to 2*(2n-1); the first electrode and the second electrode each partially cover n LED light-emitting units.

[0057] Example 1

[0058] like Figures 1 to 3 The high-voltage chip shown, Figure 1 A schematic diagram of a high-voltage LED chip structure according to the present invention is shown; Figure 2 It shows Figure 1 A cross-sectional view of the chip structure along the AA direction; Figure 3 It shows Figure 1 The chip structure is shown in a cross-sectional view along the BB direction. It consists of three LED light-emitting units L1, L2, and L3 arranged sequentially in the first direction. From bottom to top, it includes a substrate 300 and three light-emitting units disposed on the substrate 300 and isolated by isolation trenches ISO. Each LED light-emitting unit has an inclined sidewall S2. Each LED light-emitting unit includes a first semiconductor layer 301, a light-emitting layer 303, and a second semiconductor layer 302 disposed sequentially on the substrate 300. The second semiconductor layer 302 and the light-emitting layer 303 on each LED light-emitting unit are etched to expose the first semiconductor layer 301. The exposed first semiconductor layer 301 includes a platform located around the light-emitting unit and a via OP located within the light-emitting unit. The second semiconductor layer 302 and the light-emitting layer 303 have inclined sidewalls S3. Each LED light-emitting unit has at least one via OP. The illustrated structure uses two vias as an example, but this is not a limitation.

[0059] An insulating layer 31 is formed on the upper surface, sidewalls, and isolation trench ISO of the semiconductor layer 30. Each light-emitting unit has two first openings 311 and two second openings 312 exposing the first semiconductor layer 301 and the second semiconductor layer 302, respectively. The first openings 312 are located at the same position as the vias OP. Four interconnect electrodes 323 are respectively connected to the first openings 311 and second openings 312 of two adjacent LED light-emitting units. For example, two interconnect electrodes 323 are electrically connected to light-emitting units L1 and L2, and the other two interconnect electrodes 323 are electrically connected to LED light-emitting units L2 and L3. The interconnect electrodes are positioned relative to the center of the light-emitting unit, away from the center.

[0060] The first electrode 321 is electrically connected to the first semiconductor layer 301 through a first opening 311 on the third light-emitting unit L3. The first electrode 321 includes an extension 3211 extending in a first direction to the surface of the second LED light-emitting unit L2. The second electrode 322 is electrically connected to the second semiconductor layer 302 through a second opening 312 on the first LED light-emitting unit L1. The second electrode 322 includes a first extension 3221 extending in the first direction to the surface of the second LED light-emitting unit L2. A certain distance OS is maintained between the first electrode 321, the second electrode 322, and the plurality of interconnecting electrodes 323 to prevent contact between them. The first extensions of the first electrode 321 and the second electrode 322 are located at the center of the light-emitting unit. The first electrode 321 also includes a second extension 3212 in a second direction perpendicular to the first direction, extending along the edge of the third LED light-emitting unit L3. The second electrode 322 also includes a second extension 3222 in a second direction perpendicular to the first direction, the second extension 3222 extending along the edge of the first light-emitting unit L1.

[0061] The substrate 300-bit growth substrate may include at least one selected from sapphire (Al2O3), SiC, GaAs, GaN, ZnO, Si, GaP, InP, and Ge, but the embodiments are not limited thereto. A sapphire substrate is preferred. The semiconductor layer 30 is preferably a GaN-based semiconductor layer, such as a first semiconductor layer 301 being N-type GaN, a second semiconductor layer 302 being P-type GaN, and a light-emitting layer 303 being an InGaN multi-quantum well, forming light-emitting units capable of emitting ultraviolet to infrared light.

[0062] like Figure 4-5 Another flip-chip high voltage chip with pad electrodes 34 is shown. Figure 4 A schematic diagram of another high-voltage LED chip structure of the present invention is shown; Figure 5 It shows Figure 4 The chip structure is shown in a cross-sectional view along the BB direction. It includes an upper insulating layer 33 and openings that expose a first electrode 321 and a second electrode 322, respectively. A first pad 341 is electrically connected to the first electrode 321 through one opening, and a second pad 342 is electrically connected to the second electrode 322 through another opening.

[0063] Example 2

[0064] A flip-chip high-voltage chip with eight light-emitting units is disclosed. Each LED light-emitting unit L1, L2, L3, L4, L5, L6, L7, and L8 has a first opening exposing an N-type semiconductor layer and a second opening exposing a P-type semiconductor layer. For each LED light-emitting unit, a first electrode electrically connects the N-type semiconductor layer to the P-type semiconductor layer of an adjacent LED light-emitting unit along the current flow direction through the first and second openings. Along the current flow direction, the second electrode is electrically connected to the corresponding P-type semiconductor layer through the second opening of the LED light-emitting unit at the current initiation position and extends to cover multiple LED light-emitting units. A third electrode is electrically connected to the corresponding N-type semiconductor layer through the first opening of the LED light-emitting unit at the current termination position and extends against the current flow direction to cover multiple LED light-emitting units. A second insulating layer is deposited on the electrode layer, and each LED light-emitting unit has a third opening exposing the second electrode, or a fourth opening exposing the third electrode. The pad electrode is electrically connected to the second electrode through the third opening and to the third electrode through the fourth opening. It enables cross-cell electrical interconnection and multi-point injection design, significantly reducing the risk of local overheating and congestion, and adapts to flip-chip packaging requirements, improving packaging compatibility and reliability. At the same time, without adding new manufacturing processes, it achieves process compatibility through hierarchical structure optimization and electrode layer interconnection scheme improvement.

[0065] To facilitate understanding of this embodiment, the high-voltage LED chip structure disclosed in this disclosure will be described in detail, such as... Figures 6 to 8 The high-voltage chip shown is in Figure 6 Based on this, see Figures 7-8 As shown, Figure 7 Provided for the embodiments of this disclosure Figure 6 A cross-sectional view of the chip structure along the AA direction; Figure 8 Provided for the embodiments of this disclosure Figure 6 A cross-sectional view of the chip structure along the BB direction.

[0066] like Figures 7-8 As shown in the figure, the high-voltage LED chip structure provided in this embodiment includes, from bottom to top, a semiconductor layer 10, a first insulating layer 11, an electrode layer 12, a second insulating layer 13, and a pad electrode 14. The electrode layer 12 includes a first electrode 121, a second electrode 122, and a third electrode 123.

[0067] Specifically, such as Figures 6-8 As shown, the semiconductor layer 10 includes a plurality of LED light-emitting units (L1-L8) isolated from each other by etched trenches; a first insulating layer 11 is deposited on the semiconductor layer 10, and for each LED light-emitting unit, a first opening 111 exposing an N-type semiconductor layer and a second opening 112 exposing a P-type semiconductor layer are provided; for each LED light-emitting unit, a first electrode 121 electrically connects the N-type semiconductor layer to the P-type semiconductor layer of the adjacent LED light-emitting unit through the first opening 111 and the second opening 112 along the current flow direction; along the current flow direction, a second electrode 122 passes through the second opening of the LED light-emitting unit at the current initiation position. 112, electrically connected to the corresponding P-type semiconductor layer and extending to cover multiple LED light-emitting units; the third electrode 123, through the first opening 111 of the LED light-emitting unit at the current termination position, is electrically connected to the corresponding N-type semiconductor layer and extends to cover multiple LED light-emitting units in the opposite direction of current flow; the second insulating layer 13 is deposited on the electrode layer 12, and a third opening 131 exposing the second electrode 122 or a fourth opening 132 exposing the third electrode 123 is provided on each LED light-emitting unit; the pad electrode 14 is electrically connected to the second electrode 122 through the third opening 131 and to the third electrode 123 through the fourth opening 132.

[0068] In specific implementation, the high-voltage LED chip comprises, from bottom to top: semiconductor layer 10 → first insulating layer 11 → electrode layer 12 (including first electrode 121, second electrode 122, and third electrode 123) → second insulating layer 13 → pad electrode 14. This high-voltage LED chip structure achieves physical isolation and electrical series connection of multiple LED light-emitting units (L1-L8) through three types of metal electrodes (first electrode 121, second electrode 122, and third electrode 123), and supports uniform current injection and release.

[0069] Here, the semiconductor layer 10 is composed of multiple LED light-emitting units (L1-L8). Physical isolation is achieved by etching trenches (MESA trenches) on the substrate or epitaxial layer to divide the LED chip into multiple sub-units, adapting to high-voltage series connection and providing a basic structural partition for the insulating layer and metal interconnects, while ensuring the independent electrical properties of the PN junctions between each unit. The first insulating layer 11 is deposited on the semiconductor layer 10. The first opening 111 exposes the N-type semiconductor layer of each LED light-emitting unit, and the second opening 112 exposes the P-type semiconductor layer of each LED light-emitting unit. This defines the contact area of ​​the metal electrodes, prevents short circuits between different metal areas, and provides a path for subsequent electrode wiring.

[0070] Furthermore, the electrode layer 12 includes three types of electrodes: the first electrode 121 connects the N-type layer of one LED unit to the P-type layer of the next LED unit, and is electrically connected through the corresponding first opening 111 and second opening 112 to realize the step-by-step series connection of each LED light-emitting unit (L1–L8) to ensure that the current flows unit by unit according to the preset current flow direction; the second electrode 122 connects to the P-type semiconductor layer of the first light-emitting unit (such as L1) located at the current starting position, and crosses multiple LED light-emitting units (L2–L4) in the current direction to provide a P-side current injection path; the third electrode 123 connects to the N-type semiconductor layer of the last LED light-emitting unit (such as L8) located at the current ending position; and crosses multiple LED light-emitting units (such as L7–L5) in the opposite current direction to provide an N-side current release path.

[0071] The second electrode 122 is electrically connected only to the P-type semiconductor layer corresponding to the LED light-emitting unit (such as L1) located at the current starting position along the current flow direction, and is not electrically connected to the multiple LED light-emitting units (such as L2-L4) extending and covering along the current flow direction; the third electrode 123 is electrically connected only to the N-type semiconductor layer corresponding to the LED light-emitting unit (such as L8) located at the current ending position along the current flow direction, and is not electrically connected to the multiple LED light-emitting units (such as L7-L5) extending and covering in the opposite current flow direction.

[0072] It should be noted that in the semiconductor layer 10, the LED light-emitting units are arranged symmetrically. Along the current flow direction, adjacent LED light-emitting units are electrically connected through at least one first electrode 121, and there is no electrical connection between the first electrode 121 and the second electrode 122, or between the first electrode 121 and the third electrode 123.

[0073] Preferably, on the surface of the LED light-emitting unit, the distance between the first electrode 121 and the second electrode 122 is smaller than the distance between the first electrode 121 and the second electrode 122 on the surface of the etched trench; and on the surface of the LED light-emitting unit, the distance between the first electrode 121 and the third electrode 123 is smaller than the distance between the first electrode 121 and the third electrode 123 on the surface of the etched trench.

[0074] Furthermore, the second insulating layer 13 is deposited over the entire electrode layer 12, and a third opening 131 exposes the second electrode 122, and a fourth opening 132 exposes the third electrode 123. This isolates the electrode metal from the external pads, preventing short circuits in the electrode layer, while controlling the pad connection positions to ensure a clear and reliable electrical path, providing a structural basis for selective connection of the pad electrodes. The pad electrode 14 is disposed on the second insulating layer 13, electrically connected to the second electrode 122 (P-pole) through the third opening 131, and electrically connected to the third electrode 123 (N-pole) through the fourth opening 132, forming a connection interface between the chip and external circuits (such as a packaging substrate or PCB). This allows for multiple P / N pad electrodes to be arranged in parallel, adapting to flip-chip packaging and multi-point injection, thereby improving electrical connection redundancy, packaging yield, and electrical reliability.

[0075] It should be noted that, in this embodiment, the current flow direction is defined as LED light-emitting units L1-L8, where LED light-emitting units L1-L4 form the first current path, LED light-emitting units L4-L5 form the third current path, and LED light-emitting units L5-L8 form the second current path. The first and second current paths are parallel to each other, and the third current path is perpendicular to both the first and second current paths. When the number of LED light-emitting units is set to two (6V), only the first current path exists. When the number of LED light-emitting units is set to two (6V), only the first and second current paths exist.

[0076] For example, taking LED light-emitting units L1-L8 as an example, the current is injected from the pad electrode 14 → second electrode 122 → P-type layer of L1; inside the LED light-emitting unit, the current flows from the P-type layer of L1 → first electrode 121 → N-type layer of L2; and so on, L2 → L3 → … → L8; for the final release, the current flows from the N-type layer of L8 → third electrode 123 → pad electrode 14. A complete high-voltage series path is formed, with the current entering from LED light-emitting unit L1 and exiting from LED light-emitting unit L8, completing the series path of "P → N → P → N…" along the structural hierarchy.

[0077] As one possible implementation method, see Figures 9-10 As shown, Figure 9 Provided for the embodiments of this disclosure Figure 6 Another cross-sectional view of the chip structure along the AA direction; Figure 10 Provided for the embodiments of this disclosure Figure 6 Another cross-sectional view of the chip structure along the BB direction.

[0078] like Figures 9-10 As shown, the high-voltage LED chip structure provided in this embodiment includes, from bottom to top, a semiconductor layer 10, a first insulating layer 11, an electrode layer 12, a second insulating layer 13, and a pad electrode 14. The electrode layer 12 includes a first electrode 121, a second electrode 122, and a third electrode 123. A metal reflective layer 15 and a third insulating layer 16 are also disposed between the first insulating layer 11 and the electrode layer 12.

[0079] Specifically, the metal reflective layer 15 is disposed on the first insulating layer 11 above the P-type semiconductor layer and covers the second opening 112; the third insulating layer 16 is deposited on the metal reflective layer 15 and the first insulating layer 11, and is provided with a fifth opening 161 exposing the metal reflective layer 15 and a sixth opening 162 exposing the N-type semiconductor layer for each LED light-emitting unit.

[0080] In a specific implementation, the metal reflective layer 15 and the third insulating layer 16 are located before the electrode layer 12 of the LED chip are formed. The specific order is: semiconductor layer 10 → first insulating layer 11 → metal reflective layer 15 → third insulating layer 16 → electrode layer 12 (the second insulating layer 13 and the pad electrode 14 are then superimposed).

[0081] Here, the metal reflective layer 15 is disposed on the first insulating layer 11, corresponding to the P-type semiconductor layer location area of ​​each LED light-emitting unit, and completely or partially covers the second opening 112 (i.e., the area exposing the P-type layer). This enhances light extraction efficiency, reflects downward-radiated light leaking from below the P-type layer, improves overall luminous efficiency, and can be used in conjunction with flip-chip packaging designs to reflect downward-radiated light upwards. The preferred material for the metal reflective layer 15 is a highly reflective metal such as silver (Ag) or aluminum (Al), but it can also be a multilayer composite reflective structure (such as Ag / Ti or Al / Ti).

[0082] Furthermore, the third insulating layer 16 covers the metal reflective layer 15 and the first insulating layer 11 outside the exposed area, preventing subsequent metal electrodes from directly contacting the reflective layer or the underlying semiconductor material, avoiding short circuits, and ensuring that the metal interconnects are only connected to specific areas by defining the opening positions.

[0083] Here, the fifth opening 161 is used to expose the metal reflective layer 15, corresponding to the P-type semiconductor layer region in each LED light-emitting unit, so as to allow the electrodes in the electrode layer 12 to be electrically connected to the metal reflective layer 15, thereby indirectly establishing contact with the P-type semiconductor layer. The sixth opening 162 is used to expose the N-type semiconductor layer, and the opening position falls above the first opening 111 provided in the first insulating layer, providing a contact path for subsequent metal electrode connection to the N-type semiconductor layer. The pad electrode 14 includes a P-type pad electrode electrically connected to the second electrode electrode 122 through the third opening 131, and an N-type pad electrode electrically connected to the third electrode 123 through the fourth opening 132. At least two P-type and two N-type pad electrodes are included.

[0084] It should be noted that in the high-voltage LED chip structure provided in this embodiment, the number of LED light-emitting units is 3 or 2n, where n is a positive integer greater than 2; the number of first electrodes 121 is 2n-1 to 2*(2n-1). The second electrode 122 and the third electrode 123 each partially cover n LED light-emitting units.

[0085] As one possible implementation method, see Figure 11 As shown, Figure 11 This is a schematic diagram of a light-emitting device provided in an embodiment of this disclosure. Figure 11 As shown, the light-emitting device includes at least one LED chip, which is as described above. Figures 1-10 The LED high voltage chip shown in any of the above further includes at least one encapsulation layer disposed on the light-emitting surface of the LED chip, at least one sealing unit covering the side surface of the LED chip and the bottom surface opposite to the light-emitting surface, and exposing at least a portion of the external interconnecting electrodes of the LED chip.

[0086] This disclosure provides a high-voltage LED chip structure, comprising, from bottom to top: a semiconductor layer, a first insulating layer, an electrode layer, a second insulating layer, and pad electrodes. The electrode layer includes a first electrode, a second electrode, and a third electrode. The semiconductor layer includes multiple LED light-emitting units isolated from each other by etched trenches. The first insulating layer is deposited on the semiconductor layer and has a first opening exposing an N-type semiconductor layer and a second opening exposing a P-type semiconductor layer for each LED light-emitting unit. For each LED light-emitting unit, the first electrode, through the first opening and the second opening, connects the N-type semiconductor layer to the P-type semiconductor layer of the adjacent LED light-emitting unit along the current flow direction. The electrode is electrically connected to the body layer. Along the current flow direction, the second electrode connects electrically to the corresponding P-type semiconductor layer through the second opening of the LED light-emitting unit at the current initiation position and extends to cover multiple LED light-emitting units. The third electrode connects electrically to the corresponding N-type semiconductor layer through the first opening of the LED light-emitting unit at the current termination position and extends against the current flow direction to cover multiple LED light-emitting units. A second insulating layer is deposited on the electrode layer, and a third opening or a fourth opening exposing the second electrode is provided on each LED light-emitting unit. The pad electrode is electrically connected to the second electrode through the third opening and to the third electrode through the fourth opening. This design enables cross-unit electrical interconnection and multi-point injection design, significantly reducing the risk of localized overheating and congestion. It also adapts to flip-chip packaging requirements, improving packaging compatibility and reliability. Furthermore, without adding new manufacturing processes, process compatibility is achieved through hierarchical structure optimization and improved electrode layer interconnection schemes.

[0087] Furthermore, in the specific implementation of the high-voltage LED chip fabrication process provided by this invention, photolithographic patterns are defined on the substrate layer of the LED chip. Dry or wet etching techniques are used to penetrate the P-type layer above the PN junction to the N-type layer, forming a MESA structure. Further etching isolation techniques are used to etch the N-type GaN layer in the epitaxial layer, thereby forming etch trenches that expose the substrate. A first insulating layer (e.g., SiN or SiO2) is deposited integrally on the surface of the etched semiconductor layer. A first opening is created using photolithographic etching, aligned with the N-type semiconductor layer region for subsequent electrode contact; a second opening is created, aligned with the P-type semiconductor layer region for subsequent electrode contact. Each LED light-emitting unit has at least one pair of openings, ensuring that each unit has an independent N / P contact point.

[0088] Here, on the first insulating layer, the lines of the first electrode are patterned by photolithography. Using metal deposition (e.g., a multilayer structure such as Ti / Pt / Au or Ni / Ag), a metal bridge is formed connecting the N-layer of the preceding unit and the P-layer of the following unit. This structure spans the first and second openings of the two light-emitting units. On the first insulating layer, for wiring around the second opening of the current-initiating light-emitting unit, metal is deposited and extends above multiple central unit regions, covering but not contacting their P / N layers, and connecting to multiple pads to achieve multi-point P-current injection, avoiding all current entering from a single pad and reducing local current density.

[0089] Metal wiring is applied to the first opening of the current-terminating light-emitting unit, extending in the reverse current direction across multiple units to connect multiple N-pads and achieve uniform current output distribution. A second insulating layer is deposited throughout the electrode layer, and a third opening is formed by photolithography to expose the second electrode (P-side), and a fourth opening to expose the third electrode (N-side). Each opening corresponds to one or more predetermined connection areas of the pads.

[0090] Furthermore, on the second insulating layer, a pad structure is formed by metal deposition and patterning processes. The pad is connected to the second electrode (P side) through a third opening and to the third electrode (N side) through a fourth opening. The pad shape can be square or round bump pad, compatible with flip-chip bonding process. Multiple pads can be set to form a multi-point connection structure on the same side, improving contact redundancy and electrical reliability.

[0091] As one possible implementation, after forming a first opening exposing an N-type semiconductor layer and a second opening exposing a P-type semiconductor layer for each LED light-emitting unit on the first insulating layer, the high-voltage LED chip packaging method further includes: preparing a metal reflective layer covering the second opening on the first insulating layer; depositing a third insulating layer on the metal reflective layer and the first insulating layer; and forming a fifth opening exposing the metal reflective layer and a sixth opening exposing the N-type semiconductor layer for each LED light-emitting unit.

[0092] Finally, it should be noted that the above-described embodiments are merely specific implementations of this disclosure, used to illustrate the technical solutions of this disclosure, and not to limit it. The protection scope of this disclosure is not limited thereto. Although this disclosure has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that any person skilled in the art can still modify or easily conceive of changes to the technical solutions described in the foregoing embodiments, or make equivalent substitutions for some of the technical features, within the scope of the technology disclosed in this disclosure. Such modifications, changes, or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of this disclosure, and should all be covered within the protection scope of this disclosure. Therefore, the protection scope of this disclosure should be determined by the protection scope of the claims.

Claims

1. A high voltage LED chip structure, characterized in that, From bottom to top, the chip comprises: a semiconductor layer, a lower insulating layer, and an electrode layer, wherein the electrode layer comprises a first electrode, a second electrode, and an interconnection electrode; The semiconductor layer is etched by a plurality of etching grooves to form a plurality of light-emitting units, each of which comprises a first semiconductor layer, a second semiconductor layer, and a light-emitting layer arranged between the first semiconductor layer and the second semiconductor layer, and the semiconductor layer of each light-emitting unit is etched to expose the first semiconductor layer; The lower insulating layer is deposited on the top, sidewall, and isolation groove of the light-emitting unit, and each light-emitting unit is provided with a first opening exposing the first semiconductor layer and a second opening exposing the second semiconductor layer; The interconnection electrode electrically connects the first semiconductor layer and the second semiconductor layer of adjacent light-emitting units along the current flow direction; The first electrode is electrically connected to the first semiconductor layer through the first opening in one of the light-emitting units, the second electrode is electrically connected to the second semiconductor layer through the second opening in another light-emitting unit, and the first electrode extends to cover X light-emitting units and / or the second electrode extends to cover Y light-emitting units, wherein X≥2 and / or Y≥2.

2. The high voltage LED chip structure of claim 1, wherein, The chip further comprises a first pad electrically connected to the first electrode and at least one second pad electrically connected to the second electrode; when the number of the first pad and / or the second pad is 1, the first pad and / or the second pad horizontally projects at least across 2 light-emitting units.

3. The high voltage LED chip structure of claim 1, wherein, A conductive layer is further arranged between the second semiconductor layer and the lower insulating layer, and the conductive layer is a transparent conductive layer and / or a metal conductive layer; Preferably, the conductive layer comprises a second conductive layer arranged on the second semiconductor layer and electrically connected to the second semiconductor layer, and the second conductive layer comprises a metal conductive layer; Preferably, the conductive layer comprises a second conductive layer arranged on the second semiconductor layer and electrically connected to the second semiconductor layer, and the second conductive layer comprises a transparent conductive layer and a metal conductive layer arranged on the transparent conductive layer; Preferably, the conductive layer comprises a first conductive layer arranged on the first semiconductor layer and electrically connected to the first semiconductor layer, and the first conductive layer comprises a metal conductive layer.

4. The high voltage LED chip structure of claim 2, wherein, An upper insulating layer is arranged between the first pad and the second pad and the electrode layer, and the upper insulating layer is provided with openings exposing the first electrode and the second electrode, respectively.

5. The high voltage LED chip structure of claim 3, wherein, An insulating protective layer is arranged between the conductive layer and the second semiconductor layer; Preferably, the insulating protective layer comprises a protective layer and a distributed Bragg insulating layer; Preferably, the lower insulating layer comprises a protective layer and a distributed Bragg insulating layer; Preferably, the upper insulating layer comprises a protective layer and a distributed Bragg insulating layer.

6. The high voltage LED chip structure of claim 1, wherein: The number of the LED light-emitting units is 3 or 2n, wherein n is a positive integer greater than 1. Preferably, the number of the interconnection electrodes is 2n-1 to 2×(2n-1). Preferably, the first electrode and the second electrode respectively partially cover n LED light-emitting units.

7. The high voltage LED chip structure of claim 2, wherein: In the chip structure, at least two first pads and / or two second pads are included.

8. The high voltage LED chip structure of claim 2, wherein: An electrically non-conductive bump is arranged between the first pad and the second pad.

9. The high voltage LED chip structure of claim 1, wherein the light emitting layer has a light emitting wavelength covering from ultraviolet to infrared, and has one or more peak wavelengths.

10. A light emitting element characterized by comprising: An LED high voltage chip comprising at least one LED chip as claimed in any one of claims 1 to 9; At least one encapsulation layer disposed on a light emitting surface of the LED chip; At least one sealing unit covering a side surface of the LED chip and a bottom surface opposite to the light emitting surface, and exposing at least a part of the external electrode of the LED chip.

10. The high voltage LED chip structure of claim 1, wherein the LED chip has a plurality of light emitting layers, and the light emitting layers have different light emitting wavelengths.

11. The high voltage LED chip structure of claim 1, wherein the LED chip has a plurality of light emitting layers, and the light emitting layers have the same light emitting wavelength.

12. The high voltage LED chip structure of claim 1, wherein the LED chip has a plurality of light emitting layers, and the light emitting layers have different light emitting wavelengths.

13. The high voltage LED chip structure of claim 1, wherein the LED chip has a plurality of light emitting layers, and the light emitting layers have the same light emitting wavelength.

14. The high voltage LED chip structure of claim 1, wherein the LED chip has a plurality of light emitting layers

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