Lead-free (La, Bi) FeO3 film with adjustable polymorphic negative capacitance effect and preparation method of lead-free (La, Bi) FeO3 film

Abstract

The invention provides a lead-free (La, Bi) FeO3 film with an adjustable polymorphic negative capacitance effect and a preparation method thereof. The lead-free (La, Bi) FeO3 film comprises a substrate layer, and a first electrode layer, a ferroelectric material layer and a second electrode layer which are sequentially stacked on the substrate layer, the ferroelectric material layer comprises bismuth ferrite doped with rare earth elements, and the doping content of the rare earth elements in the bismuth ferrite is 15%-30%. According to the lead-free (La, Bi) FeO3 thin film, the ferroelectricity of bismuth ferrite is converted, steady-state negative capacitance is achieved, and lead-free, high polarization intensity and adjustable phase change voltage are achieved.

Description

TECHNICAL FIELD

[0001] The application belongs to the technical field of ferroelectric thin film materials, and particularly relates to a lead-free (La, Bi) FeO3 thin film with a controllable multi-state negative capacitance effect and a preparation method thereof. BACKGROUND

[0002] With the rapid development of integrated circuit technology, the size of transistors has been shrunk to the physical limit, and the traditional metal-oxide field-effect transistor is facing severe challenges. According to Moore's law, the number of transistors on a chip doubles every 18-24 months, but this trend is severely restricted by quantum tunneling effect, short channel effect and heat dissipation problem. Among them, the subthreshold swing, as a core parameter to measure the switching efficiency of transistors, has a theoretical lower limit of 60 mV / dec (determined by Boltzmann distribution at room temperature), leading to a sharp rise in static power consumption of devices in the subthreshold region. According to the International Technology Roadmap for Semiconductors (ITRS), if the SS limit cannot be broken, the power consumption of future high-performance chips will be difficult to control, severely restricting the application of high-density computing scenarios such as artificial intelligence and Internet of Things.

[0003] To break this bottleneck, negative capacitance field-effect transistors have emerged, whose core principle is to amplify the control ability of gate voltage on channel potential through the negative capacitance effect of ferroelectric materials, thereby reducing the SS value to below 60 mV / dec. Early research focused on ferroelectric material systems, such as lead zirconium titanate (Pb(Zr,Ti)O3, PZT) and hafnium-based oxides (such as HfO2 doping). However, there are significant defects in the practical application of ferroelectric materials: limited transient negative capacitance range and environmental pollution problem. The negative capacitance effect of ferroelectric materials only occurs in the transient process of polarization reversal, which is difficult to stabilize and utilize through conventional circuits, and lead-based ferroelectrics represented by PZT are harmful to the environment and human body.

[0004] In recent years, antiferromagnetic materials (such as PbZrO3, PZO) have attracted attention due to their unique double hysteresis loop characteristics and potential for full-range negative capacitance. Antiferromagnetic materials can undergo antiferromagnetic-ferroelectric phase transition under the action of an electric field, and theoretically can achieve a more stable negative capacitance effect. However, the existing antiferromagnetic system still has the following key problems:

[0005] 1. Insufficient polarization intensity: the saturation polarization value of PZO (about ~40 μC / cm 2 ) is significantly lower than that of ferroelectric materials (such as ~100 μC / cm 2 ) of BFO), resulting in weak negative capacitance effect;

[0006] 2. Phase transition voltage is uncontrollable: the phase transition voltage of traditional antiferromagnetic materials is determined by the inherent characteristics of the crystal structure, and cannot be adjusted by process, limiting the flexibility of device design;

[0007] 3. Poor environmental compatibility: PZO and other antiferroelectric materials still contain lead elements, which are harmful to the environment and human body, and are difficult to be compatible with CMOS process.

[0008] In summary, it has become a core challenge to develop a lead-free, high-polarization-intensity, and phase-transition-voltage-adjustable negative capacitance material, and to realize low-loss integration with semiconductor process, to break through the power consumption bottleneck in the post-Moore era. SUMMARY

[0009] The present application aims to overcome the shortcomings and deficiencies in the prior art, and provides a lead-free (La, Bi) FeO3 thin film, which utilizes element doping to change the ferroelectricity of bismuth ferrite, obtains a lead-free (La, Bi) FeO3 thin film with high polarization intensity, has stable negative capacitance, and realizes lead-free, high polarization intensity, and adjustable phase transition voltage.

[0010] The present application is realized by the following technical solutions:

[0011] A lead-free (La, Bi) FeO3 thin film includes a substrate layer, a first electrode layer, a ferroelectric material layer, and a second electrode layer stacked in sequence on the substrate layer; the ferroelectric material layer includes bismuth ferrite doped with rare earth elements, and the doping content of rare earth elements in bismuth ferrite is 15-30%.

[0012] In the lead-free (La, Bi) FeO3 thin film provided by the embodiment, 15%-30% of rare earth elements are doped in bismuth ferrite, and the rare earth elements replace part of Bi 3+ ions cause lattice distortion of bismuth ferrite, and element doping is used to change the ferroelectricity of bismuth ferrite, to obtain a lead-free (La, Bi) FeO3 thin film with high polarization intensity, has stable negative capacitance, realizes lead-free, high polarization intensity, and adjustable phase transition voltage; the doping proportion of rare earth elements is controlled to optimize the negative capacitance response, and if the doping concentration of rare earth elements is too low, it is difficult to effectively reduce the coercive field, resulting in weak negative capacitance effect; when the doping concentration of rare earth elements is too high, it may cause excessive oxygen vacancies to cause a sharp increase in leakage current, and too high or too low of rare earth elements will have adverse effects on the ferroelectric properties of the thin film, which is not conducive to the observation and application of negative capacitance effect.

[0013] Further, in the ferroelectric material layer, the rare earth elements doped in bismuth ferrite include at least one of La, Nd, Sm, and Eu.

[0014] Further, the thickness of the ferroelectric material layer is 140-350 nm. According to different phase transition voltage requirements, by adjusting the thickness of the ferroelectric material layer, the stress gradient release induced by the lattice mismatch between the substrate layer and the ferroelectric material layer is utilized to form different degrees of lattice distortion, so that one of the lead-free (La, Bi) FeO3 thin film with negative phase transition voltage, the lead-free (La, Bi) FeO3 thin film with near-zero phase transition voltage and the lead-free (La, Bi) FeO3 thin film with positive phase transition voltage can be obtained, and the continuous regulation of the phase transition voltage can be realized.

[0015] Further, the substrate layer is a (001) oriented strontium titanate.

[0016] Further, the rare earth element doped bismuth ferrite is an antiferromagnetic structure prepared under an oxygen pressure of 12-18 Pa. According to different phase transition voltage requirements, the oxygen vacancy concentration is controlled by adjusting the oxygen pressure condition, different degrees of lattice distortion are formed, and one of the lead-free (La, Bi) FeO3 thin film with negative phase transition voltage, the lead-free (La, Bi) FeO3 thin film with near-zero phase transition voltage and the lead-free (La, Bi) FeO3 thin film with positive phase transition voltage can be obtained, and the continuous regulation of the phase transition voltage can be realized.

[0017] The application also provides a method for preparing the above-mentioned lead-free (La, Bi) FeO3 thin film, which comprises the following steps: depositing the first electrode on the substrate layer; depositing the ferroelectric material layer on the first electrode, the oxygen pressure is 12-18 Pa, the deposition thickness is 140-350 nm, and the ferroelectric material layer is cooled to room temperature after deposition; and depositing the second electrode on the ferroelectric material layer.

[0018] The method for preparing the lead-free (La, Bi) FeO3 thin film provided by the application can adjust the oxygen pressure or control the growth thickness of LBFO according to the specific requirements of the phase transition voltage of the ferroelectric material layer, so that the phase transition voltage of the ferroelectric material layer can be regulated, and the transient negative capacitance meeting the requirements can be obtained.

[0019] The application also provides the application of the above-mentioned lead-free (La, Bi) FeO3 thin film in the field of negative capacitance.

[0020] In order to better understand and implement, the application will be described in detail below with reference to the accompanying drawings. BRIEF DESCRIPTION OF DRAWINGS

[0021] Figure 1 is a structural schematic diagram of the lead-free (La, Bi) FeO3 thin film of Example 1.

[0022] Figure 2 is a flowchart of the preparation of the lead-free (La, Bi) FeO3 thin film of Example 2.

[0023] Figure 3is the XRD spectrum of LBFO with thickness of 140-350 nm of Example 3.

[0024] Figure 4 is the P-E loop of LBFO with thickness of 140-350 nm of Example 3.

[0025] Figure 5 is the P-E loop of LBFO grown under different oxygen pressure with the same thickness of Example 4.

[0026] Figure 6 is the RSM test result of 300 nm ferroelectric material layer deposited under different oxygen pressure of Example 4.

[0027] Figure 7 is the test result of transient negative capacitance test of Example 5.

[0028] Figure 8 is the comparison chart of LBFO with 300 nm ferroelectric material layer deposited under different oxygen pressure and PZO with the same thickness of Example 4.

[0029] Figure 9 is the C-V test result of Al2O3 / LBFO heterojunction and single Al2O3 of Example 5.

[0030] Figure 10 is the calculation and linear fitting of capacitance enhancement effect under different Al2O3 thickness of Example 5.

[0031] Figure 11 is the LBFO negative capacitance field effect transistor structure schematic diagram of Example 7. DETAILED DESCRIPTION

[0032] The embodiments of the present application will be further described below in conjunction with the drawings and examples. It can be understood that the specific embodiments described herein are only used to explain the embodiments of the present application, but not to limit the embodiments of the present application. In addition, it should be noted that, in order to facilitate the description, only the parts related to the embodiments of the present application are shown in the drawings, not all the structures.

[0033] In addition, the terms first, second, third and the like in the description and claims are only used for the purpose of distinguishing the same technical features, and cannot be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. In appropriate cases, the terms are interchangeable. Therefore, the features defined as "first", "second" can explicitly or implicitly include at least one of the features.

[0034] Similarly, the use of the terms "fixed", "connected" in the specification and claims should not be understood as being limited to direct connections. Thus, the expression "device A is connected to device B" should not be limited to device A being directly connected to device B in a device or system, meaning that there is a path between device A and device B, which can be a path including other devices or tools.

[0035] Example 1

[0036] The embodiment provides a lead-free (La, Bi) FeO3 film, Figure 1 is a structural diagram of the lead-free (La, Bi) FeO3 film, please refer to Figure 1 The lead-free (La, Bi) FeO3 film comprises a substrate layer 1, a first electrode layer 2, a ferroelectric material layer 3 and a second electrode layer 4 which are sequentially stacked on the substrate layer 1; the ferroelectric material layer 3 comprises rare earth element doped bismuth ferrite, and the doping content of the rare earth element in the bismuth ferrite is 15%-30%.

[0037] In the lead-free (La, Bi) FeO3 film provided by the embodiment, 15%-30% of rare earth elements are doped in the bismuth ferrite, the rare earth elements replace part of Bi 3+ The ion causes the lattice distortion of the bismuth ferrite, the ferroelectricity of the bismuth ferrite is converted, the lead-free (La, Bi) FeO3 film with high polarization intensity is obtained, the stable negative capacitance is obtained, the lead-free, high polarization intensity and adjustable phase transition voltage are realized; the doping proportion of the rare earth element is controlled to optimize the negative capacitance response, if the doping concentration of the rare earth element is too low, the coercive field is difficult to effectively reduce, and the negative capacitance effect is weak; if the doping concentration of the rare earth element is too high, excessive oxygen vacancies may be caused to cause a sharp increase in leakage current, and too high or too low of the rare earth element will have adverse effects on the ferroelectric properties of the film, which is not conducive to the observation and application of the negative capacitance effect.

[0038] In the embodiment, in the ferroelectric material layer 3, the rare earth element doped in the bismuth ferrite comprises at least one of La, Nd, Sm and Eu, and the chemical formula is Bi 1-x La x FeO3, Bi 1-x Nd x FeO3, Bi 1-x Sm x FeO3 and Bi 1-x Eu x FeO3, wherein x is 0.15-0.3.

[0039] In the embodiment, the thickness of the ferroelectric material layer 3 is 140-350 nm. According to different phase transition voltage requirements, by adjusting the thickness of the ferroelectric material layer 3, the stress gradient release induced by the lattice mismatch between the base layer 1 and the ferroelectric material layer 3 forms different degrees of lattice distortion, and one of the lead-free (La, Bi) FeO3 thin film with negative phase transition voltage, the lead-free (La, Bi) FeO3 thin film with near-zero phase transition voltage and the lead-free (La, Bi) FeO3 thin film with positive phase transition voltage can be obtained, and the continuous regulation of the phase transition voltage can be realized.

[0040] In the embodiment, the base layer 1 is (001)-oriented strontium titanate.

[0041] In the embodiment, the rare earth element doped bismuth ferrite is an antiferromagnetic structure prepared under an oxygen pressure of 12-18 Pa. According to different phase transition voltage requirements, by adjusting the oxygen pressure condition to control the oxygen vacancy concentration, different degrees of lattice distortion are formed, and one of the lead-free (La, Bi) FeO3 thin film with negative phase transition voltage, the lead-free (La, Bi) FeO3 thin film with near-zero phase transition voltage and the lead-free (La, Bi) FeO3 thin film with positive phase transition voltage can be obtained, and the continuous regulation of the phase transition voltage can be realized.

[0042] Example 2

[0043] The embodiment provides a method for preparing the lead-free (La, Bi) FeO3 thin film of the embodiment 1, Figure 2 is a flowchart for preparing the lead-free (La, Bi) FeO3 thin film, please refer to Figure 2 The method for preparing the lead-free (La, Bi) FeO3 thin film comprises the following steps:

[0044] Step S1: depositing the first electrode layer 2 on the base layer 1.

[0045] In one embodiment, the base layer 1 is (001)-oriented strontium titanate (STO), and the first electrode layer 2 is strontium ruthenate (SRO). A 50 nm first electrode strontium ruthenate is prepared on a 5 mm x 5 mm strontium titanate (STO) base layer 1 by pulse laser deposition (PLD), and the strontium ruthenate covers the entire surface of the base layer 1, forming an SRO / STO heterojunction.

[0046] Specifically, the STO substrate is sequentially ultrasonically cleaned with acetone, ethanol and deionized water, dried with nitrogen, and then placed in a PLD cavity. The first electrode layer SRO layer is deposited on the STO substrate, the laser energy is 60 mJ, the laser pulse frequency is 8 Hz, the substrate temperature is 700 ℃±10 ℃, the oxygen pressure is 18 Pa (real-time dynamic regulation ±1 Pa), the target-substrate distance is 50 mm, and the deposition thickness is 50 nm.

[0047] Step S2: depositing a ferroelectric material layer 3 on the first electrode layer 2, oxygen pressure is 12-18 Pa, deposition thickness is 140-350 nm, and after deposition, cooling to room temperature.

[0048] In an embodiment, the ferroelectric material layer 3 is deposited on the SRO / STO heterojunction surface by pulsed laser deposition in a high-purity oxygen atmosphere, and the ferroelectric material layer 3 is Bi 0.7 La 0.3 FeO3(LFBO), La 3+ The doping concentration is 30%, the laser energy is 60 mJ, the laser frequency is 8 Hz, the deposition temperature is 720℃±10℃, the oxygen pressure is 12-18 Pa, and the growth thickness is 140-350 mm. After deposition, slowly cool to room temperature at 10℃ / min in an oxygen atmosphere (2000 Pa) to avoid lattice defects, and obtain an LBFO / SRO / STO heterojunction.

[0049] In practical applications, according to the specific requirements for the phase transition voltage of the ferroelectric material layer 3, the oxygen pressure or the growth thickness of the LBFO can be adjusted to control the phase transition voltage of the ferroelectric material layer 3, and the transient negative capacitance that meets the requirements can be obtained.

[0050] For example, under the condition of oxygen pressure of 18 Pa, according to the requirements of the transient negative capacitance, different thicknesses of the ferroelectric material layer 3 can be deposited on different SRO / STO heterojunctions to form LBFO / SRO / STO heterojunctions with different thicknesses.

[0051] Alternatively, in the case of depositing a certain thickness of the ferroelectric material layer 3, the oxygen pressure condition during the growth of the ferroelectric material layer 3 can be adjusted on different SRO / STO heterojunctions to change the oxygen vacancy concentration, and the ferroelectric material layer 3 with different phase transition voltages can be obtained. The oxygen pressure adjustment range is 12-18 Pa.

[0052] In another embodiment, the rare earth element doped bismuth ferrite also includes at least one of Nd, Sm, and Eu, which realizes the modification of BFO ferroelectric performance, enhances the spontaneous polarization embedded end, improves the residual polarization, and reduces the coercive field.

[0053] Step S3: depositing a second electrode layer 3 on the ferroelectric material layer 3.

[0054] In an embodiment, the second electrode layer 3 is a Pt layer, the argon pressure is 0.4 Pa, the real-time dynamic control is ±0.1 Pa, the target-substrate distance is 60 nm, the electrode pattern is formed on the LBFO / SRO / STO heterojunction surface by using photolithography technology, a 40-50 nm dome-shaped Pt electrode layer is prepared on the surface by using magnetron sputtering technology, and the excess photoresist is cleaned by using acetone. Finally, a regularly arranged dome-shaped second electrode is obtained.

[0055] Example 3

[0056] This embodiment provides a method for preparing lead-free (La,Bi)FeO3 thin films. The ferroelectric-antiferroelectric phase transition voltage can be continuously adjusted by controlling the deposition thickness during growth. The main steps are similar to the preparation method in Example 2, with the main difference being:

[0057] Step S2: Deposit a ferroelectric material layer 3 on the first electrode layer 2 with an oxygen pressure of 12-18 Pa, and cool to room temperature after deposition.

[0058] In this embodiment, a ferroelectric material layer 3 is deposited on the surface of the SRO / STO heterojunction using a pulsed laser in a high-purity oxygen atmosphere. The ferroelectric material layer 3 is lanthanum-doped bismuth ferrite (Bi). 0.7 La 0.3 FeO3(LFBO), La 3+ With a doping concentration of 30%, a laser energy of 60 mJ, a laser frequency of 8 Hz, a deposition temperature of 720℃±10℃, and an oxygen pressure of 18 Pa, LFBO was deposited on different SRO / STO heterojunctions with growth thicknesses of 140 nm, 210 nm, 270 nm, and 350 nm, respectively, resulting in LBFO / SRO / STO heterojunctions with equal thickness differences, exhibiting different properties of ferroelectricity, antiferroelectricity, and paraferroelectricity.

[0059] Figure 3 This is the XRD pattern of LBFO with a thickness of 140nm-350nm. Figure 3 (a) is the XRD pattern of LBFO with a thickness of 140 nm-350 nm. Figure 3 (b) is Figure 3 Please refer to the enlarged view of (a). Figure 3 (a)-(b) show that as the thickness increases, the main peak shifts towards a larger angle, indicating stress release and causing greater lattice distortion, resulting in lanthanum-doped bismuth ferrite (Bi) with different crystal structures. 0.7 La 0.3 FeO3(LFBO).

[0060] Figure 4 It is the hysteresis loop of LBFO with a thickness of 140nm-350nm. Figure 4 (a)- Figure 4 (d) Hysteresis loops for LBFOs with thicknesses of 140 nm, 210 nm, 270 nm, and 350 nm, respectively. Please refer to [reference needed]. Figure 4Different thicknesses of LFBO have different phase transition voltages, and the phase transition voltage increases with increasing thickness. This indicates that stress release can be adjusted by regulating the thickness of LBFO, resulting in different degrees of lattice distortion. The hysteresis loop also changes from ferroelectric to antiferroelectric and then to paraelectric as the thickness of the LBFO layer increases, so as to achieve continuous adjustment of the phase transition voltage.

[0061] Example 4

[0062] This embodiment provides a method for preparing lead-free (La,Bi)FeO3 thin films. The ferroelectric-antiferroelectric phase transition voltage can be continuously adjusted by controlling the oxygen pressure during growth. The main steps are similar to the preparation method in Example 2, with the main difference being:

[0063] Step S2: Deposit a ferroelectric material layer 3 on the first electrode layer 2 with an oxygen pressure of 12-18 Pa, and cool to room temperature after deposition.

[0064] In this embodiment, a ferroelectric material layer 3 is deposited on the surface of the SRO / STO heterojunction using a pulsed laser in a high-purity oxygen atmosphere. The ferroelectric material layer 3 is lanthanum-doped bismuth ferrite (Bi). 0.7 La 0.3 FeO3(LFBO), La 3+ LFBO was deposited on different SRO / STO heterojunctions with a doping concentration of 30%, a laser energy of 60 mJ, a laser frequency of 8 Hz, and a deposition temperature of 720℃±10℃. Oxygen pressures of 18 Pa, 15 Pa, and 12 Pa were used, and the growth thickness was 300 nm for each heterojunction, resulting in LBFO / SRO / STO heterojunctions grown under isobaric pressure differentials. The film grown under 18 Pa exhibited a ferroelectric phase, the film grown under 15 Pa exhibited a ferroelectric-antiferroelectric mixed phase, and the film grown under 12 Pa exhibited an antiferroelectric-paraelectric mixed phase.

[0065] Figure 5 These are the hysteresis loops of LBFO grown at different oxygen pressures with the same thickness. Figure 5 (a)-(c) are the hysteresis loops for oxygen pressures of 18 Pa, 15 Pa, and 12 Pa, respectively. Please refer to [link / reference]. Figure 5 Different oxygen pressures result in different oxygen vacancy concentrations in LBFO, leading to varying degrees of lattice distortion. Furthermore, as oxygen pressure increases, the phase transition voltage also increases. This indicates that the oxygen vacancy concentration can be adjusted by regulating the oxygen pressure during LBFO growth, thereby causing varying degrees of lattice distortion and achieving continuously adjustable phase transition voltage.

[0066] Figure 6 These are the RSM test results of a 300nm ferroelectric material layer 3 deposited under different oxygen pressures, among which... Figure 6 (a) and Figure 6(d) are diffraction conditions of the ferroelectric material layer 3 in (003) and (203) crystal orientations under 18 Pa oxygen pressure, respectively; Figure 6 (b) and Figure 6 (e) are diffraction conditions of the ferroelectric material layer 3 in (003) and (203) crystal orientations under 15 Pa oxygen pressure, respectively; Figure 6 (c) and Figure 6 (f) are diffraction conditions of the ferroelectric material layer 3 in (003) and (203) crystal orientations under 12 Pa oxygen pressure, respectively.

[0067] The LBFO / SRO / STO heterojunction prepared in Example 4 was verified for transient negative capacitance phenomenon, and the transient negative capacitance test included the following steps:

[0068] Step S1: An R-C test circuit (resistor R, LBFO film as capacitor C) was built, and the LBFO / SRO / STO heterojunction was connected to the circuit through a probe table.

[0069] Step S2: A multi-step pulse sequence was designed, and specific multi-step pulse waveforms were drawn by EasyWaveX software for LBFO films of three types of phase transition voltages. The signal was output to a signal amplifier by an Agilent 33522B signal generator, and the signal was amplified as the circuit input voltage US, resistor voltage UR, LBFO film voltage U AFE . The voltage change information was observed and recorded by an oscilloscope, and the sampling frequency was set to 500 MHz.

[0070] Step S3: The LBFO film voltage U AFE The transient negative capacitance phenomenon of the LBFO film can be observed in the time domain from the relationship between the change of the LBFO film voltage U

[0071] Figure 7 is the test result of the transient negative capacitance test, wherein Figure 7 (a) is a waveform schematic diagram of the transient negative capacitance test, Figure 7 (b) is a schematic diagram of the transient negative capacitance test circuit; Figure 8 is the transient specific capacitance of the LBFO deposited with a 300 nm ferroelectric material layer 3 under different oxygen pressures, from Figure 8 (a)-(d) are the transient negative capacitance test results of LBFO deposited under oxygen pressures of 18 Pa, 15 Pa, and 12 Pa, and 300 nm PZO film as a comparative example. Please refer to Figures 7-8, the oxygen pressure is 18 Pa, 15 Pa, 12 Pa respectively deposited to get ferroelectric structure, ferroelectric-antiferromagnetic mixed structure, antiferromagnetic-ferroelectric mixed structure, respectively named negative phase transition voltage type LBFO, near zero phase transition voltage type LBFO, positive phase transition voltage type LBFO, all showing four transient negative capacitance phenomena in a single pulse cycle, the first ferroelectric-antiferromagnetic phase transition voltage during polarization is-3.28V, -0.2V, 2.88V respectively, the transient negative capacitance a>b>c>d, which shows that the embodiment has better transient negative capacitance. Compared with the traditional antiferromagnetic material PZO, the degree of transient negative capacitance phenomenon is: negative phase transition voltage type LBFO>near zero phase transition voltage type LBFO>positive phase transition voltage type LBFO>PZO.

[0072] Example 5

[0073] The embodiment provides a method for preparing a lead-free (La, Bi) FeO3 film, and the ferroelectric-antiferromagnetic phase transition voltage is continuously adjustable by controlling the deposition thickness during growth, and the main steps are similar to the preparation method of the embodiment 2, and the main difference is that:

[0074] Step S2: depositing a 300nm ferroelectric material layer 3 on the first electrode, and the ferroelectric material layer 3 is a lanthanum-doped bismuth ferrite Bi 0.7 La 0.3 FeO3(LFBO), La 3+ The doping concentration is 30%, the oxygen pressure is 15 Pa, and the LBFO / SRO / STO heterojunction is obtained after cooling to room temperature.

[0075] The LBFO / SRO / STO heterojunction prepared in the embodiment 5 is verified for transient negative capacitance phenomenon, the thickness of the ferroelectric material layer 3 is 300nm, the oxygen pressure is 15 Pa, and the Al2O3 / LBFO heterojunction is used as a comparative example for steady-state negative capacitance effect test, and the specific operation is as follows.

[0076] The steady-state negative capacitance test includes the following steps:

[0077] Step S1: depositing a dielectric layer Al2O3 on the surface of the LBFO / SRO / STO heterojunction by the PLD technology, and constructing a C-C heterojunction structure (Al2O3 / LBFO / SRO / STO), and synchronously preparing three control groups of Al2O3 / SRO / STO heterojunctions without LBFO.

[0078] Step S2: C-V test was performed using Keysight B1500A semiconductor parameter analyzer, frequency 10 kHz, bias scan range -8 to +8 V, step 0.1 V. The capacitance values of the experimental group Al2O3 / LBFO / SRO / STO structure and the control group Al2O3 / SRO / STO structure were measured.

[0079] Figure 9 is the C-V test result of Al2O3 / LBFO heterojunction and single Al2O3, wherein Figure 9 (a) is the C-V test result of Al2O3 / LBFO / SRO / STO structure, Figure 9 (b) is the C-V test result of the control group Al2O3 / SRO / STO structure, please refer to Figure 9 (a)-(b), it is found that the capacitance value of the experimental group Al2O3 / LBFO / SRO / STO structure is greater than that of the control group Al2O3 / SRO / STO structure. The capacitance enhancement phenomenon of this C-C heterojunction structure verifies the steady-state negative capacitance phenomenon of the LBFO thin film. Under the condition of 30 nm Al2O3, the capacitance enhancement factor is 2.2.

[0080] Figure 10 is the calculation and linear fitting of the capacitance enhancement effect under different Al2O3 thicknesses, wherein Figure 10 (a) is the capacitance enhancement data of Al2O3 / LBFO / SRO / STO structure with Al2O3 thickness of 30 nm, 40 nm and 50 nm, Figure 10 (b) is the linear fitting curve of the negative capacitance calculation of Al2O3 / LBFO / SRO / STO structure, please refer to Figure 10 (a)-(b), respectively, the capacitance enhancement effect of Al2O3 / LBFO / SRO / STO structure with Al2O3 thickness of 30 nm, 40 nm and 50 nm is linearly fitted, and the steady-state negative capacitance value is calculated. The steady-state negative capacitance value of LBFO is-3.27 pF.

[0081] Example 6

[0082] The embodiment provides a lead-free (La, Bi) FeO3 thin film, which comprises a substrate layer and a first electrode layer, a ferroelectric material layer and a second electrode layer which are sequentially stacked on the substrate layer; the ferroelectric material layer comprises Nd-doped bismuth ferrite, and the content of Nd is 0.1-0.5 wt%. 3+The doping concentration is 15%-30%, and the thickness of the ferroelectric material layer is 140-350mm. According to different phase transition voltage requirements, by adjusting the thickness of the ferroelectric material layer, using the lattice mismatch induced stress gradient release of the substrate layer and the ferroelectric material layer, different degrees of lattice distortion are formed, and one of the lead-free (La, Bi) FeO3 thin film with negative phase transition voltage, the lead-free (La, Bi) FeO3 thin film with near-zero phase transition voltage and the lead-free (La, Bi) FeO3 thin film with positive phase transition voltage can be obtained, and the continuous regulation of the phase transition voltage can be realized.

[0083] In this embodiment, the substrate layer is (001) oriented strontium titanate.

[0084] In this embodiment, the Nd-doped bismuth ferrite is an antiferromagnetic structure prepared under an oxygen pressure of 12-18Pa.

[0085] The lead-free (La, Bi) FeO3 thin film provided in this embodiment is prepared by the following preparation method, and the main steps are similar to those of the preparation method of embodiment 2, and the main difference is that:

[0086] Step S2: Depositing a ferroelectric material layer on the first electrode, the oxygen pressure is 12-18Pa, and the ferroelectric material layer is cooled to room temperature after deposition.

[0087] In this embodiment, the ferroelectric material layer is deposited on the SRO / STO heterojunction surface in a high-purity oxygen atmosphere by pulsed laser deposition, and the deposition thickness is 300nm. The ferroelectric material layer is Nd-doped bismuth ferrite, and the Nd 3+ The doping concentration is 15%-30%, and in one embodiment, the Nd 3+ The doping concentration is 30%, and the chemical formula is Bi 0.7 Nd 0.3 FeO3. In another embodiment, the Nd 3+ The doping concentration is 15%, and the chemical formula is Bi 0.85 Nd 0.15 FeO3.

[0088] Example 7

[0089] This embodiment provides a negative capacitance field effect transistor, which comprises the lead-free (La, Bi) FeO3 thin film described in embodiment 1.

[0090] Figure 11 is a schematic diagram of the LBFO negative capacitance field effect transistor structure of embodiment 7, wherein Figure 11 (a is a schematic diagram of the LBFO negative capacitance field effect transistor structure, Figure 11 (b) is an equivalent diagram of the LBFO negative capacitance field effect transistor, please refer to Figure 11 The negative capacitance field effect transistor is prepared by the following method:

[0091] Step S1: depositing a first electrode layer 2 on a substrate layer 1.

[0092] In an embodiment, the substrate layer 1 is (001) oriented strontium titanate (STO), the first electrode layer 2 is strontium ruthenate (SRO), and a 50-nm first electrode strontium ruthenate is prepared on a 5 mm x 5 mm strontium titanate (STO) substrate layer 1 by pulsed laser deposition (PLD), with the strontium ruthenate covering the entire surface of the substrate layer 1, forming an SRO / STO heterojunction.

[0093] Step S2: depositing a ferroelectric material layer 3 on the first electrode layer 2, with an oxygen pressure of 12-18 Pa and a deposition thickness of 140-350 nm, and cooling to room temperature after deposition, to obtain an LBFO / SRO / STO heterojunction.

[0094] Step S3: preparing an Al2O3 dielectric layer on the LBFO / SRO / STO heterojunction by atomic layer deposition, to obtain an Al2O3 / LBFO / SRO / STO heterojunction. In an embodiment, the Al2O3 dielectric layer has a thickness of 30 nm. To realize device functionalization, a channel region is defined on the surface of the Al2O3 / LBFO / SRO / STO heterojunction by ultraviolet lithography technology, and an amorphous indium gallium zinc oxide (InGaZnO, IGZO) semiconductor layer with a thickness of 40 nm is deposited by radio frequency magnetron sputtering.

[0095] Step S4: depositing a second electrode layer on the semiconductor layer on the Al2O3 / LBFO / SRO / STO heterojunction by a lift-off process. In an embodiment, the second electrode layer is a source / drain copper electrode, forming a planar device structure with a channel width W = 20 μm and a length L = 2 μm, and the device structure is further processed by an RTP rapid annealing process. The purpose of the annealing process is to improve the carrier mobility of the IGZO and avoid degradation of the LBFO layer, and finally an LBFO negative-capacitance field effect transistor is obtained.

[0096] The embodiment also provides an application of the lead-free (La,Bi)FeO3 thin film in the field of negative capacitance, such as in memory, integrated circuits, semiconductor devices, etc.

[0097] The present application is not limited to the above-described embodiments, and various modifications or changes can be made to the present application without departing from the spirit and scope of the present application, and the present application is intended to include such modifications and changes within the scope of the claims and equivalent technology.

Claims

1. A lead-free (La,Bi)FeO3 thin film, characterized in that: It includes a substrate layer and a first electrode layer, a ferroelectric material layer and a second electrode layer sequentially stacked on the substrate layer; The ferroelectric material layer includes bismuth ferrite doped with rare earth elements, and the doping content of rare earth elements in bismuth ferrite is 15%-30%.

2. The lead-free (La,Bi)FeO3 thin film according to claim 1, characterized in that: In the ferroelectric material layer, the rare earth element doped with bismuth ferrite includes at least one of La, Nd, Sm, and Eu.

3. The lead-free (La,Bi)FeO3 thin film according to claim 1, characterized in that: The thickness of the ferroelectric material layer is 140-350 nm.

4. The lead-free (La,Bi)FeO3 thin film according to claim 1, characterized in that: The substrate is strontium titanate with a (001) orientation.

5. The lead-free (La,Bi)FeO3 thin film according to claim 1, characterized in that: The rare earth-doped bismuth ferrite was prepared under oxygen pressure conditions of 12-18 Pa.

6. A method for preparing the lead-free (La,Bi)FeO3 thin film according to any one of claims 1-5, characterized in that, Includes the following steps: The first electrode layer is deposited on the substrate layer; The ferroelectric material layer is deposited on the first electrode layer at an oxygen pressure of 12-18 Pa and a deposition thickness of 140-350 nm. After deposition, the material is cooled to room temperature. A second electrode layer is deposited on the ferroelectric material layer.

7. A negative capacitance field-effect transistor, characterized in that: Includes the lead-free (La,Bi)FeO3 thin film according to any one of claims 1-5.

8. The application of the lead-free (La,Bi)FeO3 thin film according to any one of claims 1-5 in the field of negative capacitance.

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