Optical switch test assembly, system and test method

Abstract

The invention belongs to the technical field of optical switches, and particularly relates to an optical switch testing assembly, system and method, and the optical switch testing assembly comprises a bearing plate and an optical switch chip fixed on the bearing plate. The input end and the output end of the optical switch chip are respectively coupled with an input optical fiber array and an output optical fiber array; the two PCBs are respectively connected with the optical chip, and the two connecting terminals are respectively connected with the two PCBs through connecting parts; and the connecting terminal is provided with an interface I connected with the test board. According to the invention, the optical switch test assembly is provided with the connection terminal as the interface. The interface is of a standard type, so that the interface on the test board can be conveniently matched with the interface. Mechanical dimensions, pin definitions and electrical parameters of the standard connection terminals such as pin headers / slots and golden fingers and the test board interface are predefined, field welding or debugging is not needed, and compared with an existing connection mode of welding with the test board, the efficiency in batch testing is greatly improved.

Description

TECHNICAL FIELD

[0001] The application belongs to the technical field of optical switch, and particularly relates to an optical switch testing system and a testing method. BACKGROUND

[0002] An optical switch is a core device of an optical interconnection network, which controls the on-off or switching of an optical path through an electrical signal. The structure of the optical switch is relatively precise, and both the components themselves and assembly problems will affect the performance of the optical switch. Therefore, the optical switch needs to be detected before being shipped.

[0003] In the prior art, the pins on the optical switch are connected to the metal contacts on the test board in the form of a flying wire. Since there are many pins on the optical switch, manual soldering is time-consuming and laborious. Moreover, after soldering, the reusability of the test board is affected. SUMMARY

[0004] The application aims to provide an optical switch testing assembly, system and testing method, which partially solves or alleviates the above-mentioned deficiencies in the prior art, and can realize quick disassembly of the optical switch testing assembly and the test board and reliable testing.

[0005] In order to solve the above-mentioned technical problems, the application specifically adopts the following technical solutions: The first aspect of the application is to provide an optical switch testing assembly, which comprises a bearing plate. The bearing plate comprises a bottom plate, at least two mounting grooves are arranged on the bottom plate, and an optical switch chip is arranged between the at least two mounting grooves and on the first surface of the bottom plate. Two substrates are respectively connected to opposite first ports and second ports of the optical switch chip. A plurality of wires are arranged on the substrate, a first end of the wire is connected to the corresponding port, and the substrate is arranged on two sides of the bottom plate, so that a second end of the wire is arranged opposite the mounting groove. A connecting terminal is arranged on the second surface of the bottom plate and opposite the mounting groove, and the connecting terminal comprises a pin header, which is in communication with the second end of the wire through the mounting groove. An input fiber array and an output fiber array are respectively connected to opposite third ports and fourth ports of the optical switch chip. A housing is connected to the bottom plate to form a mounting cavity between the housing and the first surface of the bottom plate, the mounting cavity is used to accommodate the coupling parts of the optical switch chip, the substrate, the input fiber array and the output fiber array, and the housing is provided with an opening for the input fiber array and the output fiber array to be led outwards.

[0006] In some embodiments, the connecting terminal comprises a base and a pin array fixed on the base; the pin array penetrates through the base, one end of the pin array is connected with the wire through the mounting slot, and the other end of the pin array is used as the interface I for connecting with the test board.

[0007] In some embodiments, the bearing plate is provided with a mounting boss for mounting the optical switch chip.

[0008] In some embodiments, the substrate is a PCB; and / or, the PCB is provided with a plurality of connecting holes for the pin array to penetrate through; and the number of the wires corresponds to the number of the connecting holes, one end of the wire extends to the connecting hole to contact with the pin array, and the other end of the wire extends to the optical switch chip to connect with the optical switch chip.

[0009] In some embodiments, the bearing plate comprises a bottom plate and a pad plate arranged below the bottom plate; the shell is buckled on the platform and connected with the pad plate by means of bolts.

[0010] The application further provides an optical switch test system comprising a test board and the optical switch test assembly according to any one of claims 1-4, and the test board is provided with an interface II for cooperating with the interface I on the optical switch test assembly.

[0011] In some embodiments, the interface II is a slot fixed on the test board for cooperating with the pin array.

[0012] The application further provides an optical switch test method applied to the optical switch test system according to any one of the embodiments, comprising: S100, providing an electrical signal to the optical switch test system through the test board; S101, collecting a signal set through the output fiber array, wherein the output fiber array comprises at least one output end, and the signal set comprises a signal value of the at least one output end; S102, identifying a current abnormal category of the optical switch test system according to the signal set, wherein the abnormal category comprises at least one of the following: no signal, insertion loss abnormality, response speed abnormality, extinction ratio abnormality, and optical path selection abnormality; S103, searching for at least one matching scheme in a detection scheme library according to the abnormal category, wherein the detection scheme library comprises at least one detection scheme, the detection scheme comprises a detection procedure formed by at least one detection means along a set detection order, the detection scheme is provided with a search tag, and the search tag is provided with at least one recommended abnormal category, wherein when the current abnormal category is the same as the recommended abnormal category, the detection scheme is considered as the matching scheme.

[0013] In some embodiments, when the abnormality category is no signal, the matching solution includes: The first detection step is to detect the power supply state of the test board, the second detection step is to detect the connection state between the pin and the test board, the third detection step is to detect the connection state between the pin and the substrate, and the fourth detection step is to detect the connection state between the substrate and the optical switch chip. In some embodiments, when the abnormality category is insertion loss abnormality, response speed abnormality or extinction ratio abnormality, the matching solution includes: The first detection step is to detect the power supply state of the test board, the second detection step is to detect the connection state between the pin and the substrate, the third detection step is to detect the connection state between the substrate and the optical switch chip, and the fourth detection step is to detect the internal circuit state of the optical switch chip. In some embodiments, when the abnormality category is optical path selection abnormality, the matching solution includes: The first detection step is to detect the state of the light source, the second detection step is to detect the state of the test environment, and the third detection step is to detect the failure of the solving model of the optical switch chip.

[0014] In some embodiments, the method further includes the steps of: S104, recording the detection results of at least one detection solution, the detection results including: The version information of the optical switch chip and the detection step actually detected the failure; wherein the version information includes one or more of the following: model number, batch number, processing personnel of the optical switch chip. S105, updating the detection database according to at least one detection result.

[0015] In some embodiments, S105 includes the steps of: When one of the detection steps is used to detect the failure, the detection step is identified as an update step, and a recommendation signal is generated for the update step; According to the recommendation signal, the application frequency of the update step is calculated; When the application frequency is greater than the preset detection frequency, the detection order of the update step is updated, and a new detection solution is generated according to the updated detection order.

[0016] Beneficial technical effects: The application focuses on providing a test assembly and test system suitable for testing and application of the whole process for qualified optical switch chips after screening. First, the application sets up two groups of ports of the optical switch chip to connect with the optical fiber array and the substrate, and uses the carrier plate to integrate the chip and its core matching devices (optical fiber array and substrate) into a connected whole, and can be matched with the carrier plate through an overall shell to protect and isolate the main part of the connected whole. In other words, the application provides a test assembly or test system with protection and isolation effect.

[0017] Moreover, the mounting boss on the carrier plate is matched with the optical fiber array and the substrate (PCB) in height and port to guide the integration of the optical switch chip, the optical fiber array and the substrate in the same plane (i.e. the carrier plate), so that the optical switch chip and its core matching devices can be integrated in the limited installation space inside the shell, so as to protect the core matching devices and maintain a relatively stable state during use. Further, the optical fiber array and the substrate can be led outwards through the openings at both ends of the shell and the mounting slots on both sides of the carrier plate to realize the connection of optical signals and electrical signals.

[0018] In addition, the height difference of the mounting boss is also conducive to the good cooperation of the coupling end faces of the optical switch chip and the optical fiber array. For example, the height difference can reduce the amount of glue required during the coupling process of the optical switch chip and the optical fiber array to some extent, thereby reducing the operation difficulty. On the other hand, the height difference can also reduce the difficulty of wire bonding between the PCB and the chip to some extent (such as reducing the distance of the wire bonding position).

[0019] Further, the application provides a restrictive troubleshooting method for this test assembly or test system with protection and isolation effect (which selects the optical switch chip that has been screened), to reduce the damage to the protection and isolation effect, i.e. to reduce the adverse effects of the fault detection and troubleshooting means on the internal structure of the test assembly to some extent. In other words, the application attempts to provide a fault detection method that limits the damage or limits the impact range, so as to avoid adjusting the key connection components such as the soldering position formed in the test system to some extent, or to reduce the disassembly or reassembly of the test system to some extent.

[0020] Specifically, the application provides a method for recommending different detection procedures for the chip according to the abnormal situation category of the chip test for the test system that has completed the protection assembly, and the detection procedure is provided with specific detection steps for different abnormal situation categories, so as to control the detection impact of the executed detection steps to some extent, while ensuring that the fault position can be covered by the set detection steps to some extent. BRIEF DESCRIPTION OF DRAWINGS

[0021] In order to more clearly illustrate the technical solutions in the embodiments of the present application or the prior art, the drawings needed in the embodiments or prior art description will be briefly introduced below. In all the drawings, similar elements or parts are generally identified by similar reference signs. In the drawings, the elements or parts are not necessarily drawn according to the actual proportions. Obviously, the drawings described below are some embodiments of the present application, and for those skilled in the art, other drawings can be obtained without creative labor on the basis of these drawings.

[0022] Figure 1 Top view of the optical switch test assembly in Embodiment One of the present application; Figure 2 Top view of the optical switch test assembly in Embodiment One of the present application after removing the outer shell; Figure 3 Bottom view of the optical switch test assembly in Embodiment One of the present application; Figure 4 Exploded view of the optical switch test assembly in Embodiment One of the present application; Figure 5 Magnified view of the optical switch chip in Embodiment One of the present application; Figure 6 Magnified view of the optical switch chip in Embodiment One of the present application from another angle; Figure 7 Schematic view of the connection between the connection terminal and the PCB in Embodiment One of the present application; Figure 8 Exploded view of the connection between the connection terminal and the PCB in Embodiment One of the present application; Figure 9 Flowchart of the test method in an exemplary embodiment of the present application.

[0023] Summary of the reference signs: 1 - bearing plate, 2 - optical switch chip, 3 - PCB, 4 - connection terminal, 5 - input fiber array, 6 - output fiber array, 7 - outer shell, 11 - platform, 12 - bottom plate, 13 - mounting boss, 14 - mounting groove, 31 - connection part, 41 - base, 42 - pin array. DETAILED DESCRIPTION

[0024] In order to make the objects, technical solutions and advantages of the embodiments of the present application clearer, the technical solutions in the embodiments of the present application will be described clearly and completely below with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are some embodiments of the present application, but not all the embodiments. Based on the embodiments in the present application, all the other embodiments obtained by those skilled in the art without creative labor are within the scope of protection of the present application.

[0025] Herein, the suffix such as "module", "part", or "unit" used for representing an element is only for facilitating the description of the present application, and has no specific meaning by itself. Thus, "module", "part", or "unit" can be used mixedly.

[0026] Herein, the orientation or positional relationship indicated by the terms "upper", "lower", "inner", "outer", "front", "back", "one end", "the other end", and the like is based on the orientation or positional relationship shown in the drawings, and is only for facilitating the description of the present application and simplifying the description, and does not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and thus cannot be understood as a limitation on the present application. In addition, the terms "first", "second" are only for descriptive purposes, and cannot be understood as indicating or implying relative importance.

[0027] Herein, unless otherwise explicitly specified and limited, the terms "mount", "provided with", "connected", and the like should be understood broadly, for example, "connected" can be fixedly connected, or detachably connected, or integrally connected; can be mechanically connected, can be directly connected, or indirectly connected through an intermediate medium, can be the communication inside two elements. For those skilled in the art, the specific meaning of the above terms in the present application can be understood according to the specific circumstances.

[0028] Herein, "and / or" includes any and all combinations of one or more listed related items.

[0029] Herein, "a plurality of" means two or more, that is, it includes two, three, four, five, etc.

[0030] Embodiment one: as shown, the present application provides an optical switch test assembly. Figures 1-8 The present application provides an optical switch test assembly.

[0031] The present application provides an optical switch test assembly, which comprises a metal bottom plate bearing plate 1; The bearing plate 1 comprises a bottom plate 12, at least two mounting grooves 14 are arranged on the bottom plate 12, and an optical switch chip 2 is arranged between the at least two mounting grooves 14 and located on the first surface of the bottom plate 12; Two substrates 3 connected with the opposite first port and second port of the optical switch chip 2 respectively; A plurality of wires are arranged on the substrate 3, and the first end of the wire is connected with the corresponding port, and the substrate 3 is arranged on the two sides of the bottom plate 12 respectively, so that the second end of the wire is arranged opposite to the mounting groove 14; preferably, as shown, Figure 7 The surface of the connecting part 31 is provided with a plurality of metal wires, which are used for electrical connection with the optical switch chip 2. a connection terminal 4 disposed on the second surface of the bottom plate 12 and opposite the mounting slot 14, and the connection terminal 4 includes a pin array 42 that is in communication with the second ends of the conductive wires through the mounting slot 14; an input fiber array and an output fiber array respectively connected to opposite third and fourth ports of the optical switch chip 2; a housing 7 connected to the bottom plate 12 to form a mounting cavity between the housing and the first surface of the bottom plate, the mounting cavity being used to accommodate the optical switch chip 2, the substrate 3, and the coupling portions of the input fiber array and the output fiber array, and the housing being provided with an opening for the input fiber array and the output fiber array to be led outwards.

[0032] and the optical switch chip is fixed on the metal bottom plate; the input end and the output end of the optical switch chip are respectively coupled with the input fiber array and the output fiber array; the application further comprises two PCBs respectively connected with the optical chip and two connection terminals respectively connected with the two PCBs through connection portions; the connection terminal has an interface I connected with a test board.

[0033] As shown in Figure 2 the embodiment, the optical switch test assembly comprises a bearing plate 1 (which is preferably a metal bottom plate) and an optical switch chip 2 fixed on the bearing plate 1; the input end and the output end (i.e. the third port and the fourth port) of the optical switch chip 2 are respectively coupled with an input fiber array 5 and an output fiber array 6; the application further comprises two PCBs 3 respectively connected with the optical chip and two connection terminals 4 respectively connected with the two PCBs 3 through conductive wires (i.e. metal wires); the connection terminal 4 has an interface I connected with a test board. The two ports of the chip connected with the PCB are the first port and the second port.

[0034] In the application, the connection terminal 4 is provided as an interface in the optical switch test assembly to realize quick disassembly and assembly with the test board. The interface is preferably of a standard type, so as to facilitate the adaptation of the interface on the test board. The standard connection terminal 4 such as a pin array / slot, a gold finger, etc. has a pre-defined mechanical size, pin definition and electrical parameters with the interface of the test board, and does not need to be welded or debugged on site, so that the efficiency is greatly improved in batch testing compared with the existing connection mode of welding with the test board.

[0035] Specifically, the connection terminal 4 in the embodiment comprises a base 41 and a pin array 42 fixed on the base 41; the pin array 42 penetrates through the base 41, one end of the pin array 42 is connected with the conductive wire, and the other end of the pin array 42 is used as the interface I to be connected with the test board.

[0036] The base 41 is a carrier of the pin 42, usually made of engineering plastics such as nylon PA66, PBT, injection molded, providing sufficient mechanical strength to support the pin 42, avoiding bending or breaking of the pin 42 when plugging. Its shape is long strip, facilitating the arrangement of the pin 42. In addition, the material of the base 41 needs to have high insulation performance to prevent short circuit between the pins 42.

[0037] The pin 42 is made of phosphor bronze or beryllium copper material, which can be surface plated with gold to reduce contact resistance and resist oxidation, ensuring the electrical conductivity reliability in long-term use. The diameter is usually 0.6-0.8mm, and the length is adjusted according to the thickness of the base 41, for example, when the base 41 is 5mm thick, the pin 42 is 3mm long at both ends, facilitating connection with wires and test boards. The spacing of the pin 42 can adopt the standard spacing of 2.54mm (0.1 inch), compatible with mainstream Dupont wire and test board, supporting fast procurement and replacement.

[0038] It can be understood that in actual application, the connection terminal 4, the base 41 and the pin 42 are usually an integral piece, and the whole formed can also be directly referred to as a pin.

[0039] In order to facilitate the connection between the connection terminal 4 and the carrier plate 1, mounting grooves 14 are opened on both sides of the optical switch chip 2 on the carrier plate 1, and the base 41 of the connection terminal 4 is embedded in the mounting groove 14. The size of the mounting groove 14 is strictly matched with the base 41 of the connection terminal 4, ensuring that after the base 41 is embedded, the pin 42 is three-dimensionally aligned with the PCB 3 connection hole and the optical switch chip 2 pad, avoiding wire welding failure or pin 42 bending due to positional deviation.

[0040] The mounting groove 14 and the base 41 can be fixed by interference fit or adhesion, ensuring that they will not fall off during plugging.

[0041] The PCB 3 is provided with a plurality of connection holes for the pin 42 to pass through; the number of wires corresponds to the number of connection holes, one end of the wire extends to the connection hole and contacts with the pin 42, and the other end extends to the optical switch chip 2 and connects with the optical switch chip 2.

[0042] After the pin 42 passes through the connection hole, it can contact with the pre-set wire on the PCB 3 to realize electrical connection. The wire is made of metal such as copper, which has certain strength and is convenient for arrangement. In order to further reinforce, the contact surface between the wire and the pin 42 can be increased by spot welding to avoid poor contact. The other end of the wire is connected with the pad on the optical switch chip 2 through gold wire, which is used to eliminate tolerance and avoid connection difficulty caused by size problem.

[0043] In some embodiments, as shown in Figure 4 The PCB is in T-shaped structure.

[0044] In some embodiments, soldering is needed between the pin and the PCB to fix the position. In this way, the wire is not under stress, and the whole is supported by the T-shaped PCB.

[0045] The mounting boss 13 is arranged on the bearing plate 1 for mounting the optical switch chip. The mounting boss 13 lifts the optical switch chip 2 above the bearing plate 1, so that the input / output end surface of the chip forms a vertical distance with the surface of the bearing plate 1, avoiding physical interference with the bottom plate 12 when the fiber array is coupled from the side. For chips that need to be tilted and coupled, such as a slanted end face waveguide, the height of the boss can match the angle bracket of the fiber array, so that the angle between the fiber end face and the normal of the chip end face is accurately matched, reducing the reflection loss.

[0046] In addition, the bearing plate 1 includes a platform 11 and a base plate arranged below the platform 11; the optical switch test assembly further includes a shell 7, which is buckled on the platform 11 and connected with the base plate by bolts. The core elements such as the optical switch chip 2, the PCB 3 and the connecting terminal 4 are directly fixed on the platform 11, and the coplanarity of each component is ensured by high-precision processing to avoid fiber coupling deviation caused by deformation. The core elements are shielded by the shell 7 to avoid damage and external foreign matter intrusion during testing and use.

[0047] Preferably, the length of the mounting boss is less than the length of the optical switch chip (in this embodiment, the length direction is represented by the direction of the optical input end and the output end of the optical switch chip, or the axis direction of the input fiber array and the output fiber array is represented as the length direction), so that the optical switch chip is protrudingly arranged with the mounting boss, so that the optical coupling surface (i.e. the third port and the fourth port) of the optical switch chip is protrudingly arranged, so as to facilitate better coupling and docking with the fiber array.

[0048] For example, in some embodiments, the bottom plate 1 and the platform 11, the bottom plate 12 and the mounting boss 13 are an integral piece, which can be obtained by integral molding. For example, the shell 7 is buckled on the bottom plate 1 (such as the area outside the platform 11). The periphery of the shell 7 can be fixed on the four holes on the bottom plate 1 by screws.

[0049] The beneficial technical effects of the embodiment are as follows: The present application provides a connecting terminal as an interface in the optical switch test assembly. The interface is of a standard type, so as to facilitate the adaptation of the interface on the test board. The standard connecting terminal such as the pin / insert, the gold finger and the like has pre-defined mechanical size, pin definition and electrical parameters with the interface of the test board, without the need for on-site soldering or debugging, and the efficiency is greatly improved in batch testing compared with the existing connection mode of soldering with the test board.

[0050] The interface adopts the standardized design of the row pin-slot, supports plug and play, has short single-component replacement time, and greatly improves the efficiency compared with the traditional welding mode. The foolproof design of the interface completely avoids the power short circuit or chip burning caused by misplug, and ensures the test safety.

[0051] The mounting boss of the bearing plate lifts the optical switch chip, provides independent coupling space for the fiber array, cooperates with the mechanical positioning groove and the step curing process, controls the alignment accuracy of the fiber and the chip waveguide within an acceptable range, and solves the core loss problem of optical signal transmission.

[0052] The rigid wire ensures low impedance conduction, cooperates with the flexible connection of the gold wire bonding, and solves the contradiction between mechanical precision and assembly tolerance.

[0053] Embodiment two: The application also provides an optical switch test system, which comprises a test board and the optical switch test assembly in embodiment one, and the test board is provided with an interface II for cooperating with the interface I on the optical switch test assembly.

[0054] The test board provides the interface II and the interface I of the assembly to be connected, realizes the electrical signal communication between the external power supply, the control signal source, the data acquisition device and the optical switch test assembly.

[0055] The interface II is a slot fixed on the test board and used for cooperating with the row pin 42. The pin hole spacing of the slot is strictly matched with the row pin 42, for example, the standard spacing of 2.54 mm, so as to ensure the X / Y axis alignment accuracy when the row pin 42 is inserted, and avoid poor contact caused by deviation. The slot shell 7 can be provided with a trapezoidal guide port, which cooperates with the chamfer design of the base 41 of the row pin 42, to realize smooth plugging and unplugging experience.

[0056] The row pin 42 of the optical switch test assembly can only be inserted into the slot of the test board in a unique correct direction, and the slot has a foolproof design to avoid serious consequences such as power short circuit and chip burning caused by incorrect direction.

[0057] Specifically, the foolproof design sets an asymmetric key groove such as a trapezoidal, semicircular or special-shaped protrusion on the edge of the slot, and a matching key block is designed on the base 41 of the row pin 42. For example, a triangular key groove is formed on the left side of the slot, and a triangular protrusion is arranged on the left side of the base 41 of the row pin 42. Only when the component is inserted in the correct direction, the key block and the key groove are completely embedded, otherwise it cannot be inserted.

[0058] In some embodiments, the test board can be an upper computer. Alternatively, in some embodiments, the test board can be a control chip connected with the upper computer, to provide or call different signals for the test process.

[0059] It should be noted that the optical switch test assembly or test system in the embodiment can not only achieve the test requirement, but also directly perform the later application, and therefore the optical switch test assembly or test system can also be referred to as an optical switch application assembly or application system.

[0060] Embodiment three: The above embodiment also provides a pre-packaged test system, and for the pre-packaged test system, the application provides a test method with relatively small destructiveness or influence on the pre-packaged structure.

[0061] It should be understood that for the test idea provided by the application, the performance of the optical switch chip needs to be tested before the actual application of the optical switch chip, so as to ensure that the optical switch chip and the entire packaging structure meet the application standard.

[0062] For the optical switch application system provided by the application, the test process can include at least two stages: 1) Test stage of the optical switch chip: For example, before the application test of the optical switch chip, the performance of the internal circuit and other structures of the single optical switch chip can be tested, which can also be referred to as wafer-level test or on-chip test. For example, the stage mainly performs electrical test on the circuit structure inside the optical switch chip. For example, the electrical test can detect whether all input or output pads on the optical switch chip are correctly connected with the core circuit, or whether part of the circuit (such as some key nodes selected by the test engineer) in the optical switch chip can normally communicate or can withstand normal working voltage without failure.

[0063] 2) Test stage of the optical switch test system: For example, after the wafer-level test or on-chip test of the optical switch chip is qualified, the optical switch chip will be further tested, that is, the running state of the optical switch chip in the actual application process can be relatively completely simulated to determine whether the optical switch chip and the overall working system (that is, the optical chip test system) can normally run. That is, the optical switch chip is packaged into an optical switch test system to perform optical signal output test.

[0064] It should be noted that in the actual application process, the test often needs to be performed in batches, and therefore the test workload is very large. Especially when the optical switch chip is packaged into an optical switch test system (or an optical switch application system), there are many possible causes of failure (such as power connection failure, PCB welding failure, pin welding failure, optical fiber welding or setting failure, etc.), and therefore the test engineer will face a large workload in the process of detecting and troubleshooting the failure.

[0065] Especially, since the packaging of the optical switch application system involves multi-step assembly and welding procedures, once a fault occurs in an intermediate procedure, it is difficult to troubleshoot in actual application. For example, if there is a problem between the PCB wire and the optical chip, the shell may need to be removed for state detection.

[0066] In addition, for the precise miniature device of the optical switch chip, improper operation during troubleshooting may also cause new problems, which puts high requirements on the work experience of test engineers.

[0067] Therefore, in view of the fault detection and troubleshooting pressure of the optical switch application system during batch detection, the present application provides a detection method with relatively small influence range for this specific stage. The detection method can provide recommended detection steps for different abnormal categories to guide the test engineer to efficiently troubleshoot the fault in a small influence range to a certain extent, that is, to reduce the pressure of troubleshooting work to a certain extent.

[0068] In other words, from another perspective, the present application can actually recommend a restrictive troubleshooting scheme to the user, which gradually troubleshoots from the outside to the inside and from the easy (such as simple mechanical failure, such as connection failure) to the difficult (such as algorithm failure built-in the chip), thereby improving the troubleshooting efficiency on the basis of relatively comprehensive troubleshooting of the fault.

[0069] Referring to Figure 9 The embodiment provides an optical switch test method, applied to the optical switch test system as described in any embodiment, comprising: S100, providing an electrical signal to the optical switch test system through a test board; For example, the test board is provided with or connected to a power supply module, which can be used to supply power to the optical switch chip through structures such as pin headers.

[0070] S101, collecting a signal set through an output fiber array, wherein the output fiber array comprises at least one output end, and the signal set comprises a signal value of at least one output end; For example, in some embodiments, the signal value can be the optical power size output by the output end.

[0071] For the optical switch, it can include multiple output ends, and different output ends can be called to output optical signals based on the solving algorithm inside the optical switch (which can be preset according to different application scenarios of the optical switch).

[0072] S102, identifying the current abnormal category of the optical switch test system according to the signal set, the abnormal category comprising at least one of the following: No signal, abnormal insertion loss, abnormal response speed, abnormal extinction ratio, abnormal optical path selection; S103, searching for at least one matched scheme in a detection scheme library according to the abnormal category, wherein the detection scheme library comprises at least one detection scheme, the detection scheme comprises a detection procedure formed by at least one detection means along a set detection order, the detection scheme is provided with a search tag, and the search tag is provided with at least one recommended abnormal category, and when the current abnormal category is the same as the recommended abnormal category, the detection scheme is considered as a matched scheme.

[0073] For example, in some embodiments, when the output value of all output ends is less than a set value, the abnormal category of the optical switch test system is considered as no signal, that is, when the optical signal measured by each output end is very weak or even none, the abnormal category is considered as no signal.

[0074] In some embodiments, when the output value of at least one output end is greater than a set value (or the output value of the output end that is started / turned on is greater than a set value), the optical switch is considered to be in a signal state, and whether the following abnormal situations occur can be further analyzed according to the signal size: For example, the insertion loss value of the multiple output ends can be calculated according to the output values of the multiple output ends. The insertion loss of the optical switch refers to the power attenuation caused by the device itself after the optical signal passes through the optical switch, and when the insertion loss is greater than a set insertion loss value, it is considered that the insertion loss abnormality may exist.

[0075] For example, when the working time of the output end of the optical switch that is designated / turned on from being turned on to outputting the output value is greater than a preset response time, it is considered that the response speed abnormality may exist.

[0076] For another example, the extinction ratio is an index for measuring the ratio of the output optical power in the on and off states of the optical switch (that is, the ratio of the output value of the output end that is turned on to the output value of the output end that is not turned on), which directly reflects the switching capability of the optical switch for the optical signal and the reliability of the signal transmission. Correspondingly, when the extinction ratio is less than a set extinction ratio threshold, it is considered that the extinction ratio abnormality may exist.

[0077] For example, in some embodiments, the optical path selection abnormality refers to the failure to designate the output end to output the optical signal. In the optical switch, different output ends (which can also be referred to as optical paths) can not be designated to be turned on or turned off, and the output end that is designated to be turned on can output the optical signal. In this regard, when there is a large fault, such as a chip fault, a power supply fault or an algorithm fault, etc., the optical path selection abnormality may occur.

[0078] In some embodiments, when the abnormality category is no signal, then matching scheme 1 includes: The first detection step is to detect the power supply state of the test board, the second detection step is to detect the connection state between the pin and the test board, the third detection step is to detect the connection state between the pin and the substrate, and the fourth detection step is to detect the connection state between the substrate and the optical switch chip. In some embodiments, when the abnormality category is insertion loss abnormality, response speed abnormality or extinction ratio abnormality, then matching scheme 2 includes: The first detection step is to detect the power supply state of the test board, the second detection step is to detect the connection state between the pin and the substrate, the third detection step is to detect the connection state between the substrate and the optical switch chip, and the fourth detection step is to detect the internal circuit state of the optical switch chip. In some embodiments, when the abnormality category is optical path selection abnormality, then matching scheme 3 includes: The first detection step is to detect the state of the light source, the second detection step is to detect the state of the test environment, and the third detection step is to detect the failure of the solving model of the optical switch chip.

[0079] In some embodiments, the method further includes the step of: S104, recording the detection results of at least one detection scheme, the detection results including: The version information of the optical switch chip, and the detection step actually detected the failure; wherein the version information includes one or more of the following: the model number, batch number, and processing personnel of the optical switch chip. The model number can be used to represent the specifications or product categories of the optical switch chip, etc., the batch number is used to represent the production batch of the optical switch chip, and the processing personnel represents the personnel involved in at least one packaging step (such as welding) of the optical switch chip test system.

[0080] S105, updating the detection database according to at least one detection result.

[0081] In some embodiments, S105 includes the step of: When one of the detection steps detects a failure, the detection step is updated, and a recommendation signal is generated for the detection step (updated step); According to the recommendation signal, the application frequency of the detection step is calculated; When the application frequency is greater than the preset detection frequency, the detection order of the detection step is updated, and a new detection scheme is generated according to the updated detection order.

[0082] The application frequency can refer to the number or proportion of times that the detection step detects a failure during the execution of the same matching scheme.

[0083] For example, in some embodiments, taking matching scheme 1 as an example, when no fault is found in its first and second detection steps, and a fault is found in the fourth detection step (such as the welding between the substrate and the optical switch chip is not in place, resulting in unreliable signal communication), a recommendation signal can be generated for this fourth detection step; the recommendation signal can be used to record matching scheme information (such as matching scheme 1), optical switch information, the fourth detection step, and the number of occurrences thereof. For example, for the same type of optical chip (such as the same model or the same batch), the same matching scheme 1 is usually recommended at the beginning, when matching scheme 1 is executed n times, and the number of times that the fourth detection step detects a fault is m times, the application frequency = m / n. At this time, when the application frequency is greater than the set detection frequency, the detection order of the fourth detection step is updated (specifically, the detection step is set earlier), such as being updated to the second detection order, corresponding to forming matching scheme 1', which includes: The first detection step is to detect the power state of the test board, the second detection step is to detect the connection state between the substrate and the optical switch chip; the third detection step is to detect the connection state between the pin and the test board, and the fourth detection step is to detect the connection state between the pin and the substrate.

[0084] It can be understood that the span of the detection order (or detection step) update (such as the adjustment span between steps) can be set by the user, or can be selected according to the application frequency, the greater the application frequency, the greater the corresponding update span (such as the detection step can be adjusted to a more earlier step).

[0085] Correspondingly, for different matching schemes, such as the original matching scheme 1, the newly added matching scheme 1' sets a recommendation priority. The recommendation priority can refer to the recommendation priority of the matching scheme compared to the same type of optical switch chip.

[0086] Among them, the recommendation priority of the matching scheme can be generated according to the actual detection step amount of the matching scheme, such as the smaller the actual detection step amount, the higher the recommendation priority. For example, when a fault is detected in the first or second detection step, one or more subsequent steps can be omitted, that is, the actual detection step amount is relatively small.

[0087] For example, in some embodiments, when the version information includes the processing personnel, the corresponding process involved by each processing personnel can also be recorded, such as recording that personnel A participates in the PCB and optical chip welding process, and personnel B participates in the pin and PCB welding process.

[0088] Correspondingly, the method can further include the steps of: Obtaining the processing personnel of the procedure corresponding to the updating step (for example, when the updating step is detecting the welding state of the PCB board and the optical chip, the corresponding procedure is the welding procedure of the PCB and the optical chip, and the processing personnel is personnel A); Obtaining the error frequency of the processing personnel under the procedure (for example, the processing personnel participates in the welding of 200 optical switch chips and PCB boards, and 15 chips and PCB boards are found to have defects in the welding, so the error frequency is considered to be 7.5%); When the error frequency is greater than the preset error frequency, the processing personnel is marked as an object of attention, for example, the attention degree of the processing personnel (or the object of attention) can be updated according to the error frequency, for example, the greater the error frequency, the greater the attention degree, that is, the procedure or product handled by the processing personnel needs to be checked in detail; And updating the retrieval label according to the object of attention.

[0089] For example, in some embodiments, the retrieval label can also record the object of attention, for example, when there are multiple matching schemes matching the current abnormal category, the matching scheme with the same actual processing personnel as the object of attention is preferably adopted.

[0090] For example, in some embodiments, the chip type is preferentially matched, and then the personnel is matched.

[0091] Alternatively, in some embodiments, when the amount of data in the detection database is relatively small, matching can also be performed according to only one piece of information.

[0092] For example, in some embodiments, in a batch of optical switch chips, due to objective environmental reasons such as construction equipment (such as welding equipment) in the factory building and construction environment (such as temperature and humidity), problems may occur in a certain specific procedure, and due to the individual differences in the experience level of the processing personnel, the error frequency of different processing personnel in the same procedure may differ greatly (for example, experienced engineers can reduce the interference of the environment or equipment). In this embodiment, the retrieval method is updated according to the experience level (such as the error frequency) of the processing personnel, which can further improve the comprehensiveness of the detection (such as avoiding the omission of the detection step), while limiting the workload of the detection step to a certain extent.

[0093] In summary, the present application can set different recommended priorities for the matching scheme according to the actual feedback (i.e., the detection result) of the specific detection sequence in the detection process, so as to guide the user to detect along a specific detection step for different abnormal situation types, and to reduce invalid detection steps in the specific detection step, that is, to reduce the actual detection step amount.

[0094] From another perspective, for the batch test scene of the optical switch chip test system, the application provides a method for recommending output according to the degree of abnormal situation and the matching scheme of the optical chip category. Specifically, the matching scheme provided by the application focuses on guiding the user to gradually change the step with relatively small impact on the pre-packaging structure to the step with relatively large impact on the pre-packaging structure, so as to limit the damage of the detection step to the pre-packaging scheme to a certain extent. On the other hand, according to the abnormal situation category, the chip category, and the processing personnel category, the matching scheme can be comprehensively screened, so that the initial detection step can be reasonably selected to a certain extent, and excessive detection workload can be avoided due to step-by-step detection.

[0095] It should be noted that since the application provides a pre-packaged test system, the shell and the carrier plate can provide a protection space for the optical switch chip and its core matching device. In this process, when the user (such as a test engineer) tests this pre-packaged test system, it may be damaged to a certain extent due to improper operation, thereby affecting the effective service life of the test system in the later period; in addition, for internal faults (such as connection faults between PCB and chip, or chip internal circuit or algorithm faults), the pre-packaged test system usually needs to be disassembled for troubleshooting, thereby not only involving a large amount of troubleshooting work, but also repeated packaging which may affect the stability of the test system to a certain extent.

[0096] That is, the optical switch chip to which the test method is preferably directed is an optical switch chip that has passed wafer-level testing or on-chip testing.

[0097] Among them, the wafer-level test method or the on-chip test method can select the standard test method recommended by the chip industry according to the type of the optical switch chip. This standard test method can also be called screening.

[0098] For example, usually the chip will be screened before sample making, that is, to ensure that all chips used for sample making belong to normal performance chips, at this time if the screening is normal, but the sample is made and the chip is found to be abnormal (excessive current or no current), it may be that the external power supply is abnormal, causing the chip to be damaged, at this time the code can be matched to troubleshoot the external power supply, and there is a large probability that the program setting output value does not match the actual output value (usually the output is too large), causing the chip to be damaged, at this time the code and the power supply need to be checked separately to confirm whether it is a problem of information transmission between the upper computer and the power supply or a problem of the power supply.

[0099] Therefore, for the test system formed by packaging the optical switch chip selected based on the pre-screening, the scheme of specifically combining and sequencing the detection step category and the detection step order based on the exception category can reduce the destructive or adverse effects on the pre-packaged test system.

[0100] Next, in order to more clearly introduce the detection method provided by the present application, some exemplary detection methods in actual application processes are described as follows: Fault category 1, no current after power-on (which can be manifested as no current in the optical switch chip or no signal at the output end of the optical switch chip): In the case of no current after power-on, it is first recommended to check whether the external power supply is abnormal. If it is confirmed that the external power supply is not problematic, the problem is still not solved, and the following steps can be sequentially checked. First, check whether the connection between the pin and the power supply is tight, and check whether there is a problem of loose connection (i.e., no connection). Second, check whether the soldering between the pin and the PCB (3) is loose. The check here can use the buzzer of the multimeter. Connect two probes to the pads of the pin and the PCB respectively. If no buzzing sound is emitted, it means that the soldering is loose. If the soldering is loose, clean the solder and re-solder. Third, check whether the wire bonding between the PCB and the chip is loose or fallen off. The check here is the same as the second step. Connect two probes to the pads of the chip and the PCB respectively. If no buzzing sound is emitted, it means that the wire bonding is fallen off. After the external structure is confirmed to be normal, if the product still has no current, it is considered that the chip has a broken circuit. Use the diode position of the multimeter. Connect two probes to two pads on the chip. If OL is displayed, and the probes are reversed, OL is still displayed, it is considered that the chip is damaged and needs to be replaced.

[0101] Fault category 2, excessive current after power-on (which can be manifested as abnormal output value): Similarly, first exclude the problem of the external power supply. Confirm that the power supply is not problematic, but the exception still exists, and the following parts can be sequentially checked. First, check whether the soldering between the pin and the PCB is connected, which can cause a short circuit. Use the buzzer of the multimeter to connect two different pins. If a buzzing sound is emitted, it means that the soldering may be short-circuited. Second, check whether the wire bonding can be short-circuited. The buzzer of the multimeter can also be used. If a buzzing sound is emitted from two adjacent pads on the chip (or two adjacent wire bonding pads on the PCB), it is suspected that the wire bonding is short-circuited. After the external system is excluded, the problem still exists, and the chip problem is checked. Use the diode position of the multimeter. If the reading is too large after reversing, it is suspected that the chip is damaged and needs to be replaced.

[0102] Fault category 3: unable to select the optical path: for example, each sample chip corresponds to a different solution in the algorithm (or a different solving model can be set in each chip, which is used to solve the output value of each output channel), so there may be a case where the solution is not correct, at this time, if the optical path selection is incorrect or the required channel cannot be locked. At this time, after excluding the problem of external power light, it is highly probable that the solution obtained during training is incorrect (such as incorrect training of the solving model), or the use environment changes (such as changes in temperature and humidity affecting the performance of the chip), resulting in differences between the required solution and the solution obtained during training. At this time, the use environment is restored to the environment during training (such as room temperature and low humidity environment), and if the normal selection of the optical path cannot be achieved, retraining is considered to obtain the correct solution.

[0103] It should be noted that in this document, the terms "comprise", "comprising", or any other variant thereof are intended to cover non-exclusive inclusions, so that a process, method, article, or device that includes a series of elements not only includes those elements, but also includes other elements not explicitly listed, or further includes elements inherent to such a process, method, article, or device. Without more limitations, the element defined by the statement "comprises a" does not exclude the presence of another identical element in the process, method, article, or device that includes the element.

[0104] From the above description of the embodiments, those skilled in the art can clearly understand that the above-mentioned embodiment methods can be realized by means of software and a general hardware platform, of course, they can also be realized by hardware, but in many cases the former is a better embodiment. Based on such understanding, the technical solutions of the present application can be embodied in the form of a software product, which is stored in a storage medium (such as ROM / RAM, magnetic disk, optical disk), and includes a plurality of instructions for causing a computer terminal (which can be a mobile phone, computer, server, or network device, etc.) to execute the methods described in the various embodiments of the present application.

[0105] The embodiments of the present application are described above in conjunction with the accompanying drawings, but the present application is not limited to the above specific embodiments, the above specific embodiments are only illustrative, not limiting, and those skilled in the art can make many forms under the inspiration of the present application without departing from the purpose of the present application and the scope protected by the claims. These are all within the protection of the present application.

Claims

1. A light switch testing component, characterized in that: Including the support plate (1); The carrier plate (1) includes: a base plate (12), on which at least two mounting slots (14) are provided, and between the at least two mounting slots (14) and on the first surface of the base plate (12) is a light switch chip (2). Two substrates (3) are respectively connected to the first and second ports opposite to the optical switch chip (2); The substrate (3) is provided with a plurality of wires, and the first end of the wires is connected to the corresponding port. The substrate (3) is respectively provided on both sides of the base plate (12) so that the second end of the wires is provided relative to the mounting groove (14). A connection terminal (4) is disposed on the second surface of the base plate (12) and opposite to the mounting groove (14), and the connection terminal (4) includes a pin header (42), which is connected to the second end of the wire through the mounting groove (14); An input fiber array and an output fiber array are respectively connected to the third and fourth ports opposite to the optical switch chip (2); The housing (7) is connected to the base plate (12) to form a mounting cavity between the first surfaces of the housing and the base plate. The mounting cavity is used to accommodate the coupling parts of the optical switch chip (2), the substrate (3), the input fiber array and the output fiber array, and the housing is provided with an opening for the input fiber array and the output fiber array to be led outward.

2. The optical switch testing component according to claim 1, characterized in that: The connection terminal includes a base and pins fixed on the base; the pins pass through the base, one end of which passes through the mounting groove and is connected to the wire, and the other end serves as interface I for connection to the test board. And / or, the carrier plate (1) is provided with mounting bosses for mounting optical switch chips.

3. The optical switch testing component according to claim 2, characterized in that: The substrate (3) is a PCB; and / or, the PCB has a plurality of connection holes for pin headers to pass through; and the number of wires corresponds to the number of connection holes, one end of the wire extends to the connection hole and contacts the pin header, and the other end extends to the optical switch chip and connects to the optical switch chip.

4. The optical switch testing assembly according to claim 1, characterized in that: The bearing plate (1) includes a base plate and a pad plate disposed below the base plate. The outer shell is fastened to the platform and connected to the pad plate by bolts.

5. A light switch testing system, characterized in that: The test board includes a test board and the optical switch test assembly as described in any one of claims 1 to 4, wherein the test board is provided with an interface II for connecting and cooperating with interface I on the optical switch test assembly.

6. The optical switch testing system according to claim 5, characterized in that: Interface II is a slot fixed on the test board for connection with the header pins.

7. A method for testing an optical switch, wherein the method is applied to the optical switch testing system of claim 5 or 6, characterized in that... include: S100 provides electrical signals to the optical switch testing system through the test board; S101, a signal set is acquired through an output fiber optic array, wherein the output fiber optic array includes at least one output end, and the signal set includes the signal value of at least one output end; S102, Identify the current anomaly category of the optical switch test system based on the signal set, wherein the anomaly category includes at least one of the following: No signal, abnormal insertion loss, abnormal response speed, abnormal extinction ratio, abnormal optical path selection; S103, search for at least one matching scheme in the detection scheme library according to the anomaly category, wherein the detection scheme library includes at least one detection scheme, and the detection scheme includes a detection procedure formed by at least one detection method in a set detection order, the detection scheme is set with a search tag, and the search tag is set with at least one recommended anomaly category, wherein when the current anomaly category is the same as the recommended anomaly category, the detection scheme is considered to be a matching scheme.

8. The optical switch testing method according to claim 7, characterized in that, When the anomaly category is no signal, the matching scheme includes: The first detection step is to detect the power status of the test board; the second detection step is to detect the connection status between the pin header and the test board; the third detection step is to detect the connection status between the pin header and the substrate; and the fourth detection step is to detect the connection status between the substrate and the optical switch chip. And / or, when the anomaly category is insertion loss anomaly, response speed anomaly, or extinction ratio anomaly, the matching scheme includes: The first detection step is to detect the power status of the test board; the second detection step is to detect the connection status between the pin header and the substrate; the third detection step is to detect the connection status between the substrate and the optical switch chip; and the fourth detection step is to detect the internal circuit status of the optical switch chip. And / or, when the anomaly category is optical path selection anomaly, the matching scheme includes: The first detection step is to detect the state of the light source, the second detection step is to detect the state of the test environment, and the third detection step is to detect the faults in the solution model of the optical switch chip.

9. The optical switch testing method according to claim 7, characterized in that, It also includes the following steps: S104, Record the detection results of at least one detection scheme, the detection results including: The version information of the optical switch chip, and the actual detection steps for the detected fault; wherein, the version information includes one or more of the following: the model, batch number, and processing personnel of the optical switch chip; S105, Update the detection database based on at least one detection result.

10. The optical switch testing method according to claim 9, characterized in that, S105 includes the following steps: When a fault is detected using one of the detection steps, the detection step is identified as an update step, and a recommendation signal is generated for the update step. The application frequency of the update step is calculated based on the recommendation signal; When the application frequency is greater than the preset detection frequency, the detection order of the update step will be updated, and a new detection scheme will be generated based on the updated detection order.

Images