Radar sidelobe interference GPGPU acceleration cancellation method based on auxiliary channel

Abstract

The invention belongs to the technical field of radar digital signal processing, and particularly relates to a GPGPU accelerated cancellation method for radar sidelobe interference based on an auxiliary channel. Aiming at the problem that an active array radar is easily influenced by sidelobe interference in a complex electromagnetic environment, the invention provides a sidelobe interference cancellation method based on an auxiliary channel structure, and efficient parallel acceleration is realized in combination with a GPGPU (General Purpose Graphics Processing Unit) so as to support real-time adaptive interference suppression of radar echo signals under multi-channel configuration. According to the method, the data dependency relationship of the multi-channel interference cancellation algorithm is deeply analyzed, the key calculation links are subjected to fine-grained parallel reconstruction, the large-scale parallel calculation potential of the GPGPU is fully excavated, and the processing throughput capacity is remarkably improved. Under the condition that GPGPU video memory resources are allowed, the method can be expanded to continuous interference suppression processing in a multi-pulse accumulation scene, and the real-time requirement of a modern radar system for continuous, stable and high-speed signal processing in a high-intensity interference environment is met.

Description

TECHNICAL FIELD

[0001] The application belongs to the technical field of radar digital signal processing, and particularly relates to a radar sidelobe interference GPGPU accelerated cancellation method based on an auxiliary channel. BACKGROUND

[0002] With the increasingly complex modern electronic warfare environment, radar systems are facing severe active jamming threats. Active array radars have been widely used in early warning detection, airborne fire control and other key platforms due to their high transmission efficiency, multi-task capability, flexible beam control and high reliability. However, although modern antenna design has suppressed the sidelobe level to a low level, a strong power interference source can still enter the receiving channel through the antenna sidelobe. Especially when the intensity of the interference signal is much higher than the target echo, even if the interference comes from a non-mainlobe direction, it can still drown out the useful signal, seriously degrading the radar detection and tracking performance.

[0003] To cope with the strong interference from the sidelobe intrusion, the spatial domain adaptive interference suppression technology has become one of the key means. Among them, the interference cancellation method based on the auxiliary channel structure introduces one or more low-gain auxiliary receiving channels, estimates the interference components entering from the sidelobe in real time, and generates optimal weighting coefficients using adaptive signal processing algorithms. After the auxiliary channel signals are weighted and synthesized, they are subtracted from the main channel signals, thereby forming a deep null in the interference direction and achieving effective suppression of the suppressive jamming. This process can dynamically track the changes in the direction of the interference source and has good robustness and real-time adaptability, and is widely used in advanced radar systems with multi-channel receiving capability.

[0004] However, such methods involve a large number of complex operations, matrix inversion or iterative calculations, have large data throughput and sensitive processing delay, and place high requirements on system real-time performance. The traditional implementation based on general-purpose processors or DSPs cannot meet the computational requirements of high-dimensional adaptive algorithms. Therefore, it is necessary to introduce high-performance parallel computing architectures to improve processing efficiency. The general-purpose graphics processor (GPGPU) has become an important technical path for accelerating the execution of complex algorithms in radar signal processing due to its large-scale parallel processing capability, high memory bandwidth and programmability. By mapping the multi-channel adaptive interference suppression algorithm to the GPGPU platform, the computational throughput can be significantly improved to meet the real-time suppression requirements of modern radars in complex electromagnetic environments. SUMMARY

[0005] The present application proposes a sidelobe interference cancellation method based on an auxiliary channel structure to address the problem that active array radars are easily affected by sidelobe interference in complex electromagnetic environments, and combines a general-purpose graphics processor (GPGPU) to achieve efficient parallel acceleration and support real-time adaptive interference suppression of radar echo signals under multi-channel configuration.

[0006] The technical solution of the present application is:

[0007] A radar sidelobe interference GPGPU acceleration cancellation method based on auxiliary channels, based on the parallel processing capability of GPGPU, interference suppression is carried out on the radar echo signal under the configuration of multiple channels, and the method comprises the following steps:

[0008] S1, a multi-channel radar signal receiving system composed of a main receiving channel and a plurality of low-gain auxiliary channels is constructed, and complex sampling data of each channel is collected, and the sampling data is stored in the GPGPU memory according to the time pulse dimension;

[0009] S2, the data of the auxiliary channel is processed in parallel based on the multi-thread structure of GPGPU, specifically:

[0010] The auxiliary channel receiving signal is defined as The cross-correlation values between the signals of each auxiliary channel are calculated, thereby constructing an MxM-dimensional cross-correlation matrix , wherein M is the number of auxiliary channels;

[0011] Let each thread block in the GPGPU correspond to a pair of auxiliary channels, and the internal threads complete the multiplication operation of the corresponding sampling points in parallel, and the local data is cached in the shared memory during the calculation, and after completing the element-level multiplication, the product is summed up by using the parallel reduction strategy, and finally the complete cross-correlation matrix is obtained:

[0012] ,

[0013] , wherein is the auxiliary channel signal vector;

[0014] S3, the cross-correlation vector between the main channel and the auxiliary channel is solved in parallel based on the multi-thread structure of GPGPU, specifically:

[0015] The main channel signal is defined as , the cross-correlation between the main channel signal and each auxiliary channel signal is calculated, and an Mx1-dimensional cross-correlation vector is formed;

[0016] Let each thread block in the GPGPU be responsible for the dot product operation of the main channel and an auxiliary channel, and the internal threads complete the multiplication operation of the corresponding sampling points in parallel, and the local data is cached in the shared memory during the calculation, and finally the inner product calculation is completed by combining the parallel reduction, and the cross-correlation vector is obtained:

[0017] ,

[0018] The cross-correlation vector reflects the statistical correlation between the interference components in the main channel and the auxiliary channel signals;

[0019] S4, calculate the optimal complex weighting coefficient, according to the minimum mean square error criterion, the optimal weight vector is expressed as:

[0020] ,

[0021] Call high-performance linear algebra library on GPGPU platform, and perform fast inversion processing on the cross-correlation matrix , and then multiply it by the corresponding cross-correlation vector to obtain the optimal complex weighting coefficient suitable for the current pulse and channel configuration;

[0022] S5, weighted synthesis and interference cancellation processing, the optimal weight vector obtained is applied to each auxiliary channel signal, and after complex weighting, the interference estimation signal is generated by superposition

[0023] ,

[0024] Then, the estimation signal is deducted from the main channel original signal, and the interference cancellation is completed:

[0025] ,

[0026] In the weighted synthesis and interference cancellation processing process, on the GPGPU, each thread independently completes the weighting and subtraction operation at a time point.

[0027] The beneficial effects of the present application are:

[0028] 1) By deeply analyzing the data dependency relationship of the multi-channel interference cancellation algorithm, the key calculation link is reconstructed in fine granularity parallel, the large-scale parallel computing potential of GPGPU is fully tapped, and the processing throughput is significantly improved;

[0029] 2) Reasonably use shared memory and memory access optimization strategy in GPGPU kernel design, reduce global memory access frequency, effectively reduce data transmission delay, improve computing resource utilization and operation efficiency;

[0030] 3) The method has good scalability and can adapt to different combinations of main channels and auxiliary channels, while ensuring the cancellation performance, realizing millisecond-level real-time processing;

[0031] 4) In the case of GPGPU memory resources, it can be extended to continuous interference suppression processing in the multi-pulse accumulation scene, and meet the real-time demand of modern radar system in high-intensity interference environment for continuous, stable and high-speed signal processing;

[0032] 5) The overall scheme provides a high-efficiency and high-flexibility sidelobe interference suppression technology path for the active array radar, and enhances the survivability and target detection performance of the system in a complex electronic countermeasure environment. BRIEF DESCRIPTION OF DRAWINGS

[0033] Figure 1 is a schematic diagram of a sidelobe interference cancellation structure.

[0034] Figure 2 is a schematic diagram of a GPGPU thread structure.

[0035] Figure 3 is a flowchart of a GPGPU parallel reduction algorithm.

[0036] Figure 4 is a schematic diagram of a linear frequency modulation signal with interference.

[0037] Figure 5 is a schematic diagram of a GPU sidelobe cancellation result. DETAILED DESCRIPTION

[0038] The technical principles and schemes of the present application will be described in detail below in combination with the drawings and simulation examples:

[0039] As shown in Figure 1 , the present application provides a multi-channel radar sidelobe interference cancellation method based on GPGPU acceleration, and the implementation process includes the following steps:

[0040] Step 1: Data organization and GPGPU memory layout configuration.

[0041] The complex sampling data of the main channel and the plurality of auxiliary channels are loaded into the GPGPU video memory according to the time pulse dimension, and a data storage structure for parallel processing is constructed. As shown in Figure 2 , the GPU computing resources are organized using a three-dimensional thread grid: the X-axis direction of the grid corresponds to the signal sampling point sequence, and each thread block is responsible for processing part or all of the data points in a channel; the Y-axis direction corresponds to the total number of channels, including the main channel and all auxiliary channels, realizing multi-channel parallel processing; the Z-axis direction corresponds to the number of pulses, supporting simultaneous processing of multi-pulse echo data, and improving the overall throughput efficiency.

[0042] This layout mode makes full use of the large-scale parallel architecture of GPGPU, and provides an efficient data access basis for subsequent high-dimensional matrix and vector operations.

[0043] Step 2: Parallel calculation of cross-correlation matrix between auxiliary channels.

[0044] Based on the received signals of each auxiliary channel , the cross-correlation values between each other are calculated, and an MxM-dimensional cross-correlation matrix where M is the number of auxiliary channels. In the specific implementation, the signal dot product operation is performed in parallel by a large number of threads in the GPGPU: each thread block corresponds to a pair of auxiliary channels, and the threads inside the block perform multiplication operations on the corresponding sampling points in parallel. To improve memory access efficiency, the local data is loaded into the shared memory to reduce frequent reading of the global memory. After completing the element-level multiplication, a parallel reduction strategy is used to sum up the products, as shown in Figure 3 , which reduces the summation time complexity from O(N) to O(logN), significantly improving the efficiency of the inner product calculation. Finally, the complete cross-correlation matrix is obtained:

[0045]

[0046] where is the auxiliary channel signal vector.

[0047] Step three: parallel solving of the cross-correlation vector between the main channel and the auxiliary channel.

[0048] The cross-correlation between the main channel signal and each auxiliary channel signal is calculated to form an M x 1 cross-correlation vector . This process is similar to step two, using a multi-thread parallel structure, where each thread block is responsible for the dot product operation of the main channel and a certain auxiliary channel. Shared memory is also used to cache data, and parallel reduction is used to complete the inner product calculation. Finally, we obtain:

[0049]

[0050] This vector reflects the statistical correlation between the interference components in the main channel and the auxiliary channel signals, and is a key input for subsequent weight solving.

[0051] Step four: solving the optimal complex weighting coefficient.

[0052] According to the minimum mean square error criterion, the optimal weight vector can be represented as:

[0053]

[0054] On the GPGPU platform, a high-performance linear algebra library is called to quickly invert the cross-correlation matrix , and then multiply it by the corresponding cross-correlation vector to obtain the optimal complex weight vector suitable for the current pulse and channel configuration. This process supports continuous solving in single-pulse or batch multi-pulse mode.

[0055] Step five: weighted synthesis and interference cancellation processing.

[0056] The optimal weight vector is used to synthesize the main channel signal and the auxiliary channel signal to cancel out the interference.The auxiliary channel signals are applied to complex weighting and superposition to generate an interference estimation signal

[0057]

[0058] The estimation signal is then subtracted from the main channel original signal to complete interference cancellation:

[0059]

[0060] There is no data dependency between each sampling point in this step, which is suitable for complete parallel processing. On GPGPU, each thread independently completes the weighting and subtraction operation at a time point, achieving high-throughput real-time output.

[0061] Simulation examples verify:

[0062] To verify the technical advantages of the application, actual simulation data is processed and analyzed. For the typical radar linear frequency modulation signal shown in Figure 4 , strong interference is implemented based on GPGPU sidelobe cancellation processing. The signal parameters are set as follows: bandwidth 10 MHz, pulse width 1 ms, sampling frequency 20 MHz. Figure 5 The cancellation results after processing by the method are shown under the configuration of one main channel and two auxiliary channels. It can be seen that the interference signal is effectively suppressed, and the target echo in the main channel is significantly recovered, verifying the interference suppression ability and processing effectiveness of the application in actual scenarios.

[0063] To evaluate the computational efficiency of the GPGPU parallel processing method proposed by the application, the time performance is compared with the traditional CPU serial implementation scheme. Under different channel numbers and data length configurations, the results are shown in Table 1. As the signal data size increases, the parallel advantage of the GPGPU acceleration scheme gradually appears, and its speedup ratio relative to the CPU continuously improves:

[0064] Table 1 Time performance comparison of GPGPU parallel processing method and existing CPU processing method

[0065]

Claims

1. A GPGPU-accelerated method for canceling radar sidelobe interference based on auxiliary channels, characterized in that, Based on the parallel processing capabilities of GPGPU, interference suppression is performed on radar echo signals under multi-channel configuration, specifically including the following steps: S1. Construct a multi-channel radar signal receiving system consisting of a main receiving channel and multiple low-gain auxiliary channels, collect complex sampling data from each channel, and store the sampling data in the GPGPU memory according to the time pulse dimension. S2. Parallel processing of auxiliary channel data based on a GPGPU multi-threaded architecture, specifically: Define the auxiliary channel received signal as Calculate the cross-correlation values ​​between each pair of signals in each auxiliary channel to construct an M×M dimensional cross-correlation matrix. , where M is the number of auxiliary channels; In the GPGPU, each thread block corresponds to a pair of auxiliary channels. Internally, the multiplication operations for the corresponding sampling points are performed in parallel within the threads. During the computation, shared memory is used to cache local data. After element-wise multiplication, a parallel reduction strategy is employed to sum the multipliers, ultimately yielding the complete cross-correlation matrix. ， in For auxiliary channel signal vectors; S3. Parallel solution of the cross-correlation vector between the main channel and the auxiliary channel based on a multi-threaded structure of GPGPU: Define the main channel signal as Calculate the cross-correlation between the main channel signal and each auxiliary channel signal to form an M×1 dimensional cross-correlation vector. ; In the GPGPU, each thread block is responsible for the dot product operation between the main channel and one auxiliary channel. Internally, threads perform multiplication operations at corresponding sampling points in parallel. Shared memory is used to cache local data during computation. Finally, parallel reduction is combined to complete the inner product calculation, yielding the cross-correlation vector. : ， Cross-correlation vector This reflects the statistical correlation between interference components in the main channel and signals in the auxiliary channel; S4. Calculate the optimal complex weighting coefficients, and based on the minimum mean square error criterion, the optimal weight vector. Represented as: ， On the GPGPU platform, a high-performance linear algebra library is invoked to process the cross-correlation matrix. Perform a fast inversion process, and then correlate it with its corresponding cross-correlation vector. Multiplying these together yields the optimal complex weighting coefficients suitable for the current pulse and channel configuration; S5. Weighted composition and interference cancellation processing, the obtained optimal weight vector The signals from each auxiliary channel are applied, weighted by complex numbers, and then superimposed to generate an interference estimation signal. ， The estimated signal is then subtracted from the original signal in the main channel to complete the interference cancellation. ， During the weighted synthesis and interference cancellation process, each thread on the GPGPU independently completes the weighted and subtractive operations at a single point in time.

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