Radar I / Q demodulation real-time processing method based on GPGPU

Abstract

The invention belongs to the technical field of radar digital signal processing, and particularly relates to a radar I / Q demodulation real-time processing method based on a GPGPU. The method provided by the invention is mainly based on the parallel processing capability of a GPGPU (General Purpose Graphics Processing Unit), performs synchronous processing on an intermediate frequency sampling signal from a multichannel active array radar receiving system, and realizes parallel processing of complex down-conversion, low-pass filtering and extraction in an I / Q (Input / Output) demodulation process. Computational intensive tasks such as frequency mixing, filtering and extraction in the I / Q demodulation process are comprehensively parallelized, the algorithm data stream is reconstructed to be matched with the SIMT execution model of the GPGPU, the overall processing throughput capacity is remarkably improved, and the requirement for low-delay real-time demodulation of multi-channel radar signals is met. In the GPGPU kernel design, the shared memory is reasonably utilized to cache the filter coefficient and the local signal block of high-frequency access, and the NCO lookup table and the window function parameter are stored in combination with the constant memory, so that the global memory access frequency is effectively reduced, the memory bandwidth bottleneck is reduced, and the calculation efficiency and the resource utilization rate are improved.

Description

TECHNICAL FIELD

[0001] The present application belongs to the technical field of radar digital signal processing, and particularly relates to a radar I / Q demodulation real-time processing method based on GPGPU. BACKGROUND

[0002] With the development of radar systems towards high integration, multi-function and real-time, the digitization process of the receiving front end is constantly moving forward, and intermediate frequency and even radio frequency direct sampling technology has gradually become the mainstream architecture of modern active phased array radars. The traditional analog quadrature demodulation relies on analog mixers and local oscillators to generate I / Q two-way signals, and extracts the baseband component through low-pass filtering. However, the gain mismatch, phase non-orthogonality and temperature drift between analog channels easily lead to a decrease in image rejection capability, affecting the system dynamic range and angle measurement accuracy.

[0003] In order to overcome the above limitations, digital quadrature demodulation technology has emerged. With the development of high-performance analog-to-digital converters, intermediate frequency signals can be directly sampled at the GHz level to realize "software-defined" demodulation processing. The typical digital down-conversion process includes: multiplying the intermediate frequency digital sequence with the quadrature local oscillator signal generated by the numerically controlled oscillator to complete the complex mixing; then suppressing the high-frequency component through low-pass filtering to realize the frequency shift to the baseband; finally, the data rate is reduced through decimation to output the I / Q two-way complex signal. The filtering link in this process usually uses a linear phase FIR structure to ensure the integrity of the signal phase, and the calculation essence is a high-throughput time-domain convolution operation, which can also be improved in efficiency through frequency-domain fast convolution.

[0004] In a multi-channel active phased array radar, each array element or subarray is equipped with an independent receiving link, which needs to be synchronized to complete I / Q demodulation, resulting in a magnitude increase in data volume. Especially in the scenarios of wideband waveform, high repetition frequency, and multi-beam parallel, the demodulation module faces huge computing pressure. Although the traditional implementation based on FPGA or DSP has the advantage of deterministic delay, it has bottlenecks in multi-channel parallel processing and algorithm flexibility, making it difficult to balance high throughput and rapid iteration requirements.

[0005] In recent years, GPGPU has gradually been applied to the field of radar real-time signal processing due to its large-scale parallel architecture, high memory bandwidth and programmability. Its thousands of core parallel computing capability is particularly suitable for processing signal stream tasks with strong data parallelism characteristics, such as multi-channel complex down-conversion, batch FIR filtering and FFT operation. Mapping the I / Q demodulation process to the GPGPU platform can significantly improve the processing throughput, meeting the low-latency demodulation requirements of multi-pulse and multi-target echo signals in complex electromagnetic environments.

[0006] Therefore, there is an urgent need for an efficient I / Q demodulation method for a multi-channel intermediate frequency digitization receiving system, which fully utilizes the parallel processing advantage of GPGPU, realizes a high real-time, high consistency, and scalable demodulation architecture, and supports the performance upgrade of the front-end digital signal processing of phased array radar. SUMMARY

[0007] In view of the above problems, the present application aims to solve the high throughput rate and real-time requirement of the orthogonal demodulation of intermediate frequency digital signals in a multi-channel active phased array radar system, and proposes an efficient I / Q demodulation real-time processing method based on a general-purpose graphics processor (GPGPU). The method is directed to the intermediate frequency direct sampling of multi-pulse, multi-channel radar echo data stream, and fully utilizes the large-scale parallel computing capability of GPGPU to realize the parallel processing of complex down-conversion, low-pass filtering and decimation.

[0008] The technical scheme of the present application is:

[0009] A radar I / Q demodulation real-time processing method based on GPGPU, based on the parallel processing capability of GPGPU, the intermediate frequency sampling signals from the multi-channel active array radar receiving system are processed synchronously, the parallel processing of complex down-conversion, low-pass filtering and decimation in the I / Q demodulation process is realized, and the specific steps include the following steps:

[0010] S1, based on the multi-thread structure of GPGPU, the digital complex mixing operation is performed on the multi-channel intermediate frequency sampling signals, the intermediate frequency sampling signals of each channel are multiplied by the orthogonal local carrier generated by the digital controlled oscillator, the spectrum is shifted to the baseband, and thus the I and Q two-way baseband signals corresponding to each channel are obtained, and finally the obtained multi-channel data is stored in the video memory of GPGPU according to the two-dimensional structure of pulse-channel;

[0011] S2, a finite impulse response (FIR) low-pass filter with linear phase response is constructed, specifically, a Hamming window function weighting method is used to obtain the coefficients of the FIR low-pass filter, and the coefficients are stored in the constant memory of GPGPU;

[0012] S3, perform parallel time domain convolution filtering operation based on GPGPU, specifically:

[0013] A block processing strategy is adopted, and each thread block loads the data segment and its neighborhood data required for processing into the shared memory before performing convolution, and the convolution calculation of each output sample is the weighted accumulation of the input signal and the FIR filter coefficients:

[0014]

[0015] wherein is the input intermediate frequency signal sequence, is the pre-stored filter coefficient, filtering output;

[0016] Each thread is responsible for calculating an output point, and the required multiple input data is quickly read through shared memory, and the filter coefficient is obtained from constant memory;

[0017] Under the same timing, all thread blocks are synchronized and processed in parallel to obtain the filtered complex signals of all channels;

[0018] S4, according to the sampling rate ratio relationship between the intermediate frequency and the baseband, a polyphase decimation operation is performed on the filtered complex signal to obtain a demodulated signal.

[0019] Further, the decimation multiple of the polyphase decimation operation in S4 is greater than 2.

[0020] The beneficial effects of the present application are:

[0021] 1) By fully parallelizing the calculation-intensive tasks such as mixing, filtering and decimation in the I / Q demodulation process, reconstructing the algorithm data stream to match the SIMT execution model of GPGPU, significantly improving the overall processing throughput, meeting the low-delay real-time demodulation requirements of multi-channel radar signals;

[0022] 2) In the GPGPU kernel design, the filter coefficients and local signal blocks with high frequency access are reasonably utilized in the shared memory, and the NCO lookup table and window function parameters are stored in the constant memory, which effectively reduces the number of global memory access, reduces the memory bandwidth bottleneck, and improves the calculation efficiency and resource utilization;

[0023] 3) High-consistency quadrature demodulation processing of multi-pulse and multi-channel intermediate frequency digital signals is realized, which overcomes the limitations of traditional FPGA / DSP platforms in algorithm flexibility and scalability, and provides a high-performance, reconfigurable software demodulation solution for active phased array radar front-end. BRIEF DESCRIPTION OF DRAWINGS

[0024] Figure 1 It is a receiver I / Q demodulation processing block diagram.

[0025] Figure 2 It is a GPGPU thread structure diagram.

[0026] Figure 3 It is a GPGPU one-dimensional convolution calculation method diagram.

[0027] Figure 4 It is a DDC front intermediate frequency linear frequency modulation signal diagram.

[0028] Figure 5 It is a quadrature demodulation I, Q two-way baseband signal result diagram.

[0029] Figure 6 Fig. 1 is a schematic diagram of a baseband signal pulse compression result. DETAILED DESCRIPTION

[0030] The technical principles and schemes of the present application are described in detail below in combination with the drawings and simulation examples:

[0031] The present application provides a specific implementation scheme of a GPGPU-based radar I / Q demodulation real-time processing method, which is suitable for parallelization of orthogonal demodulation of multi-channel and multi-pulse intermediate frequency digital signals.As shown in the figure, the method fully utilizes the three-dimensional thread organization structure and hierarchical storage system of GPGPU to realize efficient parallel processing of the whole process from data layout, complex down-conversion, FIR filtering to decimation. The specific implementation steps are as follows: Figures 2 to 3 First step: multi-dimensional data mapping and GPU thread topology configuration

[0032] The intermediate frequency sampling data from the multi-channel active array radar receiving system is organized in a "pulse-channel" two-dimensional structure and is loaded in batches into the GPGPU video memory. To support large-scale parallel processing, a three-dimensional thread grid is constructed, and the dimension configuration is as follows:

[0033] The X dimension of the grid represents the number of data elements participating in processing in a single channel, and each thread is responsible for the demodulation operation of a sampling point; the Y dimension of the grid corresponds to the total number of receiving channels of the radar system, realizing cross-channel parallel processing; the Z dimension of the grid is mapped to the number of transmitted pulses, supporting simultaneous demodulation of multiple pulse echo signals.

[0034] Through the above three-dimensional thread mapping mechanism, unified scheduling and parallel calculation of all channels and all pulse data can be completed in a single kernel function call, significantly improving processing efficiency and resource utilization.

[0035] Second step: FIR low-pass filter design and coefficient preloading

[0036] A finite impulse response FIR low-pass filter with linear phase response is designed to suppress high-frequency image components generated after complex mixing. In this embodiment, a 64-order Hamming window function weighting design method is adopted, and the obtained filter coefficients are normalized and pre-written into the constant memory of GPGPU. Since the constant memory has caching characteristics and supports broadcast mechanism, the access delay can be greatly reduced when multiple threads access the same coefficient concurrently, improving the filtering operation efficiency.

[0037] Third step: one-dimensional parallel convolution filtering based on shared memory optimization

[0038]

[0039] After completing the digital down conversion, time domain one-dimensional convolution operation is performed on each channel I / Q signal to realize low pass filtering. In order to improve the memory access efficiency, a block processing strategy is adopted: each thread block loads the data segment and its neighborhood data required for processing into the shared memory before performing convolution. The convolution calculation of each output sample is the weighted accumulation of the input signal and the FIR filter coefficient, that is:

[0040]

[0041] wherein is the input intermediate frequency signal sequence, is the pre-stored filter coefficient, is the filter output. Each thread is responsible for calculating an output point, and the multiple input data required by the thread are quickly read through the shared memory, while the filter coefficient is obtained from the constant memory. Since the filter length is odd and the sliding window structure is symmetrical, boundary processing and data alignment are facilitated. At the same time, the access mode of each thread to the shared memory has good spatial locality and regularity, avoiding bank conflict and further improving the memory bandwidth utilization.

[0042] Fourth step: integrated decimation processing

[0043] Data decimation is completed synchronously in the filter output stage to reduce the data rate of the baseband signal and meet the bandwidth requirement of the subsequent signal processing module. This operation can directly determine in the convolution kernel function whether the output position corresponding to the thread meets the decimation condition, and if it meets the condition, the calculation result is written into the baseband data storage area in the global memory. By integrating filtering and decimation into the same GPGPU kernel for execution, the memory read and write overhead of intermediate data is reduced, efficient integration of calculation and downsampling is realized, and the real-time performance of the overall processing pipeline is improved.

[0044] Simulation example verification:

[0045] To verify the effectiveness and real-time processing performance of the method, a typical radar intermediate frequency linear frequency modulation signal is selected as the test sample to carry out orthogonal demodulation experiment based on GPGPU. Figure 4 The time-frequency characteristics of the original intermediate frequency linear frequency modulation signal are shown, the signal bandwidth is 10 MHz, the pulse width is 4.5 μs, the intermediate frequency carrier frequency is 112.5 MHz, and the intermediate frequency direct digital sampling is carried out at a sampling rate of 150 MHz. Through the GPU accelerated demodulation process described in the application, the signal is down-converted to baseband, and after low pass filtering and decimation processing, the baseband I / Q data is output, the target sampling rate is 15 MHz, and 10 times decimation (i.e. decimation ratio is 10:1) is realized. Figure 5 The baseband signal result after completing the orthogonal demodulation of the GPGPU platform by the method of the application. Figure 6The baseband signal is subjected to pulse compression processing after orthogonal demodulation.

[0046] To evaluate the computing efficiency of the GPGPU parallel processing method proposed in the application, the time performance is compared with the traditional CPU serial implementation scheme. Under different channel numbers and data length configurations, the results are shown in Table 1. As the signal data size increases, the parallel advantage of the GPGPU acceleration scheme gradually appears, and the speedup ratio relative to the CPU continuously improves:

[0047] Table 1 Time performance comparison of GPGPU parallel processing method and existing CPU processing method

[0048]

Claims

1. A real-time radar I / Q demodulation processing method based on GPGPU, characterized in that, Based on the parallel processing capabilities of GPGPU, the intermediate frequency sampling signals from a multi-channel active array radar receiving system are processed synchronously to achieve parallel processing of complex down-conversion, low-pass filtering, and decimation during I / Q demodulation. Specifically, the process includes the following steps: S1. Based on the multi-threaded structure of GPGPU, the digital complex mixing operation is performed in parallel on the multi-channel intermediate frequency sampling signal. The intermediate frequency sampling signal of each channel is multiplied with the orthogonal local carrier generated by the numerically controlled oscillator to complete the shift of the spectrum to the baseband, thereby obtaining the I and Q baseband signals corresponding to each channel. Finally, the obtained multi-channel data is stored in the video memory of GPGPU according to the pulse-channel two-dimensional structure. S2. Construct a finite impulse response (FIR) low-pass filter with linear phase response. Specifically, use the Hamming window function weighting method to obtain the coefficients of the FIR low-pass filter and store them in the constant memory of the GPGPU. S3. Perform parallel temporal convolution filtering operations based on GPGPU, specifically: A block-based processing strategy is adopted. Before performing convolution, each thread block loads the data segment to be processed and its neighborhood data into shared memory. The convolution of each output sample is calculated as a weighted sum of the input signal and the FIR filter coefficients. ， in For the input intermediate frequency signal sequence, For pre-stored filter coefficients, For filtered output; Each thread is responsible for calculating one output point, and the required input data is quickly read through shared memory, while the filter coefficients are obtained from constant memory. Under the same timing, all thread blocks are processed synchronously and in parallel to obtain the filtered complex signal of all channels; S4. Based on the sampling rate ratio between the intermediate frequency and the baseband, perform polyphase decimation on the filtered complex signal to obtain the demodulated signal.

2. The real-time processing method for radar I / Q demodulation based on GPGPU according to claim 1, characterized in that, The decimation factor of the multiphase decimation operation described in S4 is greater than 2.

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