Power button compatible method, device and system for domestic platform firmware and medium

Abstract

The invention relates to the technical field of computer firmware and hardware interfaces, in particular to a domestic platform firmware power button compatible method, device and system and a medium, the method comprises the steps that a preset communication pin combination is determined, and the communication pin combination at least comprises one communication pin; determining a current hardware version identifier according to a pin level state of the communication pin combination read by domestic platform firmware; acquiring a corresponding power button pin from a pre-stored pin configuration mapping table according to the current hardware version identifier, and writing the current hardware version identifier and the power button pin as hardware version information into a specified address area of a nonvolatile memory; and reading the hardware version information stored in the specified address area in an ACPI table generation stage, and generating a power button function description which can be identified by an operating system according to the hardware version information. The invention aims to improve the power management compatibility of the domestic computing platform firmware.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of computer firmware and hardware interface, and particularly relates to a power button compatibility method, device and system of a domestic platform firmware and a medium. BACKGROUND

[0002] With the rapid development of computer firmware and hardware interface technology, users have put forward more stringent requirements for the power management compatibility of domestic computing platform firmware.

[0003] In the current development practice of computer hardware platforms, the hardware initialization of the power switch by traditional firmware usually adopts an implementation mode that is deeply coupled with a specific circuit design. However, this traditional implementation mode has obvious technical limitations. When the hardware version changes due to circuit optimization, layout adjustment or function expansion, a corresponding firmware version must be developed for each hardware variant. This strong binding architecture not only leads to fragmentation of firmware code, significantly increasing development and maintenance costs, but also due to the high similarity in appearance of different hardware versions, it is easy to cause firmware misbrushing accidents in production testing and terminal use. Once a version mismatch occurs, it will directly cause abnormal power control function, seriously affecting device reliability and user experience.

[0004] Therefore, how to improve the power management compatibility of domestic computing platform firmware is a technical problem to be solved at present. SUMMARY

[0005] The main purpose of the present application is to provide a power button compatibility method, device, system and medium of a domestic platform firmware, aiming to improve the transmission efficiency of high-speed data.

[0006] To achieve the above purpose, the present application provides a power button compatibility method of a domestic platform firmware, which comprises the following steps: determining a preset communication pin combination, wherein the communication pin combination comprises at least one communication pin;

[0007] According to the pin level state of the communication pin combination read by the domestic platform firmware, the current hardware version identifier is determined;

[0008] According to the current hardware version identifier, the corresponding power button pin is obtained from the pre-stored pin configuration mapping table, and the current hardware version identifier and the power button pin are written as hardware version information into a specified address region of a non-volatile memory;

[0009] In the ACPI table generation stage, the hardware version information stored in the specified address region is read, and the power button function description recognizable by the operating system is generated according to the hardware version information.

[0010] In an embodiment, the step of determining the current hardware version identifier according to the pin level state of the communication pin combination read by the domestic platform firmware comprises:

[0011] configuring the communication pin combination as input mode in the initialization stage of the domestic platform firmware, reading the pin level state of the communication pin combination, and traversing the preset hardware version mapping table according to the binary encoding of the pin level state;

[0012] until a binary target number matching the binary encoding is obtained by traversing the hardware version mapping table, the hardware version identifier of the binary target number is determined as the current hardware version identifier.

[0013] In an embodiment, the preset hardware version mapping table comprises a plurality of binary numbers arranged in ascending order, and the step of traversing the preset hardware version mapping table according to the binary encoding of the pin level state comprises:

[0014] determining the binary minimum number and the binary maximum number in the hardware version mapping table, taking the binary interval from the binary minimum number to the binary maximum number as the current traversal interval, and determining whether the binary encoding of the pin level state exceeds the binary middle number in the current traversal interval;

[0015] if the binary encoding exceeds the binary middle number, taking the binary interval from the binary middle number to the binary maximum number as the next current traversal interval, and returning to execute the step of determining whether the binary encoding of the pin level state exceeds the binary middle number in the current traversal interval;

[0016] if the binary encoding exceeds the binary middle number, taking the binary interval from the binary minimum number to the binary middle number as the next current traversal interval, and returning to execute the step of determining whether the binary encoding of the pin level state exceeds the binary middle number in the current traversal interval;

[0017] until the current traversal interval converges to a binary target number, it is determined that the binary target number matches the binary encoding, and the binary target number is the same binary number as the binary encoding.

[0018] In an embodiment, the step of obtaining the corresponding power button pin from the pre-stored pin configuration mapping table according to the current hardware version identifier comprises:

[0019] finding the target communication pin mapped by the current hardware version identifier from the pre-stored pin configuration mapping table, and configuring the target communication pin as the power button pin.

[0020] In an embodiment, before the step of reading the hardware version information stored in the specified address area in the ACPI table generation phase, the power button compatibility method of the domestic platform firmware comprises:

[0021] In the device self-checking phase of the domestic platform firmware, in response to a hardware self-checking completion instruction, a preset ACPI GPIO node is initialized.

[0022] In an embodiment, the hardware version information is the current hardware version identifier and the power button pin, and the step of generating an operating system recognizable power button function description according to the hardware version information comprises:

[0023] According to the current hardware version identifier, enabling ACPI to perform hardware function configuration on the power button pin to generate an operating system recognizable power button function description.

[0024] In an embodiment, the power button compatibility method of the domestic platform firmware comprises:

[0025] The hardware function configuration is set to configure the active level mode, the up and down pull mode, the interrupt trigger mode, and the response mode of the power button pin.

[0026] In addition, to achieve the above-mentioned purpose, the application also provides a power button compatibility device of a domestic platform firmware, which comprises:

[0027] A combination determination module is configured to determine a preset communication pin combination, wherein the communication pin combination comprises at least one communication pin.

[0028] A reading module is configured to determine a current hardware version identifier according to a pin level state of the communication pin combination read by the domestic platform firmware.

[0029] A writing module is configured to acquire a corresponding power button pin from a pre-stored pin configuration mapping table according to the current hardware version identifier, and write the current hardware version identifier and the power button pin as hardware version information into a specified address area of a non-volatile memory.

[0030] A generation module is configured to read the hardware version information stored in the specified address area in an ACPI table generation phase, and generate an operating system recognizable power button function description according to the hardware version information.

[0031] The various functional modules of the power button compatibility device of the domestic platform firmware of the application realize the steps of the power button compatibility method of the domestic platform firmware of the application as described above when running.

[0032] In addition, to achieve the above-mentioned purpose, the application also provides a power button compatible system of a domestic platform firmware, which comprises a memory, a processor, and a power button compatible program of the domestic platform firmware stored on the memory and executable on the processor, and the power button compatible program of the domestic platform firmware implements the steps of the power button compatible method of the domestic platform firmware when executed by the processor.

[0033] In addition, to achieve the above-mentioned purpose, the application also provides a medium, which is a computer readable storage medium, and the computer readable storage medium stores a power button compatible program of a domestic platform firmware, and the power button compatible program of the domestic platform firmware implements the steps of the power button compatible method of the domestic platform firmware when executed by a processor.

[0034] The application provides a power button compatible method of a domestic platform firmware, which significantly improves the power management compatibility of the domestic platform firmware by dynamically identifying the hardware version and adaptively configuring the power button pin. Specifically, the current hardware version identifier can be automatically identified through the pin level state of the preset communication pin combination read by the domestic platform firmware. Next, the power button pin corresponding to the current hardware version identifier is automatically matched from the pre-stored pin configuration mapping table, and the power button pin corresponding to the current hardware version identifier is stored as hardware version information in a specified address area of a non-volatile memory. Finally, the hardware version information stored in the specified address area is read in the ACPI table generation stage, thereby realizing the ability of a single set of domestic platform firmware to adapt to multiple hardware versions, solving the compatibility problem caused by the strong coupling of firmware and hardware in the traditional scheme, avoiding repeated development of firmware caused by hardware changes, ensuring the stable and reliable power function under different hardware versions, and ensuring the compatibility of the operating system through the standardized ACPI interface, thereby significantly improving the power management compatibility of the domestic computing platform firmware. BRIEF DESCRIPTION OF DRAWINGS

[0035] Figure 1 is a flowchart of the first embodiment of the power button compatible method of the domestic platform firmware of the application;

[0036] Figure 2 is an implementation flowchart related to the power button compatible method of the domestic platform firmware of the application;

[0037] Figure 3 is a second embodiment flowchart of the power button compatible method of the domestic platform firmware of the application;

[0038] Figure 4 is a structural schematic diagram of the power button compatible device of the domestic platform firmware related to the embodiment scheme of the application;

[0039] Figure 5 A structural schematic diagram of a power button compatible system of a domestic platform firmware involved in an embodiment scheme of the present application.

[0040] The implementation, functional features and advantages of the present application will be further described with reference to the embodiments and the accompanying drawings. DETAILED DESCRIPTION

[0041] The exemplary embodiments will be described in detail herein with reference to the accompanying drawings. The following description refers to the accompanying drawings in which the same numbers in different drawings represent the same or similar elements unless otherwise represented. The embodiments described in the following exemplary embodiments are not intended to represent all embodiments consistent with the present application.

[0042] With the rapid development of computer firmware and hardware interface technology, users have put forward more stringent requirements for the power management compatibility of domestic computing platform firmware.

[0043] In the current development practice of computer hardware platforms, the traditional firmware usually adopts an implementation mode deeply coupled with specific circuit design for the hardware initialization of the power switch. However, this traditional implementation mode has obvious technical limitations. When the hardware version changes due to circuit optimization, layout adjustment or function expansion, resulting in changes in the pin definition of the power switch, a corresponding firmware version must be developed for each hardware variant. This strong binding architecture not only leads to fragmentation of the firmware code, significantly increasing development and maintenance costs, but also due to the high similarity in appearance of different hardware versions, it is easy to cause firmware misbrushing accidents in production testing and terminal use. Once the version does not match, it will directly cause abnormal power control function, seriously affecting the device reliability and user experience.

[0044] Therefore, how to improve the power management compatibility of domestic computing platform firmware is a technical problem to be solved at present.

[0045] To improve the power management compatibility of domestic computing platform firmware, the present application provides a power button compatible method, device, system and medium of domestic platform firmware.

[0046] The present application provides a power button compatible method of domestic platform firmware, referring to Figure 1 , the power button compatible method of domestic platform firmware includes: Figure 1 is a flowchart of the first embodiment of the power button compatible method of domestic platform firmware of the present application. The power button compatible method of domestic platform firmware includes:

[0047] Step S10: determine a preset communication pin combination, the communication pin combination at least including one communication pin.

[0048] In the embodiment, by determining a preset communication pin combination, the communication pin combination at least includes one communication pin, thereby providing a basic communication interface for subsequent hardware version identification, and the level state detection can be performed based on the explicit pin configuration, thereby improving the hardware compatibility and identification efficiency.

[0049] It should be noted that the communication pin is a GPIO (General Purpose Input / Output) pin.

[0050] In specific embodiments, the application realizes a flexible hardware version identification scheme by customizing the number (n) of pins in the communication pin combination, wherein the number of pins and the number of distinguishable versions are in an exponential growth relationship (2^n), so that the appropriate number of pins can be selected according to the actual needs (for example, one communication pin supports two hardware versions, and three communication pins support eight hardware versions), which not only meets the low-cost identification needs of a small number of versions while ensuring the simplicity of hardware design, but also provides an extensible solution for multi-version systems.

[0051] For example, if the communication pin combination only includes one communication pin, the high level or low level state of the pin is detected to distinguish two hardware versions, wherein the high level corresponds to binary code "1", and the low level corresponds to binary code "0", thereby realizing simple and efficient hardware version identification, which is suitable for scenarios where only two versions need to be distinguished, and reduces the complexity and cost of hardware design.

[0052] If the communication pin combination includes three communication pins, three-bit binary coding (000 to 111) can be used to combine eight different level states, thereby accurately distinguishing eight hardware versions, realizing efficient identification of multi-version hardware, and maintaining the simplicity and scalability of hardware design.

[0053] Step S20: determining the current hardware version identification according to the pin level state of the communication pin combination read by the domestic platform firmware.

[0054] In the embodiment, referring to Figure 2 , it is assumed that the communication pin combination includes communication pin GPIO_A1, communication pin GPIO_A2, and communication pin GPIO_A3. After the initialization of the domestic platform firmware is completed, the level values corresponding to the communication pin GPIO_A1, the communication pin GPIO_A2, and the communication pin GPIO_A3 are synchronously read by the domestic platform firmware to obtain the pin level state of the communication pin combination; next, the automatic identification of the current hardware version identification is realized according to the pin level state.

[0055] It should be noted that the domestic platform firmware can be understood as the firmware of the domestic computer platform, and the domestic computer platform can be the Feiteng platform, and the firmware can be the UEFI (Unified Extensible Firmware Interface) firmware.

[0056] The communication pin combination composed of the communication pin GPIO_A1, the communication pin GPIO_A2 and the communication pin GPIO_A3 can be expressed as GPIOA[3:1] in the GPIOA[3:1] indicates the 1st to 3rd pins of the GPIOA port, that is, GPIOA[1]=GPIO_A1; GPIOA[2]=GPIO_A2; and GPIOA[3]=GPIO_A3. Figure 2

[0057] In specific embodiments, the 3 communication pins supporting 8 hardware versions can be hardware board card A00, hardware board card B00, hardware board card C00, hardware board card D00, hardware board card E00, hardware board card F00, hardware board card G00 and hardware board card H00. When GPIOA[3:1]=000, the current hardware version is identified as the hardware board card A00; when GPIOA[3:1]=001, the current hardware version is identified as the hardware board card B00; when GPIOA[3:1]=010, the current hardware version is identified as the hardware board card C00; when GPIOA[3:1]=011, the current hardware version is identified as the hardware board card D00; when GPIOA[3:1]=100, the current hardware version is identified as the hardware board card E00; when GPIOA[3:1]=101, the current hardware version is identified as the hardware board card F00; when GPIOA[3:1]=110, the current hardware version is identified as the hardware board card G00; and when GPIOA[3:1]=111, the current hardware version is identified as the hardware board card H00.

[0058] Step S30: obtaining the corresponding power button pin from the pre-stored pin configuration mapping table according to the current hardware version identifier, and writing the current hardware version identifier and the power button pin as hardware version information into a specified address region of the non-volatile memory.

[0059] In the embodiment, the power button pin mapped by the current hardware version identifier is obtained from the pre-stored pin configuration mapping table, and the current hardware version identifier and the power button pin are written (i.e., burned) as hardware version information into a specified address region of the non-volatile memory, so that the domestic computer platform can quickly obtain the correct hardware configuration even after restarting, and the stability and startup efficiency of the domestic computer platform are improved.

[0060] ​It should be noted that the non-volatile memory can be represented by "norflash" in Figure 2 The communication pin combination corresponds to a pin configuration mapping table, and the pin configuration mapping table corresponding to the communication pin combination GPIOA[3:1] is shown in Table 1.

[0061]

[0062]

[0063] Table 1

[0064] In a specific embodiment, referring to Figure 2 When the level state of GPIOA[3:1] is binary code "000", the above pin configuration mapping table is queried to determine that the current hardware version is hardware board A00, and the corresponding power button pin is automatically mapped to the communication pin GPIO0_A6, that is, the communication pin GPIO0_A6 is initialized as the power button pin, so as to realize accurate control of the power management of the hardware version, and ensure that the operating system can correctly identify and operate the power button function.

[0065] When the level state of GPIOA[3:1] is binary code "001", the above pin configuration mapping table is queried to determine that the current hardware version is hardware board B00, and the corresponding power button pin is automatically mapped to the communication pin GPIO1_A6, that is, the communication pin GPIO1_A6 is initialized as the power button pin, so as to realize accurate control of the power management of the hardware version, and ensure that the operating system can correctly identify and operate the power button function.

[0066] Step S40: reading the hardware version information stored in the specified address region of the non-volatile memory in the ACPI table generation stage, and generating a power button function description recognizable by the operating system according to the hardware version information.

[0067] In the embodiment, the hardware version information stored in the specified address region of the non-volatile memory in the ACPI table generation stage is read, and a power button function description recognizable by the operating system is generated, so as to realize seamless connection between the hardware configuration and the operating system, ensure the correctness and consistency of the power management function, and improve the power management compatibility of the domestic computing platform firmware.

[0068] In summary, the application provides a power button compatibility method of a domestic platform firmware. The power button compatibility method dynamically identifies a hardware version and adaptively configures a power button pin, thereby significantly improving the power management compatibility of the domestic platform firmware. Specifically, a preset communication pin combination read by the domestic platform firmware can be used to automatically identify a current hardware version identifier. Next, a power button pin corresponding to the current hardware version identifier is automatically matched from a pre-stored pin configuration mapping table, and the power button pin corresponding to the current hardware version identifier is stored as hardware version information in a specified address region of a non-volatile memory. Finally, the hardware version information stored in the specified address region is read in an ACPI table generation stage, thereby realizing the capability of a single set of domestic platform firmware to adapt to multiple hardware versions, solving the compatibility problem caused by the strong coupling of firmware and hardware in the traditional scheme, avoiding repeated development of firmware caused by hardware changes, ensuring the stable and reliable power function under different hardware versions, and ensuring the compatibility of the operating system through the standardized ACPI interface, thereby significantly improving the power management compatibility of the domestic computing platform firmware.

[0069] Further, based on the first embodiment of the power button compatibility method of the domestic platform firmware, the second embodiment of the power button compatibility method of the domestic platform firmware is provided. In some feasible embodiments, referring to Figure 3 The step S20 of determining the current hardware version identifier according to the pin level state of the communication pin combination read by the domestic platform firmware can further include the following implementation steps S201 to S202.

[0070] The step S201 of configuring the communication pin combination as an input mode in the initialization stage of the domestic platform firmware, reading the pin level state of the communication pin combination, and traversing a preset hardware version mapping table according to the binary encoding of the pin level state.

[0071] In this embodiment, by configuring the communication pin combination as an input mode in the initialization stage of the domestic platform firmware and reading the pin level state of the communication pin combination, automatic collection of the hardware version identification signal is realized. Then, the preset hardware version mapping table is traversed according to the binary encoding of the pin level state, thereby providing a standardized data processing flow for subsequent accurate matching of the current hardware version identifier, ensuring the reliability of hardware identification, and improving the automation degree of firmware initialization.

[0072] It should be noted that when the communication pin combination is composed of the communication pin GPIO_A1, the communication pin GPIO_A2, and the communication pin GPIO_A3, the preset hardware version mapping table is determined as the pin configuration mapping table corresponding to GPIOA[3:1].

[0073] Step S202: until a binary target number matching the binary code is found in the hardware version mapping table, the hardware version identification of the binary target number is taken as the current hardware version identification.

[0074] In the embodiment, until a binary target number matching the binary code is found in the hardware version mapping table, the hardware version identification of the binary target number is taken as the current hardware version identification, which realizes intelligent identification and automatic adaptation of the hardware version, enhances the compatibility of the domestic computing platform to different hardware versions, and lays a solid foundation for correct configuration of subsequent power management and other functions.

[0075] Further, in other possible embodiments, the preset hardware version mapping table includes a plurality of binary numbers arranged in ascending order, and the step 201 of traversing the preset hardware version mapping table according to the binary code of the pin level state can further include the following implementation steps 2011 to 2014.

[0076] Step 2011: determine the binary minimum number and the binary maximum number in the hardware version mapping table, take the binary interval from the binary minimum number to the binary maximum number as the current traversal interval, and determine whether the binary code of the pin level state exceeds the binary middle number in the current traversal interval.

[0077] In the embodiment, the binary minimum number and the binary maximum number in the hardware version mapping table are determined, the binary interval from the binary minimum number to the binary maximum number is taken as the current traversal interval, and it is determined whether the binary code of the pin level state exceeds the binary middle number in the current traversal interval, that is, the application establishes an efficient binary search mechanism by determining the binary interval of the hardware version mapping table and comparing the middle value, which greatly reduces the traversal data volume and lays a foundation for quickly positioning the target hardware version, while ensuring that the search process is always performed in an effective range.

[0078] For example, taking the pin configuration mapping table corresponding to GPIOA[3:1] as an example, the binary minimum number in the hardware version mapping table is 000, the binary maximum number in the hardware version mapping table is 111, and the initial current traversal interval is [000, 111]. The binary middle number in [000, 111] can be 011 or 100.

[0079] Step 2012: if the binary code exceeds the binary middle number, the binary interval from the binary middle number to the binary maximum number is taken as the next current traversal interval, and the step of determining whether the binary code of the pin level state exceeds the binary middle number in the current traversal interval is executed.

[0080] In the embodiment, if the binary code exceeds the binary middle number, the binary interval from the binary minimum number to the binary middle number is taken as the next current traversal interval, and the step of judging whether the binary code of the pin level state exceeds the binary middle number in the current traversal interval is returned to execute.

[0081] Step 2013: If the binary code exceeds the binary middle number, the binary interval from the binary minimum number to the binary middle number is taken as the next current traversal interval, and the step of judging whether the binary code of the pin level state exceeds the binary middle number in the current traversal interval is returned to execute.

[0082] In the embodiment, if the binary code exceeds the binary middle number, the binary interval from the binary minimum number to the binary middle number is taken as the next current traversal interval, and the step of judging whether the binary code of the pin level state exceeds the binary middle number in the current traversal interval is returned to execute.

[0083] Step 2014: Until the current traversal interval converges to the binary target number, it is determined that the binary target number matches the binary code, and the binary target number is the same binary number as the binary code.

[0084] In the embodiment, until the current traversal interval converges to the binary target number, it is determined that the binary target number matches the binary code, and the binary target number is the same binary number as the binary code, which significantly improves the query efficiency of the large-capacity hardware version mapping table, and ensures the accuracy of version matching through the mathematical certainty of successive interval halving.

[0085] Further, in some possible embodiments, the above step S30: obtaining the corresponding power button pin from the pre-stored pin configuration mapping table according to the current hardware version identifier, can further include the following implementation step 301.

[0086] Step 301: In the device self-checking stage of the domestic platform firmware, the preset ACPI GPIO node is initialized in response to a hardware self-checking completion instruction.

[0087] In the embodiment, with reference to Figure 2 In the device self-checking stage of the domestic platform firmware, the preset ACPI GPIO node is initialized in response to a hardware self-checking completion instruction, and the system realizes early connection of hardware resources and ACPI power management architecture. Specifically, first, the firmware-level initialization ensures that the GPIO control node has complete functions before the operating system is loaded, eliminating the risk of power management failure caused by timing problems; second, the ACPI standard interface is used for abstract configuration, so that the same set of firmware code can adapt to the power management needs of different hardware platforms, significantly improving system compatibility; finally, the key GPIO resources are included in the ACPI management system to provide standardized power control interfaces for the operating system, which not only meets the modern system ACPI compliance requirements, but also lays a hardware control foundation for subsequent dynamic power management.

[0088] It should be noted that the device self-checking stage refers to Figure 2 The BIOS (Basic Input / Output System, Basic Input / Output System) stage device self-checking of the domestic computer platform when starting, which can be understood as a hardware detection and initialization process performed by the UEFI firmware, the purpose is to ensure that the key hardware devices (such as CPU, memory, storage, graphics card, etc.) work normally, and prepare for the subsequent operating system loading.

[0089] Further, in some other possible embodiments, the hardware version information is the current hardware version identifier and the power button pin, and the step S40 of generating an operating system recognizable power button function description according to the hardware version information can further include the following implementation step 401.

[0090] Step 401: Enable ACPI to perform hardware function configuration on the power button pin according to the current hardware version identifier, and generate an operating system recognizable power button function description.

[0091] In the embodiment, with reference to Figure 2After obtaining the current hardware version identifier in the hardware version information stored in the specified address region of the non-volatile memory, the ACPI (Advanced Configuration and Power Interface) hardware function configuration of the power button pin is dynamically enabled according to the current hardware version identifier, that is, if the current hardware version identifier is hardware board A00, GPIO0_A6 is enabled to be configured as the power button function by ACPI, and if the current hardware version identifier is hardware board B00, GPIO1_A6 is enabled to be configured as the power button function by ACPI, so as to generate a standardized power button function description recognizable by the operating system, realize seamless docking of the hardware power management and the operating system power control module, and enable the operating system to accurately recognize and uniformly manage the triggering events (such as booting, hibernating, forced shutdown, etc.) of the power button, while ensuring the compatibility and configurability of the power button behavior under different hardware versions, and improving the reliability and cross-platform adaptability of the system power management.

[0092] It should be noted that ACPI is a standardized interface for hardware configuration and power management communication between the operating system and the firmware.

[0093] Further, in some possible embodiments, the power button compatibility method of the domestic platform firmware can include step A10.

[0094] Step A10: The hardware function configuration is set to configure the active level mode, pull-up and pull-down mode, interrupt trigger mode and response mode of the power button pin.

[0095] In this embodiment, by configuring the active level mode (high / low level trigger), pull-up and pull-down mode (ensuring signal stability), interrupt trigger mode (edge / level trigger) and response mode (such as immediate shutdown or sleep) of the power button pin, the hardware can accurately identify the physical operation of the power button and convert it into a standardized ACPI event, so as to ensure that the operating system can reliably respond to the pressing action of the power button (such as booting, shutting down, sleeping, etc.), while avoiding abnormal behavior caused by accidental triggering or signal jitter, and improving the accuracy of power management and system stability.

[0096] In summary, the application provides a power button compatibility method of a domestic platform firmware, which significantly improves the power management compatibility of the domestic platform firmware by dynamically identifying the hardware version and adaptively configuring the power button pin. Specifically, the current hardware version identifier can be automatically identified through the pin level state of the preset communication pin combination read by the domestic platform firmware. Next, the power button pin corresponding to the current hardware version identifier is automatically matched from the pre-stored pin configuration mapping table, and the power button pin corresponding to the current hardware version identifier is stored as hardware version information in a specified address area of a non-volatile memory. Finally, the hardware version information stored in the specified address area is read in the ACPI table generation stage, thereby realizing the ability of a single set of domestic platform firmware to adapt to multiple hardware versions, solving the compatibility problem caused by the strong coupling of firmware and hardware in the traditional scheme, avoiding repeated development of firmware caused by hardware changes, ensuring the stability and reliability of the power function under different hardware versions, and ensuring the compatibility of the operating system through the standardized ACPI interface, thereby significantly improving the power management compatibility of the domestic computing platform firmware.

[0097] In addition, the application also provides a power button compatibility device of a domestic platform firmware, please refer to Figure 4 , Figure 4 is a structure diagram of the power button compatibility device of the domestic platform firmware involved in the embodiment scheme of the application. The power button compatibility device of the domestic platform firmware provided by the application comprises:

[0098] The combination determination module H01 is configured to determine a preset communication pin combination, and the communication pin combination comprises at least one communication pin.

[0099] The reading module H02 is configured to determine a current hardware version identifier according to the pin level state of the communication pin combination read by the domestic platform firmware.

[0100] The writing module H03 is configured to obtain a corresponding power button pin from a pre-stored pin configuration mapping table according to the current hardware version identifier, and write the current hardware version identifier and the power button pin as hardware version information into a specified address area of a non-volatile memory.

[0101] The generation module H04 is configured to read the hardware version information stored in the specified address area in the ACPI table generation stage, and generate a power button function description recognizable by an operating system according to the hardware version information.

[0102] The various functional modules of the power button compatibility device of the domestic platform firmware of the application realize the steps of the power button compatibility method of the domestic platform firmware of the application as described above when running.

[0103] In addition, the application further provides a power button compatible system of a domestic platform firmware. Figure 5 , Figure 5 FIG. 1 is a structural diagram of a power button compatible system of a domestic platform firmware according to an embodiment of the application. The device according to the embodiment of the application can be a device for a power button compatible method of a domestic platform firmware.

[0104] The application provides a power button compatible system of a domestic platform firmware, which comprises at least one processor and a memory in communication connection with the at least one processor, wherein the memory stores instructions executable by the at least one processor, and the instructions are executed by the at least one processor to enable the at least one processor to execute the driving method of the power button compatible method of the domestic platform firmware in Embodiment Two.

[0105] Reference will be made to Figure 5 FIG. 1 is a structural diagram of a power button compatible system of a domestic platform firmware according to an embodiment of the application. The power button compatible system of the domestic platform firmware according to the embodiment of the application can include, but is not limited to, mobile terminals such as mobile phones, notebook computers, digital broadcast receivers, PDAs (Personal Digital Assistants), PADs (Portable Application Descriptions), PMPs (Portable Media Players), vehicle-mounted terminals (for example, vehicle-mounted navigation terminals), and the like, and fixed terminals such as digital TVs, desktop computers, and the like. Figure 5 The power button compatible system of the domestic platform firmware shown in FIG. 1 is merely an example, and should not bring any limitation to the functions and use range of the embodiments of the application.

[0106] As Figure 5As shown, the power button compatibility system of the domestic platform firmware can include a processing device 1001 (e.g., a central processing unit, a graphics processing unit, etc.) that can perform various appropriate actions and processes according to programs stored in a read only memory (ROM) 1002 or programs loaded from a storage device 1003 into a random access memory (RAM) 1004. Various programs and data required for the power button compatibility system of the domestic platform firmware to operate are also stored in the RAM 1004. The processing device 1001, the ROM 1002, and the RAM 1004 are connected to each other through a bus 1005. An input / output (I / O) interface 1006 is also connected to the bus. Generally, the following devices can be connected to the I / O interface 1006: input devices 1007 including, for example, a touch screen, a touch pad, a keyboard, a mouse, an image sensor, a microphone, an accelerometer, a gyroscope, etc.; output devices 1008 including, for example, a liquid crystal display (LCD), a speaker, a vibrator, etc.; the storage device 1003 including, for example, a magnetic tape, a hard disk, etc.; and a communication device 1009. The communication device 1009 can allow the power button compatibility system of the domestic platform firmware to communicate wirelessly or wired with other devices to exchange data. Although the power button compatibility system of the domestic platform firmware with various devices is shown in the figure, it should be understood that all the shown devices are not required to be implemented or possessed. More or fewer devices can be alternatively implemented or possessed.

[0107] In particular, according to embodiments of the present disclosure, the processes described above with reference to the flowcharts can be implemented as a computer software program. For example, embodiments of the present disclosure include a computer program product comprising a computer program carried on a computer readable medium, the computer program containing program code for performing the methods shown in the flowcharts. In such embodiments, the computer program can be downloaded and installed from a network through a communication device, or installed from the storage device 1003, or installed from the ROM 1002. When the computer program is executed by the processing device 1001, the above-mentioned functions defined in the methods of the embodiments of the present disclosure are performed.

[0108] The power button compatible system of the domestic platform firmware provided in the application adopts the driving method of the power button compatible method of the domestic platform firmware in the above embodiment, and can solve the technical problem of low reliability of the power button compatible system of the domestic platform firmware. Compared with the prior art, the power button compatible system of the domestic platform firmware provided in the application has the same beneficial effects as the driving method of the power button compatible method of the domestic platform firmware provided in the above embodiment, and other technical features in the power button compatible system of the domestic platform firmware are the same as the features disclosed in the above embodiment method, which will not be described here.

[0109] In addition, the application provides a computer readable storage medium. Please refer to Figure 5 , Figure 5 The structure diagram of the computer readable storage medium related to the embodiment scheme of the application. The computer readable storage medium stores the driving program of the power button compatible method of the domestic platform firmware. When the driving program of the power button compatible method of the domestic platform firmware is executed by the processor, the steps of the driving method of the power button compatible method of the domestic platform firmware are realized.

[0110] It should be noted that in this paper, the term "including", "containing" or any other variant thereof is intended to cover non-exclusive inclusion, so that the process, method, article or system including a series of elements not only includes those elements, but also includes other elements not explicitly listed, or includes elements inherent to such process, method, article or system. Without more limitations, the element defined by the statement "including a" does not exclude the presence of another identical element in the process, method, article or system including the element.

[0111] The above application embodiment serial number is only for description, not representing the pros and cons of the embodiment.

[0112] Through the description of the above embodiments, those skilled in the art can clearly understand that the above embodiment method can be realized by means of software and necessary general hardware platform, of course, it can also be realized by hardware, but in many cases, the former is a better embodiment. Based on such understanding, the technical solutions of the application can be embodied in the form of software product, which is stored in the above-mentioned computer readable storage medium (such as ROM / RAM, magnetic disk, optical disk), including a plurality of instructions for making a device (which can be a mobile phone, computer, server, or network device, etc.) execute the method described in each embodiment of the application.

[0113] The above merely preferred embodiments of the present application and are not intended to limit the patent scope of the present application, any equivalent structure or equivalent process transformation using the content of the present application specification and drawings, or directly or indirectly applied in other related technical fields, are also included in the patent protection scope of the present application.

Claims

1. A power button compatibility method for a homegrown platform firmware, the method comprising: The power button compatible method of the domestic platform firmware comprises: ​ determining a preset communication pin combination, the communication pin combination comprising at least one communication pin; determining a current hardware version identifier according to a pin level state of the communication pin combination read by the domestic platform firmware; obtaining a corresponding power button pin from a pre-stored pin configuration mapping table according to the current hardware version identifier, and writing the current hardware version identifier and the power button pin as hardware version information into a specified address region of a non-volatile memory; reading the hardware version information stored in the specified address region in an ACPI table generation stage, and generating a power button function description recognizable by an operating system according to the hardware version information.

2. The power button compatibility method for a domestic platform firmware as claimed in claim 1, wherein, The step of determining the current hardware version identifier according to the pin level state of the communication pin combination read by the domestic platform firmware comprises: configuring the communication pin combination as an input mode in an initialization stage of the domestic platform firmware, reading the pin level state of the communication pin combination, and traversing a preset hardware version mapping table according to a binary code of the pin level state; until a binary target number matching the binary code is obtained by traversing the hardware version mapping table, taking a hardware version identifier of the binary target number as the current hardware version identifier.

3. The power button compatibility method for a domestic platform firmware as claimed in claim 1, wherein, The preset hardware version mapping table comprises a plurality of binary numbers arranged in ascending order, and the step of traversing the preset hardware version mapping table according to the binary code of the pin level state comprises: determining a binary minimum number and a binary maximum number in the hardware version mapping table, taking a binary interval from the binary minimum number to the binary maximum number as a current traversal interval, and judging whether the binary code of the pin level state exceeds a binary middle number in the current traversal interval; if the binary code exceeds the binary middle number, taking a binary interval from the binary middle number to the binary maximum number as a next current traversal interval, and returning to execute the step of judging whether the binary code of the pin level state exceeds the binary middle number in the current traversal interval; if the binary code exceeds the binary middle number, taking a binary interval from the binary minimum number to the binary middle number as a next current traversal interval, and returning to execute the step of judging whether the binary code of the pin level state exceeds the binary middle number in the current traversal interval; until the current traversal interval converges to a binary target number, it is determined that the binary target number matches the binary code, and the binary target number is a binary number same as the binary code.

4. The power button compatibility method for a domestic platform firmware as claimed in claim 1, wherein, The step of obtaining the corresponding power button pin from the pre-stored pin configuration mapping table according to the current hardware version identifier comprises: finding a target communication pin mapped by the current hardware version identifier from the pre-stored pin configuration mapping table, and configuring the target communication pin as a power button pin.

5. The power button compatibility method for a domestic platform firmware as claimed in claim 1, wherein, Before the step of reading the hardware version information stored in the specified address area of the domestic platform firmware in the ACPI table generation stage, the power button compatibility method of the domestic platform firmware comprises: In the device self-checking stage of the domestic platform firmware, a preset ACPI GPIO node is initialized in response to a hardware self-checking completion instruction.

6. The power button compatibility method for a domestic platform firmware as claimed in claim 1, wherein, The hardware version information comprises a current hardware version identifier and a power button pin, and the step of generating an operating system-recognizable power button function description according to the hardware version information comprises: According to the current hardware version identifier, an ACPI hardware function configuration is enabled for the power button pin to generate an operating system-recognizable power button function description.

7. The power button compatibility method for a domestic platform firmware as claimed in claim 6, wherein, The power button compatibility method of the domestic platform firmware comprises: The hardware function configuration is set as an effective level mode, an up-down pull mode, an interrupt trigger mode and a response mode of the power button pin.

8. A power button compatibility device for a homegrown platform firmware, the device comprising: The power button compatibility device of the domestic platform firmware comprises: A combination determination module is configured to determine a preset communication pin combination, the communication pin combination comprising at least one communication pin; A reading module is configured to determine a current hardware version identifier according to a pin level state of the communication pin combination read by the domestic platform firmware; A writing module is configured to write the current hardware version identifier and a power button pin corresponding to the current hardware version identifier obtained from a pre-stored pin configuration mapping table into a specified address area of a non-volatile memory as hardware version information; A generation module is configured to read the hardware version information stored in the specified address area in an ACPI table generation stage, and generate an operating system-recognizable power button function description according to the hardware version information.

9. A power button compatibility system for a homegrown platform firmware, the system comprising: The power button compatibility system of the domestic platform firmware comprises a memory, a processor and a power button compatibility program of the domestic platform firmware stored in the memory and executable on the processor, and the processor implements the steps of the power button compatibility method of the domestic platform firmware according to any one of claims 1 to 7 when executing the power button compatibility program of the domestic platform firmware.

10. A medium characterized by, The medium is a computer readable storage medium, and the computer readable storage medium stores a power button compatibility program of the domestic platform firmware, and the power button compatibility program of the domestic platform firmware implements the steps of the power button compatibility method of the domestic platform firmware according to any one of claims 1 to 7 when executed by a processor.

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