Image data caching device and method, equipment and storage medium

Abstract

The invention relates to the technical field of image processing, and provides a device, method and equipment for caching image data and a storage medium, and the device comprises a judgment module which is used for obtaining a plurality of coordinates; calculating an image data block hit by each coordinate; for each image data block, if the mark corresponding to the image data block is not queried in the marking module, generating a first feedback signal; the reading module is used for reading each image data block from the memory in response to the first feedback signal, writing the image data blocks into the cache module and generating a second feedback signal; the marking module is used for responding to the second feedback signal and updating the mark of the image data block; the consumption module is used for reading the image data block from the cache module, outputting the image data block and generating a third feedback signal; and the marking module is also used for refreshing the mark of the image data block in response to the third feedback signal. According to the technical scheme, the caching efficiency and the utilization rate of the image data are improved.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of image processing, in particular to an image data caching device, method, equipment and storage medium. BACKGROUND

[0002] At present, in the design of an image signal processing (ISP) chip and a multimedia (MM) chip, a plurality of types of caches are used for data transmission between application scenarios, modules in a system and modules in different systems. The design of the cache is used to meet efficient utilization and storage of image data streams. Different cache designs define different cache structures and read-write modes.

[0003] However, as the application scenarios of an image data processing chip become more and more complex, the amount of data that needs to be cached in the chip will become larger and larger. The current cache cannot meet the efficiency of data caching and the utilization rate of data required by complex application scenarios. SUMMARY

[0004] Embodiments of the present application provide an image data caching device, method, equipment and storage medium, which can cache image data in a cache module in time, read the image data from the cache module multiple times according to a mark, and thus improve the caching efficiency and utilization rate of the image data. The technical solution is as follows: According to a first aspect of an embodiment of the present application, an image data caching device is provided, comprising: a determination module configured to obtain a plurality of coordinates, calculate image data blocks hit by each of the coordinates, and generate a first feedback signal for each of the image data blocks if a mark corresponding to the image data block is not found in a mark module. The mark corresponding to the image data block is not found in the mark module, which indicates that the image data block is stored in a memory. The mark indicates a hit condition and a consumption condition of the corresponding image data block. The image data block is a part of an original image. a reading module configured to read each of the image data blocks from the memory in response to the first feedback signal, write the image data blocks into a cache module, and generate a second feedback signal; the mark module configured to update the mark of the image data block in response to the second feedback signal; a consumption module configured to read the image data blocks from the cache module, output the image data blocks, and generate a third feedback signal; the mark module is further configured to refresh the mark of the image data block in response to the third feedback signal.

[0005] In some embodiments, the determining module is further configured to obtain a plurality of coordinate indexes, and generate a coordinate window according to the plurality of coordinate indexes; the coordinate window comprises a plurality of the coordinates, and the coordinates correspond to the coordinate indexes one by one.

[0006] In some embodiments, the mark comprises a dynamic value, an image position value, and a state value; the dynamic value is a difference between a hit number and a consumption number of the corresponding image data block; the image position value represents a position of the corresponding image data block in the original image; and the state value represents whether the mark is valid. The device further comprises a control module. The determining module is further configured to, for each image data block, if the mark corresponding to the image data block is not queried in the marking module and a free mark is queried in the marking module, generate the first feedback signal. The control module is configured to, in response to the first feedback signal, generate the first reading signal. The reading module is configured to, in response to the first reading signal, read the image data block from the memory, write the image data block into the cache module, and generate the second feedback signal. The control module is further configured to, in response to the second feedback signal, generate an update signal. The marking module is configured to, in response to the update signal, update the dynamic value, the image position value, and the state value of the image data block. The control module is further configured to generate a second reading signal. The consumption module is further configured to, in response to the second reading signal, read the image data block from the cache module, output the image data block, and generate the third feedback signal. The marking module is further configured to, in response to the third feedback signal, refresh the dynamic value of the image data block.

[0007] In some embodiments, the determining module is further configured to, for each image data block, if the mark corresponding to the image data block is not queried in the marking module and a free mark is not queried in the marking module, enter a waiting state. The marking module is further configured to, after there is a free mark, generate a notification signal. The determining module is further configured to, in response to the notification signal, generate the first feedback signal.

[0008] In some embodiments, the determining module is further configured to, for each of the image data blocks, generate the first feedback signal if the tag corresponding to the image data block is found in the tag module and the dynamic value of the image data block is determined to be 0; and the tag corresponding to the image data block found in the tag module indicates that the image data block is stored in the cache module. The control module is configured to generate the update signal in response to the first feedback signal. The tag module is further configured to update the dynamic value of the image data block in response to the update signal.

[0009] In some embodiments, the determining module is further configured to, for each of the image data blocks, generate the first feedback signal if the tag corresponding to the image data block is found in the tag module and the dynamic value of the image data block is determined to be less than a dynamic value threshold. The control module is configured to generate the update signal in response to the first feedback signal. The tag module is further configured to update the dynamic value of the image data block in response to the update signal.

[0010] In some embodiments, the determining module is further configured to, for each of the image data blocks, enter a waiting state if the tag corresponding to the image data block is found in the tag module and the dynamic value of the image data block is determined to be equal to the dynamic value threshold. The tag module is further configured to generate a notification signal after the dynamic value of the image data block is determined to be less than the dynamic value threshold. The determining module is further configured to generate the first feedback signal in response to the notification signal.

[0011] In some embodiments, the apparatus further comprises a coordinate module, and the coordinate module is configured to cache the coordinates.

[0012] In some embodiments, the apparatus further comprises a writing module. The control module is further configured to generate a third reading signal. The writing module is configured to read the image data blocks from the consumption module in response to the third reading signal, and write the image data blocks into the memory.

[0013] In some embodiments, the control module comprises a reading unit and an update unit. The reading unit is configured to generate the first reading signal in response to the first feedback signal. Or the reading unit is further configured to generate a fourth feedback signal in response to the first feedback signal. The updating unit is further configured to generate the update signal in response to the fourth feedback signal. The reading unit is further configured to generate a fifth feedback signal in response to the second feedback signal. The updating unit is further configured to generate the update signal in response to the fifth feedback signal.

[0014] According to a second aspect of the embodiments of the present application, a method for caching image data is provided, including: obtaining a plurality of coordinates; calculating image data blocks hit by each of the coordinates; for each of the image data blocks, generating a first feedback signal if a tag corresponding to the image data block is not found in a tag module; the tag corresponding to the image data block not being found in the tag module indicates that the image data block is stored in a memory; the tag indicates a hit condition and a consumption condition of the corresponding image data block; the image data block is a part of an original image; reading each of the image data blocks from the memory in response to the first feedback signal, writing the image data blocks into a cache module, and generating a second feedback signal; updating a tag of the image data block in response to the second feedback signal; reading the image data blocks from the cache module, outputting the image data blocks, and generating a third feedback signal; refreshing the tag of the image data block in response to the third feedback signal.

[0015] According to a third aspect of the embodiments of the present application, a computer device is provided, including a processor and a memory, the memory is configured to store at least one program, the at least one program is loaded and executed by the processor to implement the method for caching image data.

[0016] According to a fourth aspect of the embodiments of the present application, a computer readable storage medium is provided, the computer readable storage medium stores at least one program, the at least one program is loaded and executed by a processor to implement the method for caching image data.

[0017] The embodiment of the application acquires a plurality of coordinates, calculates image data blocks hit by each coordinate, generates a first feedback signal if a mark corresponding to each image data block is not queried in a mark module, indicates that the image data block is stored in a memory if the mark corresponding to the image data block is not queried in the mark module, reads each image data block from the memory, writes the image data block into a cache module, generates a second feedback signal in response to the first feedback signal, updates the mark of the image data block in response to the second feedback signal, reads the image data block from the cache module, outputs the image data block, and generates a third feedback signal. The above technical solution not only can cache the image data block in time and improve the cache efficiency of the image data block, but also can read the image data block from the cache module in time according to the mark and improve the utilization rate of the image data block. BRIEF DESCRIPTION OF DRAWINGS

[0018] In order to more clearly illustrate the technical solutions in the embodiments of the application, the following will briefly introduce the drawings needed to be used in the embodiment description. Obviously, the drawings in the following description are only some embodiments of the application, and other drawings can be obtained by those skilled in the art without any creative effort on the basis of these drawings.

[0019] Figure 1 is a schematic diagram of an implementation environment provided by the embodiment of the application; Figure 2 is a structural schematic diagram of a first image data caching device provided by the embodiment of the application; Figure 3 is a structural schematic diagram of a mark provided by the embodiment of the application; Figure 4 is a structural schematic diagram of a coordinate window provided by the embodiment of the application; Figure 5 is a structural schematic diagram of an image data block provided by the embodiment of the application; Figure 6 is a corresponding relationship schematic diagram of a first coordinate window and an image data block provided by the embodiment of the application; Figure 7 is a corresponding relationship schematic diagram of a second coordinate window and an image data block provided by the embodiment of the application; Figure 8 is a corresponding relationship schematic diagram of a third coordinate window and an image data block provided by the embodiment of the application; Figure 9 is a structural schematic diagram of a cache module provided by the embodiment of the application; Figure 10is a structural schematic diagram of a second device for caching image data according to an embodiment of the present application; Figure 11 is a flowchart of a method for caching image data in a scenario where a block of image data needs to be read from a DDR according to an embodiment of the present application; Figure 12 is a flowchart of a method for caching image data in a scenario where a block of image data does not need to be read from a DDR according to an embodiment of the present application; Figure 13 is a flowchart of a method for caching image data according to an embodiment of the present application; Figure 14 is a structural schematic diagram of a terminal according to an embodiment of the present application; Figure 15 is a structural schematic diagram of a server according to an embodiment of the present application. DETAILED DESCRIPTION

[0020] To make the objectives, technical solutions and advantages of the present application clearer, the following will further describe the embodiments of the present application in conjunction with the accompanying drawings.

[0021] The exemplary embodiments will be described in detail herein with reference to the drawings. The following description is with reference to the drawings, in which like numerals represent like elements, unless otherwise specified. The embodiments described in the following exemplary embodiments are not intended to represent all embodiments consistent with the present application.

[0022] The terms "first", "second", and the like in the present application are used to distinguish between elements or items that have substantially the same function and similar items, and it should be understood that there is no logical or chronological dependency between "first", "second", and "nth", and the number and execution order are not limited. It should also be understood that although the following description uses the terms first, second, and the like to describe various elements, these elements should not be limited by the terms.

[0023] These terms are only used to distinguish one element from another. For example, without departing from the scope of the various examples, a first action can be referred to as a second action, and similarly, a second action can be referred to as a first action. The first action and the second action can both be actions, and in some cases, can be separate and distinct actions.

[0024] Wherein, at least one refers to one or more, for example, at least one action can be one action, two actions, three actions, etc. any integer greater than or equal to one. And multiple refers to two or more, for example, multiple actions can be two actions, three actions, etc. any integer greater than or equal to two.

[0025] Figure 1 is a schematic diagram of an implementation environment according to an embodiment of the present application, which can include a terminal 101 and a server 102.

[0026] In the terminal 101, an ISP is provided, and a device for buffering image data is provided in the ISP.

[0027] For example, the terminal 101 can be a smartphone, a wearable device, a personal computer, a laptop computer, a tablet computer, a smart television, a vehicle terminal, etc. having a video encoder.

[0028] The server 102 can be a server, a server cluster composed of a plurality of servers, or a cloud processing center.

[0029] The terminal 101 is connected to the server 102 through a wired or wireless network.

[0030] In some embodiments, the wireless or wired network uses standard communication techniques and / or protocols. The network is usually the Internet, but can also be any network, including but not limited to a Local Area Network (LAN), a Metropolitan Area Network (MAN), a Wide Area Network (WAN), a mobile, wired or wireless network, a private network or any combination of virtual private networks. In some embodiments, technologies and / or formats including Hyper Text Mark-up Language (HTML), Extensible Markup Language (XML), etc. are used to represent data exchanged through the network. In addition, all or some links can be encrypted using conventional encryption technologies such as Secure Socket Layer (SSL), Transport Layer Security (TLS), Virtual Private Network (VPN), Internet Protocol Security (IPsec), etc. In other embodiments, custom and / or proprietary data communication technologies can be used instead of or in addition to the above data communication technologies.

[0031] In the related art, in the ISP chip design and the MM chip design, the data transmission between the application scenarios and the modules in the system, between the modules in the system, and between the systems will use multiple types of caches. For example, the ISP writes data to the memory (Double Date Rate, DDR) through the bus (Advanced extensible Interface, AXI), and the MM reads the data in the DDR through the AXI bus to the cache for subsequent image processing by the unit.

[0032] The design of the cache is used to meet the efficient use and storage of image data streams, and different cache designs define different cache structures and read-write methods. However, as the application scenarios of image data processing chips become more and more complex, the amount of data that needs to be cached in the chip will become larger and larger. For example, from single-channel single-camera to multi-channel multi-camera, from camera monitoring to vehicle-mounted camera unmanned driving and other application scenarios, the current cache has been unable to meet the efficiency of data caching and the utilization rate of data required by complex application scenarios.

[0033] To solve the above technical problems, an embodiment of the present application provides a device for caching image data, pre-fetching image data in an original image from a DDR, caching the pre-fetched image data, and marking the cached image data; after the image data in the cache module is hit, reading the image data from the cache module and updating the mark of the image data. The technical solution of the present application is applied to the process of processing image data, and the storage location of the image data is determined by whether the image data has a corresponding mark, so as to determine whether the required image data is directly read from the cache module or pre-fetched from the DDR. In this way, not only can the image data be cached in time, the cache efficiency of the image data is improved, but also the image data can be read from the cache module multiple times in time according to the mark, and the utilization rate of the image data is improved. In addition, the embodiment of the present application reads the image data from the cache module multiple times, reduces the bandwidth and storage load of the DDR when accessing the DDR, and reduces the delay of accessing the DDR.

[0034] Figure 2 is a structural schematic diagram of a first device 200 for caching image data provided by an embodiment of the present application. In combination with Figure 2 The structure of the device will be described in detail. The device includes a determination module 201, a cache module 202, a marking module 203, a reading module 204, and a consumption module 205.

[0035] In some examples, the determination module 201 obtains a plurality of coordinates; and calculates the image data block hit by each coordinate.

[0036] Illustratively, the determination module 201 calculates the image data block hit by each coordinate according to a preset algorithm.

[0037] It should be noted that the manner of reading the image data by the embodiments of the present application in units of image data blocks is determined by a preset algorithm, and the embodiments of the present application will not be described in detail.

[0038] In some examples, for each image data block, the determining module 201 generates a first feedback signal if the corresponding mark of the image data block is not queried in the marking module 203. The fact that the corresponding mark of the image data block is not queried in the marking module 203 indicates that the image data block is stored in the storage 300. The mark indicates the hit condition and the consumption condition of the corresponding image data block. The image data block is a part of the original image.

[0039] In some examples, the reading module 204 reads each image data block from the storage 300 in response to the first feedback signal, writes the image data block into the cache module 202, and generates a second feedback signal. The marking module 203 updates the mark of the image data block in response to the second feedback signal. The consumption module 205 reads the image data block from the cache module 202, outputs the image data block, and generates a third feedback signal. The marking module 203 refreshes the mark of the image data block in response to the third feedback signal.

[0040] Figure 3 is a structural schematic diagram of a mark according to an embodiment of the present application. In combination with Figure 3 The structure of the mark will be described in detail.

[0041] In some examples, the mark includes a dynamic value, an image position value, and a state value. The dynamic value is the difference between the hit times and the consumption times of the corresponding image data block. The image position value indicates the position of the corresponding image data block in the original image. The state value indicates whether the mark is valid.

[0042] Illustratively, when the image data block is hit, if the image data block does not exist a mark, the mark is assigned to the image data block, and the mark is updated. When the image data block is consumed or hit, that is, the hit times or the consumption times change, the dynamic value is updated or refreshed. When the image data block is hit, the hit times increase, and the value of the dynamic value increases. When the image data block is consumed, the consumption times increase, and the value of the dynamic value decreases. That is, the hit times gradually increase, so that the mark is gradually occupied, and the consumption times gradually increase, so that the mark is gradually released.

[0043] Illustratively, when the image data block is hit, the dynamic value is updated to (dynamic value + preset value). When the image data block is consumed, the dynamic value is refreshed to (dynamic value - preset value).

[0044] For example, the preset value is "1". That is, when the image data block is hit, the dynamic value is updated as (dynamic value + 1); when the image data block is consumed, the dynamic value is updated as (dynamic value - 1).

[0045] For example, when a mark is used to mark an image data block, the mark is valid, that is, the mark exists corresponding image data block; or when the mark is not used to mark any image data block, the mark is invalid, that is, the mark does not exist corresponding image data block.

[0046] For example, the state value is "1" indicating that the mark is valid, and the state value is "0" indicating that the mark is invalid. The bit width of the state value is 1 bit. The bit width of the dynamic value is 8 bits.

[0047] For example, the original image is divided into a plurality of image data blocks according to a preset algorithm, each image data block includes a plurality of pixel points, and each pixel point corresponds to a coordinate. Each image data block is provided with a serial number.

[0048] For example, the serial number of the tth image data block is t. t is an integer greater than or equal to 0.

[0049] It should be noted that the preset algorithm can be directly obtained from related technologies, and the embodiments of the present application are not limited specifically.

[0050] For example, the image position value includes a horizontal value and a vertical value. The horizontal value is the serial number of the corresponding image data block, and the vertical value is the row number of the corresponding image data block.

[0051] For example, the original image includes a plurality of rows, each row includes a plurality of image data blocks, and the row number of each image data block in the kth row is k. k is an integer greater than or equal to 0.

[0052] For example, the bit width of the horizontal value is 8 bits. The bit width of the vertical value is 10 bits.

[0053] In the embodiments of the present application, the horizontal value and the vertical value are used to represent the image position value, which greatly reduces the bit width of the image position value, saves the storage space occupied by the image position value, and thus saves the storage space occupied by the mark.

[0054] In some examples, the determination module 201 obtains a plurality of coordinate indexes, and generates a coordinate window according to the plurality of coordinate indexes. The coordinate window includes a plurality of coordinates, and the coordinates correspond to the coordinate indexes one by one.

[0055] For example, the coordinates in the same row in the coordinate window have the same vertical coordinates, and the coordinates in the same column have the same horizontal coordinates.

[0056] Exemplarily, the plurality of coordinate indexes are generated based on a preset algorithm.

[0057] Figure 4 is a structural schematic diagram of a coordinate window according to an embodiment of the present application. In combination with Figure 4 The structure of the coordinate window is described in detail.

[0058] Exemplarily, the coordinate window includes 2*2 coordinates, that is, the coordinate window includes two rows of coordinates. The first row of coordinates is (x0, y0) and (x1, y0); and the second row of coordinates is (x0, y1) and (x1, y1).

[0059] Figure 5 is a structural schematic diagram of an image data block according to an embodiment of the present application. In combination with Figure 5 The structure of the image data block is described in detail.

[0060] Exemplarily, each image data block includes 16*4 pixel points. Because each row of the image data block includes 16 pixel points, the horizontal value is also 16 pixel points aligned. Because each column of the image data block includes 4 pixel points, the vertical value is also 4 pixel points aligned.

[0061] Embodiments of the present application support a maximum bit width of 8 bits of pixel points, and can be extended. The supported original image size range is maximally 8192*8192, and can be extended.

[0062] Figure 6 is a schematic diagram of a corresponding relationship between a first coordinate window and an image data block according to an embodiment of the present application. In combination with Figure 6 The corresponding relationship between the first coordinate window and the image data block is described in detail.

[0063] In some examples, when the image data block hit by each coordinate in the coordinate window is the same, the coordinate window corresponds to one image data block.

[0064] For example, the four coordinates in the coordinate window hit one image data block, that is, the coordinate window hits one image data block.

[0065] Figure 7 is a schematic diagram of a corresponding relationship between a second coordinate window and an image data block according to an embodiment of the present application. In combination with Figure 7 The corresponding relationship between the second coordinate window and the image data block is described in detail.

[0066] In some examples, the image data block hit by each coordinate in a part of the coordinates in the coordinate window is the same, and the image data block hit by each coordinate in another part of the coordinates in the coordinate window is the same.

[0067] For example, the first row of the coordinate window hits the first image data block with two coordinates, and the second row of the coordinate window hits the ninth image data block with two coordinates, that is, the coordinate window hits two image data blocks.

[0068] Figure 8 FIG. 6 is a third diagram illustrating a correspondence between a coordinate window and image data blocks according to an embodiment of the present application. The diagram is described in combination with FIG. 1. Figure 8 The third correspondence between the coordinate window and the image data blocks is described in detail.

[0069] In some examples, different coordinates in the coordinate window hit different image data blocks.

[0070] For example, the first coordinate in the first row of the coordinate window hits the first image data block, the second coordinate in the first row of the coordinate window hits the second image data block, the first coordinate in the second row of the coordinate window hits the ninth image data block, and the second coordinate in the second row of the coordinate window hits the tenth image data block.

[0071] Figure 9 FIG. 7 is a structural diagram of a cache module 202 according to an embodiment of the present application. The diagram is described in combination with FIG. 1. Figure 9 The structure of the cache module 202 is described in detail.

[0072] In some examples, the cache module 202 includes a plurality of cache lines, and each cache line includes at least one storage address. Each storage address stores a part of an image data block.

[0073] For example, each cache line stores an image data block, and each cache line includes two storage addresses, that is, each storage address stores 1 / 2 of an image data block.

[0074] For example, each storage address stores 32×1 pixel points, and each cache line stores 64×1 pixel points, that is, each storage address stores pixel points of two adjacent rows in an image data block.

[0075] For example, the cache module 202 includes thirty-two cache lines, that is, the cache module 202 includes 64 storage addresses, and can store 2048 pixel points.

[0076] It should be noted that when calculating the image data block hit by the coordinate, the calculation is performed according to the position of the image data block in the original image, and is irrelevant to the storage position and storage manner of the image data block in the cache module 202.

[0077] Figure 10 FIG. 8 is a structural diagram of a second device for caching image data according to an embodiment of the present application. The diagram is described in combination with FIG. 1. Figure 10 The structure of the device is described in detail.

[0078] In some examples, the apparatus further comprises a control module 206.

[0079] Figure 11 is a flow diagram of a method for caching image data in a scenario where image data blocks need to be read from a DDR according to an embodiment of the present application. In combination with Figure 11 The method for caching image data is described in detail. The method for caching image data comprises the following steps S1101 to S1108.

[0080] In step S1101, the determination module 201 generates a first feedback signal for each image data block if no tag corresponding to the image data block is found in the tag module 203 and a free tag is found in the tag module 203.

[0081] For example, for each image data block, the determination module 201 queries the valid tags in the tag module 203. If no tag corresponding to the image data block is found in the tag module 203, it indicates that the image data block is stored in the memory 300, and in this case, the image data block needs to be read from the memory 300.

[0082] For example, since there is no corresponding tag for the image data block, a tag needs to be allocated for the image data block. Therefore, it is necessary to query whether there is a free tag, i.e. an invalid tag, in the tag module 203. If a free tag is found in the tag module 203, a first feedback signal is generated according to the coordinate window.

[0083] For example, all the tags involved in the embodiments of the present application are stored in the tag module 203. For example, thirty-two tags are stored in the tag module 203.

[0084] In some examples, the apparatus further comprises a coordinate module 208.

[0085] For example, since the determination module 201 is constantly receiving index coordinates, but it takes a certain amount of time to generate a coordinate window based on the index coordinates, the determination module 201 needs to cache the index coordinates that it cannot process in time in the coordinate module 208. When the determination module 201 needs to obtain index coordinates, the index coordinates are obtained from the coordinate module 208. Therefore, the coordinate module 208 provides a cache space for the determination module 201, thereby facilitating the caching of the bandwidth jitter of reading and outputting image data blocks.

[0086] In step S1102, the control module 206 generates a first reading signal in response to the first feedback signal.

[0087] In some examples, the control module 206 comprises a reading unit 2061.

[0088] Exemplarily, the reading unit 2061 generates the first reading signal in response to the first feedback signal.

[0089] In step S1103, the reading module 204 reads the image data block from the memory 300 in response to the first reading signal, writes the image data block into the cache module 202, and generates the second feedback signal.

[0090] For example, the reading module 204 is implemented based on Direct Memory Access (DMA).

[0091] For example, the memory 300 is implemented based on DDR.

[0092] In step S1104, the control module 206 generates the update signal in response to the second feedback signal.

[0093] In some examples, the control module 206 further includes an updating unit 2062.

[0094] Exemplarily, the reading unit 2061 generates the fifth feedback signal in response to the second feedback signal, and the updating unit 2062 generates the update signal in response to the fifth feedback signal.

[0095] In step S1105, the marking module 203 updates the dynamic value, the image position value and the state value of the image data block in response to the update signal.

[0096] In some examples, when there is at least one idle marker in the marking module 203, the marking module 203 allocates an idle marker to the image data block based on a polling strategy and updates the dynamic value, the image position value and the state value in the marker in response to the update signal.

[0097] Exemplarily, the dynamic value is updated to (initial value of the dynamic value + 1).

[0098] For example, the initial value of the dynamic value is “0”.

[0099] For example, the state value of the idle marker is configured from “0” to “1”.

[0100] Embodiments of the present application, since the reading module 204 does not necessarily read the image data block in time every time, in order to solve this problem, the cache module 202 and the marking module 203 enable the device to perform data reading or output for the first few times, thereby facilitating the bandwidth jitter of the cache reading data and the output data.

[0101] In step S1106, the control module 206 generates the second reading signal.

[0102] In some examples, the control module 206 generates the second reading signal according to preset instructions.

[0103] It should be noted that the device generates the preset instructions according to actual needs, and embodiments of the present application do not specifically limit the preset instructions.

[0104] In step S1107, the consumption module 205 reads the image data block from the cache module 202 in response to the second reading signal, outputs the image data block, and generates a third feedback signal.

[0105] In some examples, the consumption module 205 reads all image data blocks corresponding to one coordinate window from the cache module 202 in response to the second reading signal.

[0106] In some examples, the device further comprises a writing module 207.

[0107] For example, the control module 206 generates a third reading signal; and the writing module 207 reads the plurality of image data blocks from the consumption module 205 in response to the third reading signal, and writes the plurality of image data blocks into the memory 300.

[0108] For example, the writing module 207 is implemented based on DMA.

[0109] Embodiments of the present application, since the writing module 207 does not necessarily read the image data block in time every time, in order to solve this problem, a structure similar to the cache module 202 is also set in the writing module 207, thereby facilitating the cache reading image data block and the output image data block bandwidth jitter.

[0110] In step S1108, the marking module 203 refreshes the dynamic value of the image data block in response to the third feedback signal.

[0111] In some examples, the marking module 203 refreshes the dynamic value of the image data block to (dynamic value-1) in response to the third feedback signal.

[0112] In some other examples, for each image data block, the determination module 201 enters a waiting state if the image data block corresponding to the mark is not queried in the marking module 203, and the idle mark is not queried from the marking module 203. The marking module 203 generates a notification signal after there is an idle mark. The determination module 201 generates the first feedback signal in response to the notification signal, and then can execute the above steps S1102 to S1108.

[0113] In some examples, the number of image data blocks in the original image can be greater than the number of tags in the tag module 203, so when a tag needs to be assigned to an image data block, there can be no free tag in the tag module 203. In this case, it is necessary to wait for a released tag, that is, there is a free tag in the tag module 203.

[0114] For example, after the image data block is deleted from the cache module 202 and is overwritten by other image data blocks, the tag corresponding to the image data block is released, that is, there is a free tag in the tag module 203.

[0115] For example, after the tag is released, the image position value in the tag is changed back to (0, 0), and the dynamic value and the state value are both changed back to "0".

[0116] The embodiment of the present application calculates the next coordinate window and the image data blocks hit by the next coordinate window only after all the image data blocks in the previous coordinate window are hit, and the required image data block is already stored in the cache module 202 when the image data block needs to be output, so the embodiment of the present application will not miss any image data block corresponding to a coordinate window.

[0117] Figure 12 is a flowchart of a method for caching image data in a scenario where the image data block does not need to be read from the DDR according to an embodiment of the present application. The method for caching image data will be described in detail in combination with Figure 12 The method for caching image data will be described in detail. The method for caching image data includes the following steps S1201 to S1206.

[0118] In step S1201, for each image data block, the determination module 201 generates a first feedback signal if the tag corresponding to the image data block is found in the tag module 203 and it is determined that the dynamic value of the image data block is 0.

[0119] Wherein, the tag corresponding to the image data block found in the tag module 203 indicates that the image data block is stored in the cache module 202.

[0120] In some examples, the dynamic value is dynamically changed according to the dynamic value of the corresponding image data block and the consumption frequency. When the hit frequency is the same as the consumption frequency, that is, the image data block is hit several times and is output from the consumption module 205 several times, the dynamic value is "0", but the image data block is still stored in the cache module 202, so the state value of the tag of the image data block is still "1", that is, the tag of the image data block is still valid. In this case, the tag does not need to be reassigned to the image data block, and only the dynamic value needs to be updated.

[0121] In step S1202, the control module 206 generates an update signal in response to the first feedback signal.

[0122] Exemplarily, the reading unit 2061 generates a fourth feedback signal in response to the first feedback signal; the update unit 2062 generates the update signal in response to the fourth feedback signal.

[0123] In step S1203, the marking module 203 updates the dynamic value of the image data block in response to the update signal.

[0124] In some examples, for the same image data block, the image position value and the state value in the marking of the image data block only need to be updated once, and the image position value and the state value do not change until the marking is released after the update is completed, so only the dynamic value of the marking needs to be updated.

[0125] For example, the image position value corresponding to (0, 0) is updated to (horizontal value, vertical value) corresponding to the image data block, the state value is updated from “0” to “1”, and the dynamic value is updated to “1”; the image position value and the state value do not change until the marking is released.

[0126] In step S1204, the control module 206 generates a second reading signal.

[0127] In step S1205, the consumption module 205 reads the image data block from the cache module 202 in response to the second reading signal, outputs the image data block, and generates a third feedback signal.

[0128] In step S1206, the marking module 203 refreshes the dynamic value of the image data block in response to the third feedback signal.

[0129] In some other examples, for each image data block, the determination module 201 generates the first feedback signal if the marking corresponding to the image data block is queried in the marking module 203 and it is determined that the dynamic value of the image data block is less than the dynamic value threshold. The control module 206 generates the update signal in response to the first feedback signal. The marking module 203 updates the dynamic value of the image data block in response to the update signal, and then steps S1204 to S1206 described above can be performed.

[0130] In some other examples, for each image data block, the determining module 201 determines whether the image data block corresponds to the mark in the mark module 203, and whether the dynamic value of the image data block is equal to the dynamic value threshold, and enters the waiting state. The mark module 203 generates a notification signal after the dynamic value of the image data block is less than the dynamic value threshold. The determining module 201 generates the first feedback signal in response to the notification signal, and then can perform the above steps S1202 to S1206.

[0131] Exemplarily, the hit of the image data block and the consumption of the image data block do not occur at the same time. Generally, the image data block is consumed after being hit several times, that is, at some time, the number of hits of the image data block is not equal to the number of consumptions of the image data block, and the number of hits of the image data block is greater than the number of consumptions of the image data block, that is, the dynamic value is greater than 0. However, since the dynamic value is set with the dynamic value threshold, it cannot be increased indefinitely, so when the determining module 201 queries the mark corresponding to the image data block in the mark module 203, it also needs to determine whether the dynamic value of the image data block is less than the dynamic value threshold; if the dynamic value of the image data block is less than the dynamic value threshold, the first feedback signal is generated. If the dynamic value of the image data block is equal to the dynamic threshold, it indicates that the number of hits of the image data block has reached the upper limit, therefore, the dynamic value cannot be updated according to this hit, and needs to wait for the image data block to be consumed, that is, to wait for the dynamic value to decrease. After the image data block is consumed, the mark module 203 refreshes the dynamic value to (dynamic value-1) according to the third feedback signal, so that the dynamic value is less than the dynamic value threshold, and then the mark module 203 updates the dynamic value to (dynamic value+1) according to the update signal.

[0132] It should be noted that the device for caching image data provided in the above embodiment is only used as an example to illustrate the division of the above functional modules when performing the corresponding steps, and in actual application, the above functions can be completed by different functional modules according to needs, that is, the internal structure of the device is divided into different functional modules to complete all or part of the above described functions.

[0133] The embodiment of the application acquires a plurality of coordinates, calculates image data blocks hit by each coordinate, generates a first feedback signal if a mark corresponding to the image data block is not queried in a mark module for each image data block, indicates that the image data block is stored in a storage memory if the mark corresponding to the image data block is not queried in the mark module, reads each image data block from the storage memory, writes the image data block into a cache module, generates a second feedback signal in response to the first feedback signal, updates the mark of the image data block in response to the second feedback signal, reads the image data block from the cache module, outputs the image data block, and generates a third feedback signal. The above technical solution not only can cache the image data block in time and improve the cache efficiency of the image data block, but also can read the image data block from the cache module in time according to the mark and improve the utilization rate of the image data block.

[0134] Figure 13 is a flowchart of a method for caching image data according to an embodiment of the application. The method for caching image data is described in detail. Figure 13 The method for caching image data is described in detail. The method for caching data includes steps S1301 and S1305.

[0135] In step S1301, a plurality of coordinates are acquired, image data blocks hit by each coordinate are calculated, and a first feedback signal is generated if a mark corresponding to the image data block is not queried in a mark module for each image data block.

[0136] In the mark module, the mark corresponding to the image data block is not queried, which indicates that the image data block is stored in a storage memory. The mark indicates the hit condition and the consumption condition of the corresponding image data block. The image data block is a part of an original image.

[0137] In step S1302, each image data block is read from the storage memory in response to the first feedback signal, the image data block is written into a cache module, and a second feedback signal is generated.

[0138] In step S1303, the mark of the image data block is updated in response to the second feedback signal.

[0139] In step S1304, the image data block is read from the cache module, the image data block is output, and a third feedback signal is generated.

[0140] In step S1305, the mark of the image data block is refreshed in response to the third feedback signal.

[0141] In some embodiments, the determination module is further configured to acquire a plurality of coordinate indexes, generate a coordinate window according to the plurality of coordinate indexes, and the coordinate window includes a plurality of coordinates, and the coordinates correspond to the coordinate indexes one by one.

[0142] In some embodiments, the tag comprises a dynamic value, an image position value and a state value; the dynamic value is the difference between the hit number and the consumed number of the corresponding image data block; the image position value represents the position of the corresponding image data block in the original image; the state value represents whether the tag is valid or not; The device further comprises a control module; The determination module is further configured to, for each image data block, generate a first feedback signal if the corresponding tag of the image data block is not found in the tag module and a free tag is found in the tag module; The control module is configured to generate a first reading signal in response to the first feedback signal; The reading module is configured to read the image data block from the memory, write the image data block into the cache module and generate a second feedback signal in response to the first reading signal; The control module is further configured to generate an update signal in response to the second feedback signal; The tag module is configured to update the dynamic value, the image position value and the state value of the image data block in response to the update signal; The control module is further configured to generate a second reading signal; The consumption module is further configured to read the image data block from the cache module, output the image data block and generate a third feedback signal in response to the second reading signal; The tag module is further configured to refresh the dynamic value of the image data block in response to the third feedback signal.

[0143] In some embodiments, the determination module is further configured to, for each image data block, enter a waiting state if the corresponding tag of the image data block is not found in the tag module and no free tag is found in the tag module; The tag module is further configured to generate a notification signal after there is a free tag; The determination module is further configured to generate a first feedback signal in response to the notification signal.

[0144] In some embodiments, the determination module is further configured to, for each image data block, generate a first feedback signal if the corresponding tag of the image data block is found in the tag module and the dynamic value of the image data block is determined to be 0; the finding of the corresponding tag of the image data block in the tag module indicates that the image data block is stored in the cache module; The control module is configured to generate an update signal in response to the first feedback signal; The tag module is further configured to update the dynamic value of the image data block in response to the update signal.

[0145] In some embodiments, the determining module is further configured to, for each image data block, if the corresponding label of the image data block is found in the labeling module and the dynamic value of the image data block is determined to be less than the dynamic value threshold, generate a first feedback signal. The control module is configured to generate an update signal in response to the first feedback signal. The labeling module is further configured to update the dynamic value of the image data block in response to the update signal.

[0146] In some embodiments, the determining module is further configured to, for each image data block, if the corresponding label of the image data block is found in the labeling module and the dynamic value of the image data block is determined to be equal to the dynamic value threshold, enter a waiting state. The labeling module is further configured to generate a notification signal after the dynamic value of the image data block is less than the dynamic value threshold. The determining module is further configured to generate a first feedback signal in response to the notification signal.

[0147] In some embodiments, the apparatus further comprises a coordinate module, and the coordinate module is configured to cache coordinates.

[0148] In some embodiments, the apparatus further comprises a writing module. The control module is further configured to generate a third reading signal. The writing module is configured to read the plurality of image data blocks from the consumption module in response to the third reading signal, and write the plurality of image data blocks into the memory.

[0149] In some embodiments, the control module comprises a reading unit and an update unit. The reading unit is configured to generate a first reading signal in response to the first feedback signal. Or the reading unit is further configured to generate a fourth feedback signal in response to the first feedback signal. The update unit is further configured to generate an update signal in response to the fourth feedback signal. Or the reading unit is further configured to generate a fifth feedback signal in response to the second feedback signal. The update unit is further configured to generate an update signal in response to the fifth feedback signal.

[0150] It should be noted that the apparatus for caching image data provided in the above embodiments and the method for caching image data provided in the above embodiments belong to the same concept, and the specific implementation process is detailed in the apparatus embodiments, which will not be described here.

[0151] The embodiment of the application acquires a plurality of coordinates, calculates image data blocks hit by each coordinate, generates a first feedback signal if a mark corresponding to each image data block is not queried in a mark module, indicates that the image data block is stored in a storage, reads each image data block from the storage, writes the image data block into a cache module, generates a second feedback signal, updates the mark of the image data block, reads the image data block from the cache module, outputs the image data block, generates a third feedback signal, and refreshes the mark of the image data block. The above technical solution not only can cache the image data block in time and improve the cache efficiency of the image data block, but also can read the image data block from the cache module according to the mark in time, and improve the utilization rate of the image data block.

[0152] The embodiment of the application also provides a computer device, including a processor, a memory, and a computer program stored in the memory and configured to be executed by the processor, and the processor executes the computer program to realize the method.

[0153] Taking the computer device as a terminal as an example, Figure 14 is a structural schematic diagram of a terminal provided by the embodiment of the application, referring to Figure 14 The terminal 1400 can be a smart phone, a tablet computer, an MP3 (Moving Picture Experts Group Audio Layer III, dynamic image expert compression standard audio layer 3) player, an MP4 (Moving Picture Experts Group Audio Layer IV, dynamic image expert compression standard audio layer 4) player, a notebook computer or a desktop computer. The terminal 1400 can also be called a user equipment, a portable terminal, a laptop terminal, a desktop terminal or other names.

[0154] Generally, the terminal 1400 includes a processor 1401 and a memory 1402.

[0155] The processor 1401 can include one or more processing cores, such as a 4-core processor, a 5-core processor, and the like. The processor 1401 can be implemented in at least one of a hardware form of a DSP (Digital Signal Processing), an FPGA (Field-Programmable Gate Array), a PLA (Programmable Logic Array). The processor 1401 can also include a main processor and a coprocessor, the main processor being a processor for processing data in an awake state, also known as a CPU (Central Processing Unit), and the coprocessor being a low-power processor for processing data in a standby state. In some embodiments, the processor 1401 can be integrated with a GPU (Graphics Processing Unit) for rendering and drawing content required to be displayed by the display screen. In some embodiments, the processor 1401 can also include an AI (Artificial Intelligence) processor for processing machine learning-related computing operations.

[0156] The memory 1402 can include one or more computer-readable storage media that can be non-transitory. The memory 1402 can also include a high-speed random access memory, and a nonvolatile memory such as one or more disk storage devices, flash storage devices. In some embodiments, the non-transitory computer-readable storage medium in the memory 1402 is used to store at least one program code for being executed by the processor 1401 to implement the processes performed by the terminal in the above-described methods according to the method embodiments of the present application.

[0157] In some embodiments, the terminal 1400 can also optionally include a peripheral device interface 1403 and at least one peripheral device. The processor 1401, the memory 1402, and the peripheral device interface 1403 can be connected through a bus or a signal line. Each peripheral device can be connected to the peripheral device interface 1403 through a bus, a signal line, or a circuit board. Specifically, the peripheral device includes at least one of a display screen 1404, a camera assembly 1405, an audio circuit 1406, and a power supply 1407.

[0158] The peripheral interface 1403 can be used to connect at least one I / O (Input / Output) related peripheral device to the processor 1401 and the memory 1402. In some embodiments, the processor 1401, the memory 1402 and the peripheral interface 1403 are integrated on the same chip or circuit board; in some other embodiments, any one or two of the processor 1401, the memory 1402 and the peripheral interface 1403 can be implemented on a separate chip or circuit board, and the embodiments of the present application do not limit this.

[0159] The display screen 1404 is used to display a UI (User Interface). The UI can include graphics, text, icons, video and any combination thereof. When the display screen 1404 is a touch display screen, the display screen 1404 also has the ability to collect touch signals on or above the surface of the display screen 1404. The touch signals can be input as control signals to the processor 1401 for processing. At this time, the display screen 1404 can also be used to provide virtual buttons and / or virtual keyboards, also known as soft buttons and / or soft keyboards. In some embodiments, the display screen 1404 can be one, arranged on the front panel of the terminal 1400; in some other embodiments, the display screen 1404 can be at least two, arranged on different surfaces of the terminal 1400 or in a folding design; in some other embodiments, the display screen 1404 can be a flexible display screen, arranged on a curved surface or a folding surface of the terminal 1400. Even, the display screen 1404 can also be arranged in an irregular shape other than a rectangle, that is, a special-shaped screen. The display screen 1404 can be made of LCD (Liquid Crystal Display), OLED (Organic Light-Emitting Diode) and other materials.

[0160] The camera assembly 1405 is used to collect images or videos. In some embodiments, the camera assembly 1405 includes a front camera and a rear camera. Generally, the front camera is arranged on the front panel of the terminal, and the rear camera is arranged on the back of the terminal. In some embodiments, the rear camera is at least two, which are any one of a main camera, a depth-of-field camera, a wide-angle camera and a long-focus camera, to realize the background blur function of the main camera and the depth-of-field camera, the panoramic shooting and VR (Virtual Reality) shooting function of the main camera and the wide-angle camera, or other fusion shooting functions. In some embodiments, the camera assembly 1405 can also include a flash. The flash can be a single-color temperature flash or a dual-color temperature flash. The dual-color temperature flash is a combination of a warm light flash and a cold light flash, which can be used for light compensation under different color temperatures.

[0161] The audio circuit 1406 can include a microphone and a speaker. The microphone is used to collect sound waves of a user and an environment, and convert the sound waves into an electrical signal input to the processor 1401 for processing. The microphone can be multiple, respectively arranged at different parts of the terminal 1400, for the purpose of stereo sound collection or noise reduction. The microphone can also be an array microphone or an omnidirectional collection type microphone. The speaker is used to convert an electrical signal from the processor 1401 into a sound wave. The speaker can be a traditional diaphragm speaker, or a piezoelectric ceramic speaker. When the speaker is a piezoelectric ceramic speaker, not only can the electrical signal be converted into a sound wave audible to humans, but also can be converted into a sound wave inaudible to humans for ranging purposes. In some embodiments, the audio circuit 1406 can also include a headphone jack.

[0162] The power supply 1407 is used to supply power to various components in the terminal 1400. The power supply 1407 can be alternating current, direct current, disposable battery or rechargeable battery. When the power supply 1407 includes a rechargeable battery, the rechargeable battery can support wired charging or wireless charging. The rechargeable battery can also be used to support fast charging technology.

[0163] Those skilled in the art can understand that the structure shown in the figure does not constitute a limitation on the terminal 1400, and can include more or fewer components than the figure, or combine certain components, or use different component arrangements. Figure 14 The skilled in the art can understand that the structure shown in the figure does not constitute a limitation on the terminal 1400, and can include more or fewer components than the figure, or combine certain components, or use different component arrangements.

[0164] Taking a computer device as an example, Figure 15 Figure 15 is a structural diagram of a server provided by an embodiment of the application. The server 1500 can have great differences due to different configurations or performances, and can include one or more processors 1501 (Central Processing Units, CPU) and one or more memories 1502, wherein the one or more memories 1502 store at least one computer program, which is loaded and executed by the one or more processors 1501 to implement the above-mentioned method of caching image data. Of course, the server 1500 can also have a wired or wireless network interface, a keyboard, and an input and output interface, etc. components, so as to perform input and output. The server 1500 can also include other components for realizing the functions of the device, which are not described here.

[0165] The embodiments of the present application further provide a computer readable storage medium including a stored computer program, wherein the computer readable storage medium controls a device where the computer readable storage medium is located to perform the method as above when the computer program is running. Optionally, the computer readable storage medium can be a Read-Only Memory (ROM), a Random Access Memory (RAM), a Compact-Disc Read-Only Memory (CD-ROM), a magnetic tape, a floppy disk, an optical data storage device, etc.

[0166] Those skilled in the art can understand that all or part of the steps of the above-mentioned embodiments can be completed by hardware, or by a program instructing relevant hardware to complete, and the program can be stored in a computer readable storage medium, and the storage medium mentioned above can be a Read-Only Memory, a magnetic disk or an optical disk, etc.

[0167] The above description is only optional embodiments of the present application, and is not used to limit the present application, and any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application shall be included in the protection scope of the present application.

Claims

1. An apparatus for caching image data, the apparatus comprising: The device comprises: a determination module configured to obtain a plurality of coordinates; calculate the image data block hit by each of the coordinates; for each of the image data blocks, if the corresponding mark of the image data block is not queried in a marking module, a first feedback signal is generated; if the corresponding mark of the image data block is not queried in the marking module, it indicates that the image data block is stored in a memory; the mark represents the hit condition and the consumption condition of the corresponding image data block; the image data block is a part of an original image; a reading module configured to read each of the image data blocks from the memory in response to the first feedback signal, write the image data block into a cache module, and generate a second feedback signal; the marking module is configured to update the mark of the image data block in response to the second feedback signal; a consumption module configured to read the image data block from the cache module, output the image data block, and generate a third feedback signal; the marking module is further configured to refresh the mark of the image data block in response to the third feedback signal.

2. The apparatus of claim 1, wherein, The determination module is further configured to obtain a plurality of coordinate indexes, and generate a coordinate window according to the plurality of coordinate indexes; the coordinate window comprises a plurality of coordinates, and each of the coordinates corresponds to one of the coordinate indexes.

3. The apparatus of claim 1, wherein, The mark comprises a dynamic value, an image position value, and a state value; the dynamic value is the difference between the hit number and the consumption number of the corresponding image data block; the image position value represents the position of the corresponding image data block in the original image; and the state value represents whether the mark is valid; The device further comprises a control module; The determination module is further configured to, for each of the image data blocks, if the corresponding mark of the image data block is not queried in the marking module and a free mark is queried in the marking module, generate the first feedback signal; the control module is configured to generate the first reading signal in response to the first feedback signal; the reading module is configured to read the image data block from the memory in response to the first reading signal, write the image data block into the cache module, and generate the second feedback signal; the control module is further configured to generate an update signal in response to the second feedback signal; the marking module is configured to update the dynamic value, the image position value, and the state value of the image data block in response to the update signal; the control module is further configured to generate a second reading signal; the consumption module is further configured to read the image data block from the cache module in response to the second reading signal, output the image data block, and generate the third feedback signal; the marking module is further configured to refresh the dynamic value of the image data block in response to the third feedback signal.

4. The apparatus of claim 1, wherein, The determination module is further configured to, for each of the image data blocks, if the corresponding mark of the image data block is not queried in the marking module and a free mark is not queried in the marking module, enter a waiting state; the marking module is further configured to generate a notification signal after there is a free mark; The determination module is further configured to generate the first feedback signal in response to the notification signal.

5. The apparatus of claim 3, wherein, The determination module is further configured to generate the first feedback signal for each image data block if the corresponding mark of the image data block is found in the marking module and the dynamic value of the image data block is determined to be 0. The corresponding mark of the image data block found in the marking module indicates that the image data block is stored in the cache module. The control module is configured to generate the update signal in response to the first feedback signal. The marking module is further configured to update the dynamic value of the image data block in response to the update signal.

6. The apparatus of claim 3, wherein, The determination module is further configured to generate the first feedback signal for each image data block if the corresponding mark of the image data block is found in the marking module and the dynamic value of the image data block is determined to be less than a dynamic value threshold. The control module is configured to generate the update signal in response to the first feedback signal. The marking module is further configured to update the dynamic value of the image data block in response to the update signal.

7. The apparatus of claim 6, wherein, The determination module is further configured to enter a waiting state for each image data block if the corresponding mark of the image data block is found in the marking module and the dynamic value of the image data block is determined to be equal to the dynamic value threshold. The marking module is further configured to generate a notification signal after the dynamic value of the image data block is less than the dynamic value threshold. The determination module is further configured to generate the first feedback signal in response to the notification signal.

8. The apparatus of claim 1, wherein, The device further comprises a coordinate module, which is configured to cache the coordinates.

9. The apparatus of claim 3, wherein, The device further comprises a writing module. The control module is further configured to generate a third reading signal. The writing module is configured to read a plurality of image data blocks from the consumption module in response to the third reading signal, and write the plurality of image data blocks into the memory.

10. The apparatus of claim 3, wherein, The control module comprises a reading unit and an update unit. The reading unit is configured to generate the first reading signal in response to the first feedback signal. Or the reading unit is further configured to generate a fourth feedback signal in response to the first feedback signal. The update unit is further configured to generate the update signal in response to the fourth feedback signal. Or the reading unit is further configured to generate a fifth feedback signal in response to the second feedback signal. The update unit is further configured to generate the update signal in response to the fifth feedback signal.

11. A method of caching image data, characterized by, Comprising: Obtaining a plurality of coordinates; Calculating the image data block hit by each coordinate; Generating a first feedback signal for each image data block if the corresponding mark of the image data block is not found in the marking module. The corresponding mark of the image data block not found in the marking module indicates that the image data block is stored in the memory; the mark indicates the hit and consumption of the corresponding image data block; and the image data block is a part of an original image. reading each of the image data blocks from the memory in response to the first feedback signal, writing the image data blocks into a cache module, and generating a second feedback signal; updating the tags of the image data blocks in response to the second feedback signal; reading the image data blocks from the cache module, outputting the image data blocks, and generating a third feedback signal; refreshing the tags of the image data blocks in response to the third feedback signal.

12. A computer device, comprising: The computer device comprises a processor and a memory, the memory is used to store at least one program, the at least one program is loaded and executed by the processor to implement the method for caching image data as claimed in claim 11.

13. A computer-readable storage medium, characterized in that, The computer readable storage medium stores at least one program, the at least one program is loaded and executed by the processor to implement the method for caching image data as claimed in claim 11.

Images