Apparatus, method, device and storage medium for caching image data

Abstract

The application relates to the technical field of image processing, and provides a device, a method, equipment and a storage medium for caching image data. The device comprises a judgment module, a reading module, a marking module and a consumption module. The judgment module is used for acquiring a plurality of coordinates, and calculating image data blocks hit by each coordinate. For each image data block, if a mark corresponding to the image data block is not queried in the marking module, a first feedback signal is generated. The reading module is used for reading each image data block from a memory in response to the first feedback signal, writing the image data block into a cache module, and generating a second feedback signal. The marking module is used for updating the mark of the image data block in response to the second feedback signal. The consumption module is used for reading the image data block from the cache module, outputting the image data block, and generating a third feedback signal. The marking module is also used for refreshing the mark of the image data block in response to the third feedback signal. The technical scheme of the application improves the caching efficiency and utilization rate of image data.

Description

Technical Field

[0001] This application relates to the field of image processing technology, and in particular to an apparatus, method, device, and storage medium for caching image data. Background Technology

[0002] Currently, various types of caches are used in the design of image signal processing (ISP) chips and multimedia (MM) chips for application scenarios and data transmission between modules within a system and between systems. Cache design aims to meet the efficient utilization and storage of image data streams, and different cache designs define different cache structures and read / write methods.

[0003] However, as the application scenarios of image data processing chips become more and more complex, the amount of data that needs to be cached in the chip will become larger and larger. The current cache can no longer meet the data caching efficiency and data utilization required by complex application scenarios. Summary of the Invention

[0004] This application provides an apparatus, method, device, and storage medium for caching image data. It enables timely caching of image data in a caching module and allows for multiple readings of image data from the caching module based on tags, thereby improving the caching efficiency and utilization of image data. The technical solution is as follows:

[0005] According to a first aspect of the embodiments of this application, an apparatus for caching image data is provided, comprising:

[0006] A determination module is used to acquire multiple coordinates; calculate the image data block that is matched for each coordinate; for each image data block, if no tag corresponding to the image data block is found in the tagging module, a first feedback signal is generated; if no tag corresponding to the image data block is found in the tagging module, it indicates that the image data block is stored in the memory; the tag indicates the match status and consumption status of the corresponding image data block; the image data block is a part of the original image;

[0007] A read module is used to read each image data block from the memory in response to the first feedback signal, write the image data block to the cache module, and generate a second feedback signal;

[0008] The tagging module is used to update the tagging of the image data block in response to the second feedback signal;

[0009] The consumption module is used to read the image data block from the cache module, output the image data block, and generate a third feedback signal;

[0010] The marking module is also used to refresh the marking of the image data block in response to the third feedback signal.

[0011] In some embodiments, the determination module is further configured to obtain multiple coordinate indices and generate a coordinate window based on the multiple coordinate indices; the coordinate window includes multiple coordinates, and the coordinates correspond one-to-one with the coordinate indices.

[0012] In some embodiments, the marker includes a dynamic value, an image position value, and a state value; the dynamic value is the difference between the number of hits and the number of times the corresponding image data block is consumed; the image position value indicates the position of the corresponding image data block in the original image; and the state value indicates whether the marker is valid.

[0013] The device also includes a control module;

[0014] The determination module is further configured to generate the first feedback signal if, for each image data block, no tag corresponding to the image data block is found in the tagging module and an idle tag is found in the tagging module;

[0015] The control module is used to generate the first read signal in response to the first feedback signal;

[0016] The read module is configured to, in response to the first read signal, read the image data block from the memory, write the image data block into the cache module, and generate the second feedback signal;

[0017] The control module is further configured to generate an update signal in response to the second feedback signal;

[0018] The marking module is used to update the dynamic value, image position value, and status value of the image data block in response to the update signal.

[0019] The control module is also used to generate a second read signal;

[0020] The consumption module is further configured to, in response to the second read signal, read the image data block from the cache module, output the image data block, and generate the third feedback signal;

[0021] The marking module is also used to refresh the dynamic value of the image data block in response to the third feedback signal.

[0022] In some embodiments, the determination module is further configured to, for each image data block, enter a waiting state if no tag corresponding to the image data block is found in the tagging module and no idle tag is found in the tagging module;

[0023] The tagging module is also configured to generate a notification signal after an idle tag is found;

[0024] The determination module is further configured to generate the first feedback signal in response to the notification signal.

[0025] In some embodiments, the determination module is further configured to, for each image data block, generate the first feedback signal if the tag corresponding to the image data block is found in the tagging module and the dynamic value of the image data block is determined to be 0; finding the tag corresponding to the image data block in the tagging module indicates that the image data block is stored in the cache module.

[0026] The control module is used to generate the update signal in response to the first feedback signal;

[0027] The marking module is also configured to update the dynamic value of the image data block in response to the update signal.

[0028] In some embodiments, the determination module is further configured to generate the first feedback signal if, for each image data block, a tag corresponding to the image data block is found in the tagging module and it is determined that the dynamic value of the image data block is less than the dynamic value threshold.

[0029] The control module is used to generate the update signal in response to the first feedback signal;

[0030] The marking module is also configured to update the dynamic value of the image data block in response to the update signal.

[0031] In some embodiments, the determination module is further configured to, for each image data block, if the tag corresponding to the image data block is found in the tagging module and it is determined that the dynamic value of the image data block is equal to the dynamic value threshold, then enter a waiting state;

[0032] The marking module is also used to generate a notification signal after the dynamic value of the image data block is less than the dynamic value threshold;

[0033] The determination module is further configured to generate the first feedback signal in response to the notification signal.

[0034] In some embodiments, the apparatus further includes a coordinate module; the coordinate module is used to cache the coordinates.

[0035] In some embodiments, the apparatus further includes a write module;

[0036] The control module is also used to generate a third read signal;

[0037] The write module is configured to read multiple image data blocks from the consumption module in response to the third read signal and write the multiple image data blocks into the memory.

[0038] In some embodiments, the control module includes a reading unit and an updating unit;

[0039] The reading unit is used to generate the first reading signal in response to the first feedback signal;

[0040] Alternatively, the reading unit may also be configured to generate a fourth feedback signal in response to the first feedback signal;

[0041] The updating unit is further configured to generate the updating signal in response to the fourth feedback signal;

[0042] Alternatively, the reading unit may also be configured to generate a fifth feedback signal in response to the second feedback signal;

[0043] The update unit is further configured to generate the update signal in response to the fifth feedback signal.

[0044] According to a second aspect of the embodiments of this application, a method for caching image data is provided, comprising:

[0045] Multiple coordinates are acquired; the image data block that is matched by each coordinate is calculated; for each image data block, if no tag corresponding to the image data block is found in the tagging module, a first feedback signal is generated; if no tag corresponding to the image data block is found in the tagging module, it indicates that the image data block is stored in the memory; the tag indicates the match status and consumption status of the corresponding image data block; the image data block is a part of the original image;

[0046] In response to the first feedback signal, each image data block is read from the memory, the image data block is written to the cache module, and a second feedback signal is generated;

[0047] In response to the second feedback signal, the label of the image data block is updated;

[0048] The image data block is read from the cache module, the image data block is output, and a third feedback signal is generated;

[0049] In response to the third feedback signal, the marker of the image data block is refreshed.

[0050] According to a third aspect of the present application, a computer device is provided, the computer device including a processor and a memory, the memory being used to store at least one program, the at least one program being loaded by the processor and executed as the method for caching image data.

[0051] According to a fourth aspect of the present application, a computer-readable storage medium is provided, wherein at least one program is stored in the computer-readable storage medium, the at least one program being loaded and executed by a processor to implement the method for caching image data.

[0052] In an embodiment of this application, multiple coordinates are obtained; image data blocks corresponding to each coordinate are calculated; for each image data block, if no corresponding marker is found in the marker module, a first feedback signal is generated; the absence of a marker in the marker module indicates that the image data block is stored in memory; in response to the first feedback signal, each image data block is read from memory, written to a cache module, and a second feedback signal is generated; in response to the second feedback signal, the marker of the image data block is updated; the image data block is read from the cache module, output, and a third feedback signal is generated; in response to the third feedback signal, the marker of the image data block is refreshed. This technical solution not only caches image data blocks in a timely manner, improving caching efficiency, but also allows for multiple timely readings of image data blocks from the cache module based on markers, improving image data block utilization. Attached Figure Description

[0053] To more clearly illustrate the technical solutions in the embodiments of this application, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0054] Figure 1 This is a schematic diagram of an implementation environment provided according to an embodiment of this application;

[0055] Figure 2 This is a schematic diagram of the structure of a first type of image data caching device provided according to an embodiment of this application;

[0056] Figure 3 This is a schematic diagram of the structure of a marker according to an embodiment of this application;

[0057] Figure 4This is a schematic diagram of the structure of a coordinate window according to an embodiment of this application;

[0058] Figure 5 This is a schematic diagram of the structure of an image data block according to an embodiment of this application;

[0059] Figure 6 This is a schematic diagram illustrating the correspondence between a first type of coordinate window and an image data block according to an embodiment of this application;

[0060] Figure 7 This is a schematic diagram illustrating the correspondence between a second type of coordinate window and an image data block according to an embodiment of this application;

[0061] Figure 8 This is a schematic diagram illustrating the correspondence between a third type of coordinate window and an image data block, provided in an embodiment of this application.

[0062] Figure 9 This is a schematic diagram of the structure of a cache module according to an embodiment of this application;

[0063] Figure 10 This is a schematic diagram of the structure of a second type of image data caching device provided according to an embodiment of this application;

[0064] Figure 11 This is a flowchart illustrating a method for caching image data in a scenario where image data blocks need to be read from DDR, according to an embodiment of this application.

[0065] Figure 12 This is a flowchart illustrating a method for caching image data in a scenario where image data blocks do not need to be read from DDR, according to an embodiment of this application.

[0066] Figure 13 This is a flowchart illustrating a method for caching image data according to an embodiment of this application;

[0067] Figure 14 This is a schematic diagram of the structure of a terminal according to an embodiment of this application;

[0068] Figure 15 This is a schematic diagram of the structure of a server according to an embodiment of this application. Detailed Implementation

[0069] To make the objectives, technical solutions, and advantages of this application clearer, the embodiments of this application will be described in further detail below with reference to the accompanying drawings.

[0070] Exemplary embodiments will now be described in detail, examples of which are illustrated in the accompanying drawings. When the following description relates to the drawings, unless otherwise indicated, the same numbers in different drawings represent the same or similar elements. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with this application.

[0071] In this application, the terms "first," "second," etc., are used to distinguish identical or similar items that have essentially the same function. It should be understood that there is no logical or temporal dependency between "first," "second," and "nth," nor does it limit the quantity or execution order. It should also be understood that although the following description uses the terms "first," "second," etc., to describe various elements, these elements should not be limited by the terms.

[0072] These terms are simply used to distinguish one element from another. For example, without departing from the scope of various examples, the first action can be called the second action, and similarly, the second action can be called the first action. Both the first and second actions can be actions, and in some cases, they can be separate and distinct actions.

[0073] "At least one" refers to one or more actions. For example, at least one action can be one action, two actions, three actions, or any integer number of actions greater than or equal to one. "Multiple" refers to two or more actions. For example, multiple actions can be two actions, three actions, or any integer number of actions greater than or equal to two.

[0074] Figure 1 This is a schematic diagram of an implementation environment provided according to an embodiment of this application. The implementation environment may include a terminal 101 and a server 102.

[0075] Each terminal 101 is equipped with an ISP, which contains a device for caching image data.

[0076] For example, terminal 101 can be a smartphone with a video encoder, wearable device, personal computer, laptop computer, tablet computer, smart TV, and vehicle terminal, etc.

[0077] Server 102 can be a single server, a server cluster consisting of multiple servers, or a cloud processing center.

[0078] Terminal 101 is connected to server 102 via wired or wireless network.

[0079] In some embodiments, the wireless or wired network uses standard communication technologies and / or protocols. The network is typically the Internet, but can be any network, including but not limited to Local Area Networks (LANs), Metropolitan Area Networks (MANs), Wide Area Networks (WANs), mobile, wired or wireless networks, private networks, or any combination of virtual private networks. In some embodiments, technologies and / or formats, including Hyper Text Markup Language (HTML), Extensible Markup Language (XML), etc., are used to represent data exchanged over the network. Furthermore, conventional encryption technologies such as Secure Socket Layer (SSL), Transport Layer Security (TLS), Virtual Private Networks (VPNs), and Internet Protocol Security (IPsec) can be used to encrypt all or some links. In other embodiments, custom and / or dedicated data communication technologies may be used to replace or supplement the aforementioned data communication technologies.

[0080] In related technologies, various types of caches are used in ISP chip design and MM chip design for application scenarios and data transmission between modules within a system and between systems. For example, the ISP writes data to memory (Double Data Rate, DDR) via the Advanced Extensible Interface (AXI) bus, and the MM reads data from DDR into the cache via the AXI bus for subsequent units to perform image processing.

[0081] Caches are designed to efficiently utilize and store image data streams, and different cache designs define different cache structures and read / write methods. However, as the application scenarios of image data processing chips become increasingly complex, the amount of data that the cache in the chip needs to cache will increase significantly. For example, applications have shifted from single-channel single-camera to multi-channel multi-camera, and from video surveillance to vehicle-mounted cameras and autonomous driving. Current caches can no longer meet the efficiency requirements and data utilization of data caching for complex application scenarios.

[0082] To address the aforementioned technical problems, embodiments of this application provide an apparatus for caching image data. This apparatus prefetches image data from an original image from a DDR (DDR memory), caches the prefetched image data, and the cached image data is marked. When image data in the cache module is hit, the image data is read from the cache module, and the mark of the image data is updated. This technical solution is applied to the process of processing image data. By determining whether the image data has a corresponding mark, the storage location of the image data is determined, thereby determining whether to directly read the required image data from the cache module or prefetch the required image data from the DDR. This not only allows for timely caching of image data, improving caching efficiency, but also allows for multiple timely readings of image data from the cache module based on the mark, improving image data utilization. Furthermore, embodiments of this application, by reading image data multiple times from the cache module, reduce the bandwidth and storage load of the DDR, and lower the latency of accessing the DDR.

[0083] Figure 2 This is a schematic diagram of the structure of a first type of image data caching device 200 provided according to an embodiment of this application. (In conjunction with...) Figure 2 The structure of the device is described in detail. The device includes a determination module 201, a cache module 202, a marking module 203, a reading module 204, and a consumption module 205.

[0084] In some examples, the decision module 201 acquires multiple coordinates; and calculates the image data block that matches each coordinate.

[0085] For example, the determination module 201 calculates the image data block that matches each coordinate according to a preset algorithm.

[0086] It should be noted that the method of reading image data in units of image data blocks in the embodiments of this application is determined by a preset algorithm, and the embodiments of this application will not be described in detail.

[0087] In some examples, for each image data block, if the determination module 201 does not find the corresponding tag for the image data block in the tagging module 203, it generates a first feedback signal; if the tagging module 203 does not find the corresponding tag for the image data block, it means that the image data block is stored in the memory 300; the tag indicates the hit status and consumption status of the corresponding image data block; the image data block is a part of the original image.

[0088] In some examples, the read module 204, in response to the first feedback signal, reads each image data block from the memory 300, writes the image data block to the cache module 202, and generates a second feedback signal. The tagging module 203, in response to the second feedback signal, updates the tag of the image data block. The consumption module 205 reads the image data block from the cache module 202, outputs the image data block, and generates a third feedback signal. The tagging module 203, in response to the third feedback signal, refreshes the tag of the image data block.

[0089] Figure 3 This is a schematic diagram of a marker structure provided according to an embodiment of this application. (In conjunction with...) Figure 3 The structure of the marker is explained in detail.

[0090] In some examples, the markers include dynamic values, image location values, and status values; the dynamic value is the difference between the number of hits and the number of times the corresponding image data block is consumed; the image location value indicates the position of the corresponding image data block in the original image; and the status value indicates whether the marker is valid.

[0091] For example, when an image data block is hit, if the image data block does not have a tag, a tag is assigned to the image data block and the tag is updated; when the image data block is consumed or hit, that is, the hit count or consumption count changes, the dynamic value is updated or refreshed. Specifically, when an image data block is hit, the dynamic value increases as the hit count increases; when an image data block is consumed, the dynamic value decreases as the consumption count increases. In other words, the hit count gradually increases, causing the tag to gradually fill up, and the consumption count gradually increases, causing the tag to gradually be released.

[0092] For example, when an image data block is hit, the dynamic value is updated to (dynamic value + preset value); when the image data block is consumed, the dynamic value is refreshed to (dynamic value - preset value).

[0093] For example, the default value is "1". That is, when an image data block is hit, the dynamic value is updated to (dynamic value + 1); when an image data block is consumed, the dynamic value is updated to (dynamic value - 1).

[0094] For example, when a tag is used to tag an image data block, the tag is valid, meaning that the tag has a corresponding image data block; or when a tag is not used to tag any image data block, the tag is invalid, meaning that the tag does not have a corresponding image data block.

[0095] For example, a status value of "1" indicates that the flag is valid, and a status value of "0" indicates that the flag is invalid. The status value has a bit width of 1 bit. The dynamic value has a bit width of 8 bits.

[0096] For example, the original image is divided into multiple image data blocks according to a preset algorithm. Each image data block includes multiple pixels, and each pixel corresponds to a coordinate. Each image data block is assigned a sequence number.

[0097] For example, the index of the t-th image data block is t. t is an integer greater than or equal to 0.

[0098] It should be noted that the preset algorithm can be directly obtained from related technologies, and the embodiments of this application do not impose specific limitations.

[0099] For example, the image location value includes a horizontal value and a vertical value. The horizontal value is the sequence number of the corresponding image data block, and the vertical value is the row number of the corresponding image data block.

[0100] For example, the original image consists of multiple rows, each row containing multiple image data blocks, and the row number corresponding to each image data block in the k-th row is k. k is an integer greater than or equal to 0.

[0101] For example, the width of the horizontal value is 8 bits. The width of the vertical value is 10 bits.

[0102] In the embodiments of this application, horizontal and vertical values ​​are used to represent image position values. Compared with using pixel coordinates to represent image position values, the bit width of image position values ​​is greatly reduced, saving the storage space occupied by image position values, thereby saving the storage space occupied by markers.

[0103] In some examples, the decision module 201 obtains multiple coordinate indices and generates a coordinate window based on these indices. The coordinate window includes multiple coordinates, with each coordinate corresponding to a coordinate index.

[0104] For example, in the coordinate window, the vertical coordinates of coordinates in the same row are the same, and the horizontal coordinates of coordinates in the same column are the same.

[0105] For example, multiple coordinate indices are generated based on a preset algorithm.

[0106] Figure 4 This is a schematic diagram of a coordinate window structure according to an embodiment of this application. (Combined with...) Figure 4 The structure of the coordinate window is described in detail.

[0107] For example, the coordinate window includes 2×2 coordinates, that is, the coordinate window includes two rows of coordinates. The first row of coordinates is (x0, y0) and (x1, y0); the second row of coordinates is (x0, y1) and (x1, y1).

[0108] Figure 5 This is a schematic diagram of the structure of an image data block according to an embodiment of this application. (Combined with...) Figure 5The structure of the image data block is described in detail.

[0109] For example, each image data block includes 16 × 4 pixels. Because each row of the image data block includes 16 pixels, the horizontal values ​​are also aligned to 16 pixels. And because each column of the image data block includes 4 pixels, the vertical values ​​are also aligned to 4 pixels.

[0110] In embodiments of this application, the maximum supported pixel bit width is 8 bits, and this can be expanded. The maximum supported original image size range is 8192×8192, and this can be expanded.

[0111] Figure 6 This is a schematic diagram illustrating the correspondence between a first type of coordinate window and an image data block, provided in an embodiment of this application. Combined with... Figure 6 The correspondence between the first type of coordinate window and image data blocks is explained in detail.

[0112] In some examples, if each coordinate in a coordinate window hits the same image data block, then the coordinate window corresponds to one image data block.

[0113] For example, if four coordinates in the coordinate window hit a block of image data, then the coordinate window has hit a block of image data.

[0114] Figure 7 This is a schematic diagram illustrating the correspondence between a second type of coordinate window and an image data block, provided in an embodiment of this application. (Combined with...) Figure 7 The correspondence between the second type of coordinate window and the image data block is explained in detail.

[0115] In some examples, each coordinate in one part of the coordinate window hits the same image data block, while in another part, each coordinate hits the same image data block.

[0116] For example, two coordinates in the first row of the coordinate window hit the first image data block, and two coordinates in the second row hit the ninth image data block, meaning the coordinate window hit two image data blocks.

[0117] Figure 8 This is a schematic diagram illustrating the correspondence between a third type of coordinate window and image data blocks according to an embodiment of this application. Combined with... Figure 8 The correspondence between the third type of coordinate window and the image data block is explained in detail.

[0118] In some examples, different coordinates in the coordinate window hit different blocks of image data.

[0119] For example, the first coordinate in the first row of the coordinate window hits the first image data block, the second coordinate in the first row hits the second image data block, the first coordinate in the second row hits nine image data blocks, and the second coordinate in the second row hits the tenth image data block.

[0120] Figure 9 This is a schematic diagram of the structure of a cache module 202 according to an embodiment of this application. (Combined with...) Figure 9 The structure of cache module 202 is described in detail.

[0121] In some examples, cache module 202 includes multiple cache lines, each cache line including at least one storage address. Each storage address stores a portion of an image data block.

[0122] For example, each cache line stores one image data block, and each cache line includes two storage addresses, that is, each storage address stores 1 / 2 of an image data block.

[0123] For example, each memory address stores 32×1 pixels; each cache line stores 64×1 pixels. That is, each memory address stores the pixels of two adjacent lines in an image data block.

[0124] For example, cache module 202 includes thirty-two cache lines, which means that cache module 202 includes 64 storage addresses and can store 2048 pixels.

[0125] It should be noted that when calculating the coordinates of the image data block that is hit, the calculation is based on the position of the image data block in the original image, and is independent of the storage location and storage method of the image data block in the cache module 202.

[0126] Figure 10 This is a schematic diagram of the structure of a second type of image data caching device provided according to an embodiment of this application. (Combined with...) Figure 10 The structure of the device is described in detail.

[0127] In some examples, the device also includes a control module 206.

[0128] Figure 11 This is a flowchart illustrating a method for caching image data in a scenario requiring the reading of image data blocks from DDR, according to an embodiment of this application. (Combined with...) Figure 11 The method for caching image data is described in detail. The method for caching image data includes the following steps S1101 to S1108.

[0129] In step S1101, for each image data block, if the determination module 201 does not find a corresponding tag for the image data block in the tagging module 203, and finds an idle tag in the tagging module 203, then it generates a first feedback signal.

[0130] For example, for each image data block, the determination module 201 queries the tagging module 203 for valid tags. If no tag corresponding to the image data block is found in the tagging module 203, it indicates that the image data block is stored in the memory 300. In this case, it is necessary to read the image data block from the memory 300.

[0131] For example, since there is no corresponding marker for the image data block, a marker needs to be assigned to the image data block. Therefore, it is necessary to query whether there is an idle marker, i.e., an invalid marker, in the marker module 203. If an idle marker is found in the marker module 203, a first feedback signal is generated according to the coordinate window.

[0132] For example, the tags involved in the embodiments of this application are all stored in the tagging module 203. For example, the tagging module 203 stores thirty-two tags.

[0133] In some examples, the device also includes a coordinate module 208.

[0134] For example, since the determination module 201 continuously receives index coordinates, but generating a coordinate window based on these index coordinates takes time, the index coordinates that the determination module 201 cannot process in time need to be cached in the coordinate module 208. When the determination module 201 needs to obtain the index coordinates, it retrieves them from the coordinate module 208. Therefore, the coordinate module 208 provides a cache space for the determination module 201, which helps to buffer bandwidth jitter during the reading and output of image data blocks.

[0135] In step S1102, the control module 206 generates a first read signal in response to the first feedback signal.

[0136] In some examples, control module 206 includes reading unit 2061.

[0137] For example, the reading unit 2061 generates a first reading signal in response to a first feedback signal.

[0138] In step S1103, the read module 204 responds to the first read signal, reads the image data block from the memory 300, writes the image data block to the cache module 202, and generates the second feedback signal.

[0139] For example, the read module 204 is implemented based on Direct Memory Access (DMA).

[0140] For example, memory 300 is based on DDR.

[0141] In step S1104, the control module 206 generates an update signal in response to the second feedback signal.

[0142] In some examples, control module 206 also includes update unit 2062.

[0143] For example, the reading unit 2061 generates a fifth feedback signal in response to the second feedback signal; the updating unit 2062 generates an update signal in response to the fifth feedback signal.

[0144] In step S1105, the marking module 203 updates the dynamic value, image position value, and status value of the image data block in response to the update signal.

[0145] In some examples, when there is at least one free tag in the tagging module 203, the tagging module 203 responds to the update signal by allocating a free tag to the image data block based on a polling strategy and updating the dynamic value, image position value and status value in the tag.

[0146] For example, the dynamic value is updated to (the initial value of the dynamic value + 1).

[0147] For example, the initial value of the dynamic value is "0".

[0148] For example, the status value of the idle flag can be configured from "0" to "1".

[0149] In the embodiments of this application, since the reading module 204 may not be able to read the image data block in a timely manner every time, in order to solve this problem, the caching module 202 and the marking module 203 enable the device to perform the first few data readings or outputs, thereby facilitating the bandwidth jitter of caching read data and output data.

[0150] In step S1106, the control module 206 generates a second read signal.

[0151] In some examples, the control module 206 generates a second read signal according to a preset instruction.

[0152] It should be noted that the device generates preset instructions according to actual needs, and the embodiments of this application do not specifically limit the preset instructions.

[0153] In step S1107, the consumption module 205 responds to the second read signal, reads the image data block from the cache module 202, outputs the image data block, and generates a third feedback signal.

[0154] In some examples, the consumption module 205, in response to the second read signal, reads all the image data blocks corresponding to a coordinate window from the cache module 202.

[0155] In some examples, the device also includes a write module 207.

[0156] For example, the control module 206 generates a third read signal; in response to the third read signal, the write module 207 reads multiple image data blocks from the consumption module 205 and writes the multiple image data blocks into the memory 300.

[0157] For example, the write module 207 is implemented based on DMA.

[0158] In the embodiments of this application, since the write module 207 may not be able to read the image data block in a timely manner every time, a structure similar to the cache module 202 is also set in the write module 207 to solve this problem, thereby helping to cache the bandwidth jitter of reading and outputting image data blocks.

[0159] In step S1108, the marking module 203 responds to the third feedback signal and refreshes the dynamic value of the image data block.

[0160] In some examples, the marker module 203 responds to the third feedback signal by refreshing the dynamic value of the image data block to (dynamic value - 1).

[0161] In other examples, for each image data block, if the determination module 201 does not find a corresponding tag for the image data block in the tagging module 203, and also does not find a free tag in the tagging module 203, it enters a waiting state. The tagging module 203 generates a notification signal after a free tag is found. In response to the notification signal, the determination module 201 generates a first feedback signal, and then can execute steps S1102 to S1108 as described above.

[0162] In other examples, because the number of tags in the tagging module 203 is limited, the number of image data blocks in the original image may be greater than the number of tags. Therefore, when it is necessary to allocate tags for image data blocks, there may not be any free tags in the tagging module 203. In this case, it is necessary to wait for a released tag, that is, there is a free tag in the tagging module 203.

[0163] For example, after an image data block is deleted from the cache module 202 and then overwritten by another image data block, the tag corresponding to the image data block is released, that is, there is an empty tag in the tag module 203.

[0164] For example, after the marker is released, the image position value in the marker returns to (0, 0), and the dynamic value and state value also return to "0".

[0165] In the embodiments of this application, the next coordinate window and the image data blocks hit by the next coordinate window are calculated only after all the image data blocks are hit in the previous coordinate window. When an image data block needs to be output, the required image data block must have already been stored in the cache module 202. Therefore, in the embodiments of this application, no image data block corresponding to any coordinate window will be missed.

[0166] Figure 12 This is a flowchart illustrating a method for caching image data in a scenario where image data blocks do not need to be read from DDR, according to an embodiment of this application. Combined with... Figure 12 The method for caching image data is described in detail. The method for caching image data includes the following steps S1201 to S1206.

[0167] In step S1201, for each image data block, if the determination module 201 finds the tag corresponding to the image data block in the tagging module 203 and determines that the dynamic value of the image data block is 0, then the first feedback signal is generated.

[0168] Specifically, the tag corresponding to the image data block found in the tagging module 203 indicates that the image data block is stored in the cache module 202.

[0169] In some examples, the dynamic value changes dynamically based on the dynamic value of the corresponding image data block and the number of consumptions. When the number of hits is the same as the number of consumptions, that is, the number of times the image data block is hit corresponds to the number of times it is output from the consumption module 205, the dynamic value is "0". However, the image data block is still stored in the cache module 202, so the status value in the tag of the image data block is still "1", that is, the tag of the image data block is still valid. In this case, it is not necessary to reassign the tag to the image data block; only the dynamic value needs to be updated.

[0170] In step S1202, the control module 206 generates an update signal in response to the first feedback signal.

[0171] For example, the reading unit 2061 generates a fourth feedback signal in response to the first feedback signal; the updating unit 2062 generates an update signal in response to the fourth feedback signal.

[0172] In step S1203, the marking module 203 updates the dynamic value of the image data block in response to the update signal.

[0173] In some examples, for the same image data block, the image position value and state value in the tag of the image data block only need to be updated once. After the update is completed, the image position value and state value do not change until the tag is released. Therefore, only the dynamic value of the tag needs to be updated.

[0174] For example, the image position value (0, 0) is updated to the image data block (horizontal value, vertical value), the state value is updated from "0" to "1", and the dynamic value is updated to "1"; the image position value and the state value do not change until the tag is released.

[0175] In step S1204, the control module 206 generates a second read signal.

[0176] In step S1205, the consumption module 205 responds to the second read signal, reads the image data block from the cache module 202, outputs the image data block, and generates a third feedback signal.

[0177] In step S1206, the marking module 203 responds to the third feedback signal and refreshes the dynamic value of the image data block.

[0178] In other examples, for each image data block, if the determination module 201 finds a tag corresponding to the image data block in the tagging module 203 and determines that the dynamic value of the image data block is less than the dynamic value threshold, then it generates a first feedback signal. The control module 206 generates an update signal in response to the first feedback signal. The tagging module 203 updates the dynamic value of the image data block in response to the update signal, and then steps S1204 to S1206 can be executed.

[0179] In other examples, for each image data block, if the determination module 201 finds a tag corresponding to the image data block in the tagging module 203 and determines that the dynamic value of the image data block is equal to the dynamic value threshold, it enters a waiting state. The tagging module 203 generates a notification signal after the dynamic value of the image data block is less than the dynamic value threshold. In response to the notification signal, the determination module 201 generates a first feedback signal and can then execute steps S1202 to S1206 as described above.

[0180] For example, since the hit and consumption of image data blocks do not occur simultaneously, generally, an image data block is consumed only after being hit several times. That is, at certain times, the number of hits and consumptions of an image data block are different, and the number of hits is greater than the number of consumptions, meaning the dynamic value is greater than 0. However, since a dynamic value threshold is set for the dynamic value, it cannot increase indefinitely. Therefore, after the determination module 201 finds the tag corresponding to the image data block in the tagging module 203, it also needs to determine whether the dynamic value of the image data block is less than the dynamic value threshold. If the dynamic value of the image data block is less than the dynamic value threshold, a first feedback signal is generated. If the dynamic value of the image data block equals the dynamic threshold, it indicates that the number of hits of the image data block has reached its upper limit. Therefore, the dynamic value cannot be updated based on this hit, and it is necessary to wait for the image data block to be consumed, that is, to wait for the dynamic value to decrease. After the image data block is consumed, the marking module 203 refreshes the dynamic value to (dynamic value - 1) according to the third feedback signal, so that the dynamic value is less than the dynamic value threshold. Then the marking module 203 updates the dynamic value to (dynamic value + 1) according to the update signal.

[0181] It should be noted that the above-described embodiment of the device for caching image data is only illustrated by the division of the above-described functional modules when performing the corresponding steps. In actual applications, the above functions can be assigned to different functional modules as needed, that is, the internal structure of the device can be divided into different functional modules to complete all or part of the functions described above.

[0182] In an embodiment of this application, multiple coordinates are obtained; image data blocks corresponding to each coordinate are calculated; for each image data block, if no corresponding marker is found in the marker module, a first feedback signal is generated; the absence of a marker in the marker module indicates that the image data block is stored in memory; in response to the first feedback signal, each image data block is read from memory, written to a cache module, and a second feedback signal is generated; in response to the second feedback signal, the marker of the image data block is updated; the image data block is read from the cache module, output, and a third feedback signal is generated; in response to the third feedback signal, the marker of the image data block is refreshed. This technical solution not only caches image data blocks in a timely manner, improving caching efficiency, but also allows for multiple timely readings of image data blocks from the cache module based on markers, improving image data block utilization.

[0183] Figure 13 This is a flowchart illustrating a method for caching image data according to an embodiment of this application. (In conjunction with...) Figure 13 The method for caching image data is described in detail. The method for caching data includes steps S1301 and S1305.

[0184] In step S1301, multiple coordinates are obtained; the image data block that is matched by each coordinate is calculated; for each image data block, if no corresponding tag is found in the tagging module, a first feedback signal is generated.

[0185] In this context, a tag indicating that no image data block is found in the tagging module means that the image data block is stored in memory; the tag indicates the hit status and consumption status of the corresponding image data block; and the image data block is a part of the original image.

[0186] In step S1302, in response to the first feedback signal, each image data block is read from the memory, the image data block is written to the cache module, and a second feedback signal is generated.

[0187] In step S1303, in response to the second feedback signal, the label of the image data block is updated.

[0188] In step S1304, image data blocks are read from the cache module, output, and a third feedback signal is generated.

[0189] In step S1305, in response to the third feedback signal, the marker of the image data block is refreshed.

[0190] In some embodiments, the determination module is further configured to obtain multiple coordinate indices and generate a coordinate window based on the multiple coordinate indices; the coordinate window includes multiple coordinates, and the coordinates correspond one-to-one with the coordinate indices.

[0191] In some embodiments, the tag includes a dynamic value, an image location value, and a status value; the dynamic value is the difference between the number of hits and the number of times the corresponding image data block is consumed; the image location value indicates the position of the corresponding image data block in the original image; and the status value indicates whether the tag is valid.

[0192] The device also includes a control module;

[0193] The determination module is also used to generate a first feedback signal for each image data block if no tag corresponding to the image data block is found in the tagging module and an idle tag is found in the tagging module.

[0194] The control module is used to generate a first read signal in response to the first feedback signal;

[0195] The read module is used to read image data blocks from memory in response to the first read signal, write the image data blocks to the cache module, and generate a second feedback signal.

[0196] The control module is also used to generate an update signal in response to the second feedback signal;

[0197] The tagging module is used to update the dynamic values, image position values, and status values ​​of image data blocks in response to update signals;

[0198] The control module is also used to generate a second read signal;

[0199] The consumption module is also used to read image data blocks from the cache module, output image data blocks, and generate a third feedback signal in response to the second read signal;

[0200] The marking module is also used to refresh the dynamic values ​​of the image data block in response to a third feedback signal.

[0201] In some embodiments, the determination module is further configured to, for each image data block, enter a waiting state if no tag corresponding to the image data block is found in the tagging module and no idle tag is found in the tagging module;

[0202] The tagging module is also used to generate a notification signal after an idle tag is found;

[0203] The determination module is also used to generate a first feedback signal in response to a notification signal.

[0204] In some embodiments, the determination module is further configured to, for each image data block, generate a first feedback signal if a tag corresponding to the image data block is found in the tagging module and the dynamic value of the image data block is determined to be 0; finding a tag corresponding to the image data block in the tagging module indicates that the image data block is stored in the cache module.

[0205] The control module is used to generate an update signal in response to the first feedback signal;

[0206] The tagging module is also used to update the dynamic values ​​of image data blocks in response to update signals.

[0207] In some embodiments, the determination module is further configured to generate a first feedback signal if, for each image data block, a tag corresponding to the image data block is found in the tagging module and it is determined that the dynamic value of the image data block is less than the dynamic value threshold.

[0208] The control module is used to generate an update signal in response to the first feedback signal;

[0209] The tagging module is also used to update the dynamic values ​​of image data blocks in response to update signals.

[0210] In some embodiments, the determination module is further configured to, for each image data block, enter a waiting state if a tag corresponding to the image data block is found in the tagging module and it is determined that the dynamic value of the image data block is equal to the dynamic value threshold.

[0211] The marking module is also used to generate a notification signal after the dynamic value of an image data block is less than a dynamic value threshold;

[0212] The determination module is also used to generate a first feedback signal in response to a notification signal.

[0213] In some embodiments, the apparatus further includes a coordinate module; the coordinate module is used to cache coordinates.

[0214] In some embodiments, the apparatus further includes a write module;

[0215] The control module is also used to generate a third read signal;

[0216] The write module is used to read multiple image data blocks from the consumption module in response to a third read signal and write the multiple image data blocks into the memory.

[0217] In some embodiments, the control module includes a reading unit and an updating unit;

[0218] A reading unit is used to generate a first reading signal in response to a first feedback signal;

[0219] The reading unit is also used to generate a fourth feedback signal in response to the first feedback signal;

[0220] The update unit is also used to generate an update signal in response to the fourth feedback signal;

[0221] The reading unit is also used to generate a fifth feedback signal in response to the second feedback signal;

[0222] The update unit is also used to generate an update signal in response to the fifth feedback signal.

[0223] It should be noted that the apparatus for caching image data and the method for caching image data provided in the above embodiments belong to the same concept, and their specific implementation process can be found in the apparatus embodiments, which will not be repeated here.

[0224] In an embodiment of this application, multiple coordinates are obtained; image data blocks corresponding to each coordinate are calculated; for each image data block, if no corresponding marker is found in the marker module, a first feedback signal is generated; the absence of a marker in the marker module indicates that the image data block is stored in memory; in response to the first feedback signal, each image data block is read from memory, written to a cache module, and a second feedback signal is generated; in response to the second feedback signal, the marker of the image data block is updated; the image data block is read from the cache module, output, and a third feedback signal is generated; in response to the third feedback signal, the marker of the image data block is refreshed. This technical solution not only caches image data blocks in a timely manner, improving caching efficiency, but also allows for multiple timely readings of image data blocks from the cache module based on markers, improving image data block utilization.

[0225] An embodiment of this application also provides a computer device, including a processor, a memory, and a computer program stored in the memory and configured to be executed by the processor, wherein the processor executes the computer program to implement the method described above.

[0226] Taking computer devices as terminals as an example, Figure 14 This is a schematic diagram of the structure of a terminal provided in an embodiment of this application. See also... Figure 14 Terminal 1400 can be: a smartphone, tablet computer, MP3 player (Moving Picture Experts Group Audio Layer III), MP4 player (Moving Picture Experts Group Audio Layer IV), laptop computer, or desktop computer. Terminal 1400 may also be referred to as user equipment, portable terminal, laptop terminal, desktop terminal, or other names.

[0227] Typically, terminal 1400 includes a processor 1401 and a memory 1402.

[0228] Processor 1401 may include one or more processing cores, such as a quad-core processor, a penta-core processor, etc. Processor 1401 may be implemented using at least one hardware form selected from DSP (Digital Signal Processing), FPGA (Field-Programmable Gate Array), and PLA (Programmable Logic Array). Processor 1401 may also include a main processor and a coprocessor. The main processor, also known as a CPU (Central Processing Unit), is used to process data in the wake-up state; the coprocessor is a low-power processor used to process data in the standby state. In some embodiments, processor 1401 may integrate a GPU (Graphics Processing Unit), which is responsible for rendering and drawing the content required to be displayed on the screen. In some embodiments, processor 1401 may also include an AI (Artificial Intelligence) processor, which is used to handle computational operations related to machine learning.

[0229] The memory 1402 may include one or more computer-readable storage media, which may be non-transitory. The memory 1402 may also include high-speed random access memory and non-volatile memory, such as one or more disk storage devices or flash memory devices. In some embodiments, the non-transitory computer-readable storage media in the memory 1402 are used to store at least one program code, which is executed by the processor 1401 to implement the process of terminal execution in the method embodiments of this application.

[0230] In some embodiments, the terminal 1400 may optionally include a peripheral device interface 1403 and at least one peripheral device. The processor 1401, memory 1402, and peripheral device interface 1403 can be connected via a bus or signal line. Each peripheral device can be connected to the peripheral device interface 1403 via a bus, signal line, or circuit board. Specifically, the peripheral device includes at least one of a display screen 1404, a camera assembly 1405, an audio circuit 1406, and a power supply 1407.

[0231] Peripheral device interface 1403 can be used to connect at least one I / O (Input / Output) related peripheral device to processor 1401 and memory 1402. In some embodiments, processor 1401, memory 1402 and peripheral device interface 1403 are integrated on the same chip or circuit board; in some other embodiments, any one or two of processor 1401, memory 1402 and peripheral device interface 1403 can be implemented on separate chips or circuit boards, and this application embodiment is not limited in this respect.

[0232] Display screen 1404 is used to display a UI (User Interface). This UI may include graphics, text, icons, videos, and any combination thereof. When display screen 1404 is a touch display screen, it also has the ability to collect touch signals on or above its surface. These touch signals can be input as control signals to processor 1401 for processing. In this case, display screen 1404 can also be used to provide virtual buttons and / or a virtual keyboard, also known as soft buttons and / or a soft keyboard. In some embodiments, there may be one display screen 1404, disposed on the front panel of terminal 1400; in other embodiments, there may be at least two display screens, disposed on different surfaces of terminal 1400 or in a folded design; in still other embodiments, display screen 1404 may be a flexible display screen, disposed on a curved or folded surface of terminal 1400. Furthermore, display screen 1404 may be configured as a non-rectangular, irregular shape, i.e., a non-rectangular screen. The display screen 1404 can be made of materials such as LCD (Liquid Crystal Display) and OLED (Organic Light-Emitting Diode).

[0233] The camera assembly 1405 is used to acquire images or videos. In some embodiments, the camera assembly 1405 includes a front-facing camera and a rear-facing camera. Typically, the front-facing camera is located on the front panel of the terminal, and the rear-facing camera is located on the back of the terminal. In some embodiments, there are at least two rear-facing cameras, which are any one of a main camera, a depth-sensing camera, a wide-angle camera, and a telephoto camera, to achieve background blurring by fusion of the main camera and the depth-sensing camera, panoramic shooting by fusion of the main camera and the wide-angle camera, VR (Virtual Reality) shooting, or other fusion shooting functions. In some embodiments, the camera assembly 1405 may also include a flash. The flash can be a single-color temperature flash or a dual-color temperature flash. A dual-color temperature flash refers to a combination of a warm-light flash and a cool-light flash, which can be used for light compensation at different color temperatures.

[0234] The audio circuit 1406 may include a microphone and a speaker. The microphone is used to collect sound waves from the user and the environment, and convert the sound waves into electrical signals which are then input to the processor 1401 for processing. For stereo sound acquisition or noise reduction purposes, multiple microphones may be used, each positioned at a different location on the terminal 1400. The microphone may also be an array microphone or an omnidirectional microphone. The speaker is used to convert the electrical signals from the processor 1401 into sound waves. The speaker may be a conventional diaphragm speaker or a piezoelectric ceramic speaker. When the speaker is a piezoelectric ceramic speaker, it can convert electrical signals not only into audible sound waves but also into inaudible sound waves for purposes such as distance measurement. In some embodiments, the audio circuit 1406 may also include a headphone jack.

[0235] Power supply 1407 is used to power the various components in terminal 1400. Power supply 1407 can be AC ​​power, DC power, a disposable battery, or a rechargeable battery. When power supply 1407 includes a rechargeable battery, the rechargeable battery can support wired or wireless charging. The rechargeable battery can also be used to support fast charging technology.

[0236] Those skilled in the art will understand that Figure 14 The structure shown does not constitute a limitation on terminal 1400 and may include more or fewer components than shown, or combine certain components, or use different component arrangements.

[0237] Taking computer equipment as a server as an example, Figure 15 This is a schematic diagram of a server structure provided in an embodiment of this application. The server 1500 can vary significantly due to different configurations or performance. It may include one or more processors 1501 (Central Processing Units, CPUs) and one or more memories 1502. The one or more memories 1502 store at least one computer program, which is loaded and executed by the one or more processors 1501 to implement the aforementioned method of caching image data. Of course, the server 1500 may also have wired or wireless network interfaces, a keyboard, and input / output interfaces for input and output. The server 1500 may also include other components for implementing device functions, which will not be elaborated upon here.

[0238] Embodiments of this application also provide a computer-readable storage medium, which includes a stored computer program, wherein the computer program, when running, controls the device where the computer-readable storage medium is located to perform the method described above. Optionally, the computer-readable storage medium may be read-only memory (ROM), random access memory (RAM), compact-disc read-only memory (CD-ROM), magnetic tape, floppy disk, and optical data storage device, etc.

[0239] Those skilled in the art will understand that all or part of the steps of the above embodiments can be implemented by hardware or by a program instructing related hardware. The program can be stored in a computer-readable storage medium, such as a read-only memory, a disk, or an optical disk.

[0240] The above description is merely an optional embodiment of this application and is not intended to limit this application. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this application should be included within the protection scope of this application.

Claims

1. An apparatus for caching image data, the apparatus comprising: The device comprises: a determination module, configured to acquire a plurality of coordinates, and calculate image data blocks hit by each of the coordinates; for each of the image data blocks, if a mark corresponding to the image data block is not queried in a mark module, a first feedback signal is generated; the fact that the mark corresponding to the image data block is not queried in the mark module indicates that the image data block is stored in a storage; the mark indicates a hit condition and a consumption condition of the corresponding image data block; and the image data block is a part of an original image; a reading module, configured to read each of the image data blocks from the storage in response to the first feedback signal, write the image data blocks into a cache module, and generate a second feedback signal; the mark module, configured to update the mark of the image data block in response to the second feedback signal; a consumption module, configured to read the image data blocks from the cache module, output the image data blocks, and generate a third feedback signal; the mark module, further configured to refresh the mark of the image data block in response to the third feedback signal.

2. The apparatus of claim 1, wherein, The determination module is further configured to acquire a plurality of coordinate indexes, and generate a coordinate window according to the plurality of coordinate indexes; the coordinate window comprises a plurality of the coordinates, and the coordinates correspond to the coordinate indexes one by one.

3. The apparatus of claim 1, wherein, The mark comprises a dynamic value, an image position value and a state value; the dynamic value is a difference between a hit frequency and a consumption frequency of the corresponding image data block; the image position value indicates a position of the corresponding image data block in the original image; and the state value indicates whether the mark is valid; the device further comprises a control module; The determination module is further configured to, for each of the image data blocks, if the mark corresponding to the image data block is not queried in the mark module and a free mark is queried in the mark module, generate the first feedback signal; the control module is configured to generate a first reading signal in response to the first feedback signal; the reading module is configured to read the image data blocks from the storage in response to the first reading signal, write the image data blocks into the cache module, and generate the second feedback signal; the control module is further configured to generate an update signal in response to the second feedback signal; the mark module is configured to update the dynamic value, the image position value and the state value of the image data block in response to the update signal; the control module is further configured to generate a second reading signal; the consumption module is further configured to read the image data blocks from the cache module in response to the second reading signal, output the image data blocks, and generate the third feedback signal; the mark module is further configured to refresh the dynamic value of the image data block in response to the third feedback signal.

4. The apparatus of claim 1, wherein, The determination module is further configured to, for each of the image data blocks, if the mark corresponding to the image data block is not queried in the mark module and a free mark is not queried in the mark module, enter a waiting state; the mark module is further configured to generate a notification signal after there is a free mark; and the control module is further configured to generate a second reading signal in response to the notification signal. The determination module is further configured to generate the first feedback signal in response to the notification signal.

5. The apparatus of claim 3, wherein, The determination module is further configured to generate the first feedback signal for each image data block if the corresponding mark of the image data block is found in the marking module and the dynamic value of the image data block is determined to be 0. The corresponding mark of the image data block found in the marking module indicates that the image data block is stored in the cache module. The control module is configured to generate the update signal in response to the first feedback signal. The marking module is further configured to update the dynamic value of the image data block in response to the update signal.

6. The apparatus of claim 3, wherein, The determination module is further configured to generate the first feedback signal for each image data block if the corresponding mark of the image data block is found in the marking module and the dynamic value of the image data block is determined to be less than a dynamic value threshold. The control module is configured to generate the update signal in response to the first feedback signal. The marking module is further configured to update the dynamic value of the image data block in response to the update signal.

7. The apparatus of claim 6, wherein, The determination module is further configured to enter a waiting state for each image data block if the corresponding mark of the image data block is found in the marking module and the dynamic value of the image data block is determined to be equal to the dynamic value threshold. The marking module is further configured to generate a notification signal after the dynamic value of the image data block is less than the dynamic value threshold. The determination module is further configured to generate the first feedback signal in response to the notification signal.

8. The apparatus of claim 1, wherein, The device further comprises a coordinate module, which is configured to cache the coordinates.

9. The apparatus of claim 3, wherein, The device further comprises a writing module. The control module is further configured to generate a third reading signal. The writing module is configured to read a plurality of image data blocks from the consumption module in response to the third reading signal, and write the plurality of image data blocks into the memory.

10. The apparatus of claim 3, wherein, The control module comprises a reading unit and an update unit. The reading unit is configured to generate the first reading signal in response to the first feedback signal. Or the reading unit is further configured to generate a fourth feedback signal in response to the first feedback signal. The update unit is further configured to generate the update signal in response to the fourth feedback signal. Or the reading unit is further configured to generate a fifth feedback signal in response to the second feedback signal. The update unit is further configured to generate the update signal in response to the fifth feedback signal.

11. A method of caching image data, characterized by, Comprising: Obtaining a plurality of coordinates; Calculating the image data block hit by each coordinate; For each image data block, if the corresponding mark of the image data block is not found in the marking module, a first feedback signal is generated. The corresponding mark of the image data block not found in the marking module indicates that the image data block is stored in the memory; the mark indicates the hit situation and the consumption situation of the corresponding image data block; the image data block is a part of an original image; reading each of the image data blocks from the memory in response to the first feedback signal, writing the image data blocks into a cache module, and generating a second feedback signal; updating the tags of the image data blocks in response to the second feedback signal; reading the image data blocks from the cache module, outputting the image data blocks, and generating a third feedback signal; refreshing the tags of the image data blocks in response to the third feedback signal.

12. A computer device, comprising: The computer device comprises a processor and a memory, the memory is used to store at least one program, the at least one program is loaded and executed by the processor to implement the method for caching image data as claimed in claim 11.

13. A computer-readable storage medium, characterized in that, The computer readable storage medium stores at least one program, the at least one program is loaded and executed by the processor to implement the method for caching image data as claimed in claim 11.

Images