Voltage feed-forward control method and device for improving PFC weak power grid adaptability

Abstract

The invention discloses a voltage feed-forward control method and device for improving PFC weak power grid adaptability. The method comprises the steps that power grid sampling voltage of a power grid connected to a PFC control circuit and output voltage of the PFC control circuit are acquired; performing harmonic decomposition on the power grid sampling voltage to obtain fundamental waves and low-order harmonics; performing voltage reconstruction on the fundamental wave and the low-order harmonic wave based on a preset voltage reconstruction strategy to obtain a reconstructed power grid voltage; and determining a current voltage feed-forward control coefficient based on a difference value between the power grid sampling voltage and the reconstructed power grid voltage, and taking the current voltage feed-forward control coefficient as a feed-forward quantity of a duty ratio output by a target control loop. According to the embodiment of the invention, feedforward control is carried out on the power grid voltage in a mode of reconstructing the input voltage accessed to the power grid, so that the adaptability of PFC to a weak power grid is improved, and the background harmonic suppression effect is maintained.

Description

[0001] This application claims priority to Chinese Patent Application No. CN202411632166.5, filed on November 15, 2024, entitled "Voltage Feedforward Control Method and Apparatus for Improving the Adaptability of PFC in Weak Grids", the entire contents of which are incorporated herein by reference. Technical Field

[0002] This invention relates to the field of PFC control technology, and in particular to a voltage feedforward control method and apparatus for improving the adaptability of PFC to weak power grids. Background Technology

[0003] To improve the dynamic performance of PFC (Power Factor Correction) and reduce the impact of grid fluctuations and background harmonics, grid voltage feedforward control is often incorporated into PFC control. However, the addition of grid voltage feedforward reduces the system's stability margin, potentially leading to positive feedback oscillations in weak grid environments and reducing the system's adaptability to such conditions. Conventional solutions typically involve filtering the grid voltage or optimizing the loop bandwidth. However, these measures also reduce the system's dynamic performance and its effectiveness in suppressing background harmonics. Summary of the Invention

[0004] This invention provides a voltage feedforward control method and apparatus to improve the adaptability of PFC in weak grids. It aims to solve the problem that in the prior art, in order to reduce the impact of grid fluctuations and background harmonics, grid voltage feedforward control is added, and the grid voltage is filtered or the loop bandwidth is reduced for optimization, but this also leads to a reduction in the dynamic performance of the system and the effect of background harmonic suppression.

[0005] In a first aspect, embodiments of the present invention provide a voltage feedforward control method for improving the adaptability of PFC in weak grid environments, comprising:

[0006] Obtain the grid sampling voltage connected to the PFC control circuit and the output voltage of the PFC control circuit;

[0007] Harmonic decomposition is performed on the sampled voltage of the power grid to obtain the fundamental frequency and lower harmonics;

[0008] The fundamental wave and the lower harmonics are reconstructed based on a preset voltage reconstruction strategy to obtain the reconstructed grid voltage. The voltage reconstruction strategy is used to dynamically change the voltage reconstruction coefficient based on the content of the higher harmonics of the current, and to determine the reconstructed grid voltage by combining the grid sampling voltage, the signal of the fundamental wave and the signal of the lower harmonics.

[0009] Based on the difference between the output voltage and the reconstructed grid voltage, the current voltage feedforward control coefficient is determined, and the current voltage feedforward control coefficient is used as the feedforward amount of the duty cycle output by the target control loop.

[0010] Secondly, embodiments of the present invention also provide a voltage feedforward control device for improving the adaptability of PFC in weak grid environments, comprising:

[0011] The grid voltage sampling unit is used to acquire the grid sampling voltage of the grid connected to the PFC control circuit, and the output voltage of the PFC control circuit.

[0012] The harmonic decomposition unit is used to perform harmonic decomposition on the sampled voltage of the power grid to obtain the fundamental wave and lower harmonics.

[0013] A voltage reconstruction unit is used to reconstruct the fundamental wave and the lower harmonics based on a preset voltage reconstruction strategy to obtain a reconstructed grid voltage. The voltage reconstruction strategy is used to dynamically change the voltage reconstruction coefficient based on the content of the higher harmonics of the current, and to determine the reconstructed grid voltage by combining the grid sampling voltage, the signal of the fundamental wave, and the signal of the lower harmonics.

[0014] The feedforward control coefficient acquisition unit is used to determine the current voltage feedforward control coefficient based on the difference between the output voltage and the reconstructed grid voltage, and to use the current voltage feedforward control coefficient as the feedforward amount of the duty cycle output by the target control loop.

[0015] Thirdly, embodiments of the present invention also provide a computer device, which includes a memory and a processor, wherein the memory stores a computer program, and the processor executes the computer program to implement the method described in the first aspect above.

[0016] Fourthly, embodiments of the present invention also provide a computer-readable storage medium storing a computer program, the computer program including program instructions that, when executed by a processor, can implement the method described in the first aspect above.

[0017] This invention provides a voltage feedforward control method and apparatus to improve the adaptability of PFC (Power Factor Control) to weak power grids. The method includes: acquiring the grid sampling voltage of the power grid connected to the PFC control circuit and the output voltage of the PFC control circuit; performing harmonic decomposition on the grid sampling voltage to obtain the fundamental frequency and lower harmonics; reconstructing the fundamental frequency and lower harmonics based on a preset voltage reconstruction strategy to obtain a reconstructed grid voltage; determining the current voltage feedforward control coefficient based on the difference between the grid sampling voltage and the reconstructed grid voltage, and using the current voltage feedforward control coefficient as the feedforward amount of the duty cycle output by the target control loop. This invention improves the adaptability of PFC to weak power grids and maintains the background harmonic suppression effect by reconstructing the input voltage of the connected power grid. Attached Figure Description

[0018] To more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings used in the following description of the embodiments will be briefly introduced. Obviously, the drawings described below are some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0019] Figure 1 A flowchart illustrating the voltage feedforward control method for improving the adaptability of PFC in weak grids provided in this embodiment of the invention.

[0020] Figure 2 A circuit diagram of the PFC control circuit used in the voltage feedforward control method for improving the adaptability of PFC in weak grids provided in the embodiments of the present invention;

[0021] Figure 3 A schematic diagram illustrating the process of obtaining the higher harmonic content of current in the voltage feedforward control method for improving the adaptability of PFC in weak grids provided in this embodiment of the invention;

[0022] Figure 4 A schematic diagram of a sub-process of a voltage feedforward control method for improving the adaptability of PFC in weak grids, provided in an embodiment of the present invention;

[0023] Figure 5 A schematic diagram of a sub-process of a voltage feedforward control method for improving the adaptability of PFC in weak grids, provided in an embodiment of the present invention;

[0024] Figure 6 A schematic block diagram of a voltage feedforward control device for improving the adaptability of PFC in weak grids, provided in an embodiment of the present invention;

[0025] Figure 7 A schematic block diagram of a computer device provided for an embodiment of the present invention. Detailed Implementation

[0026] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0027] It should be understood that, when used in this specification and the appended claims, the terms "comprising" and "including" indicate the presence of the described features, integrals, steps, operations, elements and / or components, but do not exclude the presence or addition of one or more other features, integrals, steps, operations, elements, components and / or collections thereof.

[0028] It should also be understood that the terminology used in this specification is for the purpose of describing particular embodiments only and is not intended to limit the invention. As used in this specification and the appended claims, the singular forms “a,” “an,” and “the” are intended to include the plural forms unless the context clearly indicates otherwise.

[0029] It should also be further understood that the term "and / or" as used in this specification and the appended claims refers to any combination of one or more of the associated listed items and all possible combinations, and includes such combinations.

[0030] Please see Figure 1 This is a schematic flowchart of a voltage feedforward control method for improving the adaptability of PFC in weak grids, provided in an embodiment of the present invention. Figure 1 As shown, the voltage feedforward control method for improving the adaptability of PFC in weak grids includes steps S110 to S140.

[0031] S110. Obtain the grid sampling voltage of the power grid connected to the PFC control circuit, and the output voltage of the PFC control circuit.

[0032] In this embodiment, the voltage feedforward control method for improving the adaptability of PFC to weak grids is applied to the PFC control circuit, and the specific circuit of the PFC control circuit is as follows: Figure 2 As shown. The PFC control circuit specifically includes an inductor L1, a switching transistor Q1, five diodes (specifically labeled D1, D2, D3, D4, and D5), a capacitor C1, and a load resistor RL, all configured according to a preset connection method. More specifically, the cathode of the second diode D2 is connected to the anode of the first diode D1, and also to a power source (e.g., the mains grid, with an input voltage of u). g The positive terminal of the first diode D1 is connected to the positive terminal of the third diode D3, and also to the negative terminal of the power supply; the negative terminal of the third diode D3 is connected to the first terminal of the inductor L1; the second terminal of the inductor L1 is connected to the drain of the switching transistor Q1 (specifically a metal-oxide-semiconductor field-effect transistor or an insulated-gate bipolar transistor), and also to the positive terminal of the fifth diode D5; the source of the switching transistor Q1 is connected to the positive terminals of both the second diode D2 and the fourth diode D4; the negative terminal of the fifth diode D5 is connected to the first terminal of the capacitor C1, and also to the first terminal of the load resistor RL; the second terminal of the capacitor C1 is connected to the source of the switching transistor Q1; the second terminal of the load resistor RL is connected to the source of the switching transistor Q1.

[0033] The grid sampling voltage obtained by the PFC control circuit is the input voltage u in the example above. g Furthermore, the output voltage of the PFC control circuit is the same as the output voltage u across the load resistor RL. o The obtained input voltage u g and output voltage u o It can be used for subsequent voltage feedforward control.

[0034] Of course, in specific implementation, a preset sampling period for obtaining the grid sampling voltage of the PFC control circuit can be set. After each sampling period, step S110 is restarted and voltage feedforward control is performed within this sampling period.

[0035] S120. Perform harmonic decomposition on the sampled voltage of the power grid to obtain the fundamental frequency and lower harmonics.

[0036] In this embodiment, harmonic decomposition is performed on the sampled voltage of the power grid to understand the power quality of the grid and potential problems. The fundamental frequency (FW) refers to the sinusoidal component with the longest period of a complex periodic oscillation. The frequency corresponding to this period is called the fundamental frequency, which represents the standard frequency of the power grid, such as 50Hz. Harmonics, on the other hand, are the components greater than integer multiples of the fundamental frequency obtained by performing Fourier series decomposition on the periodic non-sinusoidal alternating current corresponding to the sampled voltage. In other words, harmonics are formed by increasing the frequency of the fundamental frequency. For example, if the fundamental frequency is 50Hz, the second harmonic is 100Hz (twice the fundamental frequency), the third harmonic is 150Hz (three times the fundamental frequency), and so on. Therefore, by performing harmonic decomposition on the sampled voltage of the power grid, the fundamental frequency and lower harmonics can be accurately obtained.

[0037] In one embodiment, such as Figure 4 As shown, step S120 includes:

[0038] S121. Input the grid sampling voltage to the phase-locked loop to obtain the phase-locked loop output signal;

[0039] S122. Perform a Fourier transform on the output signal of the phase-locked loop to obtain the fundamental frequency and each harmonic;

[0040] S123. Based on preset low-order harmonic frequency data, obtain the low-order harmonics from each harmonic.

[0041] In this embodiment, the sampling voltage of the power grid, the fundamental frequency, and each harmonic are obtained by sequentially processing the data through a phase-locked loop (PLL) and performing a Fourier transform to obtain the fundamental frequency and each harmonic. The PLL is a negative feedback control system that uses voltage generated by phase synchronization to tune a voltage-controlled oscillator (VCO) to generate a target frequency. The voltage u of the power grid is obtained through the PLL. g By processing, a phase-locked loop output signal that is easy to extract can be obtained.

[0042] When performing a Fourier transform on the phase-locked loop (PLL) output signal, the time-domain signal can be converted to a frequency-domain signal, and the fundamental frequency and all harmonics can be accurately obtained in the frequency domain. Since subsequent voltage reconstruction does not require many harmonics, it is also necessary to obtain the low-order harmonics from each harmonic based on the low-order harmonic frequency data, thereby retaining the required low-order harmonics.

[0043] In one embodiment, step S121 includes:

[0044] The grid sampling voltage is input to the phase-locked loop (PLL) for phase detection, low-pass filtering, and voltage-controlled oscillator (VCO) control processing, resulting in a PLL output signal whose frequency is an integer multiple of the grid sampling voltage frequency.

[0045] In this embodiment, the main process of processing the grid sampling voltage through a phase-locked loop is as follows:

[0046] 1) Phase detection, which involves comparing the grid voltage with a standard reference signal generated by a voltage-controlled oscillator within the phase-locked loop through frequency division using a phase detector, to obtain the phase difference comparison result; wherein, the phase difference comparison result is either a positive error voltage or a negative error voltage;

[0047] 2) Low-pass filtering, that is, filtering out high-frequency noise and clutter in the phase difference comparison result (which can also be understood as error voltage) output after phase detection by a low-pass filter, so that the low-frequency or DC components in the phase difference comparison result can pass through. The phase-locked loop improves the stability and anti-interference ability of the system and reduces signal distortion.

[0048] 3) Voltage-controlled oscillator (VCO) control processing: The low-frequency component and DC component output from the low-pass filter are input to the VCO for processing. For example, taking the processing of the DC component as an example, when the DC component is output to the VCO, the output frequency of the VCO will change with the change of the DC component. Specifically, the larger the DC component, the higher the output frequency of the VCO, and vice versa. This adjustment makes the output frequency of the VCO related to the phase difference of the low-pass filter output signal. Moreover, part of the output signal of the VCO is fed back to the phase detector, and continuously compared and adjusted with the grid sampling voltage input to the phase detector until the phase difference reaches a stable value (such as zero or a minimum value infinitely close to zero).

[0049] Through the above processing method, the phase-locked loop achieves the locking of the input signal, namely the grid sampling voltage, and when the output reaches a stable state, the output signal and the input signal have a fixed phase relationship.

[0050] In one embodiment, step S123 includes:

[0051] Obtain the frequency multiples included in the low-order harmonic frequency data; wherein, the frequency multiples are odd numbers, and 1 ≤ frequency multiple ≤ 13;

[0052] The low-order harmonics are obtained from each harmonic based on the frequency multiples included in the low-order harmonic frequency data.

[0053] In this embodiment, when acquiring the lower harmonics from each harmonic, the frequency data of the lower harmonics can be specified in advance, including several odd-numbered frequency multiples (these frequency multiples represent the multiple of the harmonic frequency to the fundamental frequency), and their value range can be specifically defined. Once the frequency multiples included in the lower harmonic frequency data are known, the harmonics with the corresponding frequency multiples can be extracted from each harmonic based on these frequency multiples, thereby quickly obtaining the lower harmonics.

[0054] In one embodiment, the frequency multiples included in the low-order harmonic frequency data include 3, 5, 7, 9, 11, and 13.

[0055] In this embodiment, if the low-order harmonics include a large number of harmonics with higher frequency multiples, it will have a greater impact on the subsequent voltage reconstruction. In this case, the frequency multiples included in the low-order harmonic frequency data can be set to include 3, 5, 7, 9, 11 and 13. The low-order harmonics are composed of the above 6 harmonics and participate in the subsequent signal synthesis.

[0056] Specifically, if the fundamental frequency of the fundamental wave is 50Hz, the lower harmonics include the third harmonic at 150Hz (three times the fundamental frequency), the fifth harmonic at 250Hz (five times the fundamental frequency), the seventh harmonic at 450Hz (seven times the fundamental frequency), the ninth harmonic at 450Hz (nine times the fundamental frequency), the eleventh harmonic at 550Hz (eleven times the fundamental frequency), and the thirteenth harmonic at 650Hz (thirteen times the fundamental frequency).

[0057] S130. Based on a preset voltage reconstruction strategy, the fundamental wave and the lower harmonics are reconstructed to obtain the reconstructed grid voltage.

[0058] The voltage reconstruction strategy is used to dynamically change the voltage reconstruction coefficient based on the high harmonic content of the current, and to determine the reconstructed grid voltage by combining the grid sampling voltage, the fundamental signal and the low harmonic signal.

[0059] In this embodiment, after determining the fundamental and lower harmonics corresponding to the grid sampling voltage, the fundamental and lower harmonics can be reconstructed to obtain the reconstructed grid voltage. For example, the preset voltage reconstruction strategy is to superimpose and sum the fundamental and lower harmonics, which can quickly obtain the reconstructed grid voltage for subsequent voltage feedforward control. Furthermore, because higher harmonics are filtered out, the adaptability of PFC to weak grids is improved, while maintaining the background harmonic suppression effect.

[0060] In one embodiment, step S130 includes:

[0061] Obtain the signal synthesis model corresponding to the voltage reconstruction strategy, and synthesize the fundamental wave and the low-order harmonics based on the signal synthesis model to obtain the initial reconstructed grid voltage.

[0062] A dynamic reconfiguration adjustment model corresponding to the voltage reconfiguration strategy is obtained, and the initial reconfigured grid voltage and the grid sampling voltage are dynamically adjusted based on the dynamic reconfiguration adjustment model to obtain the reconfigured grid voltage; wherein, the formula corresponding to the dynamic reconfiguration adjustment model is: reconfigured grid voltage = voltage reconfiguration coefficient × initial reconfigured grid voltage + (1 - voltage reconfiguration coefficient) × grid sampling voltage; the voltage reconfiguration coefficient is dynamically determined based on the current higher harmonic content, and the current higher harmonic content is determined by the total effective value of the inductor current and the effective value of the inductor current lower harmonics.

[0063] In this embodiment, the signal synthesis model corresponding to the voltage reconstruction strategy can be obtained first. The fundamental wave and lower harmonics can be superimposed and summed using the signal synthesis model. For example, the voltage of the fundamental wave can be denoted as u1, the voltage of the third harmonic as u3, the voltage of the fifth harmonic as u5, the voltage of the seventh harmonic as u7, the voltage of the ninth harmonic as u9, and the voltage of the eleventh harmonic as u... 11 And let the voltage of the thirteenth harmonic be denoted as u. 13 When the fundamental wave and lower harmonics are superimposed and summed, it is expressed as u. g =u1+u3+u5+u7+u9+u 11 +u 13 The corresponding result is the initial reconfigured grid voltage, which is expressed as u. g '.

[0064] Afterwards, the initial reconfigured grid voltage u can also be... g Further dynamic reconfiguration adjustments are made, namely, the initial reconfigured grid voltage u is adjusted using the dynamic reconfiguration adjustment model corresponding to the voltage reconfiguration strategy. g 'and the grid sampling voltage u g Dynamic adjustments are made to obtain the reconfigured grid voltage u. g ".

[0065] More specifically, when dynamically determining the voltage reconstruction coefficients in the dynamic reconstruction adjustment model based on the higher harmonic content of the current, it is necessary to first determine the method for determining the higher harmonic content of the current. The higher harmonic content of the current can be expressed by the following expression:

[0066]

[0067] In equation (1), I HR I represents the higher harmonic content of the current. LRMS I represents the total effective value of the inductor current. LFLTRMS This represents the effective value of the lower harmonics of the inductor current. After determining... Figure 2 The inductor current of inductor L1 shown is denoted as i. L When, the inductor current i L After low-pass filtering and discrete calculation, the result obtained is the low-order harmonic value I of the inductor current. LFLT Then, the effective value is calculated to obtain the total effective value I of the inductor current. LRMS (For details, please refer to) Figure 3 ), and the inductor current i L The effective value of the low-order harmonic of the inductor current, I, is obtained through effective value calculation. LFLTRMS .

[0068] The expression for the discrete calculation of the low-pass filter is as follows:

[0069] y(n)=ay(n-1)+(1-a)x(n) (2)

[0070] In equation (2), y(n) represents the current interrupt output result, y(n-1) represents the previous interrupt output result, x(n) is the current interrupt input result, and a is the equivalent filter coefficient with a cutoff frequency of 1kHz. Furthermore, the corresponding expression for calculating the effective value is as follows:

[0071]

[0072] In equation (3), N represents the number of interruption points in one power frequency cycle.

[0073] When the higher harmonic content I of the current is determined based on the above method HR Then, the voltage reconstruction coefficients are obtained by performing value mapping and interpolation processing through a pre-defined lookup table (LUT).

[0074] The preset lookup table is shown in Table 1 below:

[0075] Table 1

[0076] <![CDATA[I HR ]]> 5％ 8％ 9％ 12％ 13％ 15％ <![CDATA[k point ]]> 0.0 0.2 0.3 0.5 0.7 1.0

[0077] k in Table 1 point Indicates the higher harmonic content of the current I HR The corresponding interpolation points are determined in conjunction with Table 1 and are related to the higher harmonic content I of the current. HR The process for the corresponding voltage reconstruction coefficient k is as follows:

[0078] When I is determined HR If the value of k is ≤5%, then the voltage reconstruction coefficient k = 0;

[0079] When I is determined HR If the value of k is ≥15%, then the voltage reconstruction coefficient k = 1;

[0080] When I is determined HR The value is between two preset values ​​in Table 1, such as I. HR ≥I HR1 And I HR ≤I HR2 Then, by looking up Table 1, we can find I HR1 The corresponding k point The value is k point1 I HR2 The corresponding k point The value is k point2 The voltage reconstruction coefficient k is then calculated using the following equation (4):

[0081] k=(k point2 - k point1 )*(I HR -I HR1 ) / (I HR2 -I HR1 )+ k point1 (4)

[0082] As can be seen, the voltage reconstruction coefficient is dynamically determined based on the higher harmonic content of the current through the above method, and the higher harmonic content of the current is determined by the total effective value of the inductor current and the effective value of the lower harmonics of the inductor current.

[0083] S140. Based on the difference between the output voltage and the reconstructed grid voltage, determine the current voltage feedforward control coefficient, and use the current voltage feedforward control coefficient as the feedforward amount of the duty cycle output by the target control loop.

[0084] In this embodiment, after determining the reconfigured grid voltage, the current voltage feedforward control coefficient can be further determined from the difference between the output voltage and the reconfigured grid voltage. The obtained voltage feedforward control coefficient serves as the feedforward amount for the duty cycle output by the target control loop corresponding to the PFC control circuit. Furthermore, the voltage feedforward control method for improving the adaptability of PFC to weak grids in this application can be specifically applied to Boost circuits, single-phase PFC, three-phase PFC, Vienna topology PFC, and other circuits, and can also be specifically applied to charging pile modules, on-board chargers, and other devices.

[0085] In one embodiment, such as Figure 5 As shown, step S140 includes:

[0086] S141. Obtain the difference between the absolute values ​​of the output voltage and the reconstructed grid voltage to obtain the voltage difference.

[0087] S142. Obtain the ratio of the voltage difference to the grid sampling voltage, and use it as the current voltage feedforward control coefficient.

[0088] In this embodiment, when the reconfigured grid voltage u is obtained g 'and output voltage u o Then, the voltage difference, u, is obtained by first calculating the difference between the absolute values ​​of the output voltage and the reconstructed grid voltage. o -|u g Then, calculate the ratio of the voltage difference to the sampled voltage of the power grid, i.e., d. feed =(u o -|u g '|) / u o Finally, with d feedThis serves as the current voltage feedforward control coefficient and as the feedforward amount of the duty cycle output by the target control loop corresponding to the PFC control circuit.

[0089] As can be seen, the implementation of this method, by reconstructing the input voltage of the connected power grid, not only improves the adaptability of PFC to weak power grids, but also maintains the effect of suppressing background harmonics.

[0090] Figure 6 This is a schematic block diagram of a voltage feedforward control device for improving the adaptability of PFC in weak grids, provided by an embodiment of the present invention. Figure 6 As shown, corresponding to the voltage feedforward control method for improving the adaptability of PFC to weak grids described above, the present invention also provides a voltage feedforward control device 100 for improving the adaptability of PFC to weak grids. This voltage feedforward control device 100 for improving the adaptability of PFC to weak grids includes: a grid voltage sampling unit 110, a harmonic decomposition unit 120, a voltage reconstruction unit 130, and a feedforward control coefficient acquisition unit 140.

[0091] The grid voltage sampling unit 110 is used to acquire the grid sampling voltage of the grid connected to the PFC control circuit and the output voltage of the PFC control circuit.

[0092] In this embodiment, the voltage feedforward control method for improving the adaptability of PFC to weak grids is applied to the PFC control circuit, and the specific circuit of the PFC control circuit is as follows: Figure 2 As shown. The PFC control circuit specifically includes an inductor L1, a switching transistor Q1, five diodes (specifically labeled D1, D2, D3, D4, and D5), a capacitor C1, and a load resistor RL, all configured according to a preset connection method. More specifically, the cathode of the second diode D2 is connected to the anode of the first diode D1, and also to a power supply (e.g., the mains grid, with an input voltage of u). g The positive terminal of the first diode D1 is connected to the positive terminal of the third diode D3, and also to the negative terminal of the power supply; the negative terminal of the third diode D3 is connected to the first terminal of the inductor L1; the second terminal of the inductor L1 is connected to the drain of the switching transistor Q1 (specifically a metal-oxide-semiconductor field-effect transistor or an insulated-gate bipolar transistor), and also to the positive terminal of the fifth diode D5; the source of the switching transistor Q1 is connected to the positive terminals of both the second diode D2 and the fourth diode D4; the negative terminal of the fifth diode D5 is connected to the first terminal of the capacitor C1, and also to the first terminal of the load resistor RL; the second terminal of the capacitor C1 is connected to the source of the switching transistor Q1; the second terminal of the load resistor RL is connected to the source of the switching transistor Q1.

[0093] The grid sampling voltage obtained by the PFC control circuit is the input voltage u in the example above. g Furthermore, the output voltage of the PFC control circuit is the same as the output voltage u across the load resistor RL. o The obtained input voltage u g and output voltage u o It can be used for subsequent voltage feedforward control.

[0094] Of course, in specific implementation, a preset sampling period for obtaining the grid sampling voltage of the PFC control circuit connected to the grid can be set. After each sampling period, the grid voltage sampling unit 110 is restarted and voltage feedforward control is performed within this sampling period.

[0095] The harmonic decomposition unit 120 is used to perform harmonic decomposition on the sampled voltage of the power grid to obtain the fundamental wave and lower harmonics.

[0096] In this embodiment, harmonic decomposition is performed on the sampled voltage of the power grid to understand the power quality of the grid and potential problems. The fundamental frequency (FW) refers to the sinusoidal component with the longest period of a complex periodic oscillation. The frequency corresponding to this period is called the fundamental frequency, which represents the standard frequency of the power grid, such as 50Hz. Harmonics, on the other hand, are the components greater than integer multiples of the fundamental frequency obtained by performing Fourier series decomposition on the periodic non-sinusoidal alternating current corresponding to the sampled voltage. In other words, harmonics are formed by increasing the frequency of the fundamental frequency. For example, if the fundamental frequency is 50Hz, the second harmonic is 100Hz (twice the fundamental frequency), the third harmonic is 150Hz (three times the fundamental frequency), and so on. Therefore, by performing harmonic decomposition on the sampled voltage of the power grid, the fundamental frequency and lower harmonics can be accurately obtained.

[0097] In one embodiment, the harmonic decomposition unit 120 is specifically used for:

[0098] The sampled voltage from the power grid is input to the phase-locked loop (PLL) to obtain the PLL output signal;

[0099] Perform a Fourier transform on the output signal of the phase-locked loop to obtain the fundamental frequency and each harmonic;

[0100] Based on preset low-order harmonic frequency data, the low-order harmonics are obtained from each harmonic.

[0101] In this embodiment, the sampling voltage of the power grid, the fundamental frequency, and each harmonic are obtained by sequentially processing the data through a phase-locked loop (PLL) and performing a Fourier transform to obtain the fundamental frequency and each harmonic. The PLL is a negative feedback control system that uses voltage generated by phase synchronization to tune a voltage-controlled oscillator (VCO) to generate a target frequency. The voltage u of the power grid is obtained through the PLL. g By processing, a phase-locked loop output signal that is easy to extract can be obtained.

[0102] When performing a Fourier transform on the phase-locked loop (PLL) output signal, the time-domain signal can be converted to a frequency-domain signal, and the fundamental frequency and all harmonics can be accurately obtained in the frequency domain. Since subsequent voltage reconstruction does not require many harmonics, it is also necessary to obtain the low-order harmonics from each harmonic based on the low-order harmonic frequency data, thereby retaining the required low-order harmonics.

[0103] In one embodiment, the harmonic decomposition unit 120 is further specifically used for:

[0104] The grid sampling voltage is input to the phase-locked loop (PLL) for phase detection, low-pass filtering, and voltage-controlled oscillator (VCO) control processing, resulting in a PLL output signal whose frequency is an integer multiple of the grid sampling voltage frequency.

[0105] In this embodiment, the main process of processing the grid sampling voltage through a phase-locked loop is as follows:

[0106] 1) Phase detection, which involves comparing the grid voltage with a standard reference signal generated by a voltage-controlled oscillator within the phase-locked loop through frequency division using a phase detector, to obtain the phase difference comparison result; wherein, the phase difference comparison result is either a positive error voltage or a negative error voltage;

[0107] 2) Low-pass filtering, that is, filtering out high-frequency noise and clutter in the phase difference comparison result (which can also be understood as error voltage) output after phase detection by a low-pass filter, so that the low-frequency or DC components in the phase difference comparison result can pass through. The phase-locked loop improves the stability and anti-interference ability of the system and reduces signal distortion.

[0108] 3) Voltage-controlled oscillator (VCO) control processing: The low-frequency component and DC component output from the low-pass filter are input to the VCO for processing. For example, taking the processing of the DC component as an example, when the DC component is output to the VCO, the output frequency of the VCO will change with the change of the DC component. Specifically, the larger the DC component, the higher the output frequency of the VCO, and vice versa. This adjustment makes the output frequency of the VCO related to the phase difference of the low-pass filter output signal. Moreover, part of the output signal of the VCO is fed back to the phase detector, and continuously compared and adjusted with the grid sampling voltage input to the phase detector until the phase difference reaches a stable value (such as zero or a minimum value infinitely close to zero).

[0109] Through the above processing method, the phase-locked loop achieves the locking of the input signal, namely the grid sampling voltage, and when the output reaches a stable state, the output signal and the input signal have a fixed phase relationship.

[0110] In one embodiment, the harmonic decomposition unit 120 is further specifically used for:

[0111] Obtain the frequency multiples included in the low-order harmonic frequency data; wherein, the frequency multiples are odd numbers, and 1 ≤ frequency multiple ≤ 13;

[0112] The low-order harmonics are obtained from each harmonic based on the frequency multiples included in the low-order harmonic frequency data.

[0113] In this embodiment, when acquiring the lower harmonics from each harmonic, the frequency data of the lower harmonics can be specified in advance, including several odd-numbered frequency multiples (these frequency multiples represent the multiple of the harmonic frequency to the fundamental frequency), and their value range can be specifically defined. Once the frequency multiples included in the lower harmonic frequency data are known, the harmonics with the corresponding frequency multiples can be extracted from each harmonic based on these frequency multiples, thereby quickly obtaining the lower harmonics.

[0114] In one embodiment, the frequency multiples included in the low-order harmonic frequency data include 3, 5, 7, 9, 11, and 13.

[0115] In this embodiment, if the low-order harmonics include a large number of harmonics with higher frequency multiples, it will have a greater impact on the subsequent voltage reconstruction. In this case, the frequency multiples included in the low-order harmonic frequency data can be set to include 3, 5, 7, 9, 11 and 13. The low-order harmonics are composed of the above 6 harmonics and participate in the subsequent signal synthesis.

[0116] Specifically, if the fundamental frequency of the fundamental wave is 50Hz, the lower harmonics include the third harmonic at 150Hz (three times the fundamental frequency), the fifth harmonic at 250Hz (five times the fundamental frequency), the seventh harmonic at 450Hz (seven times the fundamental frequency), the ninth harmonic at 450Hz (nine times the fundamental frequency), the eleventh harmonic at 550Hz (eleven times the fundamental frequency), and the thirteenth harmonic at 650Hz (thirteen times the fundamental frequency).

[0117] The voltage reconstruction unit 130 is used to reconstruct the voltage of the fundamental wave and the lower harmonics based on a preset voltage reconstruction strategy to obtain the reconstructed grid voltage.

[0118] The voltage reconstruction strategy is used to dynamically change the voltage reconstruction coefficient based on the high harmonic content of the current, and to determine the reconstructed grid voltage by combining the grid sampling voltage, the fundamental signal and the low harmonic signal.

[0119] In this embodiment, after determining the fundamental and lower harmonics corresponding to the grid sampling voltage, the fundamental and lower harmonics can be reconstructed to obtain the reconstructed grid voltage. For example, the preset voltage reconstruction strategy is to superimpose and sum the fundamental and lower harmonics, which can quickly obtain the reconstructed grid voltage for subsequent voltage feedforward control. Furthermore, because higher harmonics are filtered out, the adaptability of PFC to weak grids is improved, while maintaining the background harmonic suppression effect.

[0120] In one embodiment, the voltage reconstruction unit 130 is specifically used for:

[0121] Obtain the signal synthesis model corresponding to the voltage reconstruction strategy, and synthesize the fundamental wave and the low-order harmonics based on the signal synthesis model to obtain the initial reconstructed grid voltage.

[0122] A dynamic reconfiguration adjustment model corresponding to the voltage reconfiguration strategy is obtained, and the initial reconfigured grid voltage and the grid sampling voltage are dynamically adjusted based on the dynamic reconfiguration adjustment model to obtain the reconfigured grid voltage; wherein, the formula corresponding to the dynamic reconfiguration adjustment model is: reconfigured grid voltage = voltage reconfiguration coefficient × initial reconfigured grid voltage + (1 - voltage reconfiguration coefficient) × grid sampling voltage; the voltage reconfiguration coefficient is dynamically determined based on the current higher harmonic content, and the current higher harmonic content is determined by the total effective value of the inductor current and the effective value of the inductor current lower harmonics.

[0123] In this embodiment, the signal synthesis model corresponding to the voltage reconstruction strategy can be obtained first. The fundamental wave and lower harmonics can be superimposed and summed using the signal synthesis model. For example, the voltage of the fundamental wave can be denoted as u1, the voltage of the third harmonic as u3, the voltage of the fifth harmonic as u5, the voltage of the seventh harmonic as u7, the voltage of the ninth harmonic as u9, and the voltage of the eleventh harmonic as u... 11 And let the voltage of the thirteenth harmonic be denoted as u. 13 When the fundamental wave and lower harmonics are superimposed and summed, it is expressed as u. g =u1+u3+u5+u7+u9+u 11 +u 13 The corresponding result is the initial reconfigured grid voltage, which is expressed as u. g '.

[0124] Afterwards, the initial reconfigured grid voltage u can also be... g Further dynamic reconfiguration adjustments are made, namely, the initial reconfigured grid voltage u is adjusted using the dynamic reconfiguration adjustment model corresponding to the voltage reconfiguration strategy. g 'and the grid sampling voltage u g Dynamic adjustments are made to obtain the reconfigured grid voltage u. g ".

[0125] More specifically, when dynamically determining the voltage reconstruction coefficient in the dynamic reconstruction adjustment model based on the higher harmonic content of the current, it is necessary to first determine the method for determining the higher harmonic content of the current. The higher harmonic content of the current can be expressed by the expression in equation (1) above.

[0126] When the higher harmonic content I of the current is determined based on the above method HR Subsequently, the voltage reconstruction coefficients are obtained through value mapping and interpolation processing using a pre-defined lookup table (LUT). The pre-defined lookup table is shown in Table 1 above. Specifically, the voltage reconstruction coefficients are determined in conjunction with Table 1, and are related to the higher harmonic content of the current I. HR The process for the corresponding voltage reconstruction coefficient k is as follows:

[0127] When I is determined HR If the value of k is ≤5%, then the voltage reconstruction coefficient k = 0;

[0128] When I is determined HR If the value of k is ≥15%, then the voltage reconstruction coefficient k = 1;

[0129] When I is determined HR The value is between two preset values ​​in Table 1, such as I. HR ≥I HR1 And I HR ≤I HR2 Then, by looking up Table 1, we can find I HR1The corresponding k point The value is k point1 I HR2 The corresponding k point The value is k point2 At this point, the voltage reconstruction coefficient k is calculated using the above formula (4).

[0130] As can be seen, the voltage reconstruction coefficient is dynamically determined based on the higher harmonic content of the current through the above method, and the higher harmonic content of the current is determined by the total effective value of the inductor current and the effective value of the lower harmonics of the inductor current.

[0131] The feedforward control coefficient acquisition unit 140 is used to determine the current voltage feedforward control coefficient based on the difference between the output voltage and the reconstructed grid voltage, and use the current voltage feedforward control coefficient as the feedforward amount of the duty cycle output by the target control loop.

[0132] In this embodiment, after determining the reconfigured grid voltage, the current voltage feedforward control coefficient can be further determined from the difference between the output voltage and the reconfigured grid voltage. The obtained voltage feedforward control coefficient serves as the feedforward amount for the duty cycle output by the target control loop corresponding to the PFC control circuit. Furthermore, the voltage feedforward control method for improving the adaptability of PFC to weak grids in this application can be specifically applied to Boost circuits, single-phase PFC, three-phase PFC, Vienna topology PFC, and other circuits, and can also be specifically applied to charging pile modules, on-board chargers, and other devices.

[0133] In one embodiment, the feedforward control coefficient acquisition unit 140 is specifically used for:

[0134] The voltage difference is obtained by measuring the difference between the absolute values ​​of the output voltage and the reconstructed grid voltage.

[0135] The ratio of the voltage difference to the sampled voltage of the power grid is obtained and used as the current voltage feedforward control coefficient.

[0136] In this embodiment, when the grid voltage u is obtained g 'and output voltage u o Then, the voltage difference, u, is obtained by first calculating the difference between the absolute values ​​of the output voltage and the reconstructed grid voltage. o -|u g Then, calculate the ratio of the voltage difference to the sampled voltage of the power grid, i.e., d. feed =(u o -|u g '|) / u o Finally, with d feedThis serves as the current voltage feedforward control coefficient and as the feedforward amount of the duty cycle output by the target control loop corresponding to the PFC control circuit.

[0137] As can be seen, the embodiment of implementing this device improves the adaptability of PFC to weak power grids and maintains the effect of suppressing background harmonics by reconstructing the input voltage of the connected power grid to feedforward control of the grid voltage.

[0138] This invention also provides a control circuit, which includes an inductor, a switching transistor, a diode, a capacitor, and a load resistor arranged in a preset connection manner; the control circuit is used to execute the aforementioned voltage feedforward control method for improving the adaptability of PFC in weak grids.

[0139] The control circuit can be specifically applied to Boost circuits, single-phase PFC, three-phase PFC, Vienna topology PFC, and other circuits. Moreover, the control circuit can be specifically applied to charging pile modules, on-board chargers, and other devices.

[0140] The aforementioned voltage feedforward control device for improving the adaptability of PFC to weak grids can be implemented as a computer program, which can, for example, Figure 7 It runs on the computer device shown.

[0141] Please see Figure 7 , Figure 7 This is a schematic block diagram of a computer device provided in an embodiment of the present invention. The computer device integrates any of the voltage feedforward control devices provided in this embodiment of the invention for improving the adaptability of PFC in weak grid environments.

[0142] See Figure 7 The computer device 400 includes a processor 402, a memory, and a network interface 405 connected via a system bus 401. The memory may include a storage medium 403 and internal memory 404.

[0143] The storage medium 403 may store an operating system 4031 and a computer program 4032. The computer program 4032 includes program instructions that, when executed, cause the processor 402 to perform the aforementioned voltage feedforward control method for improving the adaptability of PFC in weak grid environments.

[0144] The processor 402 provides computing and control capabilities to support the operation of the entire computer device.

[0145] The internal memory 404 provides an environment for the operation of the computer program 4032 in the storage medium 403. When the computer program 4032 is executed by the processor 402, the processor 402 can execute the voltage feedforward control method described above to improve the adaptability of PFC in weak grids.

[0146] This network interface 405 is used for network communication with other devices. Those skilled in the art will understand that... Figure 7 The structure shown is merely a block diagram of a portion of the structure related to the present invention and does not constitute a limitation on the computer device to which the present invention is applied. A specific computer device may include more or fewer components than those shown in the figure, or combine certain components, or have different component arrangements.

[0147] The processor 402 is used to run a computer program 4032 stored in a memory to implement the voltage feedforward control method for improving the adaptability of PFC in weak grids, as described above.

[0148] It should be understood that, in this embodiment of the invention, the processor 402 may be a Central Processing Unit (CPU), or it may be other general-purpose processors, digital signal processors (DSPs), application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. The general-purpose processor may be a microprocessor or any conventional processor.

[0149] It will be understood by those skilled in the art that all or part of the processes in the methods of the above embodiments can be implemented by a computer program instructing related hardware. The computer program includes program instructions and can be stored in a storage medium, which is a computer-readable storage medium. The program instructions are executed by at least one processor in the computer system to implement the process steps of the embodiments of the above methods.

[0150] Therefore, the present invention also provides a computer-readable storage medium. This computer-readable storage medium stores a computer program, wherein the computer program includes program instructions. When executed by a processor, the program instructions cause the processor to perform the voltage feedforward control method for improving the adaptability of PFC in weak grids as described above.

[0151] The computer-readable storage medium can be any computer-readable storage medium capable of storing program code, such as a USB flash drive, portable hard drive, read-only memory (ROM), magnetic disk, or optical disk.

[0152] Those skilled in the art will recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of both. To clearly illustrate the interchangeability of hardware and software, the components and steps of the various examples have been generally described in terms of functionality in the foregoing description. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementations should not be considered beyond the scope of this invention.

[0153] In the several embodiments provided by this invention, it should be understood that the disclosed apparatus and methods can be implemented in other ways. For example, the apparatus embodiments described above are merely illustrative. For example, the division of each unit is merely a logical functional division, and there may be other division methods in actual implementation. For example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed.

[0154] The steps in the method of this invention can be adjusted, merged, or reduced in order according to actual needs. The units in the device of this invention can be merged, divided, or reduced according to actual needs. Furthermore, the functional units in the various embodiments of this invention can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit.

[0155] If the integrated unit is implemented as a software functional unit and sold or used as an independent product, it can be stored in a storage medium. Based on this understanding, the technical solution of the present invention, in essence, or the part that contributes to the prior art, or all or part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, a terminal, or a network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of the present invention.

[0156] The above description is merely a specific embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any person skilled in the art can easily conceive of various equivalent modifications or substitutions within the technical scope disclosed in the present invention, and these modifications or substitutions should all be covered within the scope of protection of the present invention. Therefore, the scope of protection of the present invention should be determined by the scope of the claims.

Claims

1. A voltage feedforward control method for improving the adaptability of PFC in weak grids, characterized in that, include: Obtain the grid sampling voltage connected to the PFC control circuit and the output voltage of the PFC control circuit; Harmonic decomposition is performed on the sampled voltage of the power grid to obtain the fundamental frequency and lower harmonics; The fundamental wave and the lower harmonics are reconstructed based on a preset voltage reconstruction strategy to obtain the reconstructed grid voltage. The voltage reconstruction strategy is used to dynamically change the voltage reconstruction coefficient based on the content of the higher harmonics of the current, and to determine the reconstructed grid voltage by combining the grid sampling voltage, the signal of the fundamental wave and the signal of the lower harmonics. Based on the difference between the output voltage and the reconstructed grid voltage, the current voltage feedforward control coefficient is determined, and the current voltage feedforward control coefficient is used as the feedforward amount of the duty cycle output by the target control loop.

2. The method according to claim 1, characterized in that, The harmonic decomposition of the sampled voltage of the power grid to obtain the fundamental frequency and lower harmonics includes: The sampled voltage from the power grid is input to the phase-locked loop (PLL) to obtain the PLL output signal; Perform a Fourier transform on the output signal of the phase-locked loop to obtain the fundamental frequency and each harmonic; Based on preset low-order harmonic frequency data, the low-order harmonics are obtained from each harmonic.

3. The method according to claim 2, characterized in that, The step of inputting the sampled grid voltage to the phase-locked loop (PLL) to obtain the PLL output signal includes: The grid sampling voltage is input to the phase-locked loop (PLL) for phase detection, low-pass filtering, and voltage-controlled oscillator (VCO) control processing, resulting in a PLL output signal whose frequency is an integer multiple of the grid sampling voltage frequency.

4. The method according to claim 2, characterized in that, The process of obtaining the low-order harmonics from each harmonic based on preset low-order harmonic frequency data includes: Obtain the frequency multiples included in the low-order harmonic frequency data; wherein, the frequency multiples are odd numbers, and 1 ≤ frequency multiple ≤ 13; The low-order harmonics are obtained from each harmonic based on the frequency multiples included in the low-order harmonic frequency data.

5. The method according to claim 4, characterized in that, The frequency multiples included in the low-order harmonic frequency data include 3, 5, 7, 9, 11, and 13.

6. The method according to claim 1, characterized in that, The voltage reconstruction strategy based on a preset voltage reconstruction strategy reconstructs the fundamental frequency and the lower harmonics to obtain the reconstructed grid voltage, including: Obtain the signal synthesis model corresponding to the voltage reconstruction strategy, and synthesize the fundamental wave and the low-order harmonics based on the signal synthesis model to obtain the initial reconstructed grid voltage. A dynamic reconfiguration adjustment model corresponding to the voltage reconfiguration strategy is obtained, and the initial reconfigured grid voltage and the grid sampling voltage are dynamically adjusted based on the dynamic reconfiguration adjustment model to obtain the reconfigured grid voltage; wherein, the formula corresponding to the dynamic reconfiguration adjustment model is: reconfigured grid voltage = voltage reconfiguration coefficient × initial reconfigured grid voltage + (1 - voltage reconfiguration coefficient) × fundamental voltage; the voltage reconfiguration coefficient is dynamically determined based on the current higher harmonic content, and the current higher harmonic content is determined by the total effective value of the inductor current and the effective value of the inductor current lower harmonics.

7. The method according to claim 1, characterized in that, Determining the current voltage feedforward control coefficient based on the difference between the output voltage and the reconstructed grid voltage includes: The voltage difference is obtained by measuring the difference between the absolute values ​​of the output voltage and the reconstructed grid voltage. The ratio of the voltage difference to the sampled voltage of the power grid is obtained and used as the current voltage feedforward control coefficient.

8. A voltage feedforward control device for improving the adaptability of PFC in weak power grids, characterized in that, include: The grid voltage sampling unit is used to acquire the grid sampling voltage of the grid connected to the PFC control circuit, and the output voltage of the PFC control circuit. The harmonic decomposition unit is used to perform harmonic decomposition on the sampled voltage of the power grid to obtain the fundamental wave and lower harmonics. The voltage reconstruction unit is used to reconstruct the fundamental wave and the lower harmonics based on a preset voltage reconstruction strategy to obtain the reconstructed grid voltage. The feedforward control coefficient acquisition unit is used to determine the current voltage feedforward control coefficient based on the difference between the output voltage and the reconstructed grid voltage, and to use the current voltage feedforward control coefficient as the feedforward amount of the duty cycle output by the target control loop.

9. A computer device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that, When the processor executes the computer program, it implements the voltage feedforward control method for improving the adaptability of PFC in weak grids as described in any one of claims 1-7.

10. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores a computer program, which includes program instructions that, when executed by a processor, can implement the voltage feedforward control method for improving the adaptability of PFC in weak grids as described in any one of claims 1-7.

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