Methods of fabricating engineered growth substrates for group III nitride power devices with high quality nucleation regions

Abstract

According to an embodiment of the present invention, provided is a method for manufacturing an engineered growth substrate for a group III nitride power device in which a nucleation region is formed, the method comprising: a seed substrate preparation step (S100) of preparing a seed substrate made of single crystal SiC having a set thickness; a nucleation region forming step (S200) in which a nucleation region is formed on the upper surface of the seed substrate; a seed substrate reforming step (S300) in which the seed substrate is irradiated with a stealth laser beam, and a reforming layer parallel to the nucleation region is formed inside the seed substrate; a temporary substrate bonding step (S400) of bonding the temporary substrate to the upper surface of the nucleation region using a predetermined adhesive layer after the seed substrate reforming step (S300); and a seed region separation step (S500) for separating the seed region (layer), on which the nucleation region is formed, from the seed substrate, with the reformed layer as a boundary.

Description

TECHNICAL FIELD

[0001] The present application relates to a method for manufacturing an engineered growth substrate for a group III nitride power device having a high-quality nucleation region formed thereon, and more particularly, to a method for manufacturing an engineered growth substrate for a group III nitride power device having a composite laminate structure, on which a nucleation region is formed, and which has a high-quality film quality despite a thin growth substrate (seed region). BACKGROUND

[0002] A wafer for group III nitride semiconductor growth uses a single material growth substrate.

[0003] A single material growth substrate is difficult to satisfy the requirements of crystal defect density, surface polarity, device structure thickness, heat dissipation capability, and cost at the same time.

[0004] As an alternative, an engineered growth substrate having a composite laminate structure made of different materials has been introduced as a wafer for growing a group III nitride semiconductor.

[0005] The engineered growth substrate having a composite laminate structure has a structure in which a thin seed region (layer), a bonding layer, and a support substrate are laminated.

[0006] A group III nitride semiconductor is grown on the seed region (layer).

[0007] The support substrate and the bonding layer are intended to provide physical rigidity and stability to the group III nitride semiconductor.

[0008] The engineered growth substrate having a composite laminate structure has a structure in which the thin seed region (layer) is firmly supported from the lower side by the support substrate and the bonding layer. Therefore, by using the thin seed region (layer), it is possible to reduce costs, and since the group III nitride semiconductor is deposited on top of the seed region (layer) with the same and similar equivalent physical properties (lattice constant), it can have quality characteristics superior to those of a single material growth substrate.

[0009] However, the engineered growth substrate having a composite laminate structure has limitations in terms of process when used as a high-quality growth substrate for a group III nitride semiconductor of a group III nitride power device.

[0010] Specifically, the quality of the semiconductor for a group III nitride power device is greatly affected by the quality of the nucleation region grown on the growth substrate, specifically, the seed region (layer).

[0011] Before forming a group III nitride semiconductor on top of the seed region (layer), a nucleation region is essentially grown. At this point, the thickness uniformity and crystal defect density of the nucleation region have a significant impact on the performance and quality of the group III nitride semiconductor formed on the seed region (layer), as well as on reliability, lifetime, and yield.

[0012] Especially in power semiconductors such as HEMT, MOSFET and JFET, which apply large currents of several to tens of amperes (A) or high voltages of hundreds to thousands of volts (V), a single fatal crystal defect can affect lifespan or reliability.

[0013] Furthermore, if the thickness uniformity of the nucleation region is poor, the physical properties of group III nitride semiconductors used in power devices will deteriorate, which has a significant impact on the performance and yield of power devices. Therefore, the growth of the nucleation region on the seed region (layer) must be managed simultaneously to improve thickness uniformity and minimize crystal defect density.

[0014] Representative crystal defects that have a critical impact on group III nitride power devices are various types and characteristics of through-dislocations, inverse domains (IDs), and inverse domain boundaries (IDBs).

[0015] Minimizing crystal defect density requires high growth temperatures in the nucleation region. On the other hand, to ensure uniform thickness of the nucleation region, it is necessary to lower the growth temperature or increase the thickness of the engineered growth substrate to prevent bending of the engineered growth substrate.

[0016] Increasing the thickness of the seed region (layer) that constitutes the engineered growth substrate conflicts with the reasons for using the engineered growth substrate.

[0017] In addition, the relatively thick seed crystal region (layer) is subject to significant thermo-mechanical stress depending on the characteristics of the supporting substrate and the growth temperature.

[0018] Therefore, the process technology of growing at high temperature on a relatively thick seed crystal region (layer) while minimizing the crystal defect density of the nucleation region and maximizing the thickness uniformity of the nucleation region has always been a very difficult problem. Summary of the Invention

[0019] Technical issues

[0020] This invention provides a method for manufacturing SiC power semiconductor devices. This method can solve the high cost problem of SiC growth substrates through thermal self-splitting process, and at the same time apply SiC growth substrates to high-quality and high-performance SiC power semiconductors.

[0021] This invention provides a method for manufacturing an engineered growth substrate for group III nitride power devices, wherein a nucleation region has been formed in the substrate. The film quality of the method is significantly better than that expected from nucleation regions grown directly on an engineered growth substrate with a composite laminate structure (seed region (layer) - bonding layer - supporting substrate).

[0022] Technical solution

[0023] According to an embodiment of the present invention, a method is provided for manufacturing an engineered growth substrate for a group III nitride power device having nucleation regions thereon, comprising: a seed substrate preparation step (S100) of preparing a seed substrate made of single-crystal SiC having a predetermined thickness; a nucleation region formation step (S200) of forming nucleation regions on the upper surface of the seed substrate; a seed substrate remodeling step (S300) of irradiating the seed substrate with a stealth laser to form a remodeling layer parallel to the nucleation regions inside the seed substrate; a temporary substrate bonding step (S400) of bonding a temporary substrate to the upper surface of the nucleation regions using a predetermined adhesive layer after the seed substrate remodeling step (S300); and a seed region separation step (S500) of separating the seed region (layer) with nucleation regions thereon from the seed substrate, using the remodeling layer as a boundary.

[0024] In an embodiment of the present invention, the method includes: a wafer bonding step (S700) in which a support substrate is bonded to a surface opposite to the surface on which the nucleation region is formed on both sides of a seed region (layer) separated in a seed region separation step (S500) by a predetermined wafer bonding layer; and a temporary substrate removal step (S800) in which the temporary substrate is separated from the nucleation region.

[0025] In an embodiment of the invention, the method includes a step (S600) of planarizing the surface of a seed region (layer) on which a support substrate is bonded prior to the wafer bonding step (S700).

[0026] In an embodiment of the present invention, the seed crystal region separation step (S40) is characterized in that, due to the structural asymmetry of quantitative differences in thermal properties such as the coefficient of thermal expansion or thickness differences, the two sides bounded by the reforming layer can be separated without external force.

[0027] Beneficial effects

[0028] According to the present invention, high-quality growth of semiconductor layers for group III nitride power devices can be achieved using engineered growth substrates having nucleation regions with excellent film formation quality in terms of thickness uniformity and minimization of crystal defect density.

[0029] According to the present invention, an engineered growth substrate with nucleation regions exhibiting excellent quality in terms of thickness uniformity and crystal defect density can be obtained. Therefore, the drawbacks of nucleation regions grown on engineered growth substrates with conventional composite laminate structures can be improved.

[0030] According to the present invention, by growing high-quality nucleation regions on a thick seed substrate and separating the seed regions (layers) together with the nucleation regions from the seed substrate to manufacture an engineered growth substrate, a thick seed substrate can be separated into multiple seed regions (layers) for use. Therefore, excellent quality of the nucleation regions is ensured, and a breakthrough cost reduction can be achieved.

[0031] According to the present invention, by utilizing the quantitative difference in thermal properties, including the coefficient of thermal expansion, or the structural asymmetry, including the thickness difference, between the seed crystal region (layer) and the seed crystal substrate, the seed crystal region (layer) with the nucleation region is separated from the thick seed crystal substrate, thereby achieving separation by minimizing external force. Attached Figure Description

[0032] Figure 1 This is a diagram illustrating one embodiment of an engineered growth substrate for group III nitride power devices with high-quality nucleation regions.

[0033] Figures 2 to 9 This is a figure illustrating one embodiment of a method for manufacturing a group III nitride power device with an engineered growth substrate having high-quality nucleation regions according to the present invention. Detailed Implementation

[0034] Hereinafter, with reference to the accompanying drawings, a method for manufacturing an engineered growth substrate for a group III nitride power device having a high-quality nucleation region according to an embodiment of the present invention will be described in detail.

[0035] The terminology used below is chosen for ease of explanation and should be interpreted appropriately in a way that is consistent with the technical concept of the present invention, without being limited to dictionary definitions.

[0036] Figure 1 This is a diagram illustrating one embodiment of an engineered growth substrate for group III nitride power devices with high-quality nucleation regions.

[0037] refer to Figure 1 The engineered growth substrate for group III nitride power devices according to this embodiment, which has a high-quality nucleation region, includes a support substrate (210), a seed region (layer) (120), and a nucleation region (101).

[0038] The support substrate (210) is used to structurally support the seed region (layer) (120) and the nucleation region (101).

[0039] When the seed region (layer) (120) is formed of single-crystal SiC and the nucleation region (101) is formed of epitaxial AlN, the support substrate (210) is preferably formed of any one of single-crystal Si, single-crystal SiC, polycrystalline AlN ceramic and polycrystalline SiC ceramic.

[0040] Furthermore, in order to minimize the impact of thermomechanical stress during the subsequent growth of the group III nitride semiconductor (device structure), the support substrate (210) is preferably selected as a material whose thermal expansion coefficient differs from that of the seed region (layer) by zero or minimal.

[0041] For structural support, the thickness of the support substrate (210) is preferably formed to be 500 to 1000 μm.

[0042] The seed crystal region (layer) (120) is arranged to be bonded to the support substrate (210), and its thickness is formed to be 50 to 200 μm.

[0043] When the seed region (layer) (120) is provided for the growth of a group III nitride power device, the thickness of the seed region (layer) (120) is preferably formed to be 100 to 200 μm.

[0044] The bonding between the seed region (layer) (120) and the support substrate (210) is preferably permanent and is formed by a predetermined wafer bonding material. The thickness of the wafer bonding layer can be formed to be 1 to 10 μm.

[0045] The nucleation region (101) grows epitaxially on the seed region (layer) (120) and forms an epitaxial AlN.

[0046] The present invention is characterized in that, instead of growing the nucleation region (101) directly on the seed crystal region (layer) (120) by epitaxy, the nucleation region (101) is epitaxially grown on the seed crystal substrate (100) with a thickness at least twice that of the seed crystal region (layer) (120), and then the seed crystal region (layer) (120) on which the nucleation region (101) is formed is separated from the seed crystal substrate (100).

[0047] Therefore, the film quality of the nucleation region (101) of the present invention is the same as that of the nucleation region (101) epitaxially grown on a seed substrate (100) with a thickness at least twice that of the seed region (layer) (120) under the same growth conditions.

[0048] The quality of this film is significantly improved compared to the quality of the nucleation region (101) grown directly on the seed crystal region (layer) (120).

[0049] Film quality refers to thickness uniformity and / or crystal defect density, and crystal defect density includes inversion domain (ID) and inversion domain boundary (IDB).

[0050] ID refers to the region where the arrangement of the grown atoms is reversed (i.e., the N-polar region exists on the Al-polar region or vice versa), and IDB refers to the boundary between the reversed portion and the normal portion of the grown atoms.

[0051] Therefore, higher densities of penetrating dislocations, IDs, and IDBs imply larger crystal defects.

[0052] When nucleation regions are formed using AlN, films can be deposited at growth temperatures of 1200°C or higher to ensure better quality. However, the higher the growth temperature, the greater the curvature of the growth substrate, making it difficult to ensure thickness uniformity.

[0053] To address this problem, the inventors of this invention have developed a method that uses a thick seed substrate (100) to grow an AlN nucleation region (101), and then separates the seed region (layer) (120) and the AlN nucleation region (101) from the seed substrate (100).

[0054] Specifically, the seed region (layer) (120) on which the nucleation region (101) is grown is formed by slicing from the seed substrate (100) using the method described below. Furthermore, the seed substrate (100) from which the seed region (layer) (120) has been separated is reused by repeating the growth and slicing of the nucleation region.

[0055] As a result, while ensuring excellent film quality in the nucleation region (101), the consumption of the relatively expensive seed substrate is minimized.

[0056] Figures 2 to 9 This is a figure illustrating one embodiment of a method for manufacturing a group III nitride power device with an engineered growth substrate having high-quality nucleation regions according to the present invention.

[0057] refer to Figures 2 to 9 Figures 2 to 9 The method for manufacturing an engineered growth substrate for a group III nitride power device having a nucleation region according to this embodiment includes a seed substrate preparation step (S100), a nucleation region formation step (S200), a seed substrate remodeling step (S300), a temporary substrate bonding step (S400), and a seed region separation step (S500).

[0058] The seed substrate preparation step (S100) is a step of preparing a seed substrate (100) made of single crystal SiC with a set thickness.

[0059] The set thickness of the seed substrate (100) is preferably at least twice the thickness of the seed region (layer) (120).

[0060] For example, based on its diameter, the thickness of the seed substrate (100) can be at least 500 μm for 4-inch and 6-inch diameters and at least 750 μm for 8-inch diameters.

[0061] This ensures uniform thickness of the nucleation region (101) and high-quality membrane.

[0062] Specifically, AlN, used as the nucleation region material, can ensure better film quality (minimization of crystal defects) by forming films at growth temperatures of 1200°C or higher. However, the higher the growth temperature, the greater the wafer curvature, making it difficult to ensure thickness uniformity.

[0063] To address this issue, AlN material for the nucleation region (101) is grown on a thick seed substrate (100) at a growth temperature of 1200°C or higher to prevent wafer bending and ensure thickness uniformity. Meanwhile, high-quality film formation can be obtained by growing the film at a growth temperature of 1200°C or higher.

[0064] Furthermore, since the device structures grown in the nucleation region (101) (e.g., buffer layer, channel layer, barrier layer, and capping layer in GaN HEMT) are grown at a temperature (approximately 1000°C) lower than the growth temperature of the nucleation region (101), the low crystal defects and thickness uniformity of the nucleation region (101) can ensure the high quality of the subsequently grown device structures.

[0065] Meanwhile, in order to achieve excellent film quality of the nucleation region (101), it is preferable to form a positive or negative pattern on the growth surface of the seed substrate (100) on which the nucleation region (101) is grown. This allows for easy guidance of ELOG growth in the nucleation region (101).

[0066] The nucleation region formation step (S200) is a step in which a nucleation region (101) is formed on the upper surface of the seed substrate (100). The nucleation region (101) is composed of epitaxial AlN.

[0067] The seed substrate reforming step (S300) is a step of forming a reforming layer (110) parallel to the nucleation region inside the seed substrate (100) by irradiating the seed substrate (100) with a stealth laser.

[0068] The stealth laser (L) is a laser (stimulated emission amplification) with a wavelength that can penetrate the seed substrate (100) or the nucleation region (101), and uses an optical system to form a focal point at a specific point inside the seed substrate (100).

[0069] At the photon focal point of the stealth laser (L), a large number of bonds between the atoms are broken. At this time, when the photon focal point of the stealth laser (L) moves along a specific plane to form a scanning plane, the reforming layer (110) is formed along the scanning plane.

[0070] Preferably, the reforming layer (110) is formed at a depth from the upper surface of the seed substrate (100) where the nucleation region (101) is formed, and this depth corresponds to the thickness of the seed region (layer) (120).

[0071] The stealth laser (L) is preferably irradiated along a short path from both sides of the seed substrate (100) to the reforming layer (110), but it can also be irradiated along a relatively long path.

[0072] The temporary substrate bonding step (S400) is a step in which the temporary substrate (300) is bonded to the upper surface of the nucleation region (101) by a predetermined adhesive layer (301) after the seed substrate remodeling step (S300) has been completed as the first wafer bonding. Before forming the adhesive layer (301), a protective film can be formed using a predetermined material to protect the nucleation region (101).

[0073] The seed crystal region separation step (S500) is a step of separating the seed crystal region (layer) (120) with nucleation region (101) from the seed crystal substrate (100) with the reforming layer (110) as the boundary.

[0074] The seed crystal region separation step (S500) can be performed without external force during the cooling process of the heat applied in the temporary substrate bonding step (S400).

[0075] The two sides (100a vs. 120 / 101 / 301 / 300) bounded by the reforming layer (110) exhibit quantitative differences in thermal properties, including the coefficient of thermal expansion. Furthermore, there is structural asymmetry, including thickness differences, between the two sides bounded by the reforming layer (110). Due to at least one of these reasons, the two sides bounded by the reforming layer (110) can be separated without external force during cooling after the temporary substrate bonding step (S400).

[0076] This includes separating the two sides with minimal external force, using the reformed layer (110) as the boundary.

[0077] Specifically, the seed crystal region (layer) (120) and the seed crystal substrate (100a) are made of the same material, but with the reforming layer (110) as the boundary, a nucleation region (101) is formed on the seed crystal region (layer) (120), and a temporary substrate (300) is bonded to it by an adhesive layer (301).

[0078] Therefore, the effective coefficient of thermal expansion and effective thermal conductivity are different on the side bounded by the reforming layer (110) and including the seed crystal region (layer) (120), the nucleation region (101), the binder layer (301) and the temporary substrate (300), and on the side including the seed crystal substrate (100a) due to structural differences.

[0079] This is the factor that causes the different degrees of thermal expansion of the upper and lower sides relative to the reforming layer (110), and is the primary factor that allows the seed crystal region (layer) (120) and the seed crystal substrate (100a) to separate relative to the reforming layer (110) without external force.

[0080] Furthermore, there is a thickness difference between the seed crystal region (layer) (120) and the seed crystal substrate (100a), and a nucleation region (101) is formed on the seed crystal region (layer) (120), and a temporary substrate (300) is bonded to it through an adhesive layer (301).

[0081] Therefore, the internal stresses on both sides of the reforming layer (110) are different. This generates mechanical stress in the reforming layer (110), which serves as the boundary between the seed region (layer) (120) and the seed substrate (100a), and becomes another factor that allows the seed region (layer) (120) to separate from the seed substrate (100a) without external force, with the reforming layer (110) as the boundary.

[0082] The inventor named this separation method "thermal self-division".

[0083] This can be explained by comparing the aforementioned "thermal self-split" with methods using ion implantation.

[0084] The ion implantation method involves forcibly injecting hydrogen ions into the seed substrate to form a reforming layer, and then separating the seed region.

[0085] Ion implantation technology is based on accelerating hydrogen ions so that they can penetrate the surface of a target substrate and be buried at a specific depth.

[0086] Therefore, the surface and interior of the seed substrate along the hydrogen ion path will inevitably be damaged by hydrogen ions (implantation damage), and a high-temperature annealing process must be performed to repair this damage.

[0087] This not only increases manufacturing costs, but also leads to longer delivery times due to additional processes.

[0088] Furthermore, the depth of penetration of the injected hydrogen ions varies depending on the amount of energy applied and the energy lost due to collisions with the surface. Therefore, it is difficult to ensure the uniformity of the seed region, especially when the remaining seed substrate (100) is reused after separating the seed region, and subsequent processes such as heat treatment are essential.

[0089] Next, according to an embodiment of the present invention, a wafer bonding step (S700) is included, in which a support substrate (210) is bonded to the side opposite to the side where the nucleation region (101) is formed on both sides of the seed region (layer) (120) separated in the seed region separation step (S500) via a predetermined wafer bonding layer (130) through a secondary wafer bonding step.

[0090] Preferably, a step (S600) is included before the wafer bonding step (S700) in which the supporting substrate (210) is bonded on one side of the planarization seed region (layer) (120).

[0091] One side of the seed substrate (100) generated by the separation of the seed region (layer) (120) is also planarized to grow new nucleation regions.

[0092] Subsequently, by performing a temporary substrate removal step (S800) to separate the temporary substrate (300) from the nucleation region (101), the fabrication of the engineered growth substrate for a group III nitride power device having a nucleation region formed according to this embodiment is completed.

[0093] Meanwhile, in embodiments of the present invention, the temporary substrate (300) is preferably selected to have a coefficient of thermal expansion (effective coefficient of thermal expansion) and thermal conductivity (effective thermal conductivity) similar to or the same as that of the supporting substrate (210).

[0094] Furthermore, it is preferable that both the temporary substrate (300) and the support substrate (200) have single-crystal structures.

[0095] This allows the support substrate (210) and the seed crystal region (layer) (120) to bond well in the wafer bonding step (S700).

[0096] Meanwhile, the bonding layer (301) between the temporary substrate (300) and the nucleation region (101) can be selected from organic materials (polymers), such as resins, epoxy resins, SU-8, BCB, etc., which enable the temporary substrate (300) to be easily removed and separated in the subsequent temporary substrate removal step (S800); metals, such as Sn, In, Zn, Ga, Au, Ni, Ag, Cu, etc.; and ceramic materials, such as SiO2, SiN x , ITO, GaN, InGaN, AlGaN, AlGaInN, ZnO, ZITO, etc.

[0097] Next, a wafer bonding layer (130) is formed between the support substrate (210) and the seed region (layer) (120) using a dielectric ceramic material, such as SiO2 or SiN. XSOG (spin-coated glass), AlN, Al2O3, ITO, GaN, InGaN, AlGaN, AlGaInN, ZnO or ZITO.

[0098] To obtain excellent bonding properties, it is preferable to form a surface with a surface roughness of less than 1 nm before bonding. In addition, surface treatments such as plasma or solution treatments can be performed to increase surface energy.

Claims

1. A method for manufacturing an engineered growth substrate for group III nitride power devices, wherein a nucleation region is formed in the engineered growth substrate, the method comprising: Seed substrate preparation step (S100): Prepare a seed substrate made of single crystal SiC with a set thickness; In the nucleation region formation step (S200), a nucleation region is formed on the upper surface of the seed crystal substrate; In the seed crystal substrate reforming step (S300), the seed crystal substrate is irradiated with a stealth laser to form a reforming layer parallel to the nucleation region inside the seed crystal substrate. In the temporary substrate bonding step (S400), after the seed substrate reforming step (S300), a predetermined adhesive layer is used to bond the temporary substrate to the upper surface of the nucleation region. as well as In the seed crystal region separation step (S500), the seed crystal region (layer) on which the nucleation region is formed is separated from the seed crystal substrate, with the reforming layer as the boundary.

2. The method according to claim 1, wherein, The method further includes: a wafer bonding step (S700), in which a support substrate is bonded to a surface opposite to the surface on which the nucleation region is formed, on either side of the seed region (layer) separated by the seed region separation step (S500) via a predetermined wafer bonding layer; and a temporary substrate removal step (S800), in which the temporary substrate is separated from the nucleation region.

3. The method according to claim 2, wherein, Prior to the wafer bonding step (S700), a step (S600) is included to planarize the surface of the seed region (layer) to which the support substrate is bonded.

4. The method according to claim 1, wherein, The seed crystal region separation step (S500) is characterized in that, due to structural asymmetry including differences in the quantity or thickness of thermal properties, the region is separated from the two sides bounded by the reforming layer without external force, wherein the thermal properties include the coefficient of thermal expansion.

5. The method according to claim 2, wherein, The supporting substrate is characterized in that its thermal properties, including effective thermal expansion coefficient and effective thermal conductivity, are similar to or the same as those of the seed crystal region (layer).

6. The method according to claim 1, wherein, The film quality of the nucleation region is equal to or higher than that of a film epitaxially grown on a seed substrate with a thickness at least twice that of the seed region (layer) under the same growth conditions, and the film quality includes thickness uniformity or crystal defect density.

7. The method according to claim 1, wherein, The nucleation region is epitaxial AlN, and the seed region (layer) has a thickness of 50 μm to 200 μm.

8. The method according to claim 6, wherein, The crystal defect density includes penetrating dislocations, inverse domains (IDs), and inverse domain boundaries (IDBs).

9. The method according to claim 2, wherein the supporting substrate is any one of single-crystal Si, single-crystal SiC, polycrystalline AlN ceramic, and polycrystalline SiC ceramic.

10. The method according to claim 1, wherein, Positive or negative patterns are formed on the growth surface of the nucleation region grown on the seed crystal substrate.

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