Signal failure control method and device of vehicle-mounted charger, storage medium, computer program product, vehicle-mounted charger and vehicle

By identifying the validity of the three-phase AC power sampling values ​​of the on-board charger, determining the working mode and matching the charging strategy, the problem of abnormal charging caused by the failure of the PFC circuit sampling signal is solved, thereby improving the reliability of the on-board charger and reducing maintenance costs.

CN121012174APending Publication Date: 2025-11-25BYD CO LTD
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Patent Information

Application Number
CN202410661378.X
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-05-24
Publication Date
2025-11-25

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Abstract

The invention discloses a signal failure control method and device of a vehicle-mounted charger, a storage medium, a computer program product, the vehicle-mounted charger and a vehicle. The method comprises the following steps: acquiring a sampling value of each phase voltage and a sampling value of each phase current in three-phase alternating current of a power factor correction circuit; respectively carrying out validity identification on the sampling value of each phase voltage and the sampling value of each phase current; and determining a working mode of the vehicle-mounted charger according to the validity identification result, and executing a corresponding charging strategy according to the working mode. When the sampling signal of the power factor correction circuit fails, normal charging of the vehicle-mounted charger can still be ensured, the reliability of the vehicle-mounted charger is improved, and the after-sales maintenance cost is reduced.
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Description

Technical Field

[0001] This application relates to the field of on-board charger technology, and more specifically to a signal failure control method, device, storage medium, computer program product, on-board charger, and vehicle for an on-board charger. Background Technology

[0002] The three-phase OBC (On-board charger) charging system includes two levels of control: PFC (power factor correction) and LLC (resonant conversion). The front-end PFC mainly involves three-phase power factor correction control to achieve AC-DC voltage boost and power factor regulation. The back-end LLC involves isolation resonant control, mainly performing DC-DC conversion, and realizing software switching and charging current control.

[0003] In related technologies, when the sampling signal of the three-phase AC power of the PFC circuit fails, the on-board charger cannot be guaranteed to charge normally. Summary of the Invention

[0004] According to one aspect of this application, a signal failure control method for an on-board charger is provided. The on-board charger includes a power factor correction circuit. The method includes: acquiring sampled values ​​of the voltage of each phase and the current of each phase in the three-phase AC power supply of the power factor correction circuit; performing validity identification on the sampled values ​​of the voltage of each phase and the current of each phase respectively; determining the operating mode of the on-board charger based on the validity identification result; and executing a corresponding charging strategy according to the operating mode.

[0005] In one embodiment of this application, valid identification of the sampled value of each phase voltage includes: determining the operating condition in which the sampled value of the voltage is located, wherein the operating condition includes a first operating condition and a second operating condition, and the voltage of the first operating condition is less than the voltage of the second operating condition; and determining the validity identification result of the sampled value of the voltage based on the magnitude of the sampled value of the voltage relative to the voltage preset value corresponding to the operating condition in which it is located.

[0006] In one embodiment of this application, determining the validity identification result of the voltage sampling value based on the magnitude of the voltage sampling value relative to the voltage preset value corresponding to its operating condition includes: under the first operating condition: if the voltage sampling value is greater than or equal to a first voltage preset value and less than or equal to a second voltage preset value, the validity identification result of the voltage sampling value is that the sampling signal is normal; if the voltage sampling value is less than the first voltage preset value or greater than the second voltage preset value, the validity identification result of the voltage sampling value is that the sampling signal is abnormal; or, under the second operating condition: if the voltage sampling value is greater than or equal to a third voltage preset value and less than or equal to a fourth voltage preset value, the validity identification result of the voltage sampling value is that the sampling signal is normal; if the voltage sampling value is less than the third voltage preset value or greater than the fourth voltage preset value, the validity identification result of the voltage sampling value is that the sampling signal is abnormal.

[0007] In one embodiment of this application, valid identification of the sampled value of each phase current includes: determining the operating condition in which the sampled value of the current is located, wherein the operating condition includes a first operating condition and a second operating condition, and the voltage of the first operating condition is less than the voltage of the second operating condition; and determining the validity identification result of the sampled value of the current based on the magnitude of the sampled value of the current relative to the current preset value corresponding to the operating condition in which it is located.

[0008] In one embodiment of this application, determining the validity identification result of the current sampling value based on the current preset value corresponding to the current operating condition and the magnitude of the current sampling value includes: under the first operating condition: if the current sampling value is greater than or equal to a first current preset value and less than or equal to a second current preset value, the validity identification result of the current sampling value is that the sampling signal is normal; if the current sampling value is less than the first current preset value or greater than the second current preset value, the validity identification result of the current sampling value is that the sampling signal is abnormal; or, under the second operating condition: if the current sampling value is greater than or equal to a third current preset value and less than or equal to a fourth current preset value, the validity identification result of the current sampling value is that the sampling signal is normal; if the current sampling value is less than the third current preset value or greater than the fourth current preset value, the validity identification result of the current sampling value is that the sampling signal is abnormal.

[0009] In one embodiment of this application, when the validity identification result of the sampled voltage of each phase of the three-phase AC power is that the sampling signal is normal: if the validity identification result of the sampled current of each phase of the three-phase AC power is that the sampling signal is normal, the on-board charger operates in normal mode; if the validity identification result of the sampled current of one phase of the three-phase AC power is that the sampling signal is abnormal, the on-board charger operates in first failure mode; if the validity identification result of the sampled current of two phases of the three-phase AC power is that the sampling signal is abnormal, the on-board charger operates in second failure mode. Alternatively, when the validity identification result of the sampled current of each phase of the three-phase AC power is that the sampled signal is normal: if the validity identification result of the sampled voltage of each phase of the three-phase AC power is that the sampled signal is normal, the on-board charger operates in the normal mode; if the validity identification result of the sampled voltage of one phase of the three-phase AC power is that the sampled signal is abnormal, the on-board charger operates in the third failure mode; if the validity identification result of the sampled voltage of two phases of the three-phase AC power is that the sampled signal is abnormal, the on-board charger operates in the second failure mode.

[0010] In one embodiment of this application, the on-board charger further includes a resonant conversion circuit, and the method further includes: acquiring current sampling values ​​of the resonant conversion circuit; and validating the current sampling values ​​of the resonant conversion circuit; wherein the charging strategy corresponding to the operating mode of the on-board charger is related to the validity identification result of the current sampling values ​​of the resonant conversion circuit.

[0011] In one embodiment of this application, when the validity identification result of the current sampling value of the resonant conversion circuit is that the sampling signal is normal, the charging strategy corresponding to the normal mode or the first failure mode is a three-phase voltage and current dual-loop control charging strategy; when the validity identification result of the current sampling value of the resonant conversion circuit is that the sampling signal is abnormal, the charging strategy corresponding to the normal mode or the first failure mode is a three-phase current single-loop control charging strategy.

[0012] In one embodiment of this application, when the validity identification result of the current sampling value of the resonant conversion circuit is that the sampling signal is normal, the charging strategy corresponding to the second failure mode is a single-phase voltage and current dual-loop control charging strategy; when the validity identification result of the current sampling value of the resonant conversion circuit is that the sampling signal is abnormal, the charging strategy corresponding to the second failure mode is a single-phase current single-loop control charging strategy.

[0013] In one embodiment of this application, when the validity identification result of the current sampling value of the resonant conversion circuit is that the sampling signal is normal, the charging strategy corresponding to the third failure mode is a single-phase voltage and current dual-loop interleaved control charging strategy; when the validity identification result of the current sampling value of the resonant conversion circuit is that the sampling signal is normal, the charging strategy corresponding to the third failure mode is a single-phase current interleaved single-loop control charging strategy.

[0014] In one embodiment of this application, the method further includes: determining the frequency control mode of the resonant conversion circuit based on the validity identification result of the current sampling value of the resonant conversion circuit.

[0015] In one embodiment of this application, when the validity identification result of the current sampling value of the resonant conversion circuit is that the sampling signal is normal, the frequency control mode of the resonant conversion circuit is a frequency modulation control mode; when the validity identification result of the current sampling value of the resonant conversion circuit is that the sampling signal is abnormal, the frequency control mode of the resonant conversion circuit is a fixed frequency control mode.

[0016] According to another aspect of this application, a signal failure control device for an on-board charger is provided. The device includes a processor and a memory. The memory stores a computer program that is executed by the processor. When the computer program is executed by the processor, it causes the processor to perform the above-described signal failure control method for an on-board charger.

[0017] According to another aspect of this application, a computer-readable storage medium is provided, on which a computer program is stored, which, when run by a processor, causes the processor to execute the above-described on-board charger signal failure control method.

[0018] According to another aspect of this application, an on-board charger is provided, the on-board charger including the above-described on-board charger signal failure control device or the above-described computer-readable storage medium.

[0019] According to another aspect of this application, a vehicle is provided, the vehicle including the above-described on-board charger.

[0020] According to another aspect of this application, a computer program product is provided, which, when run by a processor, causes the processor to execute the above-described on-board charger signal failure control method.

[0021] The signal failure control method, device, storage medium, computer program product, on-board charger, and vehicle of this application identify the validity of the sampled voltage and current of each phase in the three-phase AC power of the power factor correction circuit. Based on the validity identification results, the on-board charger is matched to the corresponding working mode, and then the corresponding charging strategy is executed according to the working mode. Thus, even when the sampling signal of the power factor correction circuit fails, the on-board charger can still be guaranteed to charge normally, improving the reliability of the on-board charger and reducing after-sales maintenance costs. Attached Figure Description

[0022] The above and other objects, features, and advantages of this application will become more apparent from the more detailed description of the embodiments of this application in conjunction with the accompanying drawings. The drawings are provided to further illustrate the embodiments of this application and form part of the specification. They are used together with the embodiments of this application to explain this application and do not constitute a limitation thereof. In the drawings, the same reference numerals generally represent the same components or steps.

[0023] Figure 1 A schematic diagram of a three-phase OBC charging system according to an embodiment of this application is shown.

[0024] Figure 2 A schematic flowchart illustrating a signal failure control method for an on-board charger according to an embodiment of this application is shown.

[0025] Figure 3 A flowchart illustrating a signal failure control method for an on-board charger according to an embodiment of this application is shown.

[0026] Figure 4 A flowchart illustrating the validity identification process according to an embodiment of this application is shown.

[0027] Figure 5 A flowchart illustrating the operating mode corresponding to an abnormal AC current sampling signal according to an embodiment of this application is shown.

[0028] Figure 6 A flowchart illustrating the operating mode corresponding to an abnormal AC voltage sampling signal according to an embodiment of this application is shown.

[0029] Figure 7 A flowchart illustrating the charging strategy corresponding to the operating mode of the on-board charger according to an embodiment of this application is shown.

[0030] Figure 8 The diagram shows the control loop structure of a three-phase voltage and current dual-loop control charging strategy according to an embodiment of this application.

[0031] Figure 9A control loop structure diagram of a single-phase voltage and current dual-loop control charging strategy according to an embodiment of this application is shown.

[0032] Figure 10 The diagram shows the control loop structure of a single-phase voltage and current dual-loop interleaved control charging strategy according to an embodiment of this application.

[0033] Figure 11 The diagram illustrates the control flowchart of the power factor correction circuit when the validity identification result of the current sampling value of the resonant conversion circuit according to an embodiment of the present application is normal, and the sampling signal fails.

[0034] Figure 12 A control loop structure diagram of a three-phase current single-loop control charging strategy according to an embodiment of this application is shown.

[0035] Figure 13 A control loop structure diagram of a single-phase current single-loop control charging strategy according to an embodiment of this application is shown.

[0036] Figure 14 A control loop structure diagram of a single-phase current interleaved control charging strategy according to an embodiment of this application is shown.

[0037] Figure 15 The diagram illustrates the control flowchart for signal failure in the power factor correction circuit when the validity identification result of the current sampling value of the resonant conversion circuit according to an embodiment of this application is abnormal.

[0038] Figure 16 A control loop structure diagram of frequency modulation control of a resonant conversion circuit according to an embodiment of this application is shown.

[0039] Figure 17 A control loop structure diagram of a resonant converter circuit with fixed-frequency control according to an embodiment of this application is shown.

[0040] Figure 18 A schematic structural block diagram of a signal failure control device for an on-board charger according to an embodiment of this application is shown. Detailed Implementation

[0041] To make the objectives, technical solutions, and advantages of this application more apparent, exemplary embodiments according to this application will be described in detail below with reference to the accompanying drawings. Obviously, the described embodiments are merely a part of the embodiments of this application, and not all of the embodiments of this application. It should be understood that this application is not limited to the exemplary embodiments described herein. Based on the embodiments of this application described herein, all other embodiments obtained by those skilled in the art without inventive effort should fall within the protection scope of this application.

[0042] Figure 1A schematic diagram of a three-phase OBC charging system according to an embodiment of this application is shown. As shown, the charging system includes a PFC circuit and an LLC circuit. The PFC circuit includes inductors L1, L2, and L3, switching transistors P1, P2, P3, P4, P5, P6, P7, and P8, switching transistors Q1, Q2, Q3, and Q4, capacitor Uci, and capacitor Cr. The LLC circuit includes switching transistors Q5, Q6, Q7, and Q8.

[0043] Figure 2 A schematic flowchart of a signal failure control method 200 for an on-board charger according to an embodiment of this application is shown. Figure 2 As shown, the on-board charger signal failure control method 200 according to an embodiment of this application may include the following steps:

[0044] In step S210, the sampled values ​​of the voltage and current of each phase in the three-phase AC power of the power factor correction circuit are obtained.

[0045] In step S220, the validity of the sampled values ​​of each phase voltage and each phase current is identified.

[0046] In step S230, the working mode of the on-board charger is determined based on the validity identification result, and the corresponding charging strategy is executed according to the working mode.

[0047] like Figure 3 As shown, the sampled values ​​of the voltage of each phase in the three-phase AC power supply of the power factor correction circuit can be AC ​​voltages Ua, Ub, and Uc, respectively, and the sampled values ​​of the current of each phase in the three-phase AC power supply of the power factor correction circuit can be AC ​​currents Ia, Ib, and Ic, respectively. After acquiring Ua, Ub, and Uc, the validity of the sampled values ​​of each phase voltage is identified. Similarly, after acquiring Ia, Ib, and Ic, the validity of the sampled values ​​of each phase current is identified. Then, based on the validity identification results of the sampled values ​​of each phase voltage and each phase current, the operating mode of the on-board charger is determined, and the corresponding charging strategy is executed according to the determined operating mode. Therefore, even when the sampling signal of the power factor correction circuit fails, the on-board charger can still ensure normal charging, improving the reliability of the on-board charger and reducing after-sales maintenance costs.

[0048] Based on this, this application provides a signal failure control method 200 for an on-board charger that ensures normal charging even when the sampling signal fails. According to the signal failure control method 200 of this application, the validity of the sampled voltage and current values ​​of each phase in the three-phase AC power of the power factor correction circuit is identified. Based on the validity identification results, the on-board charger is matched to the corresponding operating mode, and then the corresponding charging strategy is executed according to the operating mode. Therefore, even when the sampling signal of the power factor correction circuit fails, normal charging of the on-board charger can still be ensured, improving the reliability of the on-board charger and reducing after-sales maintenance costs.

[0049] In some embodiments, for each phase voltage sample value, its validity identification result can be determined based on the magnitude of the voltage sample value relative to a preset voltage value. Specifically, the operating condition of the voltage sample value can be determined first, where the operating condition includes a first operating condition and a second operating condition. The voltage of the first operating condition is less than the voltage of the second operating condition, that is, the first operating condition can be called a low voltage operating condition, and the second operating condition can be called a high voltage operating condition. Then, the validity identification result is determined based on the magnitude of the voltage sample value relative to the preset voltage value corresponding to its operating condition.

[0050] Among them, such as Figure 4 As shown, if the voltage sampling value is in the first operating condition, under the first operating condition: if the voltage sampling value is greater than or equal to the first voltage preset value and less than or equal to the second voltage preset value, the validity identification result of the voltage sampling value is that the sampling signal is normal; if the voltage sampling value is less than the first voltage preset value or greater than the second voltage preset value, the validity identification result of the voltage sampling value is that the sampling signal is abnormal.

[0051] like Figure 4 As shown, if the voltage sampling value is in the second operating condition, under the second operating condition: if the voltage sampling value is greater than or equal to the third voltage preset value and less than or equal to the fourth voltage preset value, the validity identification result of the voltage sampling value is that the sampling signal is normal; if the voltage sampling value is less than the third voltage preset value or greater than the fourth voltage preset value, the validity identification result of the voltage sampling value is that the sampling signal is abnormal.

[0052] In some embodiments, for each phase current sample value, its validity identification result can be determined based on the magnitude of the current sample value relative to a preset current value. Specifically, the operating condition in which the current sample value is located can be determined first, where the operating condition includes a first operating condition and a second operating condition. The voltage of the first operating condition is lower than the voltage of the second operating condition, that is, the first operating condition can be called a low-voltage operating condition, and the second operating condition can be called a high-voltage operating condition. Then, the validity identification result is determined based on the magnitude of the current sample value relative to the preset current value corresponding to its operating condition.

[0053] Among them, such as Figure 4 As shown, if the current sampling value is in the first operating condition, under the first operating condition: if the current sampling value is greater than or equal to the first current preset value and less than or equal to the second current preset value, the validity identification result of the current sampling value is that the sampling signal is normal; if the current sampling value is less than the first current preset value or greater than the second current preset value, the validity identification result of the current sampling value is that the sampling signal is abnormal.

[0054] like Figure 4 As shown, if the current sampling value is in the second operating condition, under the second operating condition: if the current sampling value is greater than or equal to the third current preset value and less than or equal to the fourth current preset value, the validity identification result of the current sampling value is that the sampling signal is normal; if the current sampling value is less than the third current preset value or greater than the fourth current preset value, the validity identification result of the current sampling value is that the sampling signal is abnormal.

[0055] Then, the operating mode of the on-board charger can be determined based on the validity identification results of the sampled values ​​of each phase voltage and the validity identification results of the sampled values ​​of each phase current.

[0056] Specifically, when the validity identification result of the sampled voltage of each phase of the three-phase AC power is that the sampled signal is normal: if the validity identification result of the sampled current of each phase of the three-phase AC power is that the sampled signal is normal, the on-board charger operates in normal mode; if the validity identification result of the sampled current of one phase of the three-phase AC power is that the sampled signal is abnormal, the on-board charger operates in the first failure mode; if the validity identification result of the sampled current of two phases of the three-phase AC power is that the sampled signal is abnormal, the on-board charger operates in the second failure mode.

[0057] The first failure mode can include failure mode 0, and the second failure mode can include failure modes 4, 5, and 6. Specifically, it can be as follows: Figure 5As shown, when the validity identification results of Ua, Ub, and Uc are all normal sampling signals: if the validity identification results of Ia, Ib, and Ic are all normal sampling signals, the on-board charger operates in normal mode; if the validity identification result of Ia is an abnormal sampling signal, and the validity identification results of Ib and Ic are both normal sampling signals, the on-board charger operates in failure mode 0; if the validity identification result of Ib is an abnormal sampling signal, and the validity identification results of Ia and Ic are both normal sampling signals, the on-board charger operates in failure mode 0; if the validity identification result of Ic is an abnormal sampling signal, and the validity identification results of Ia and Ic are both normal sampling signals, the on-board charger operates in failure mode 0; if the validity identification result of Ic is an abnormal sampling signal, and Ia and If the validity identification results of Ib are both normal sampling signals, then the on-board charger operates in failure mode 0; if the validity identification results of Ia and Ib are both abnormal sampling signals, and the validity identification result of Ic is normal sampling signals, then the on-board charger operates in failure mode 6; if the validity identification results of Ia and Ic are both abnormal sampling signals, and the validity identification result of Ib is normal sampling signals, then the on-board charger operates in failure mode 5; if the validity identification results of Ib and Ic are both abnormal sampling signals, and the validity identification result of Ia is normal sampling signals, then the on-board charger operates in failure mode 4.

[0058] When the validity identification result of the sampling value of each phase current in the three-phase AC power is normal: if the validity identification result of the sampling value of each phase voltage in the three-phase AC power is normal, the on-board charger operates in normal mode; if the validity identification result of the sampling value of one phase voltage in the three-phase AC power is abnormal, the on-board charger operates in third failure mode; if the validity identification result of the sampling value of two phase voltages in the three-phase AC power is abnormal, the on-board charger operates in second failure mode.

[0059] The second failure mode can include failure modes 4, 5, and 6, and the third failure mode can include failure modes 1, 2, and 3. Specifically, it can be as follows: Figure 6As shown, when the validity identification results of Ia, Ib, and Ic are all normal sampling signals: if the validity identification results of Ua, Ub, and Uc are all normal sampling signals, the on-board charger operates in normal mode; if the validity identification result of Ua is an abnormal sampling signal, and the validity identification results of Ub and Uc are both normal sampling signals, the on-board charger operates in failure mode 3; if the validity identification result of Ub is an abnormal sampling signal, and the validity identification results of Ua and Uc are both normal sampling signals, the on-board charger operates in failure mode 2; if the validity identification result of Uc is an abnormal sampling signal, and the validity identification results of Ua and Uc are both normal sampling signals, the on-board charger operates in failure mode 2; if the validity identification result of Uc is an abnormal sampling signal, and the validity identification results of Ua and Uc are both normal sampling signals, the on-board charger operates in failure mode 2; if the validity identification result of Uc is an abnormal sampling signal, and the validity identification results of Ua and Uc are both normal sampling signals, the on-board charger operates in failure mode 2. If the validity identification results of Ua and Ub are both normal sampling signals, then the on-board charger's operating mode is failure mode 1; if the validity identification results of Ua and Ub are both abnormal sampling signals, and the validity identification result of Uc is normal sampling signals, then the on-board charger's operating mode is failure mode 6; if the validity identification results of Ua and Uc are both abnormal sampling signals, and the validity identification result of Ub is normal sampling signals, then the on-board charger's operating mode is failure mode 5; if the validity identification results of Ub and Uc are both abnormal sampling signals, and the validity identification result of Ua is normal sampling signals, then the on-board charger's operating mode is failure mode 4.

[0060] In some embodiments, such as Figure 1 As shown, since the on-board charger also includes a resonant conversion circuit, the charging strategy corresponding to the working mode of the on-board charger will be affected by the current sampling value of the resonant conversion circuit. That is, under the same working mode, the specific charging strategy will be different due to the influence of the current sampling value of the resonant conversion circuit.

[0061] Specifically, when acquiring the sampled values ​​of the voltage and current of each phase in the three-phase AC power of the power factor correction circuit, the current sampled value of the resonant conversion circuit can also be acquired. Similarly, when validating the sampled values ​​of the voltage and current of each phase in the three-phase AC power of the power factor correction circuit, the current sampled value of the resonant conversion circuit can also be validated.

[0062] Analogous to the process of validating the sampled voltage and current values ​​of each phase in a three-phase AC power factor correction circuit, the validity of the current sampled values ​​in a resonant converter circuit can also be determined based on the magnitude of the current sampled values ​​relative to a preset current value. Specifically, the operating condition of the resonant converter circuit's current sampled values ​​can be determined first, including a first operating condition and a second operating condition. The voltage of the first operating condition is lower than that of the second operating condition; that is, the first operating condition can be called a low-voltage condition, and the second operating condition can be called a high-voltage condition. Then, the validity of the resonant converter circuit's current sampled values ​​is determined based on the magnitude of the preset current value corresponding to its operating condition.

[0063] If the current sampling value of the resonant conversion circuit is in the first operating condition, under the first operating condition: if the current sampling value of the resonant conversion circuit is greater than or equal to the fifth current preset value and less than or equal to the sixth current preset value, the validity identification result of the current sampling value of the resonant conversion circuit is that the sampling signal is normal; if the current sampling value of the resonant conversion circuit is less than the fifth current preset value or greater than the sixth current preset value, the validity identification result of the current sampling value of the resonant conversion circuit is that the sampling signal is abnormal.

[0064] If the current sampling value of the resonant converter circuit is in the second operating condition, under the second operating condition: if the current sampling value of the resonant converter circuit is greater than or equal to the seventh current preset value and less than or equal to the eighth current preset value, the validity identification result of the current sampling value of the resonant converter circuit is that the sampling signal is normal; if the current sampling value of the resonant converter circuit is less than the seventh current preset value or greater than the eighth current preset value, the validity identification result of the current sampling value of the resonant converter circuit is that the sampling signal is abnormal.

[0065] The charging strategy corresponding to the working mode of the on-board charger is related to the validity identification result of the current sampling value of the resonant conversion circuit.

[0066] In some embodiments, when the validity identification result of the current sampling value of the resonant conversion circuit is that the sampling signal is normal, the charging strategy corresponding to the normal mode or the first failure mode is a three-phase voltage and current dual-loop control charging strategy.

[0067] like Figure 7 As shown, when the validity identification result of the current sampling value Io of the resonant conversion circuit is that the sampling signal is normal, taking the normal mode as an example, the validity identification results of Ua, Ub and Uc are all that the sampling signal is normal, and the validity identification results of Ia, Ib and Ic are also that the sampling signal is normal. Therefore, the three-phase voltage and current dual-loop control charging strategy can be realized based on Ia, Ib and Ic.

[0068] like Figure 7As shown, when the validity identification result of the current sampling value Io of the resonant conversion circuit is that the sampling signal is normal, taking the first failure mode as an example, when the validity identification result of Ia is that the sampling signal is abnormal, and the validity identification results of Ib and Ic are both that the sampling signals are normal, the substitute value of Ia can be calculated as -Ib-Ic. Then, based on the substitute value of Ia, Ib, and Ic, a three-phase voltage and current dual-loop control charging strategy is implemented. When the validity identification result of Ib is that the sampling signal is abnormal, and the validity identification results of Ia and Ic are both that the sampling signals are normal, the substitute value of Ib can be calculated as -Ia-Ic. Then, based on the substitute value of Ib, Ia, and Ic, a three-phase voltage and current dual-loop control charging strategy is implemented. When the validity identification result of Ic is that the sampling signal is abnormal, and the validity identification results of Ia and Ib are both that the sampling signals are normal, the substitute value of Ic can be calculated as -Ia-Ib. Then, based on the substitute value of Ic, Ia, and Ib, a three-phase voltage and current dual-loop control charging strategy is implemented.

[0069] In the execution of the three-phase voltage and current dual-loop control charging strategy, switches P1, P2, P3, P4, P5, and P6 in the control PFC circuit operate at high frequency, while switches P7 and P8 operate either off or at power frequency. The total charging power is P. The control loop structure of the three-phase voltage and current dual-loop control charging strategy can be found in [reference needed]. Figure 8 As shown, in the three-phase voltage and current dual-loop control charging strategy, the outer loop controls the PFC voltage Uci, while the inner loop controls the active current id and reactive current iq.

[0070] In some embodiments, when the validity identification result of the current sampling value of the resonant conversion circuit is that the sampling signal is normal, the charging strategy corresponding to the second failure mode is a single-phase voltage and current dual-loop control charging strategy.

[0071] like Figure 7 As shown, when the validity identification result of the current sampling value Io of the resonant conversion circuit is that the sampling signal is normal, taking failure mode 6 as an example, when the validity identification results of Ia and Ib are both abnormal sampling signals and the validity identification result of Ic is normal sampling signals, a single-phase voltage and current dual-loop control charging strategy can be implemented based on Ic; or, when the validity identification results of Ua and Ub are both abnormal sampling signals and the validity identification result of Uc is normal sampling signals, a single-phase voltage and current dual-loop control charging strategy can be implemented based on Uc.

[0072] In the single-phase voltage and current dual-loop control charging strategy, switches P5 and P6 in the control PFC circuit operate at high frequency, while switches P7 and P8 are either off or operate at power frequency. The total charging power is P / 3. The control loop structure of the single-phase voltage and current dual-loop control charging strategy can be found in [reference needed]. Figure 9As shown. In the single-phase voltage and current dual-loop control charging strategy, the outer loop controls the PFC voltage Uci, and the inner loop controls the AC current Ia.

[0073] like Figure 7 As shown, when the validity identification result of the current sampling value Io of the resonant conversion circuit is that the sampling signal is normal, taking failure mode 5 as an example, when the validity identification results of Ia and Ic are both abnormal sampling signals and the validity identification result of Ib is normal sampling signals, a single-phase voltage and current dual-loop control charging strategy can be implemented based on Ib; or, when the validity identification results of Ua and Uc are both abnormal sampling signals and the validity identification result of Ub is normal sampling signals, a single-phase voltage and current dual-loop control charging strategy can be implemented based on Ub.

[0074] In the single-phase voltage and current dual-loop control charging strategy, switches P3 and P4 in the control PFC circuit operate at high frequency, while switches P7 and P8 are either off or operate at power frequency. The total charging power is P / 3. The control loop structure of the single-phase voltage and current dual-loop control charging strategy can be found in [reference needed]. Figure 9 As shown. In the single-phase voltage and current dual-loop control charging strategy, the outer loop controls the PFC voltage Uci, and the inner loop controls the AC current Ia.

[0075] like Figure 7 As shown, when the validity identification result of the current sampling value Io of the resonant conversion circuit is that the sampling signal is normal, taking failure mode 4 as an example, when the validity identification results of Ib and Ic are both abnormal sampling signals and the validity identification result of Ia is normal sampling signals, a single-phase voltage and current dual-loop control charging strategy can be implemented based on Ib; or, when the validity identification results of Ub and Uc are both abnormal sampling signals and the validity identification result of Ua is normal sampling signals, a single-phase voltage and current dual-loop control charging strategy can be implemented based on Ub.

[0076] In the single-phase voltage and current dual-loop control charging strategy, switches P1 and P2 in the control PFC circuit operate at high frequency, while switches P7 and P8 are either off or operate at power frequency. The total charging power is P / 3. The control loop structure of the single-phase voltage and current dual-loop control charging strategy can be found in [reference needed]. Figure 9 As shown. In the single-phase voltage and current dual-loop control charging strategy, the outer loop controls the PFC voltage Uci, and the inner loop controls the AC current Ia.

[0077] In some embodiments, when the validity identification result of the current sampling value of the resonant conversion circuit is that the sampling signal is normal, the charging strategy corresponding to the third failure mode is a single-phase voltage and current dual-loop interleaved control charging strategy.

[0078] like Figure 7As shown, when the validity identification result of the current sampling value Io of the resonant conversion circuit is that the sampling signal is normal, taking failure mode 3 as an example, when the validity identification result of Ua is that the sampling signal is abnormal, and the validity identification results of Ub and Uc are both that the sampling signal is normal, a single-phase voltage and current dual-loop interleaved control charging strategy can be implemented based on Ub and Uc.

[0079] In the single-phase voltage and current dual-loop interleaved control charging strategy, switches P3, P4, P5, and P6 in the control PFC circuit operate at high frequency, while switches P7 and P8 operate either off or at power frequency. The total charging power is 2P / 3. The control loop structure of the single-phase voltage and current dual-loop interleaved control charging strategy can be found in [reference needed]. Figure 10 As shown, in the single-phase voltage and current dual-loop interleaved control charging strategy, the outer loop controls the PFC voltage Uci, and the inner loop controls the AC currents Ia and Ib.

[0080] like Figure 7 As shown, when the validity identification result of the current sampling value Io of the resonant conversion circuit is that the sampling signal is normal, taking failure mode 2 as an example, when the validity identification result of Ub is that the sampling signal is abnormal, and the validity identification results of Ua and Uc are both that the sampling signal is normal, a single-phase voltage and current dual-loop interleaved control charging strategy can be implemented based on Ua and Uc.

[0081] In the single-phase voltage and current dual-loop interleaved control charging strategy, switches P1, P2, P5, and P6 in the control PFC circuit operate at high frequency, while switches P7 and P8 operate either off or at power frequency. The total charging power is 2P / 3. The control loop structure of the single-phase voltage and current dual-loop interleaved control charging strategy can be found in [reference needed]. Figure 10 As shown, in the single-phase voltage and current dual-loop interleaved control charging strategy, the outer loop controls the PFC voltage Uci, and the inner loop controls the AC currents Ia and Ib.

[0082] like Figure 7 As shown, when the validity identification result of the current sampling value Io of the resonant conversion circuit is that the sampling signal is normal, taking failure mode 1 as an example, when the validity identification result of Uc is that the sampling signal is abnormal, and the validity identification results of Ua and Ub are both that the sampling signal is normal, a single-phase voltage and current dual-loop interleaved control charging strategy can be implemented based on Ua and Ub.

[0083] In the single-phase voltage and current dual-loop interleaved control charging strategy, switches P1, P2, P3, and P4 in the control PFC circuit operate at high frequency, while switches P7 and P8 operate either off or at power frequency. The total charging power is 2P / 3. The control loop structure of the single-phase voltage and current dual-loop interleaved control charging strategy can be found in [reference needed]. Figure 10As shown, in the single-phase voltage and current dual-loop interleaved control charging strategy, the outer loop controls the PFC voltage Uci, and the inner loop controls the AC currents Ia and Ib.

[0084] It is understood that the frequency of high-frequency drive operation in this field is around tens of kHz or higher, while the frequency of power frequency drive operation is around tens of Hz.

[0085] In some embodiments, when the validity identification result of the current sampling value Io of the resonant conversion circuit is that the sampling signal is normal, the validity identification results of Ua, Ub and Uc are all that the sampling signal is normal, and the validity identification results of Ia, Ib and Ic are all that the sampling signal is abnormal; or when the validity identification result of the current sampling value Io of the resonant conversion circuit is that the sampling signal is normal, the validity identification results of Ia, Ib and Ic are all that the sampling signal is normal, and the validity identification results of Ua, Ub and Uc are all that the sampling signal is abnormal, fault protection can be performed on the on-board charger to stop the on-board charger from working.

[0086] In summary, such as Figure 11 As shown, when the validity identification result of the current sampling value Io of the resonant conversion circuit is that the sampling signal is normal, it is possible to first determine whether the validity identification result of one of Ia, Ib and Ic is abnormal. If so, the substitute value of the current with abnormal sampling signal is calculated, and the three-phase voltage and current dual-loop control charging strategy is implemented based on the current substitute value and the sampling values ​​of the other two normal sampling signals. Otherwise, it is further determined whether the validity identification results of two of Ia, Ib and Ic are both abnormal. When the validity identification results of two of Ia, Ib and Ic are both abnormal, the single-phase voltage and current dual-loop control charging strategy is implemented based on the sampling value of the remaining normal sampling signal. If the determination that the validity identification results of two of Ia, Ib and Ic are both abnormal is not true, it is possible to further determine whether the validity identification results of all three of Ia, Ib and Ic are all abnormal. When the validity identification results of all three of Ia, Ib and Ic are all abnormal, fault protection is executed.

[0087] Similarly, when the validity identification result of the current sampling value Io of the resonant conversion circuit is that the sampling signal is normal, a similar process can be implemented to judge Ua, Ub and Uc, which will not be elaborated here.

[0088] In some embodiments, when the validity identification result of the current sampling value of the resonant conversion circuit is that the sampling signal is abnormal, the charging strategy corresponding to the normal mode or the first failure mode is a three-phase current single-loop control charging strategy.

[0089] like Figure 7As shown, when the validity identification result of the current sampling value Io of the resonant conversion circuit is that the sampling signal is abnormal, taking the normal mode as an example, the validity identification results of Ua, Ub and Uc are all that the sampling signal is normal, and the validity identification results of Ia, Ib and Ic are also that the sampling signal is normal. Therefore, the three-phase current single-loop control charging strategy can be realized based on Ia, Ib and Ic.

[0090] like Figure 7 As shown, when the validity identification result of the current sampling value Io of the resonant conversion circuit is an abnormal sampling signal, taking the first failure mode as an example, when the validity identification result of Ia is an abnormal sampling signal, and the validity identification results of Ib and Ic are both normal sampling signals, the substitute value of Ia can be calculated as -Ib-Ic. Then, based on the substitute value of Ia, Ib, and Ic, a three-phase current single-loop control charging strategy is implemented. When the validity identification result of Ib is an abnormal sampling signal, and the validity identification results of Ia and Ic are both normal sampling signals, the substitute value of Ib can be calculated as -Ia-Ic. Then, based on the substitute value of Ib, Ia, and Ic, a three-phase voltage and current dual-loop control charging strategy is implemented. When the validity identification result of Ic is an abnormal sampling signal, and the validity identification results of Ia and Ib are both normal sampling signals, the substitute value of Ic can be calculated as -Ia-Ib. Then, based on the substitute value of Ic, Ia, and Ib, a three-phase current single-loop control charging strategy is implemented.

[0091] In the execution of the three-phase current single-loop control charging strategy, switches P1, P2, P3, P4, P5, and P6 in the PFC circuit operate at high frequency, while switches P7 and P8 operate either off or at power frequency. The total charging power is P. The control loop structure of the three-phase current single-loop control charging strategy can be found in [reference needed]. Figure 12 As shown, in the three-phase current single-loop control charging strategy, only the active current id and reactive current iq are controlled.

[0092] In some embodiments, when the validity identification result of the current sampling value of the resonant conversion circuit is that the sampling signal is abnormal, the charging strategy corresponding to the second failure mode is a single-phase current single-loop control charging strategy.

[0093] like Figure 7 As shown, when the validity identification result of the current sampling value Io of the resonant conversion circuit is that the sampling signal is abnormal, taking failure mode 6 as an example, when the validity identification results of Ia and Ib are both abnormal sampling signals and the validity identification result of Ic is that the sampling signal is normal, a single-phase current single-loop control charging strategy can be implemented based on Ic; or, when the validity identification results of Ua and Ub are both abnormal sampling signals and the validity identification result of Uc is that the sampling signal is normal, a single-phase current single-loop control charging strategy can be implemented based on Uc.

[0094] In the single-phase current single-loop control charging strategy, switches P5 and P6 in the PFC circuit operate at high frequency, while switches P7 and P8 operate either off or at power frequency. The total charging power is P / 3. The control loop structure of the single-phase current single-loop control charging strategy can be found in [reference needed]. Figure 13 As shown. In the single-phase current single-loop control charging strategy, only the AC current Ia is controlled.

[0095] like Figure 7 As shown, when the validity identification result of the current sampling value Io of the resonant conversion circuit is that the sampling signal is abnormal, taking failure mode 5 as an example, when the validity identification results of Ia and Ic are both abnormal sampling signals and the validity identification result of Ib is that the sampling signal is normal, a single-phase current single-loop control charging strategy can be implemented based on Ib; or, when the validity identification results of Ua and Uc are both abnormal sampling signals and the validity identification result of Ub is that the sampling signal is normal, a single-phase current single-loop control charging strategy can be implemented based on Ub.

[0096] In the single-phase current single-loop control charging strategy, switches P3 and P4 in the PFC circuit operate at high frequency, while switches P7 and P8 are turned off. The total charging power is P / 3. The control loop structure of the single-phase current single-loop control charging strategy can be found in [reference needed]. Figure 13 As shown. In the single-phase current single-loop control charging strategy, only the AC current Ia is controlled.

[0097] like Figure 7 As shown, when the validity identification result of the current sampling value Io of the resonant conversion circuit is that the sampling signal is abnormal, taking failure mode 4 as an example, when the validity identification results of Ib and Ic are both abnormal sampling signals and the validity identification result of Ia is that the sampling signal is normal, a single-phase current single-loop control charging strategy can be implemented based on Ib; or, when the validity identification results of Ub and Uc are both abnormal sampling signals and the validity identification result of Ua is that the sampling signal is normal, a single-phase current single-loop control charging strategy can be implemented based on Ub.

[0098] In the single-phase current single-loop control charging strategy, switches P1 and P2 in the PFC circuit operate at high frequency, while switches P7 and P8 operate either off or at power frequency. The total charging power is P / 3. The control loop structure of the single-phase current single-loop control charging strategy can be found in [reference needed]. Figure 13 As shown. In the single-phase current single-loop control charging strategy, only the AC current Ia is controlled.

[0099] In some embodiments, when the validity identification result of the current sampling value of the resonant conversion circuit is that the sampling signal is normal, the charging strategy corresponding to the third failure mode is a single-phase current interleaved single-loop control charging strategy.

[0100] like Figure 7 As shown, when the validity identification result of the current sampling value Io of the resonant conversion circuit is that the sampling signal is abnormal, taking failure mode 3 as an example, when the validity identification result of Ua is that the sampling signal is abnormal, and the validity identification results of Ub and Uc are that the sampling signals are normal, a single-phase current interleaved single-loop control charging strategy can be implemented based on Ub and Uc.

[0101] In the single-phase current interleaved single-loop control charging strategy, switches P3, P4, P5, and P6 in the PFC circuit operate at high frequency, while switches P7 and P8 operate either off or at power frequency. The total charging power is 2P / 3. The control loop structure of the single-phase current interleaved single-loop control charging strategy can be found in [reference needed]. Figure 14 As shown. In the single-phase current interleaved single-loop control charging strategy, only the AC currents Ia and Ib are controlled.

[0102] like Figure 7 As shown, when the validity identification result of the current sampling value Io of the resonant conversion circuit is that the sampling signal is abnormal, taking failure mode 2 as an example, when the validity identification result of Ub is that the sampling signal is abnormal, and the validity identification results of Ua and Uc are both that the sampling signals are normal, a single-phase current interleaved single-loop control charging strategy can be implemented based on Ua and Uc.

[0103] In the single-phase current interleaved single-loop control charging strategy, switches P1, P2, P5, and P6 in the PFC circuit operate at high frequency, while switches P7 and P8 operate either off or at power frequency. The total charging power is 2P / 3. The control loop structure of the single-phase current interleaved single-loop control charging strategy can be found in [reference needed]. Figure 14 As shown. In the single-phase current interleaved single-loop control charging strategy, only the AC currents Ia and Ib are controlled.

[0104] like Figure 7 As shown, when the validity identification result of the current sampling value Io of the resonant conversion circuit is that the sampling signal is abnormal, taking failure mode 1 as an example, when the validity identification result of Uc is that the sampling signal is abnormal, and the validity identification results of Ua and Ub are both that the sampling signals are normal, a single-phase current interleaved single-loop control charging strategy can be implemented based on Ua and Ub.

[0105] In the single-phase current interleaved single-loop control charging strategy, switches P1, P2, P3, and P4 in the PFC circuit operate at high frequency, while switches P7 and P8 operate either off or at power frequency. The total charging power is 2P / 3. The control loop structure of the single-phase current interleaved single-loop control charging strategy can be found in [reference needed]. Figure 14As shown. In the single-phase current interleaved single-loop control charging strategy, only the AC currents Ia and Ib are controlled.

[0106] In some embodiments, when the validity identification result of the current sampling value Io of the resonant conversion circuit is that the sampling signal is abnormal, and the validity identification results of Ua, Ub and Uc are all that the sampling signals are normal, and the validity identification results of Ia, Ib and Ic are all that the sampling signals are abnormal; or when the validity identification result of the current sampling value Io of the resonant conversion circuit is that the sampling signal is normal, and the validity identification results of Ia, Ib and Ic are all that the sampling signals are normal, and the validity identification results of Ua, Ub and Uc are all that the sampling signals are abnormal, fault protection can be performed on the on-board charger to stop the on-board charger from working.

[0107] In summary, such as Figure 15 As shown, when the validity identification result of the current sampling value Io of the resonant converter circuit is an abnormal sampling signal, it is possible to first determine whether the validity identification result of one of Ia, Ib, and Ic is an abnormal sampling signal. If so, the substitute value of the current with abnormal sampling signal is calculated, and a single-phase voltage and current dual-loop control charging strategy is implemented based on the substitute value of the current and the sampling values ​​of the other two normal sampling signals. Otherwise, it is further determined whether the validity identification results of two of Ia, Ib, and Ic are both abnormal sampling signals. When the validity identification results of two of Ia, Ib, and Ic are both abnormal sampling signals, a single-phase voltage and current dual-loop control charging strategy is implemented based on the sampling value of the remaining normal sampling signal. If the determination that the validity identification results of two of Ia, Ib, and Ic are both abnormal sampling signals is not true, it is possible to further determine whether the validity identification results of all three of Ia, Ib, and Ic are all abnormal sampling signals. When the validity identification results of all three of Ia, Ib, and Ic are all abnormal sampling signals, fault protection is executed.

[0108] Similarly, when the validity identification result of the current sampling value Io of the resonant conversion circuit is that the sampling signal is abnormal, a similar process can be implemented to judge Ua, Ub and Uc, which will not be elaborated here.

[0109] In some embodiments, the frequency control mode of the resonant converter circuit can also be determined based on the validity identification results of the current sampling values ​​of the resonant converter circuit.

[0110] When the validity identification result of the current sampling value of the resonant conversion circuit is that the sampling signal is normal, the frequency control mode of the resonant conversion circuit is the frequency modulation control mode.

[0111] Specifically, the LLC can employ single-current-loop frequency modulation control. The frequency modulation range is determined based on the charging range and gain interval, satisfying soft-switching and power control functions. Switches P1, P2, P3, and P4 are primary-side high-frequency frequency modulation control transistors, while switches P5, P6, P7, and P8 are secondary-side synchronous rectification control transistors. The control loop structure can be found in [reference needed]. Figure 16 As shown.

[0112] When the validity identification result of the current sampling value of the resonant conversion circuit is that the sampling signal is abnormal, the frequency control mode of the resonant conversion circuit is the fixed frequency control mode.

[0113] Specifically, the LLC can employ fixed-frequency control, with the control frequency set at the resonant frequency (e.g., 150kHz) to satisfy the soft-switching function. Switches P1, P2, P3, and P4 are primary-side high-frequency modulation control transistors, while switches P5, P6, P7, and P8 are secondary-side synchronous rectification control transistors. The control loop structure can be found in [reference needed]. Figure 17 As shown.

[0114] In summary, the signal failure control method for the on-board charger of this application can maintain normal charging function through three-phase charging control when all three phases of the power factor correction circuit are normal or one of them has an abnormal sampling signal. Furthermore, it can maintain normal charging function through single-phase charging control when two of the three phases of the power factor correction circuit have abnormal sampling signals. This ensures that the on-board charger can charge normally even when all three phases of the power factor correction circuit are normal, or when one or two of them have abnormal sampling signals, thus improving the reliability of the on-board charger and reducing after-sales maintenance costs.

[0115] Furthermore, the operating mode of the on-board charger is also related to the resonant conversion circuit. This application combines the validity identification results of the current sampling value of the resonant conversion circuit to execute a specific charging strategy.

[0116] In addition, when all three phases of AC power in the power factor correction circuit are abnormal, this application can perform fault protection on the on-board charger, causing the on-board charger to stop working.

[0117] The following is combined Figure 18 This application describes a signal failure control device for an on-board charger provided in another aspect of the present application. Figure 18 A schematic structural block diagram of a signal failure control device 1800 for an on-board charger according to an embodiment of this application is shown. Figure 18As shown, the on-board charger signal failure control device 1800 includes a memory 1810 and a processor 1820. The memory 1810 stores a computer-executable program that is run by the processor 1820. When the computer-executable program is run by the processor 1820, it causes the processor 1820 to execute the on-board charger signal failure control method 200 described above. Those skilled in the art can understand the structure and specific operation of each module in the on-board charger signal failure control device 1800 according to the embodiments of this application based on the foregoing description. For simplicity, further details are omitted here.

[0118] According to another aspect of this application, a computer-readable storage medium is also provided, on which a computer program is stored. When executed by a processor, the computer program causes the processor to perform the signal failure control method for an on-board charger according to the embodiments of this application described above. The computer-readable storage medium may, for example, include a memory card of a smartphone, a storage component of a tablet computer, a hard disk of a personal computer, a read-only memory (ROM), an erasable programmable read-only memory (EPROM), a portable compact disc read-only memory (CD-ROM), a USB memory, or any combination of the above storage media. The computer-readable storage medium may be any combination of one or more computer-readable storage media.

[0119] In addition, this application also provides an on-board charger, which includes the signal failure control device 1800 of the on-board charger according to the embodiments of this application described above, or a computer-readable storage medium.

[0120] In addition, this application also provides a vehicle that includes the on-board charger described above according to the embodiments of this application.

[0121] In addition, this application also provides a computer program product that, when run by a processor, causes the processor to execute the above-described on-board charger signal failure control method 200.

[0122] Based on the above description, the on-board charger signal failure control method, device, storage medium, computer program product, on-board charger, and vehicle according to the embodiments of this application identify the validity of the sampled values ​​of the voltage and current of each phase in the three-phase AC power of the power factor correction circuit, and match the on-board charger to the corresponding working mode according to the validity identification result. Then, the corresponding charging strategy is executed according to the working mode. Thus, even when the sampling signal of the power factor correction circuit fails, the on-board charger can still be guaranteed to charge normally, which improves the reliability of the on-board charger and reduces after-sales maintenance costs.

[0123] Although exemplary embodiments have been described herein with reference to the accompanying drawings, it should be understood that the above exemplary embodiments are merely illustrative and are not intended to limit the scope of this application. Various changes and modifications can be made therein by those skilled in the art without departing from the scope and spirit of this application. All such changes and modifications are intended to be included within the scope of this application as claimed in the appended claims.

[0124] Those skilled in the art will recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

[0125] In the several embodiments provided in this application, it should be understood that the disclosed devices and methods can be implemented in other ways. For example, the device embodiments described above are merely illustrative. For instance, the division of units is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another device, or some features may be ignored or not executed.

[0126] Numerous specific details are set forth in the specification provided herein. However, it will be understood that embodiments of this application may be practiced without these specific details. In some instances, well-known methods, structures, and techniques have not been shown in detail so as not to obscure the understanding of this specification.

[0127] Similarly, it should be understood that, in order to streamline this application and aid in understanding one or more of the various inventive aspects, features of this application may sometimes be grouped together in a single embodiment, figure, or description thereof in the description of exemplary embodiments of this application. However, this approach should not be construed as reflecting an intention that the claimed application requires more features than are expressly recited in each claim. Rather, as reflected in the corresponding claims, its inventive point lies in solving the corresponding technical problem with features fewer than all features of a single disclosed embodiment. Therefore, the claims following the detailed description are hereby expressly incorporated into that detailed description, wherein each claim itself is a separate embodiment of this application.

[0128] Those skilled in the art will understand that, apart from the mutual exclusion of features, all features disclosed in this specification (including the accompanying claims, abstract, and drawings) and all processes or units of any method or apparatus so disclosed can be combined in any combination. Unless otherwise expressly stated, each feature disclosed in this specification (including the accompanying claims, abstract, and drawings) may be replaced by an alternative feature that serves the same, equivalent, or similar purpose.

[0129] Furthermore, those skilled in the art will understand that although some embodiments described herein include certain features included in other embodiments but not others, combinations of features from different embodiments are intended to be within the scope of this application and form different embodiments. For example, in the claims, any one of the claimed embodiments can be used in any combination.

[0130] The various component embodiments of this application can be implemented in hardware, or as software modules running on one or more processors, or a combination thereof. Those skilled in the art will understand that microprocessors or digital signal processors (DSPs) can be used in practice to implement some or all of the functions of some modules according to the embodiments of this application. This application can also be implemented as a program (e.g., a computer program and computer program product) for performing part or all of the methods described herein. Such a program implementing this application can be stored on a computer-readable medium, or can be in the form of one or more signals. Such signals can be downloaded from an Internet website, provided on a carrier signal, or provided in any other form.

[0131] It should be noted that the above embodiments are illustrative of this application and not limiting of it, and that those skilled in the art can devise alternative embodiments without departing from the scope of the appended claims. In the claims, any reference signs placed between parentheses should not be construed as limiting the claims. The word "comprising" does not exclude the presence of elements or steps not listed in the claims. The word "a" or "an" preceding an element does not exclude the presence of a plurality of such elements. This application can be implemented by means of hardware comprising several different elements and by means of a suitably programmed computer. In the unit claims enumerating several on-board charger signal failure control devices, several of these on-board charger signal failure control devices may be embodied by the same item of hardware. The use of the words first, second, and third, etc., does not indicate any order. These words can be interpreted as names.

[0132] The above description is merely a specific embodiment or illustration of the embodiments of this application. The scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this application should be included within the scope of protection of this application. The scope of protection of this application shall be determined by the scope of the claims.

Claims

1. A signal failure control method for an on-board charger, characterized in that, The on-board charger includes a power factor correction circuit, and the method includes: Obtain the sampled values ​​of the voltage and current of each phase in the three-phase AC power of the power factor correction circuit; The validity of the sampled values ​​of the phase voltage and the sampled values ​​of the phase current are identified respectively. The operating mode of the on-board charger is determined based on the validity identification result, and the corresponding charging strategy is executed according to the operating mode.

2. The signal failure control method for an on-board charger as described in claim 1, characterized in that, The validity of the sampled values ​​of each phase voltage is identified, including: Determine the operating condition in which the sampled voltage value is located, wherein the operating condition includes a first operating condition and a second operating condition, and the voltage in the first operating condition is less than the voltage in the second operating condition; The validity identification result of the voltage sampling value is determined based on the magnitude of the voltage sampling value relative to the preset voltage value corresponding to its operating condition.

3. The signal failure control method for an on-board charger as described in claim 2, characterized in that, The determination of the validity identification result of the voltage sample value based on the magnitude of the voltage sample value relative to the preset voltage value corresponding to its operating condition includes: Under the first operating condition: If the sampled value of the voltage is greater than or equal to the first preset voltage value and less than or equal to the second preset voltage value, the validity identification result of the sampled value of the voltage is that the sampled signal is normal. If the sampled value of the voltage is less than the first preset voltage value or greater than the second preset voltage value, the validity identification result of the sampled value of the voltage is that the sampled signal is abnormal; or, Under the second operating condition: If the sampled value of the voltage is greater than or equal to the third preset voltage value and less than or equal to the fourth preset voltage value, the validity identification result of the sampled value of the voltage is that the sampled signal is normal. If the sampled value of the voltage is less than the third preset voltage value or greater than the fourth preset voltage value, the validity identification result of the sampled value of the voltage is that the sampled signal is abnormal.

4. The signal failure control method for an on-board charger as described in claim 1, characterized in that, The validity of the sampled values ​​of each phase current is identified, including: Determine the operating condition in which the sampled value of the current is located, wherein the operating condition includes a first operating condition and a second operating condition, and the voltage of the first operating condition is less than the voltage of the second operating condition; The validity identification result of the current sampling value is determined based on the magnitude of the current sampling value relative to the current preset value corresponding to its operating condition.

5. The signal failure control method for an on-board charger as described in claim 4, characterized in that, The determination of the validity identification result of the current sampling value based on the preset current value corresponding to the current operating condition and the magnitude of the current sampling value includes: Under the first operating condition: If the sampled value of the current is greater than or equal to the first preset value of the current and less than or equal to the second preset value of the current, the validity identification result of the sampled value of the current is that the sampling signal is normal. If the sampled value of the current is less than the first preset value of the current or greater than the second preset value of the current, the validity identification result of the sampled value of the current is that the sampling signal is abnormal. or, Under the second operating condition: If the sampled value of the current is greater than or equal to the third preset current value and less than or equal to the fourth preset current value, the validity identification result of the sampled value of the current is that the sampling signal is normal. If the sampled value of the current is less than the third current preset value or greater than the fourth current preset value, the validity identification result of the sampled value of the current is that the sampling signal is abnormal.

6. The signal failure control method for an on-board charger as described in claim 1, characterized in that, When the validity identification result of the sampled voltage value of each phase in the three-phase AC power is that the sampled signal is normal: If the validity identification result of the sampled current of each phase in the three-phase AC power is that the sampled signal is normal, the working mode of the on-board charger is normal mode. If the validity identification result of the sampling value of one phase current of the three-phase AC power is that the sampling signal is abnormal, the working mode of the on-board charger is the first failure mode. If the validity identification result of the sampling value of two phase currents of the three-phase AC power is that the sampling signal is abnormal, the working mode of the on-board charger is the second failure mode. or, When the validity identification result of the sampled current value of each phase in the three-phase alternating current is that the sampled signal is normal: If the validity identification result of the sampled voltage of each phase in the three-phase AC power is that the sampled signal is normal, the working mode of the on-board charger is the normal mode. If the validity identification result of the sampled value of one phase voltage of the three-phase AC power is that the sampled signal is abnormal, the working mode of the on-board charger is the third failure mode. If the validity identification result of the sampled voltage of two phases of the three-phase AC power is that the sampled signal is abnormal, the working mode of the on-board charger is the second failure mode.

7. The signal failure control method for an on-board charger as described in claim 6, characterized in that, The on-board charger further includes a resonant conversion circuit, and the method further includes: Obtain the current sampling value of the resonant conversion circuit; The validity of the current sampling value of the resonant conversion circuit is identified; wherein, the charging strategy corresponding to the working mode of the on-board charger is related to the validity identification result of the current sampling value of the resonant conversion circuit.

8. The signal failure control method for an on-board charger as described in claim 7, characterized in that, When the validity identification result of the current sampling value of the resonant conversion circuit is that the sampling signal is normal, the charging strategy corresponding to the normal mode or the first failure mode is a three-phase voltage and current dual-loop control charging strategy. When the validity identification result of the current sampling value of the resonant conversion circuit is that the sampling signal is abnormal, the charging strategy corresponding to the normal mode or the first failure mode is a three-phase current single-loop control charging strategy.

9. The signal failure control method for an on-board charger as described in claim 7, characterized in that, When the validity identification result of the current sampling value of the resonant conversion circuit is that the sampling signal is normal, the charging strategy corresponding to the second failure mode is a single-phase voltage and current dual-loop control charging strategy. When the validity identification result of the current sampling value of the resonant conversion circuit is that the sampling signal is abnormal, the charging strategy corresponding to the second failure mode is a single-phase current single-loop control charging strategy.

10. The signal failure control method for an on-board charger as described in claim 7, characterized in that, When the validity identification result of the current sampling value of the resonant conversion circuit is that the sampling signal is normal, the charging strategy corresponding to the third failure mode is a single-phase voltage and current dual-loop interleaved control charging strategy. When the validity identification result of the current sampling value of the resonant conversion circuit is that the sampling signal is normal, the charging strategy corresponding to the third failure mode is a single-phase current interleaved single-loop control charging strategy.

11. The signal failure control method for an on-board charger as described in claim 7, characterized in that, The method further includes: The frequency control mode of the resonant conversion circuit is determined based on the validity identification result of the current sampling value of the resonant conversion circuit.

12. The signal failure control method for an on-board charger as described in claim 11, characterized in that, When the validity identification result of the current sampling value of the resonant conversion circuit is that the sampling signal is normal, the frequency control mode of the resonant conversion circuit is the frequency modulation control mode; When the validity identification result of the current sampling value of the resonant conversion circuit is that the sampling signal is abnormal, the frequency control mode of the resonant conversion circuit is the fixed frequency control mode.

13. A signal failure control device for an on-board charger, characterized in that, The device includes a processor and a memory, the memory storing a computer program executed by the processor, the computer program, when executed by the processor, causing the processor to perform the signal failure control method for an on-board charger as described in any one of claims 1-12.

14. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores a computer program that, when run by a processor, causes the processor to execute the signal failure control method for an on-board charger as described in any one of claims 1-12.

15. A computer program product, characterized in that, When the computer program product is run by the processor, the processor causes the processor to execute the signal failure control method for the on-board charger as described in any one of claims 1-12.

16. An on-board charger, characterized in that, The vehicle includes a signal failure control device for an on-board charger as described in claim 13 or a computer-readable storage medium as described in claim 14.

17. A vehicle, characterized in that, The vehicle includes the on-board charger as described in claim 16.