Multilayer ceramic capacitor

Abstract

Provided is a multilayer ceramic capacitor capable of dispersing stress applied to the end portion of a thin film layer, thereby suppressing the propagation of cracks to the inside of the multilayer ceramic capacitor. The present invention relates to a multilayer ceramic capacitor (10) including a laminate (12) including a plurality of stacked dielectric layers (14), having a first main surface (12a) and a second main surface (12b) opposite in a stacking direction (x), a first side surface (12c) and a second side surface (12d) opposite in a width direction (y) orthogonal to the stacking direction (x), a first end surface (12e) and a second end surface (12f) opposite to the stacking direction (x) and the width direction (y), a first internal electrode layer (16a) stacked alternately with the plurality of dielectric layers (14) and exposed at the first end surface (12e), and a second internal electrode layer (16b) stacked alternately with the plurality of dielectric layers (14) and exposed at the second end surface (12f), a first external electrode (24a) disposed to cover a portion of the first end surface (12e) and a portion of the first main surface (12a) of the laminate (12), and a second external electrode (24b) disposed to cover a portion of the second end surface (12f) and a portion of the first main surface (12a) of the laminate (12). The first external electrode (24a) and the second external electrode each have a thin film layer (26) covering at least a portion of any one or more surfaces of the laminate (12), a lower plating layer (28) covering at least a portion of the thin film layer (26), an upper plating layer (30), and a surface plating layer (32), and an end edge portion of the thin film layer (26) on the central side of the laminate (12) is separated from the laminate (12).

Description

Technical Field

[0001] This invention relates to multilayer ceramic capacitors. Background Technology

[0002] In recent years, electronic devices such as portable telephones and portable music players have been developing towards miniaturization and thinning. Along with this, the miniaturization and thinning of the multilayer ceramic capacitors used in these miniaturized and thinner electronic devices are also underway.

[0003] For example, as in Patent Document 1, multilayer ceramic capacitors with a dimension T of less than 0.3 mm in the Z-axis direction (stacked direction) are known. Furthermore, in the multilayer ceramic capacitor described in Patent Document 1, the external electrode is composed of a base film containing a sintered metal film and a coating film disposed on the base film.

[0004] Prior art literature

[0005] Patent documents

[0006] Patent Document 1: Japanese Patent Application Publication No. 2020-136363 Summary of the Invention

[0007] The problem the invention aims to solve

[0008] However, in a multilayer ceramic capacitor like Patent Document 1, sometimes the end of the base film on the central side of the multilayer adheres to the multilayer, and the coating film covers the end of the base film on the central side of the multilayer. Therefore, due to stress concentration in the base film caused by thermal stress, cracks may extend from the front end of the base film into the interior of the multilayer ceramic capacitor.

[0009] Therefore, the main objective of this invention is to provide a multilayer ceramic capacitor that can disperse the stress applied to the ends of the thin film layer (base film) to suppress the propagation of cracks into the interior of the multilayer ceramic capacitor.

[0010] Technical solutions for solving the problem

[0011] The multilayer ceramic capacitor of the present invention comprises: a multilayer body including a plurality of stacked dielectric layers, and having a first main surface and a second main surface opposite to each other in the stacking direction, a first side surface and a second side surface opposite to each other in a width direction orthogonal to the stacking direction, a first end surface and a second end surface opposite to each other in a length direction orthogonal to the stacking direction and the width direction, a first internal electrode layer alternately stacked with the plurality of dielectric layers and exposed at the first end surface, and a second internal electrode layer alternately stacked with the plurality of dielectric layers and exposed at the second end surface; a first external electrode, The first and second external electrodes are configured as a portion of a first end face and a portion of a first main face of a coated laminate; and a second external electrode is configured as a portion of a second end face and a portion of a first main face of a coated laminate. Each of the first and second external electrodes has: a thin film layer covering at least a portion of the first main face; a lower plating layer covering at least a portion of the thin film layer; an upper plating layer disposed on the lower plating layer; and a surface plating layer disposed on the upper plating layer. On the first main face, the end edge of the thin film layer located on the central side of the laminate is separated from the laminate.

[0012] Furthermore, the multilayer ceramic capacitor of the present invention comprises: a multilayer body including a plurality of stacked dielectric layers, and having a first main surface and a second main surface opposite to each other in the stacking direction, a first side surface and a second side surface opposite to each other in a width direction orthogonal to the stacking direction, a third side surface and a fourth side surface opposite to each other in a length direction orthogonal to the stacking direction and the width direction, a first internal electrode layer alternately stacked with the plurality of dielectric layers and exposed at least on the first side surface and the second side surface, and a second internal electrode layer alternately stacked with the plurality of dielectric layers and exposed at least on the first side surface and the second side surface; a first external electrode configured to cover a portion of the first side surface and a portion of the first main surface of the multilayer body; and a second external electrode configured to cover a portion of the second side surface of the multilayer body. The laminate includes a portion of the first main surface and a portion of the first external electrode; a third external electrode, disposed separately from the first external electrode and configured as a portion of the first side surface and a portion of the first main surface of the laminate; and a fourth external electrode, disposed separately from the second external electrode and configured as a portion of the second side surface and a portion of the first main surface of the laminate. Each of the first, second, third, and fourth external electrodes comprises: a thin film layer covering at least a portion of any one or more surfaces of the laminate; a lower plating layer covering at least a portion of the thin film layer; an upper plating layer disposed on the lower plating layer; and a surface plating layer disposed on the upper plating layer. The end edge of the thin film layer located on the central side of the laminate is separated from the laminate.

[0013] According to the multilayer ceramic capacitor of the present invention, since the end edge of the thin film layer located on the central side of the multilayer is separated from the multilayer, the stress applied to the end edge of the thin film layer can be dispersed, thereby suppressing the propagation of cracks into the interior of the multilayer ceramic capacitor.

[0014] Invention Effects

[0015] According to the present invention, a multilayer ceramic capacitor is provided that can disperse the stress applied to the end (edge) of the thin film layer (base film) to suppress the propagation of cracks into the interior of the multilayer ceramic capacitor.

[0016] The above-mentioned objects, other objects, features, and advantages of the present invention will become clearer from the following detailed description of the embodiments with reference to the accompanying drawings. Attached Figure Description

[0017] Figure 1 This is a perspective view showing the appearance of a multilayer ceramic capacitor according to the first embodiment of the present invention.

[0018] Figure 2 This is a front view showing a multilayer ceramic capacitor according to the first embodiment of the present invention.

[0019] Figure 3 This is a top view showing a multilayer ceramic capacitor according to the first embodiment of the present invention.

[0020] Figure 4 yes Figure 1 A cross-sectional view at line IV-IV.

[0021] Figure 5 yes Figure 1 A cross-sectional view at line VV involved.

[0022] Figure 6 yes Figure 4 Enlarged view of the α part involved.

[0023] Figure 7 This is a perspective view showing the appearance of a multilayer ceramic capacitor according to the second embodiment of the present invention.

[0024] Figure 8 This is a front view showing a multilayer ceramic capacitor according to the second embodiment of the present invention.

[0025] Figure 9 This is a top view showing a multilayer ceramic capacitor according to the second embodiment of the present invention.

[0026] Figure 10 yes Figure 7 The sectional view at line XX involved.

[0027] Figure 11 yes Figure 7 A cross-sectional view at line XI-XI.

[0028] Figure 12This is a perspective view showing the appearance of a multilayer ceramic capacitor according to the third embodiment of the present invention.

[0029] Figure 13 yes Figure 12 A cross-sectional view at line XIII-XIII involved.

[0030] Figure 14 yes Figure 12 A cross-sectional view at line XIV-XIV.

[0031] Figure 15 yes Figure 12 A cross-sectional view at line XV-XV involved.

[0032] Figure 16 This is a top view showing the stack and thin film layer of the multilayer ceramic capacitor according to the third embodiment of the present invention.

[0033] Figure 17 This is a bottom view showing the stack and thin film layer of the multilayer ceramic capacitor according to the third embodiment of the present invention.

[0034] Figure 18 This is a front view showing the laminate and thin film layer of the multilayer ceramic capacitor according to the third embodiment of the present invention.

[0035] Figure 19 This is a rear view showing the laminate and thin film layer of the multilayer ceramic capacitor according to the third embodiment of the present invention.

[0036] Figure 20 This is a left view showing the stacked ceramic capacitor and the thin film layer according to the third embodiment of the present invention.

[0037] Figure 21 This is a right view showing the laminate and thin film layer of the multilayer ceramic capacitor according to the third embodiment of the present invention.

[0038] Figure 22 yes Figure 13 Enlarged view of the β part involved.

[0039] Figure 23 yes Figure 12 The exploded three-dimensional view of the stacked body shown.

[0040] Figure 24 This is a perspective view showing the appearance of a multilayer ceramic capacitor according to the fourth embodiment of the present invention.

[0041] Figure 25 yes Figure 24 The cross-sectional view at line XXV-XXV involved.

[0042] Figure 26yes Figure 24 The sectional view at line XXVI-XXVI involved.

[0043] Figure 27 yes Figure 24 The sectional view at line XXVII-XXVII involved.

[0044] Figure 28 yes Figure 24 An exploded three-dimensional view of the stacked body shown.

[0045] Figure 29 This is a perspective view showing the appearance of a multilayer ceramic capacitor according to the fifth embodiment of the present invention.

[0046] Figure 30 This is a bottom view showing the multilayer ceramic capacitor according to the fifth embodiment of the present invention.

[0047] Figure 31 yes Figure 29 The sectional view at line XXXI-XXXI involved.

[0048] Figure 32 yes Figure 29 The sectional view at line XXXII-XXXII involved. Detailed Implementation

[0049] The multilayer ceramic capacitor of the present invention will now be described.

[0050] A. First Implementation

[0051] 1. Multilayer ceramic capacitor

[0052] The first embodiment of the present invention relates to a multilayer ceramic capacitor 10. Figure 1 This is a perspective view showing the appearance of a multilayer ceramic capacitor according to the first embodiment of the present invention. Figure 2 This is a front view showing a multilayer ceramic capacitor according to the first embodiment of the present invention. Figure 3 This is a top view showing a multilayer ceramic capacitor according to the first embodiment of the present invention. Figure 4 yes Figure 1 A cross-sectional view at line IV-IV. Figure 5 yes Figure 1 A cross-sectional view at line VV involved. Figure 6 yes Figure 4 Enlarged view of the α part involved.

[0053] The multilayer ceramic capacitor 10 has a multilayer body 12 and an external electrode 24. Hereinafter, the structure will be described in the order of multilayer body 12 and external electrode 24.

[0054] The stack 12 includes multiple stacked dielectric layers 14 and multiple stacked internal electrode layers 16. Furthermore, the stack 12 includes a first main surface 12a and a second main surface 12b opposite each other in the stacking direction x, a first side surface 12c and a second side surface 12d opposite each other in the width direction y orthogonal to the stacking direction x, and a first end surface 12e and a second end surface 12f opposite each other in the length direction z orthogonal to both the stacking direction x and the width direction y. The first main surface 12a and the second main surface 12b extend along the width direction y and the length direction z, respectively. The first side surface 12c and the second side surface 12d extend along the stacking direction x and the length direction z, respectively. The first end surface 12e and the second end surface 12f extend along the stacking direction x and the width direction y, respectively. Therefore, the stacking direction x refers to the direction connecting the first main surface 12a and the second main surface 12b, the width direction y refers to the direction connecting the first side surface 12c and the second side surface 12d, and the length direction z refers to the direction connecting the first end surface 12e and the second end surface 12f. Furthermore, the surfaces of the first main surface 12a and the second main surface 12b, the first side surface 12c and the second side surface 12d, and the first end surface 12e and the second end surface 12f may also have uneven surfaces, or the surfaces may be roughened to form rough surfaces.

[0055] In the laminate 12, it is preferable to have rounded corners and edges. Furthermore, a corner is the portion where three adjacent faces of the laminate 12 intersect, and an edge is the portion where two adjacent faces of the laminate 12 intersect. By having rounded corners and edges in the laminate 12, damage or breakage of the laminate 12 can be prevented.

[0056] like Figure 4 as well as Figure 5 As shown, the laminate 12 has an inner layer 15a with multiple internal electrode layers 16 facing each other in the lamination direction x that connects the first main surface 12a and the second main surface 12b, a first main surface side outer layer 15b1 formed by multiple dielectric layers 14 located between the internal electrode layer 16 located closest to the first main surface 12a and the first main surface 12a, and a second main surface side outer layer 15b2 formed by multiple dielectric layers 14 located between the internal electrode layer 16 located closest to the second main surface 12b and the second main surface 12b.

[0057] The dielectric layer 14 has an inner dielectric layer 14a as an inner layer 15a and an outer dielectric layer 14b as an outer layer 15b1 on the first main surface side and an outer layer 15b2 on the second main surface side.

[0058] The outer layer 15b1 on the first main surface side is located on the first main surface 12a side of the laminate 12, and is an assembly of multiple outer dielectric layers 14b located between the first main surface 12a and the inner electrode layer 16 closest to the first main surface 12a.

[0059] The outer layer 15b2 on the second main surface side is located on the second main surface 12b side of the laminate 12, and is an assembly of multiple outer dielectric layers 14b located between the second main surface 12b and the inner electrode layer 16 closest to the second main surface 12b.

[0060] Furthermore, the region sandwiched between the first main surface outer layer 15b1 and the second main surface outer layer 15b2 is the inner layer 15a. That is, the inner layer 15a is the region where the inner electrode layer 16 is stacked.

[0061] The inner layer 15a includes an inner dielectric layer 14a, a first internal electrode layer 16a alternately stacked with the inner dielectric layer 14a, and a second internal electrode layer 16b alternately stacked with the inner dielectric layer 14a. At this time, the first internal electrode layer 16a is exposed at the first end face 12e. Furthermore, the second internal electrode layer 16b is exposed at the second end face 12f.

[0062] The dielectric layer 14 can have multiple grains containing perovskite-type compounds with BaTiO3 as the basic structure.

[0063] The dielectric layer 14 can be formed from a dielectric material, for example. As the dielectric material, dielectric ceramics containing main components such as BaTiO3, CaTiO3, SrTiO3, and CaZrO3 can be used. Alternatively, materials with secondary components such as Mn compounds, Fe compounds, Cr compounds, Co compounds, and Ni compounds added to these main components can also be used.

[0064] Furthermore, considering the required functions, the inner dielectric layer 14a and the outer dielectric layer 14b can also be made of different materials. For example, if the outer dielectric layer 14b is made of a soft material, it can buffer the stress on the laminate 12. Furthermore, if the outer dielectric layer 14b is made of a strong material, it can suppress the formation of cracks.

[0065] The first main surface outer layer 15b1 and the second main surface outer layer 15b2 are assemblies of multiple outer dielectric layers 14b. Sometimes the first main surface outer layer 15b1 and the second main surface outer layer 15b2 are integrated after firing and cannot be distinguished piece by piece.

[0066] The number of stacked dielectric layers 14 is not particularly limited, but it is preferably 30 or more and 90 or less, including the outer dielectric layer 14b. Furthermore, the thickness of the dielectric layer 14 is preferably 0.5 μm or less.

[0067] like Figure 4 as well as Figure 5 As shown, the inner electrode layer 16 has a first inner electrode layer 16a and a second inner electrode layer 16b. The first inner electrode layer 16a is alternately stacked with a plurality of dielectric layers 14 and is exposed at a first end face 12e. The second inner electrode layer 16b is alternately stacked with a plurality of dielectric layers 14 and is exposed at a second end face 12f. Specifically, the first inner electrode layer 16a and the second inner electrode layer 16b are alternately stacked with an inner dielectric layer 14a in between.

[0068] The first internal electrode layer 16a is disposed on the surface of the inner dielectric layer 14a. The first internal electrode layer 16a has a first opposing electrode portion 18a opposite to the second internal electrode layer 16b, and a first lead-out electrode portion 20a located at one end of the first internal electrode layer 16a and extending from the first opposing electrode portion 18a to the first end face 12e of the laminate 12. The end of the first lead-out electrode portion 20a is led out to the first end face 12e and exposed.

[0069] The shape of the first opposing electrode portion 18a of the first internal electrode layer 16a is not particularly limited, but it is preferably rectangular in plan view. However, the corner portion in plan view can be rounded, or the corner portion can be formed as a cone in plan view. Alternatively, it can be a cone in plan view that is inclined in any direction.

[0070] The shape of the first lead-out electrode portion 20a of the first internal electrode layer 16a is not particularly limited, but it is preferably rectangular in plan view. However, the corner portion in plan view can be rounded, or the corner portion can be formed into a plan view that is inclined (conical). Alternatively, it can be a plan view that is inclined in any direction.

[0071] Alternatively, the width of the first lead-out electrode portion 20a can be tapered, narrowing from the first opposing electrode portion 18a toward the first end face 12e. In other words, when the first lead-out electrode portion 20a of the first inner electrode layer 16a is tapered, the width of the first lead-out electrode portion 20a in the width direction y can also be formed to be narrower than that of the first opposing electrode portion 18a. However, this is not a limitation; the width of the first lead-out electrode portion 20a can also be formed to be the same as the width of the first opposing electrode portion 18a.

[0072] The second internal electrode layer 16b is disposed on the surface of an inner dielectric layer 14a that is different from the inner dielectric layer 14a on which the first internal electrode layer 16a is disposed. The second internal electrode layer 16b has a second opposing electrode portion 18b opposite to the first internal electrode layer 16a, and a second lead-out electrode portion 20b located at one end of the second internal electrode layer 16b and extending from the second opposing electrode portion 18b to the second end face 12f of the laminate 12. The end of the second lead-out electrode portion 20b is led out to the second end face 12f and exposed.

[0073] The shape of the second opposing electrode portion 18b of the second inner electrode layer 16b is not particularly limited, but it is preferably rectangular in plan view. However, the corner portion in plan view can be rounded, or the corner portion can be formed as a cone in plan view. Alternatively, it can be a cone in plan view that is inclined in any direction.

[0074] The shape of the second lead-out electrode portion 20b of the second inner electrode layer 16b is not particularly limited, but it is preferably rectangular in plan view. However, the corner portion in plan view can be rounded, or the corner portion can be formed as a cone in plan view. Alternatively, it can be a cone in plan view that is inclined in any direction.

[0075] Alternatively, the width of the second lead-out electrode portion 20b can be a tapered shape, narrowing from the second opposing electrode portion 18b toward the second end face 12f. In other words, when the second lead-out electrode portion 20b of the second inner electrode layer 16b is tapered, the width of the second lead-out electrode portion 20b in the width direction y can also be formed to be narrower than that of the second opposing electrode portion 18b. However, this is not a limitation; the width of the second lead-out electrode portion 20b can also be formed to be the same as the width of the second opposing electrode portion 18b.

[0076] Furthermore, the first lead-out electrode portion 20a and the second lead-out electrode portion 20b may also be curved toward the first main surface 12a or the second main surface 12b. Additionally, the longest distance in the stacking direction x between the exposed portion of the first internal electrode layer 16a and the exposed portion of the second internal electrode layer 16b leading to the first end surface 12e or the second end surface 12f may be shorter than the longest distance in the stacking direction x between the first opposing electrode portion 18a of the first internal electrode layer 16a and the second opposing electrode portion 18b of the second internal electrode layer 16b.

[0077] Electrostatic capacitance is generated by the first internal electrode layer 16a and the second internal electrode layer 16b being opposed to each other through the inner dielectric layer 14a.

[0078] And, as Figure 4As shown, the laminate 12 includes an end (hereinafter referred to as "L gap") 22b formed between the end of the first inner electrode layer 16a opposite to the first lead-out electrode portion 20a and the second end face 12f, and between the end of the second inner electrode layer 16b opposite to the second lead-out electrode portion 20b and the first end face 12e.

[0079] like Figure 5 As shown, the laminate 12 includes a side portion (hereinafter referred to as "W gap") 22a formed between one end of the first opposing electrode portion 18a and the second opposing electrode portion 18b in the width direction y and the first side surface 12c, and between the other end of the first opposing electrode portion 18a and the second opposing electrode portion 18b in the width direction y and the second side surface 12d.

[0080] The first internal electrode layer 16a and the second internal electrode layer 16b can be made of, for example, metals such as Ni, Cu, Ag, Pd, Au, or suitable conductive materials such as Ag-Pd alloys containing one of these metals.

[0081] Furthermore, Sn may also be included in the first inner electrode layer 16a and the second inner electrode layer 16b. By including Sn in the first inner electrode layer 16a and the second inner electrode layer 16b, the barrier height at the interface between the first inner electrode layer 16a and the second inner electrode layer 16b and the inner dielectric layer 14a can be increased, thereby increasing the thickness of the depletion layer. As a result, the concentration of electric field at the interface can be mitigated, thereby improving the reliability under high-temperature loads. In this case, Sn can be fully effective even if it is only included in the inner electrode layer 16 of either the first inner electrode layer 16a or the second inner electrode layer 16b.

[0082] Furthermore, to achieve a high capacitance in the capacitor, the area of ​​the inner electrode layer 16 needs to be increased. Therefore, the LW surface coverage of the inner electrode layer 16 is preferably 90% or more. The LW surface coverage is defined as the ratio obtained by subtracting the area of ​​the voids from the area of ​​the inner side of the edge of the inner electrode layer 16 when viewed from a cross-section (LW plane) in the width direction y and length direction z of the laminate 12. The higher the LW surface coverage, the higher the capacitance of the capacitor. However, even if the LW surface coverage is low, the interlayer bonding strength is high because the inner dielectric layers 14a are bonded to each other through the voids, making interlayer delamination difficult.

[0083] The thickness of the internal electrode layer 16, namely the first internal electrode layer 16a and the second internal electrode layer 16b, is preferably 0.3 μm or more and 0.9 μm or less. Furthermore, the total number of the first internal electrode layer 16a and the second internal electrode layer 16b is preferably 20 or more and 80 or less.

[0084] The external electrode 24 has a first external electrode 24a and a second external electrode 24b.

[0085] The first external electrode 24a is connected to the first internal electrode layer 16a and is configured to cover a portion of the first end face 12e and a portion of the first main face 12a of the laminate 12. Additionally, it may be slightly wound around a portion of the second main face 12b, a portion of the first side face 12c, and / or a portion of the second side face 12d.

[0086] The second external electrode 24b is connected to the second internal electrode layer 16b and is configured to cover a portion of the second end face 12f and a portion of the first main face 12a of the laminate 12. Additionally, it may be slightly wound around a portion of the second main face 12b, a portion of the first side face 12c, and / or a portion of the second side face 12d.

[0087] The external electrode 24, namely the first external electrode 24a and the second external electrode 24b, each has a thin film layer 26 covering at least a portion of the first main surface 12a of the laminate 12, a lower plating layer 28 covering at least a portion of the thin film layer 26, an upper plating layer 30 disposed on the lower plating layer 28, and a surface plating layer 32 disposed on the upper plating layer 30.

[0088] The thin film layer 26 has a first thin film layer 26a and a second thin film layer 26b.

[0089] The first thin film layer 26a is formed as a part of the first main surface 12a on the side of the first end face 12e of the laminate 12. The second thin film layer 26b is formed as a part of the first main surface 12a on the side of the second end face 12f of the laminate 12.

[0090] Here, as Figure 4 as well as Figure 6 As shown, the end edge P1 of the first thin film layer 26a located at the center of the longitudinal direction z of the laminate 12 separates from the laminate 12 in the lamination direction x. That is, the end edge P1 of the first thin film layer 26a located at the center of the longitudinal direction z of the laminate 12 floats up from the laminate 12. Because the end edge P1 of the first thin film layer 26a continuously floats up in the width direction y, tensile stress applied to the end edge P1 of the first thin film layer 26a can be suppressed even under thermal stress. Therefore, cracks in the laminate 12 caused by thermal stress can be suppressed.

[0091] At this time, as Figure 4 as well as Figure 6As shown, in the end edge P1 of the first thin film layer 26a located at the center of the laminate 12 in the longitudinal direction z, position A is defined as the position of the first thin film layer 26a closest to the center of the laminate 12 in the longitudinal direction z; position B is defined as the position where it begins to separate from the laminate 12 in the lamination direction x; and position C is defined as the position where a perpendicular line drawn from position A in the lamination direction x intersects the laminate 12. ∠ABC is preferably 20 degrees or more and 70 degrees or less. By setting these values ​​within the above range, the end edge P1 of the first thin film layer 26a located at the center of the laminate 12 in the longitudinal direction z can be sufficiently separated from the laminate 12, and the distance in the longitudinal direction z from position B to position C can also be sufficiently obtained. Therefore, the direction of compressive stress can be sufficiently changed. As a result, even when thermal stress is applied, the tensile stress applied to the end edge P1 of the first thin film layer 26a can be suppressed. Therefore, it is possible to suppress cracks in the laminate 12 caused by thermal stress.

[0092] Furthermore, the distance z along the longitudinal direction from position A to position B is preferably 5 μm or more and 20 μm or less. This allows for a sufficient distance from position A to position B, thus enabling a sufficient variation in the direction of compressive stress. On the other hand, if the distance z along the longitudinal direction from position A to position B is less than 5 μm, the end edge P1 of the first thin film layer 26a located at the center of the laminate 12 along the longitudinal direction z cannot be sufficiently separated from the laminate 12. Furthermore, if the distance z along the longitudinal direction from position A to position B is greater than 20 μm, the stress on the first thin film layer 26a becomes excessive, and cracks may enter the laminate 12.

[0093] In the second thin film layer 26b, similarly to the first thin film layer 26a, the end edge P2 of the second thin film layer 26b located at the center side in the longitudinal direction z of the laminate 12 preferably separates from the laminate 12 in the lamination direction x. That is, the end edge P2 of the second thin film layer 26b located at the center side in the longitudinal direction z of the laminate 12 floats up from the laminate 12. Because the end edge P2 of the second thin film layer 26b continuously floats up in the width direction y, tensile stress applied to the end edge P2 of the second thin film layer 26b can be suppressed even under thermal stress. Therefore, cracks in the laminate 12 caused by thermal stress can be suppressed.

[0094] At this time, in the end edge P2 of the second thin film layer 26b located at the center side of the stack 12 in the length direction z, position A is defined as the position of the second thin film layer 26b closest to the center side of the stack 12 in the length direction z; position B is defined as the position where it begins to separate from the stack 12 in the stacking direction x; and position C is defined as the position where a perpendicular line drawn from position A in the stacking direction x intersects with the stack 12. ∠ABC is preferably 20 degrees or more and 70 degrees or less. By setting these values ​​within the above range, the end edge P2 of the second thin film layer 26b located at the center side of the stack 12 in the length direction z can be sufficiently separated from the stack 12, and the distance in the length direction z from position B to position C can be sufficiently obtained. Therefore, the direction of compressive stress can be sufficiently changed. As a result, even when thermal stress is applied, the tensile stress applied to the end edge P2 of the second thin film layer 26b can be suppressed. Therefore, it is possible to suppress cracks in the laminate 12 caused by thermal stress.

[0095] Furthermore, the distance z along the longitudinal direction from position A to position B is preferably 5 μm or more and 20 μm or less. This allows for a sufficient distance from position A to position B, thus enabling a sufficient variation in the direction of compressive stress. On the other hand, if the distance z along the longitudinal direction from position A to position B is less than 5 μm, the end edge P2 of the second thin film layer 26b located at the center of the laminate 12 along the longitudinal direction z cannot be sufficiently separated from the laminate 12. Furthermore, if the distance z along the longitudinal direction from position A to position B is greater than 20 μm, the stress in the second thin film layer 26b becomes excessive, and cracks may enter the laminate 12.

[0096] The end edges P1 and P2 of the thin film layer 26 may also have discontinuous shapes. Here, "discontinuous shape" means that the end edges P1 and P2 of the thin film layer 26 are formed as discontinuous when viewed from above.

[0097] The thin film layer 26 is formed by depositing metal particles. The thin film layer 26 is preferably formed by a thin film formation method such as sputtering, vapor deposition, chemical vapor deposition (CVD), or atomic layer deposition (ALD). By forming the thin film layer 26 in this way, the thickness of the thin film layer 26 in the stacking direction x can be set to, for example, 1.0 μm or less. Therefore, the thickness of the stacked ceramic capacitor 10 in the stacking direction x can be reduced. Alternatively, the thin film layer 26 can also be formed by screen printing or the like.

[0098] The thickness of the thin film layer 26 can be calculated, for example, using a fluorescence X-ray device and a calibration line method for the corresponding metal type, based on the given element concentration. Furthermore, the thickness can be measured using a scanning electron microscope on a component profile based on a focused ion beam (FIB) image, based on the actual observation image.

[0099] Thin film layer 26 can also be a thin film layer containing ceramic and metal components. By including ceramic and metal components in thin film layer 26, the thin film layer 26 adheres to the dielectric ceramic contained in the dielectric layer 14 of the laminate 12. Therefore, the adhesion between the laminate 12 and the external electrode 24 can be further improved.

[0100] The metal composition of the thin film layer 26 is preferably Cu or Ni as the main component, and is mixed with 1 vol% of Cr, V, Ti, Co and Mn.

[0101] The particle size of the metal component in the thin film layer 26 is preferably 1.0 μm or less. By reducing the particle size of the metal component in the thin film layer 26, the overall compressive stress of the thin film layer 26 can be reduced.

[0102] To determine the particle size of the metal components in the thin film layer 26, a cross-section at a position halfway across the width direction y of the stacked ceramic capacitor 10 is exposed, and the cross-section of the thin film layer 26 is observed using an electron microscope. A magnification of 20,000x or higher is preferred. Ten lines are drawn at equal intervals along the stacking direction x, which serves as the observation plane of the thin film layer 26's cross-section. The maximum particle size of the metal particles along these lines is measured, and their average value is calculated as the particle size.

[0103] Furthermore, when the thin film layer 26 contains ceramic, for example, by exposing a cross-section at a position halfway across the width direction y of the stacked ceramic capacitor 10, a cross-sectional photograph can be obtained using a digital microscope (VHX-5000; manufactured by Keyence). Thickness can also be calculated based on this cross-sectional photograph. Additionally, a scanning electron microscope can be used to examine the cross-section of a component based on focused ion beam (FIB) imaging, and the thickness can be measured based on the actual observed image.

[0104] The thickness of the first thin film layer 26a and the second thin film layer 26b in the stacking direction x is preferably 50 nm or more and 500 nm or less.

[0105] The lower plating layer 28 has a first lower plating layer 28a and a second lower plating layer 28b. The lower plating layer 28 is disposed on the thin film layer 26 and on the first end face 12e and the second end face 12f. The lower plating layer 28 is formed between the laminate 12 and the thin film layer 26.

[0106] The first lower coating layer 28a is disposed on the first end face 12e of the laminate 12 where the thin film layer 26 is not disposed, and is configured to cover the first thin film layer 26a disposed on the first main face 12a.

[0107] The second lower coating layer 28b is disposed on the second end face 12f of the laminate 12 where the thin film layer 26 is not disposed, and is configured to cover the second thin film layer 26b disposed on the first main face 12a.

[0108] Therefore, the thickness of each plating layer when forming the upper plating layer 30 and the surface plating layer 32 can be formed uniformly, and the deviation in the thickness of the upper plating layer 30 and the surface plating layer 32 can be suppressed.

[0109] The lower plating layer 28 can also be configured to wrap around from the first main surface 12a to the first end surface 12e or the second end surface 12f. Alternatively, it can be configured to wrap around to the first side surface 12c and / or the second side surface 12d. When the lower plating layer 28 is configured to wrap around from the first main surface 12a to the first end surface 12e or the second end surface 12f, it is preferable to connect the internal electrode layer 16 and the lower plating layer 28.

[0110] In this embodiment, the lower plating layer 28 is formed of a Cu plating layer. By forming the lower plating layer 28 of a Cu plating layer and configuring it to cover the surface of the thin film layer 26, the penetration of the plating solution is suppressed.

[0111] The thickness of the first lower plating layer 28a and the second lower plating layer 28b in the stacking direction x is preferably 50 nm or more and 500 nm or less.

[0112] The upper plating layer 30 has a first upper plating layer 30a and a second upper plating layer 30b.

[0113] The first upper plating layer 30a is configured to cover the first lower plating layer 28a. Specifically, the first upper plating layer 30a is preferably disposed on the first end face 12e of the surface of the first lower plating layer 28a, and is configured to also reach the first main face 12a of the surface of the first lower plating layer 28a. Alternatively, the first upper plating layer 30a may be disposed only on the surface of the first lower plating layer 28a disposed on the first end face 12e.

[0114] The second upper plating layer 30b is configured to cover the second lower plating layer 28b. Specifically, the second upper plating layer 30b is preferably disposed on the second end face 12f of the surface of the second lower plating layer 28b, and is configured to also reach the first main face 12a of the surface of the second lower plating layer 28b. Alternatively, the second upper plating layer 30b may be disposed only on the surface of the second lower plating layer 28b disposed on the second end face 12f.

[0115] The upper plating layer 30 is preferably a Ni plating layer that has a solder-blocking effect. In this embodiment, the upper plating layer 30 is formed of a Ni plating layer.

[0116] The thickness of the upper coating layer 30 in the stacking direction x is preferably 1 μm or more and 9 μm or less.

[0117] The surface coating 32 has a first surface coating 32a and a second surface coating 32b.

[0118] The first surface plating layer 32a is configured to cover the first upper plating layer 30a. Specifically, the first surface plating layer 32a is preferably disposed on the first end face 12e of the surface of the first upper plating layer 30a, and is configured to also reach the first main face 12a of the surface of the first upper plating layer 30a.

[0119] The second surface plating layer 32b is configured to cover the second upper plating layer 30b. Specifically, the second surface plating layer 32b is preferably disposed on the second end face 12f of the surface of the second upper plating layer 30b, and is configured to also reach the first main face 12a of the surface of the second upper plating layer 30b.

[0120] The surface plating layer 32 can be formed from a Sn plating layer that has good adhesion to solder, or from a Cu plating layer or the like, for the purpose of mounting it on an embedded substrate, but is not limited to this.

[0121] The thickness of the surface coating layer 32 in the stacking direction x is preferably 1 μm or more and 7 μm or less.

[0122] The dimension of the stacked ceramic capacitor 10, which includes the stacked body 12, the first external electrode 24a, and the second external electrode 24b, in the length direction z is set as dimension L. The dimension of the stacked ceramic capacitor 10 in the stacking direction x is set as dimension T. The dimension of the stacked ceramic capacitor 10 in the width direction y is set as dimension W.

[0123] The dimensions of the stacked ceramic capacitor 10 are preferably as follows: the length direction (z) L dimension is 200 mm or more and 900 mm or less; the width direction (y) W dimension is 200 mm or more and 900 mm or less; and the stacking direction (x) T dimension is 50 μm or more and 300 mm or less.

[0124] Furthermore, the multilayer ceramic capacitor 10 effectively produces the effects of the present invention when the total thickness (T dimension) of the thickness of each of the first external electrode 24a and the second external electrode 24b disposed on the first main surface 12a and the thickness of the multilayer body 12 in the stacking direction x is 80 μm or less. Moreover, it becomes even more effective when the T dimension of the multilayer ceramic capacitor 10 in the stacking direction x is 55 μm or less, more preferably 50 μm or less.

[0125] according to Figure 1 The multilayer ceramic capacitor 10 shown can disperse the stress applied to the end edges P1 and P2 of the thin film layer 26 at the center of the longitudinal direction z of the multilayer body 12 because the end edges P1 and P2 of the thin film layer 26 are separated from the multilayer body 12, thereby suppressing the propagation of cracks into the interior of the multilayer ceramic capacitor 10.

[0126] In addition, according to Figure 1 In the multilayer ceramic capacitor 10 shown, among the end edges P1 and P2 of the thin film layer 26 located at the center of the stacked body 12 along the longitudinal direction z, if position A is defined as the position of the thin film layer 26 closest to the center of the stacked body 12 along the longitudinal direction z, position B is defined as the position where it begins to separate from the stacked body 12 in the lamination direction x, and position C is defined as the position where a perpendicular line drawn from position A intersects the stacked body 12 in the lamination direction x, then ∠ABC is 20 degrees or more and 70 degrees or less. Therefore, the end edges P1 and P2 of the thin film layer 26 located at the center of the stacked body 12 along the longitudinal direction z can be sufficiently separated from the stacked body 12, and sufficient length can also be obtained. Therefore, the direction of compressive stress can be sufficiently changed. As a result, even when thermal stress is applied, tensile stress applied to the end edges P1 and P2 of the thin film layer 26 can be suppressed. Thus, cracks in the stacked body 12 caused by thermal stress can be suppressed.

[0127] Furthermore, according to Figure 1 In the multilayer ceramic capacitor 10 shown, if the position of the thin film layer 26 closest to the center of the multilayer 12 in the longitudinal direction z is set as position A, and the position where it separates from the multilayer 12 in the lamination direction x is set as position B, then the distance from position A to position B in the longitudinal direction z is more than 5 μm and less than 20 μm. Therefore, the distance from position A to position B can be sufficiently obtained, and thus the direction of compressive stress can be sufficiently changed.

[0128] In addition, according to Figure 1 The multilayer ceramic capacitor 10 shown has a metal particle size of less than 1.0 μm in the thin film layer 26, which reduces the overall compressive stress of the thin film layer 26.

[0129] Furthermore, according to Figure 1 The stacked ceramic capacitor 10 shown can effectively produce the effects described above in this invention because the total thickness of the first external electrode 24a and the second external electrode 24b disposed on the first main surface 12a and the thickness of the stacked body 12 in the stacking direction x is 80 μm or less.

[0130] 2. Manufacturing method of multilayer ceramic capacitors

[0131] Hereinafter, the manufacturing method of the multilayer ceramic capacitor 10 according to the first embodiment will be described.

[0132] First, prepare a conductive paste for the ceramic green sheet and internal electrodes. The conductive paste for the dielectric sheet and internal electrodes contains an adhesive (e.g., a known organic adhesive) and a solvent (e.g., a known organic adhesive).

[0133] Next, for example, conductive paste for internal electrodes is printed onto the ceramic green sheet in a given pattern using screen printing, gravure printing, or similar methods to form an internal electrode pattern. Specifically, a paste containing a conductive material is applied to the ceramic green sheet using the aforementioned printing method, thereby forming a conductive paste layer. The paste containing the conductive material is, for example, a paste made by adding organic binders and organic solvents to metal powder. Additionally, a ceramic green sheet for an outer layer without the internal electrode pattern is also produced.

[0134] These ceramic green sheets with internal electrode patterns are used to make laminated sheets. That is, a given number of outer layer ceramic green sheets without internal electrode patterns are stacked, and ceramic green sheets with internal electrode patterns corresponding to the first internal electrode layer 16a and the second internal electrode layer 16b are alternately stacked on top of them, and a given number of outer layer ceramic green sheets without internal electrode patterns are stacked on top of them, thereby making laminated sheets.

[0135] Furthermore, laminated sheets are pressed in the lamination direction using methods such as isostatic pressing to produce laminated blocks.

[0136] Next, the stacked block is cut to a given size to cut out stacked chips. At this point, rounded corners and edges of the stacked chips can also be formed by methods such as tumble grinding.

[0137] Next, the stacked sheets are fired to form the stack 12. The firing temperature is also based on the ceramic and internal electrode materials, but is preferably above 900°C and below 1400°C.

[0138] Next, a thin film layer 26 is formed on a portion of the first main surface 12a of the laminate 12.

[0139] For example, a photoresist containing resin or the like is disposed on the first main surface 12a of the laminate 12. A first thin film layer 26a and a second thin film layer 26b are disposed on the photoresist and the first main surface 12a of the laminate 12 by sputtering, screen printing, or the like. Then, the photoresist portion is peeled off. By doing so, the end edge P1 of the first thin film layer 26a located at the center side of the longitudinal direction z of the laminate 12 and the end edge P2 of the second thin film layer 26b located at the center side of the longitudinal direction z of the laminate 12 can be separated from the laminate 12 in the lamination direction x.

[0140] Subsequently, a Cu plating layer 28 is formed as the lower plating layer 28, directly covering the thin film layer 26 and the first end face 12e and the second end face 12f of the laminate 12 without the thin film layer 26. Here, the lower plating layer 28 is formed between the laminate 12 and the thin film layer 26 in the end edge P1 of the first thin film layer 26a located at the center of the length direction z of the laminate 12 and the end edge P2 of the second thin film layer 26b located at the center of the length direction z of the laminate 12.

[0141] Next, a Ni plating layer, serving as an upper plating layer 30, is formed on the surface of the lower plating layer 28. Furthermore, a Sn plating layer, serving as a surface plating layer 32, is formed on the surface of the upper plating layer 30. During the formation of the lower plating layer 28, the upper plating layer 30, and the surface plating layer 32, electroplating using an electroplating bath with added additives or electroless plating based on a displacement reaction are performed.

[0142] Furthermore, after the thin film layer 26 is formed, a photoresist is applied to the first main surface 12a, and electrolytic plating or electroless plating is performed. This allows the end edge of the lower plating layer 28 located at the center of the length direction z of the laminate 12 to separate from the laminate 12 in the lamination direction x. Alternatively, the photoresist can be applied after the thin film layer 26 is formed and fired.

[0143] In the way described above, it is possible to manufacture Figure 1 The described multilayer ceramic capacitor 10.

[0144] B. Second Implementation Method

[0145] Next, the multilayer ceramic capacitor 110 according to the second embodiment of the present invention will be described. Figure 7 This is a perspective view showing the appearance of a multilayer ceramic capacitor according to the second embodiment of the present invention. Figure 8 This is a front view showing a multilayer ceramic capacitor according to the second embodiment of the present invention. Figure 9 This is a top view showing a multilayer ceramic capacitor according to the second embodiment of the present invention. Figure 10 yes Figure 7 The sectional view at line XX involved. Figure 11yes Figure 7 A cross-sectional view at line XI-XI.

[0146] The laminated ceramic capacitor 110 according to the second embodiment differs from the laminated ceramic capacitor 10 according to the first embodiment in that: the thin film layer 26 is disposed not only on the first main surface 12a but also on the second main surface 12b; and the dimensions in the longitudinal direction z and the width direction y of the laminated ceramic capacitor are different. Therefore, the same reference numerals are added to the constituent elements corresponding to those in the first embodiment, and their detailed descriptions are omitted.

[0147] The multilayer ceramic capacitor 110 has a multilayer body 12 and an external electrode 124.

[0148] The stack 12 has multiple dielectric layers 14 and multiple internal electrode layers 16 stacked together.

[0149] like Figure 10 as well as Figure 11 As shown, the laminate 12 has an inner layer 15a with multiple internal electrode layers 16 facing each other in the lamination direction x that connects the first main surface 12a and the second main surface 12b, a first main surface side outer layer 15b1 formed by multiple dielectric layers 14 located between the internal electrode layer 16 located closest to the first main surface 12a and the first main surface 12a, and a second main surface side outer layer 15b2 formed by multiple dielectric layers 14 located between the internal electrode layer 16 located closest to the second main surface 12b and the second main surface 12b.

[0150] The inner layer 15a includes an inner dielectric layer 14a, a first internal electrode layer 16a alternately stacked with the inner dielectric layer 14a, and a second internal electrode layer 16b alternately stacked with the inner dielectric layer 14a. In this case, the first internal electrode layer 16a may also be exposed at the first end face 12e, the first side face 12c, and the second side face 12d, and the second internal electrode layer 16b may also be exposed at the second end face 12f, the first side face 12c, and the second side face 12d.

[0151] The external electrode 124 has a first external electrode 124a and a second external electrode 124b.

[0152] The first external electrode 124a is connected to the first internal electrode layer 16a and is configured to cover a portion of the first main surface 12a and a portion of the second main surface 12b on the first end face 12e. Alternatively, it may slightly wrap around a portion of the first side surface 12c and a portion of the second side surface 12d. It is not limited to this; it may also cover only either the first main surface or the second main surface.

[0153] The second external electrode 124b is connected to the second internal electrode layer 16b and is configured to cover a portion of the first main surface 12a and a portion of the second main surface 12b on the second end face 12f. Alternatively, it may slightly wrap around a portion of the first side surface 12c and a portion of the second side surface 12d. It is not limited to this; it may also cover only either the first or the second main surface.

[0154] The external electrode 124 is composed of a thin film layer 126 disposed on at least one of the first main surface 12a, the second main surface 12b, the first end surface 12e, and the second end surface 12f, a lower plating layer 128 covered by the thin film layer 126, an upper plating layer 130 covered by the lower plating layer 128, and a surface plating layer 132 covered by the upper plating layer 130.

[0155] In this embodiment, the thin film layer 126 of the external electrode 124 is disposed not only on the first main surface 12a, but also on the second main surface 12b.

[0156] The thin film layer 126 has a first thin film layer 126a and a second thin film layer 126b.

[0157] The first thin film layer 126a has a first main surface side thin film layer 126a1 covering a portion of the first main surface 12a on the side of the first end face 12e of the laminate 12, and a third main surface side thin film layer 126a2 covering a portion of the second main surface 12b on the side of the first end face 12e of the laminate 12.

[0158] The second thin film layer 126b has a second main surface side thin film layer 126b1 covering a portion of the first main surface 12a on the second end face 12f side of the laminate 12, and a fourth main surface side thin film layer 126b2 covering a portion of the second main surface 12b on the second end face 12f side of the laminate 12.

[0159] The end edge P1 of the first main surface side thin film layer 126a1, located at the center of the longitudinal direction z of the laminate 12, separates from the laminate 12 in the lamination direction x. In other words, the end edge P1 of the first main surface side thin film layer 126a1, located at the center of the longitudinal direction z of the laminate 12, floats off the laminate 12. Because the end edge P1 of the first main surface side thin film layer 126a1 continuously floats off in the width direction y, tensile stress applied to the end edge P1 of the first main surface side thin film layer 126a1 can be suppressed even under thermal stress. Therefore, cracks in the laminate 12 caused by thermal stress can be suppressed.

[0160] At this time, in the end edge P1 of the first main surface side film layer 126a1 located at the center of the laminate 12 in the length direction z, position A is defined as the position of the first main surface side film layer 126a1 closest to the center of the laminate 12 in the length direction z; position B is defined as the position where it begins to separate from the laminate 12 in the lamination direction x; and position C is defined as the position where a perpendicular line drawn from position A in the lamination direction x intersects with the laminate 12. ∠ABC is preferably 20 degrees or more and 70 degrees or less. By setting these values ​​within the above range, the end edge P1 of the first main surface side film layer 126a1 located at the center of the laminate 12 in the length direction z can be sufficiently separated from the laminate 12, and the distance in the length direction z from position B to position C can be sufficiently obtained. Therefore, the direction of compressive stress can be sufficiently changed. As a result, even under the application of thermal stress, the tensile stress applied to the end edge P1 of the first main surface thin film layer 126a1 can be suppressed. Thus, cracks in the laminate 12 caused by thermal stress can be suppressed.

[0161] Furthermore, the distance z along the longitudinal direction from position A to position B is preferably 5 μm or more and 20 μm or less. This allows for a sufficient determination of the distance from position A to position B, thus enabling a sufficient variation in the direction of compressive stress. On the other hand, if the distance z along the longitudinal direction from position A to position B is less than 5 μm, the end edge P1 of the first main surface side thin film layer 126a1 located at the center of the longitudinal direction z of the laminate 12 cannot sufficiently separate from the laminate 12. Furthermore, if the distance z along the longitudinal direction from position A to position B is greater than 20 μm, the stress on the first main surface side thin film layer 126a1 becomes excessive, and cracks may enter the laminate 12.

[0162] Similar to the first main surface side film layer 126a1, the end edge P2 of the second main surface side film layer 126b1 located at the center of the longitudinal direction z of the laminate 12 separates from the laminate 12 in the lamination direction x. In other words, the end edge P2 of the second main surface side film layer 126b1 located at the center of the longitudinal direction z of the laminate 12 floats off the laminate 12. Because the end edge P2 of the second main surface side film layer 126b1 continuously floats off in the width direction y, tensile stress applied to the end edge P2 of the second main surface side film layer 126b1 can be suppressed even under thermal stress. Therefore, cracks in the laminate 12 caused by thermal stress can be suppressed.

[0163] At this time, in the end edge P2 of the second main surface side film layer 126b1 located at the center of the laminate 12 in the length direction z, position A is defined as the position of the second main surface side film layer 126b1 closest to the center of the laminate 12 in the length direction z; position B is defined as the position where it begins to separate from the laminate 12 in the lamination direction x; and position C is defined as the position where a perpendicular line drawn from position A in the lamination direction x intersects the laminate 12. ∠ABC is preferably 20 degrees or more and 70 degrees or less. By setting these values ​​within the above range, the end edge P2 of the second main surface side film layer 126b1 located at the center of the laminate 12 in the length direction z can be sufficiently separated from the laminate 12, and the distance in the length direction z from position B to position C can be sufficiently obtained. Therefore, the direction of compressive stress can be sufficiently changed. As a result, even under the application of thermal stress, the tensile stress applied to the end edge P2 of the second main surface thin film layer 126b1 can be suppressed. Thus, cracks in the laminate 12 caused by thermal stress can be suppressed.

[0164] Furthermore, the distance z along the longitudinal direction from position A to position B is preferably 5 μm or more and 20 μm or less. This allows for a sufficient determination of the distance from position A to position B, thus enabling a sufficient variation in the direction of compressive stress. On the other hand, if the distance z along the longitudinal direction from position A to position B is less than 5 μm, the end edge P2 of the second main surface side film layer 126b1 located at the center of the longitudinal direction z of the laminate 12 cannot sufficiently separate from the laminate 12. Furthermore, if the distance z along the longitudinal direction from position A to position B is greater than 20 μm, the stress on the second main surface side film layer 126b1 becomes excessive, and cracks may enter the laminate 12.

[0165] Similar to the first main surface side film layer 126a1, the end edge P3 of the third main surface side film layer 126a2 located at the center in the longitudinal direction z of the laminate 12 separates from the laminate 12 in the lamination direction x. In other words, the end edge P3 of the third main surface side film layer 126a2 located at the center in the longitudinal direction z of the laminate 12 floats off the laminate 12. Because the end edge P3 of the third main surface side film layer 126a2 continuously floats off in the width direction y, tensile stress applied to the end edge P3 of the third main surface side film layer 126a2 can be suppressed even under thermal stress. Therefore, cracks in the laminate 12 caused by thermal stress can be suppressed.

[0166] At this time, in the end edge P3 of the third main surface side film layer 126a2 located at the center of the laminate 12 in the length direction z, position A is defined as the position of the third main surface side film layer 126a2 closest to the center of the laminate 12 in the length direction z; position B is defined as the position where it begins to separate from the laminate 12 in the lamination direction x; and position C is defined as the position where a perpendicular line drawn from position A in the lamination direction x intersects with the laminate 12. ∠ABC is preferably 20 degrees or more and 70 degrees or less. By setting these values ​​within the above range, the end edge P3 of the third main surface side film layer 126a2 located at the center of the laminate 12 in the length direction z can be sufficiently separated from the laminate 12, and the distance in the length direction z from position B to position C can also be sufficiently obtained. Therefore, the direction of compressive stress can be sufficiently changed. As a result, even under the application of thermal stress, the tensile stress applied to the end edge P3 of the third main surface thin film layer 126a2 can be suppressed. Thus, cracks in the laminate 12 caused by thermal stress can be suppressed.

[0167] Furthermore, the distance z along the longitudinal direction from position A to position B is preferably 5 μm or more and 20 μm or less. This allows for a sufficient determination of the distance from position A to position B, thus enabling a sufficient variation in the direction of compressive stress. On the other hand, if the distance z along the longitudinal direction from position A to position B is less than 5 μm, the end edge P3 of the third main surface side film layer 126a2 located at the center of the longitudinal direction z of the laminate 12 cannot sufficiently separate from the laminate 12. Furthermore, if the distance z along the longitudinal direction from position A to position B is greater than 20 μm, the stress in the third main surface side film layer 126a2 becomes excessive, and cracks may enter the laminate 12.

[0168] Similar to the second main surface side film layer 126b1, the end edge P4 of the fourth main surface side film layer 126b2 located at the center in the longitudinal direction z of the laminate 12 separates from the laminate 12 in the lamination direction x. In other words, the end edge P4 of the fourth main surface side film layer 126b2 located at the center in the longitudinal direction z of the laminate 12 floats off the laminate 12. Because the end edge P4 of the fourth main surface side film layer 126b2 continuously floats off in the width direction y, tensile stress applied to the end edge P4 of the fourth main surface side film layer 126b2 can be suppressed even under thermal stress. Therefore, cracks in the laminate 12 caused by thermal stress can be suppressed.

[0169] At this time, in the end edge P4 of the fourth main surface side film layer 126b2 located at the center of the laminate 12 in the length direction z, position A is defined as the position of the fourth main surface side film layer 126b2 closest to the center of the laminate 12 in the length direction z; position B is defined as the position where it begins to separate from the laminate 12 in the lamination direction x; and position C is defined as the position where a perpendicular line drawn from position A in the lamination direction x intersects the laminate 12. ∠ABC is preferably 20 degrees or more and 70 degrees or less. By setting these values ​​within the above range, the end edge P4 of the fourth main surface side film layer 126b2 located at the center of the laminate 12 in the length direction z can be sufficiently separated from the laminate 12, and the distance in the length direction z from position B to position C can be sufficiently obtained. Therefore, the direction of compressive stress can be sufficiently changed. As a result, even under the application of thermal stress, the tensile stress applied to the end edge P4 of the fourth main surface thin film layer 126b2 can be suppressed. Thus, cracks in the laminate 12 caused by thermal stress can be suppressed.

[0170] Furthermore, the distance z along the longitudinal direction from position A to position B is preferably 5 μm or more and 20 μm or less. This allows for a sufficient determination of the distance from position A to position B, thus enabling a sufficient variation in the direction of compressive stress. On the other hand, if the distance z along the longitudinal direction from position A to position B is less than 5 μm, the end edge P4 of the fourth main surface side film layer 126b2 located at the center of the longitudinal direction z of the laminate 12 cannot sufficiently separate from the laminate 12. Furthermore, if the distance z along the longitudinal direction from position A to position B is greater than 20 μm, the stress on the fourth main surface side film layer 126b2 becomes excessive, and cracks may enter the laminate 12.

[0171] The lower plating layer 128 has a first lower plating layer 128a and a second lower plating layer 128b. The lower plating layer 128 is disposed on the thin film layer 126 and on the first end face 12e and the second end face 12f. The lower plating layer 128 is formed between the laminate 12 and the thin film layer 126.

[0172] The first lower plating layer 128a is disposed on the first end face 12e of the laminate 12 where the thin film layer 126 is not disposed, and is configured to cover the first main surface side thin film layer 126a1 disposed on the first main surface 12a and the third main surface side thin film layer 126a2 disposed on the second main surface 12b.

[0173] The second lower coating layer 128b is disposed on the second end face 12f of the laminate 12 where the thin film layer 126 is not disposed, and is configured to cover the second main surface side thin film layer 126b1 disposed on the first main surface 12a and the fourth main surface side thin film layer 126b2 disposed on the second main surface 12b.

[0174] The upper plating layer 130 has a first upper plating layer 130a and a second upper plating layer 130b. The first upper plating layer 130a is configured to cover the first lower plating layer 128a. The second upper plating layer 130b is configured to cover the second lower plating layer 128b.

[0175] The surface plating layer 132 has a first surface plating layer 132a and a second surface plating layer 132b. The first surface plating layer 132a is configured to cover the first upper plating layer 130a. The second surface plating layer 132b is configured to cover the second upper plating layer 130b.

[0176] In addition, such as Figure 8 As shown, in this embodiment, the external electrode 124 is in the shape of a U-shape. However, it is not limited to this, and the shape of the external electrode 124 may also be in the shape of a V-shape or a U-shape.

[0177] The dimension of the stacked ceramic capacitor 110, which includes the stacked body 12, the first external electrode 124a, and the second external electrode 124b, in the length direction z is set as dimension L. The dimension of the stacked ceramic capacitor 110 in the stacking direction x is set as dimension T. The dimension of the stacked ceramic capacitor 110 in the width direction y is set as dimension W.

[0178] The dimensions of the laminated ceramic capacitor 110 are preferably as follows: the length direction (z) L dimension is 200 mm or more and 900 mm or less; the width direction (y) W dimension is 200 mm or more and 900 mm or less; and the lamination direction (x) T dimension is 50 μm or more and 300 mm or less.

[0179] The dimension (W dimension) of the multilayer ceramic capacitor 110 in the width direction y is greater than its dimension (T dimension) in the length direction z. In other words, the length dimension (L dimension) in the length direction z of the multilayer ceramic capacitor 110 is shorter than the width dimension (W dimension) in the width direction y. Thus, the multilayer ceramic capacitor 110 has an LW inverted shape, resulting in a shorter current path and thus enabling low ESL (Electrostatic Discharge).

[0180] Furthermore, the multilayer ceramic capacitor 110 effectively produces the effects of the present invention when the sum of the thicknesses of the first external electrode 124a and the second external electrode 124b disposed on the first main surface 12a and the thickness of the multilayer body 12 in the stacking direction x (T dimension) is 80 μm or less. Moreover, it becomes even more effective when the T dimension of the multilayer ceramic capacitor 110 in the stacking direction x is 55 μm or less, more preferably 50 μm or less.

[0181] C. Third Implementation

[0182] 1. Multilayer ceramic capacitor

[0183] Next, the multilayer ceramic capacitor 510 according to the third embodiment of the present invention will be described. Figure 12 This is a perspective view showing the appearance of a multilayer ceramic capacitor according to the third embodiment of the present invention. Figure 13 yes Figure 12 A cross-sectional view at line XIII-XIII involved. Figure 14 yes Figure 12 A cross-sectional view at line XIV-XIV. Figure 15 yes Figure 12 A cross-sectional view at line XV-XV involved. Figure 16 This is a top view showing the stack and thin film layer of the multilayer ceramic capacitor according to the third embodiment of the present invention. Figure 17 This is a bottom view showing the stack and thin film layer of the multilayer ceramic capacitor according to the third embodiment of the present invention. Figure 18 This is a front view showing the laminate and thin film layer of the multilayer ceramic capacitor according to the third embodiment of the present invention. Figure 19 This is a rear view showing the laminate and thin film layer of the multilayer ceramic capacitor according to the third embodiment of the present invention. Figure 20 This is a left view showing the stacked ceramic capacitor and the thin film layer according to the third embodiment of the present invention. Figure 21 This is a right view showing the laminate and thin film layer of the multilayer ceramic capacitor according to the third embodiment of the present invention. Figure 22 yes Figure 13 Enlarged view of the β part involved. Figure 23 yes Figure 12 The exploded three-dimensional view of the stacked body shown.

[0184] The multilayer ceramic capacitor 510 includes a multilayer body 512 and external electrodes 524 and 525.

[0185] The stack 512 includes multiple stacked dielectric layers 514 and multiple stacked internal electrode layers 516. The stack 512 has a first main surface 512a and a second main surface 512b opposite each other in the stacking direction x, a first side surface 512c and a second side surface 512d opposite each other in the width direction y orthogonal to the stacking direction x, and a third side surface 512e and a fourth side surface 512f opposite each other in the length direction z orthogonal to both the stacking direction x and the width direction y. The first main surface 512a and the second main surface 512b extend along the width direction y and the length direction z, respectively. The first side surface 512c and the second side surface 512d extend along the stacking direction x and the length direction z, respectively. The third side surface 512e and the fourth side surface 512f extend along the stacking direction x and the width direction y, respectively. Therefore, the stacking direction x refers to the direction that connects the first main surface 512a and the second main surface 512b, the width direction y refers to the direction that connects the first side surface 512c and the second side surface 512d, and the length direction z refers to the direction that connects the third side surface 512e and the fourth side surface 512f.

[0186] Furthermore, the laminate 512 preferably has rounded corners at its corners and edges. Here, the corners are the parts where three faces of the laminate 512 intersect, and the edges are the parts where two faces of the laminate 512 intersect.

[0187] like Figure 13 as well as Figure 14 As shown, the laminate 512 has an inner layer portion 515a with multiple internal electrode layers 516 facing each other in the lamination direction x that connects the first main surface 512a and the second main surface 512b to each other, a first main surface side outer layer portion 515b1 formed by multiple dielectric layers 514 located between the internal electrode layer 516 located closest to the first main surface 512a and the first main surface 512a, and a second main surface side outer layer portion 515b2 formed by multiple dielectric layers 514 located between the internal electrode layer 516 located closest to the second main surface 512b and the second main surface 512b.

[0188] The dielectric layer 514 has an inner dielectric layer 514a, which is an inner layer portion 515a, and an outer dielectric layer 514b, which is an outer layer portion 515b1 on the first main surface side and an outer layer portion 515b2 on the second main surface side.

[0189] The outer layer 515b1 on the first main surface side is located on the first main surface 512a side of the laminate 512, and is an assembly of multiple outer dielectric layers 514b located between the first main surface 512a and the inner electrode layer 516 closest to the first main surface 512a.

[0190] The second main surface side outer layer 515b2 is located on the second main surface 512b side of the laminate 512, and is an assembly of multiple outer dielectric layers 514b located between the second main surface 512b and the inner electrode layer 516 closest to the second main surface 512b.

[0191] Furthermore, the region sandwiched between the first main surface outer layer 515b1 and the second main surface outer layer 515b2 is the inner layer 515a. That is, the inner layer 515a is the region where the inner electrode layer 516 is stacked.

[0192] The inner layer 515a includes an inner dielectric layer 514a, a first internal electrode layer 516a alternately stacked with the inner dielectric layer 514a, and a second internal electrode layer 516b alternately stacked with the inner dielectric layer 514a.

[0193] The dielectric layer 514 can have multiple grains containing a perovskite-type compound with BaTiO3 as its basic structure.

[0194] The dielectric layer 514 can be formed from a dielectric material, for example. As the dielectric material, dielectric ceramics containing main components such as BaTiO3, CaTiO3, SrTiO3, and CaZrO3 can be used. Furthermore, materials with secondary components such as Mn compounds, Fe compounds, Cr compounds, Co compounds, and Ni compounds added to these main components can also be used.

[0195] Furthermore, considering the required functions, the inner dielectric layer 514a and the outer dielectric layer 514b can also be made of different materials. For example, if the outer dielectric layer 514b is made of a soft material, it can buffer the stress on the laminate 512. Furthermore, if the outer dielectric layer 514b is made of a robust material, it can suppress the formation of cracks.

[0196] The first main surface outer layer 515b1 and the second main surface outer layer 515b2 are assemblies of multiple outer dielectric layers 514b. Sometimes the first main surface outer layer 515b1 and the second main surface outer layer 515b2 are integrated after firing and cannot be distinguished piece by piece.

[0197] The number of stacked dielectric layers 514 is not particularly limited, but it is preferably 3 or more and 20 or less, including the first main surface side outer layer portion 515b1 and the second main surface side outer layer portion 515b2. In addition, the thickness of the dielectric layer 514 is preferably 1 μm or more and 6 μm or less.

[0198] like Figures 13 to 15As shown, the internal electrode layer 516 has a plurality of first internal electrode layers 516a and a plurality of second internal electrode layers 516b. The first internal electrode layers 516a are alternately stacked with a plurality of dielectric layers 514, and are exposed at least on the first side 512c and the second side 512d. The second internal electrode layers 516b are alternately stacked with a plurality of dielectric layers 514, and are exposed at least on the first side 512c and the second side 512d. Specifically, the first internal electrode layers 516a and the second internal electrode layers 516b are alternately stacked with an inner dielectric layer 514a between them.

[0199] The first internal electrode layer 516a is disposed on the surface of the inner dielectric layer 514a. In addition, the first internal electrode layer 516a has a first opposing electrode portion 518a opposite to the first main surface 512a and the second main surface 512b, and is stacked in the direction connecting the first main surface 512a and the second main surface 512b.

[0200] Furthermore, the second internal electrode layer 516b is disposed on the surface of an inner dielectric layer 514a that is different from the inner dielectric layer 514a on which the first internal electrode layer 516a is disposed. The second internal electrode layer 516b has a second opposing electrode portion 518b that is opposite to the first main surface 512a and the second main surface 512b, and is stacked in the direction that connects the first main surface 512a and the second main surface 512b.

[0201] like Figures 13 to 15 As shown, the first internal electrode layer 516a extends from the first side 512c and the third side 512e of the laminate 512 via the first lead-out electrode portion 520a, and extends from the second side 512d and the fourth side 512f of the laminate 512 via the second lead-out electrode portion 520b. Furthermore, the width of the first lead-out electrode portion 520a extending from the first side 512c can be approximately equal to the width extending from the third side 512e, and the width of the second lead-out electrode portion 520b extending from the second side 512d can be approximately equal to the width extending from the fourth side 512f.

[0202] The second internal electrode layer 516b extends from the first side 512c and the fourth side 512f of the laminate 512 via the third lead-out electrode portion 521a, and extends from the second side 512d and the third side 512e of the laminate 512 via the fourth lead-out electrode portion 521b. Furthermore, the width of the third lead-out electrode portion 521a extending from the first side 512c can be approximately equal to the width extending from the fourth side 512f, and the width of the fourth lead-out electrode portion 521b extending from the second side 512d can be approximately equal to the width extending from the third side 512e.

[0203] In addition, such as Figure 15As shown, the laminate 512 includes a side portion (L gap) 522b formed between one end of the first counter electrode portion 518a in the length direction z and the third side surface 512e, and between the other end of the second counter electrode portion 518b in the length direction z and the fourth side surface 512f.

[0204] And, as Figure 15 As shown, the laminate 512 includes a side portion (W gap) 522a formed between one end of the first counter electrode portion 518a in the width direction y and the first side surface 512c, and between the other end of the second counter electrode portion 518b in the width direction y and the second side surface 512d.

[0205] The material of the internal electrode layer 516 can be, for example, a suitable conductive material such as a metal such as Ni, Cu, Ag, Pd, Au, or an Ag-Pd alloy containing one of these metals.

[0206] Furthermore, by including Sn in the first inner electrode layer 516a and the second inner electrode layer 516b, the barrier height at the interface between the first inner electrode layer 516a and the second inner electrode layer 516b and the inner dielectric layer 514a can be increased, thereby increasing the depletion layer thickness. This mitigates the concentration of the electric field at the interface, resulting in improved reliability under high-temperature loads. In this case, Sn can be effectively utilized even if it is only included in the inner electrode layer 516 of either the first inner electrode layer 516a or the second inner electrode layer 516b.

[0207] Furthermore, to achieve a high capacitance in the capacitor, the area of ​​the inner electrode layer 516 needs to be increased. Therefore, the LW surface coverage of the inner electrode layer 516 is preferably 90% or more. The LW surface coverage is defined as the ratio obtained by subtracting the area of ​​the voids from the area of ​​the inner side of the edge of the inner electrode layer 516 when viewed from a cross-section (LW plane) in the width direction y and length direction z of the laminate 512. The higher the LW surface coverage, the higher the capacitance of the capacitor. However, even with a low LW surface coverage, the interlayer bonding strength is high because the inner dielectric layers 514a are bonded to each other through the voids, making interlayer delamination difficult.

[0208] The thickness of the internal electrode layer 516, namely the first internal electrode layer 516a and the second internal electrode layer 516b, is preferably 0.3 μm or more and 1.0 μm or less. Furthermore, the total number of the first internal electrode layer 516a and the second internal electrode layer 516b is preferably 20 or more and 90 or less.

[0209] like Figure 12 As shown, external electrodes 524 and 525 are disposed in the laminate 512.

[0210] The external electrode 524 has a first external electrode 524a and a second external electrode 524b.

[0211] The first external electrode 524a is configured to cover a portion of the first side surface 512c and a portion of the first main surface 512a of the coated laminate 512. In this embodiment, the first external electrode 524a is configured to cover the first lead-out electrode portion 520a in the first side surface 512c and the third side surface 512e, and is configured to cover a portion of the first main surface 512a and the second main surface 512b. The first external electrode 524a is electrically connected to the first lead-out electrode portion 520a of the first internal electrode layer 516a.

[0212] Furthermore, the second external electrode 524b is configured to cover a portion of the second side surface 512d and a portion of the first main surface 512a of the laminate 512. In this embodiment, the second external electrode 524b is configured to cover the second lead-out electrode portion 520b in the second side surface 512d and the fourth side surface 512f, and is configured to cover a portion of the first main surface 512a and the second main surface 512b. The second external electrode 524b is electrically connected to the second lead-out electrode portion 520b of the first internal electrode layer 516a.

[0213] The external electrode 525 has a third external electrode 525a and a fourth external electrode 525b.

[0214] The third external electrode 525a is separately disposed from the first external electrode 524a and is configured to cover a portion of the first side surface 512c and a portion of the first main surface 512a of the laminate 512. In this embodiment, the third external electrode 525a is configured to cover the third lead-out electrode portion 521a in the first side surface 512c and the fourth side surface 512f, and is configured to cover a portion of the first main surface 512a and the second main surface 512b. The third external electrode 525a is electrically connected to the third lead-out electrode portion 521a of the second internal electrode layer 516b.

[0215] Furthermore, the fourth external electrode 525b is separately configured from the second external electrode 524b, and is configured to cover a portion of the second side surface 512d and a portion of the first main surface 512a of the laminate 512. In this embodiment, the fourth external electrode 525b is configured to cover the fourth lead-out electrode portion 521b in the second side surface 512d and the third side surface 512e, and is configured to cover a portion of the first main surface 512a and the second main surface 512b. The fourth external electrode 525b is electrically connected to the fourth lead-out electrode portion 521b of the second internal electrode layer 516b.

[0216] Within the laminate 512, the first opposing electrode portion 518a of the first inner electrode layer 516a and the second opposing electrode portion 518b of the second inner electrode layer 516b are opposed to each other through the inner dielectric layer 514a, thereby forming an electrostatic capacitor. Therefore, an electrostatic capacitor can be obtained between the first external electrode 524a and the second external electrode 524b connected to the first inner electrode layer 516a and the third external electrode 525a and the fourth external electrode 525b connected to the second inner electrode layer 516b, exhibiting the characteristics of a capacitor.

[0217] In this embodiment, external electrodes 524 and 525 are disposed on the first main surface 512a and the second main surface 512b of the laminate 512. However, if they are disposed on the first main surface 512a of the laminate 512, they may not be disposed on the second main surface 512b.

[0218] The external electrode 524, namely the first external electrode 524a and the second external electrode 524b, each includes a thin film layer 526 covering at least a portion of any one side of the laminate 512, a lower plating layer 528 covering at least a portion of the thin film layer 526, an upper plating layer 530 disposed on the lower plating layer 528, and a surface plating layer 532 disposed on the upper plating layer 530.

[0219] The external electrode 525, namely the third external electrode 525a and the fourth external electrode 525b, each includes a thin film layer 527 covering at least a portion of any one side of the laminate 512, a lower plating layer 529 covering at least a portion of the thin film layer 527, an upper plating layer 531 disposed on the lower plating layer 529, and a surface plating layer 533 disposed on the upper plating layer 531.

[0220] The thin film layer 526 has a first thin film layer 526a and a second thin film layer 526b.

[0221] The first thin film layer 526a has a first main surface side thin film layer 526a1, which is a portion of the first main surface 512a at the corner where the first main surface 512a, the first side surface 512c, and the third side surface 512e intersect the laminate 512; a third main surface side thin film layer 526a2, which is a portion of the second main surface 512b at the corner where the second main surface 512b, the first side surface 512c, and the third side surface 512e intersect the laminate 512; a first side surface side thin film layer 526a3, which is a portion of the first side surface 512c at the corner where the first main surface 512a, the first side surface 512c, and the third side surface 512e intersect the laminate 512; and a third side surface side thin film layer 526a4, which is a portion of the third side surface 512e at the corner where the first main surface 512a, the first side surface 512c, and the third side surface 512e intersect the laminate 512.

[0222] The second thin film layer 526b has a second main surface side thin film layer 526b1 at the corner where the first main surface 512a, the second side surface 512d, and the fourth side surface 512f intersect, a fourth main surface side thin film layer 526b2 at the corner where the second main surface 512b, the second side surface 512d, and the fourth side surface 512f intersect, a second side surface side thin film layer 526b3 at the corner where the first main surface 512a, the second side surface 512d, and the fourth side surface 512f intersect, and a fourth side surface side thin film layer 526b4 at the corner where the first main surface 512a, the second side surface 512d, and the fourth side surface 512f intersect.

[0223] The thin film layer 527 has a third thin film layer 527a and a fourth thin film layer 527b.

[0224] The third thin film layer 527a has a fifth main surface side thin film layer 527a1 at the corner where the first main surface 512a, the first side surface 512c, and the fourth side surface 512f intersect the laminate 512; a seventh main surface side thin film layer 527a2 at the corner where the second main surface 512b, the first side surface 512c, and the fourth side surface 512f intersect the laminate 512; a fifth side surface side thin film layer 527a3 at the corner where the first main surface 512a, the first side surface 512c, and the fourth side surface 512f intersect the laminate 512; and a seventh side surface side thin film layer 527a4 at the corner where the first main surface 512a, the first side surface 512c, and the fourth side surface 512f intersect the laminate 512.

[0225] The fourth thin film layer 527b has a sixth main surface side thin film layer 527b1, which is a portion of the first main surface 512a at the corner where the first main surface 512a, the second side surface 512d, and the third side surface 512e of the cover laminate 512; an eighth main surface side thin film layer 527b2, which is a portion of the second main surface 512b at the corner where the second main surface 512b, the second side surface 512d, and the third side surface 512e of the cover laminate 512; a sixth side surface side thin film layer 527b3, which is a portion of the second side surface 512d at the corner where the first main surface 512a, the second side surface 512d, and the third side surface 512e of the cover laminate 512; and an eighth side surface side thin film layer 527b4, which is a portion of the third side surface 512e at the corner where the first main surface 512a, the second side surface 512d, and the third side surface 512e of the cover laminate 512.

[0226] The end edge P5 of the first main surface side thin film layer 526a1, located at the center of the longitudinal direction z of the laminate 512, separates from the laminate 512 in the lamination direction x. In other words, the end edge P5 of the first main surface side thin film layer 526a1, located at the center of the longitudinal direction z of the laminate 512, floats off the laminate 512. Because the end edge P5 of the first main surface side thin film layer 526a1 continuously floats off in the width direction y, tensile stress applied to the end edge P5 of the first main surface side thin film layer 526a1 can be suppressed even under thermal stress. Therefore, cracks in the laminate 512 caused by thermal stress can be suppressed.

[0227] At this time, in the end edge P5 of the first main surface side film layer 526a1 located at the center of the laminate 512 in the length direction z, the position of the first main surface side film layer 526a1 closest to the center of the laminate 512 in the length direction z is designated as position A1, the position where it begins to separate from the laminate 512 in the lamination direction x is designated as position B1, and the position where it intersects the laminate 512 when a perpendicular line is drawn from position A1 in the lamination direction x is designated as position C1. ∠A1B1C1 is preferably 20 degrees or more and 70 degrees or less. By setting these values ​​within the above range, the end edge P5 of the first main surface side film layer 526a1 located at the center of the laminate 512 in the length direction z can be sufficiently separated from the laminate 512, and the distance in the length direction z from position B1 to position C1 can also be sufficiently obtained. Therefore, the direction of compressive stress can be sufficiently changed. As a result, even under the application of thermal stress, the tensile stress applied to the end edge P5 of the first main surface thin film layer 526a1 can be suppressed. Thus, cracks in the laminate 512 caused by thermal stress can be suppressed.

[0228] Furthermore, the distance z along the longitudinal direction from position A1 to position B1 is preferably 5 μm or more and 20 μm or less. This allows for a sufficiently precise distance from position A1 to position B1, thus enabling a sufficient variation in the direction of compressive stress. On the other hand, if the distance z along the longitudinal direction from position A1 to position B1 is less than 5 μm, the end edge P5 of the first main surface side thin film layer 526a1 located at the center of the longitudinal direction z of the laminate 512 cannot sufficiently separate from the laminate 512. Furthermore, if the distance z along the longitudinal direction from position A1 to position B1 is greater than 20 μm, the stress on the first main surface side thin film layer 526a1 becomes excessive, and cracks may enter the laminate 512.

[0229] Similarly, the end edge P6 of the second main surface side thin film layer 526b1 located at the center of the longitudinal direction z of the laminate 512 separates from the laminate 512 in the lamination direction x. That is, the end edge P6 of the second main surface side thin film layer 526b1 located at the center of the longitudinal direction z of the laminate 512 floats up from the laminate 512.

[0230] The end edge P7 of the third main surface side thin film layer 526a2 located at the center of the longitudinal direction z of the laminate 512 separates from the laminate 512 in the lamination direction x. That is, the end edge P7 of the third main surface side thin film layer 526a2 located at the center of the longitudinal direction z of the laminate 512 floats up from the laminate 512.

[0231] The end edge P8 of the fourth main surface side thin film layer 526b2 located at the center of the longitudinal direction z of the laminate 512 separates from the laminate 512 in the lamination direction x. That is, the end edge P8 of the fourth main surface side thin film layer 526b2 located at the center of the longitudinal direction z of the laminate 512 floats up from the laminate 512.

[0232] The end edge P9 of the fifth main surface side film layer 527a1 located at the center of the longitudinal direction z of the laminate 512 separates from the laminate 512 in the lamination direction x. That is, the end edge P9 of the fifth main surface side film layer 527a1 located at the center of the longitudinal direction z of the laminate 512 floats up from the laminate 512.

[0233] The end edge P of the sixth main surface side film layer 527b1 at the center of the longitudinal direction z of the laminate 512. 10 Separation occurs in the lamination direction x from the laminate 512. Specifically, the end edge P of the sixth main surface side thin film layer 527b1 located at the center of the laminate 512 in the longitudinal direction z. 10 It rises from the stack 512.

[0234] The end edge P of the 7th main surface side thin film layer 527a2 located at the center of the longitudinal direction z of the laminate 512 11 Separation occurs from the laminate 512 in the lamination direction x. Specifically, the end edge P of the 7th main surface side thin film layer 527a2 located at the center of the laminate 512 in the longitudinal direction z. 11 It rises from the stack 512.

[0235] The end edge P of the eighth main surface side thin film layer 527b2 located at the center of the longitudinal direction z of the laminate 512. 12 Separation occurs in the lamination direction x from the laminate 512. Specifically, the end edge P of the 8th main surface side thin film layer 527b2 located at the center of the laminate 512 in the longitudinal direction z. 12 It rises from the stack 512.

[0236] In the second main surface side thin film layer 526b1, the third main surface side thin film layer 526a2, the fourth main surface side thin film layer 526b2, the fifth main surface side thin film layer 527a1, the sixth main surface side thin film layer 527b1, the seventh main surface side thin film layer 527a2, and the eighth main surface side thin film layer 527b2, similarly to the first main surface side thin film layer 526a1, through each end edge P6, P7, P8, P9, P 10 P 11 P 12 It floats continuously in the width direction y, thus suppressing the stress applied to each end edge P6, P7, P8, P9, and P even under thermal stress. 10 P 11 P 12 The tensile stress is reduced. Therefore, cracks in the laminate 512 caused by thermal stress can be suppressed.

[0237] The end edge P of the first main surface side thin film layer 526a1 located at the center side in the width direction y of the laminate 512 13 Separation occurs in the lamination direction x from the laminate 512. Specifically, the end edge P of the first main surface side thin film layer 526a1 located at the center of the lamination in the width direction y of the laminate 512... 13 It floats up from the laminate 512. It passes through the end edge P of the first main surface side thin film layer 526a1. 13 It floats continuously in the longitudinal direction z, thereby suppressing the end edge P of the first main surface side film layer 526a1 even under thermal stress. 13 The tensile stress is reduced. Therefore, cracks in the laminate 512 caused by thermal stress can be suppressed.

[0238] At this time, the end edge P of the first main surface side thin film layer 526a1 located at the center side in the width direction y of the laminate 512 is... 13 In this design, position A2 is defined as the position of the first main surface side thin film layer 526a1 closest to the center of the laminate 512 in the width direction y; position B2 is defined as the position where the laminate separates from the laminate 512 in the lamination direction x; and position C2 is defined as the position where a perpendicular line drawn from position A2 in the lamination direction x intersects the laminate 512. ∠A2B2C2 is preferably 20 degrees or more and 70 degrees or less. By setting these values ​​within the above range, the end edge P of the first main surface side thin film layer 526a1 located at the center of the laminate 512 in the width direction y can be positioned... 13It can be sufficiently separated from the laminate 512, and the distance y in the width direction from position B2 to position C2 can also be sufficiently obtained. Therefore, the direction of compressive stress can be sufficiently changed. As a result, even when thermal stress is applied, the end edge P of the first main surface side film layer 526a1 can be suppressed. 13 The tensile stress is reduced. Therefore, cracks in the laminate 512 caused by thermal stress can be suppressed.

[0239] Furthermore, the distance in the width direction y from position A2 to position B2 is preferably 5 μm or more and 20 μm or less. This allows for a sufficiently precise distance from position A2 to position B2, thus enabling a sufficient variation in the direction of compressive stress. On the other hand, when the distance in the width direction y from position A2 to position B2 is less than 5 μm, the end edge P of the first main surface side thin film layer 526a1 located at the center side in the width direction y of the laminate 512... 13 It cannot be sufficiently separated from the laminate 512. Furthermore, when the distance in the width direction y from position A2 to position B2 is greater than 20 μm, the stress in the first main surface side film layer 526a1 is too high, and cracks may enter the laminate 512.

[0240] Similarly, the end edge P of the second main surface side thin film layer 526b1 located at the center side in the width direction y of the laminate 512 14 Separation occurs in the lamination direction x from the laminate 512. Specifically, the end edge P of the second main surface side thin film layer 526b1 located at the center in the width direction y of the laminate 512... 14 It rises from the stacked body 512.

[0241] The end edge P of the third main surface side film layer 526a2 located at the center of the width direction y of the laminate 512. 15 Separation occurs from the laminate 512 in the lamination direction x. Specifically, the end edge P of the third main surface side thin film layer 526a2 located at the center of the lamination 512 in the width direction y. 15 It rises from the stacked body 512.

[0242] The end edge P of the fourth main surface side film layer 526b2 located at the center of the width direction y of the laminate 512. 16 It separates from the laminate 512 in the lamination direction x. That is, the end edge P of the fourth main surface side thin film layer 526b2 located at the center side in the width direction y of the laminate 512. 16 It rises from the stacked body 512.

[0243] The end edge P of the fifth main surface side film layer 527a1 located at the center of the width direction y of the laminate 512. 17Separation occurs in the lamination direction x from the laminate 512. Specifically, the end edge P of the fifth main surface side thin film layer 527a1 located at the center of the lamination in the width direction y of the laminate 512... 17 It rises from the stack 512.

[0244] The end edge P of the sixth main surface side film layer 527b1 located at the center of the width direction y of the laminate 512. 18 Separation occurs in the lamination direction x from the laminate 512. Specifically, the end edge P of the sixth main surface side thin film layer 527b1 located at the center of the lamination in the width direction y of the laminate 512... 18 It rises from the stack 512.

[0245] The end edge P of the 7th main surface side thin film layer 527a2 located at the center side in the width direction y of the laminate 512 19 Separation occurs in the lamination direction x from the laminate 512. Specifically, the end edge P of the 7th main surface side thin film layer 527a2 located at the center of the lamination in the width direction y of the laminate 512... 19 It rises from the stack 512.

[0246] The end edge P of the eighth main surface side film layer 527b2 located at the center of the width direction y of the laminate 512. 20 Separation occurs in the lamination direction x from the laminate 512. Specifically, the end edge P of the eighth main surface side thin film layer 527b2 located at the center of the width direction y of the laminate 512... 20 It rises from the stack 512.

[0247] In the second main surface side thin film layer 526b1, the third main surface side thin film layer 526a2, the fourth main surface side thin film layer 526b2, the fifth main surface side thin film layer 527a1, the sixth main surface side thin film layer 527b1, the seventh main surface side thin film layer 527a2, and the eighth main surface side thin film layer 527b2, similarly to the first main surface side thin film layer 526a1, through each end edge P 14 P 15 P 16 P 17 P 18 P 19 P 20 It floats continuously along the longitudinal direction z, thus suppressing the stress applied to each end edge P even when thermal stress is applied. 14 P 15 P 16 P 17 P 18 P 19 P 20 The tensile stress is reduced. Therefore, cracks in the laminate 512 caused by thermal stress can be suppressed.

[0248] The end edge P of the first side thin film layer 526a3 located at the center of the longitudinal direction z of the laminate 512. 21 Separated from the laminate 512 in the width direction y. That is, the end edge P of the first side film layer 526a3 located at the center side in the length direction z of the laminate 512. 21 It floats up from the laminate 512. It passes through the end edge P of the first side thin film layer 526a3. 21 It floats continuously in the lamination direction x, thereby suppressing the end edge P of the first side thin film layer 526a3 even under thermal stress. 21 The tensile stress is reduced. Therefore, cracks in the laminate 512 caused by thermal stress can be suppressed.

[0249] At this time, the end edge P of the first side thin film layer 526a3 located at the center of the longitudinal direction z of the laminate 512... 21 In this design, position A3 is defined as the position of the first side-side thin film layer 526a3 closest to the center of the laminate 512 in the length direction z; position B3 is defined as the position where it separates from the laminate 512 in the width direction y; and position C3 is defined as the position where a perpendicular line drawn from position A3 intersects the laminate 512 in the width direction y. ∠A3B3C3 is preferably 20 degrees or more and 70 degrees or less. By setting these values ​​within the above range, the end edge P of the first side-side thin film layer 526a3 located at the center of the laminate 512 in the length direction z can be made more stable. 21 It can be fully separated from the laminate 512, and the distance z in the longitudinal direction from position B3 to position C3 can also be fully obtained. Therefore, the direction of compressive stress can be sufficiently changed. As a result, even when thermal stress is applied, the end edge P of the first side film layer 526a3 can be suppressed. 21 The tensile stress is reduced. Therefore, cracks in the laminate 512 caused by thermal stress can be suppressed.

[0250] Furthermore, the distance in the longitudinal direction z from position A3 to position B3 is preferably 5 μm or more and 20 μm or less. This allows for a sufficient measurement of the distance from position A3 to position B3, thus enabling a sufficient variation in the direction of compressive stress. On the other hand, when the distance in the longitudinal direction z from position A3 to position B3 is less than 5 μm, the end edge P of the first side-side thin film layer 526a3 located at the center of the longitudinal direction z of the laminate 512... 21 It cannot be sufficiently separated from the laminate 512. Furthermore, when the distance z in the longitudinal direction from position A3 to position B3 is greater than 20 μm, the stress in the first side film layer 526a3 is too high, and cracks may enter the laminate 512.

[0251] Similarly, the end edge P of the second side thin film layer 526b3 located at the center of the longitudinal direction z of the laminate 512. 22 Separated from the laminate 512 in the width direction y. That is, the end edge P of the second side thin film layer 526b3 located at the center side in the length direction z of the laminate 512. 22 It rises from the stack 512.

[0252] The end edge P of the fifth side thin film layer 527a3 located at the center of the longitudinal direction z of the laminate 512. 25 It separates from the laminate 512 in the width direction y. That is, the end edge P of the fifth side thin film layer 527a3 located at the center side in the length direction z of the laminate 512. 25 It rises from the stack 512.

[0253] The end edge P of the sixth side thin film layer 527b3 located at the center of the longitudinal direction z of the laminate 512. 26 Separated from the laminate 512 in the width direction y. That is, the end edge P of the sixth main surface side thin film layer 527b1 located at the center side in the length direction z of the laminate 512. 26 It rises from the stack 512.

[0254] In the second side-side thin film layer 526b3, the fifth side-side thin film layer 527a3, and the sixth side-side thin film layer 527b3, similarly to the first side-side thin film layer 526a3, each end edge P... 22 P 25 P 26 It floats continuously in the stacking direction x, thus suppressing the stress applied to each end edge P even when thermal stress is applied. 22 P 25 P 26 The tensile stress is reduced. Therefore, cracks in the laminate 512 caused by thermal stress can be suppressed.

[0255] The end edge P of the third side thin film layer 526a4 located at the center of the width direction y of the laminate 512 23 It separates from the laminate 512 in the length direction z. That is, the end edge P of the third side thin film layer 526a4 located at the center side in the width direction y of the laminate 512. 23 It floats up from the laminate 512. It passes through the end edge P of the third side thin film layer 526a4. 23 It floats continuously in the lamination direction x, thereby suppressing the end edge P of the third side thin film layer 526a4 even under thermal stress. 23The tensile stress is reduced. Therefore, cracks in the laminate 512 caused by thermal stress can be suppressed.

[0256] At this time, the end edge P of the third side thin film layer 526a4 located at the center side in the width direction y of the laminate 512... 23 In this design, position A4 is defined as the position of the third side-side thin film layer 526a4 closest to the center of the laminate 512 in the width direction y; position B4 is defined as the position where it separates from the laminate 512 in the length direction z; and position C4 is defined as the position where a perpendicular line drawn from position A4 in the length direction z intersects the laminate 512. ∠A4B4C4 is preferably 20 degrees or more and 70 degrees or less. By setting these values ​​within the above range, the end edge P of the third side-side thin film layer 526a4 located at the center of the laminate 512 in the width direction y can be made more stable. 23 It can be sufficiently separated from the laminate 512, and the distance y in the width direction from position B4 to position C4 can also be sufficiently obtained. Therefore, the direction of compressive stress can be sufficiently changed. As a result, even when thermal stress is applied, the end edge P of the third side film layer 526a4 can be suppressed. 23 The tensile stress is reduced. Therefore, cracks in the laminate 512 caused by thermal stress can be suppressed.

[0257] Furthermore, the distance in the width direction y from position A4 to position B4 is preferably 5 μm or more and 20 μm or less. This allows for a sufficiently precise distance from position A4 to position B4, thus enabling a sufficient variation in the direction of compressive stress. On the other hand, when the distance in the width direction y from position A4 to position B4 is less than 5 μm, the end edge P of the third side side film layer 526a4 located at the center side in the width direction y of the laminate 512... 23 It cannot be sufficiently separated from the laminate 512. Furthermore, when the distance in the width direction y from position A4 to position B4 is greater than 20 μm, the stress on the third side thin film layer 526a4 is too high, and cracks may enter the laminate 512.

[0258] Similarly, the end edge P of the fourth side thin film layer 526b4 located at the center side in the width direction y of the laminate 512 24 It separates from the laminate 512 in the length direction z. That is, the end edge P of the fourth side thin film layer 526b4 located at the center side in the width direction y of the laminate 512. 24 It rises from the stacked body 512.

[0259] The end edge P of the seventh side thin film layer 527a4 located at the center of the width direction y of the laminate 512 27It separates from the laminate 512 in the length direction z. That is, the end edge P of the seventh side film layer 527a4 located at the center side in the width direction y of the laminate 512. 27 It rises from the stack 512.

[0260] The end edge P of the eighth side thin film layer 527b4 located at the center of the width direction y of the laminate 512. 28 It separates from the laminate 512 in the length direction z. That is, the end edge P of the eighth side thin film layer 527b4 located at the center side in the width direction y of the laminate 512. 28 It rises from the stack 512.

[0261] In the fourth side-side thin film layer 526b4, the seventh side-side thin film layer 527a4, and the eighth side-side thin film layer 527b4, similarly to the third side-side thin film layer 526a4, each end edge P... 24 P 27 P 28 It floats continuously in the stacking direction x, thus suppressing the stress applied to each end edge P even when thermal stress is applied. 24 P 27 P 28 The tensile stress is reduced. Therefore, cracks in the laminate 512 caused by thermal stress can be suppressed.

[0262] In this embodiment, thin film layers 526 and 527 are disposed on the first main surface 512a, the second main surface 512b, the first side surface 512c, the second side surface 512d, the third side surface 512e, and the fourth side surface 512f of the laminate 512. The end edges P4 to P6 of the thin film layers 526 and 527 located on the central side of the laminate 512 are respectively. 28 Separation from the laminate 512. By forming it in this way, the direction of compressive stress can be changed. Therefore, cracks in the laminate 512 caused by thermal stress can be suppressed.

[0263] Furthermore, when the thin film layers 526 and 527 are disposed on the first main surface 512a and / or the second main surface 512b of the laminate 512, at least one of the end edges of the thin film layers 526 and 527 disposed on the central side of the laminate 512 on the first main surface 512a and / or the second main surface 512b, which are disposed opposite each other in the longitudinal direction z of the laminate 512 and the end edges of the thin film layers 526 and 527 disposed opposite each other in the width direction y, can be separated from the laminate 512.

[0264] Furthermore, when the thin film layers 526 and 527 are disposed on the first side 512c and / or the second side 512d of the laminate 512, at least one of the end edges of the thin film layers 526 and 527 disposed on the central side of the laminate 512 on the first side 512c and / or the second side 512d can be separated from the laminate 512.

[0265] Furthermore, when the thin film layers 526 and 527 are disposed on the third side 512e and / or the fourth side 512f of the laminate 512, at least one of the end edges of the thin film layers 526 and 527 disposed on the third side 512e and / or the fourth side 512f located on the central side of the laminate 512 can be separated from the laminate 512.

[0266] Furthermore, when the thin film layers 526 and 527 are continuously disposed on the first main surface 512a and / or the second main surface 512b, and the first side surface 512c, the second side surface 512d, the third side surface 512e and / or the fourth side surface 512f of the laminate 512, at least one of the end edge portions of the thin film layers 526 and 527 disposed on the first main surface 512a, the second main surface 512b, the first side surface 512c, the second side surface 512d, the third side surface 512e and / or the fourth side surface 512f located at the center side in the width direction y or located at the center side in the length direction z of the laminate 512 can be separated from the laminate 512.

[0267] Thin film layers 526 and 527 are preferably connected to the inner electrode layer 516. By connecting the thin film layers 526 and 527 to the inner electrode layer 516, the surface area of ​​the conductive components on each side 512c, 512d, 512e, and 512f of the laminate 512 is increased, thereby improving the contact between the outer electrodes 524 and 525 and the inner electrode layer 516.

[0268] Thin film layers 526 and 527 are formed by depositing metal particles. Preferably, thin film layers 526 and 527 are formed by thin film formation methods such as sputtering, vapor deposition, chemical vapor deposition (CVD), and atomic layer deposition (ALD). By forming thin film layers 526 and 527 in this way, the thickness of the thin film layers 526 and 527 in the stacking direction x can be set to, for example, 1.0 μm or less. Therefore, the thickness of the stacked ceramic capacitor 510 in the stacking direction x can be reduced. Furthermore, thin film layers 526 and 527 can also be formed by screen printing or the like.

[0269] Thin film layers 526 and 527 can be used, for example, with a fluorescence X-ray device to calculate their thickness based on the concentration of a given element using a calibration line method for the corresponding metal species. Furthermore, the thickness can be measured using a scanning electron microscope on a component profile based on a focused ion beam (FIB) image, based on the actual observed image.

[0270] The thin film layers 526 and 527 formed on the first main surface 512a or the second main surface 512b of the laminate 512 and the thin film layers 526 and 527 formed on the first side surface 512c, the second side surface 512d, the third side surface 512e or the fourth side surface 512f of the laminate 512 can be connected or formed discontinuously in the edge portion.

[0271] Thin film layers 526 and 527 can also be thin film layers containing ceramic and metal components. By including ceramic and metal components in thin film layers 526 and 527, the dielectric ceramic contained in the dielectric layer 514 of the laminate 512 adheres to the thin film layers 526 and 527. Therefore, the adhesion between the laminate 512 and the external electrodes 524 and 525 can be further improved.

[0272] The metal composition of thin film layers 526 and 527 is preferably Cu or Ni as the main component, and is mixed with 1 vol% of Cr, V, Ti, Co and Mn.

[0273] The particle size of the metal components in thin film layers 526 and 527 is preferably 1.0 μm or less. By reducing the particle size of the metal components in thin film layers 526 and 527, the overall compressive stress of thin film layers 526 and 527 can be reduced.

[0274] To determine the particle size of the metal components in thin film layers 526 and 527, the WT cross-section at half the length z-direction, the LT cross-section at half the width y-direction, or the LW cross-section at half the stacking direction x-direction of thin film layers 526 and 527 are exposed, and each cross-section of thin film layers 526 and 527 is observed using an electron microscope. A magnification of 20,000x or higher is preferred. Ten lines are drawn at equal intervals along the stacking direction x of the observation plane, which serves as the cross-section of thin film layers 526 and 527. The maximum particle size of the metal particles involved on these lines is measured, and their average value is calculated as the particle size.

[0275] Furthermore, when the thin film layers 526 and 527 contain ceramic, for example, by exposing a WT cross-section at half the length z-direction, an LT cross-section at half the width y-direction, or an LW cross-section at half the stacking x-direction, the cross-sectional images can be obtained using a digital microscope (VHX-5000; manufactured by Keyence). Thickness can also be calculated based on these cross-sectional images. Additionally, scanning electron microscopes can be used to examine component cross-sections based on focused ion beam (FIB) measurements, and the thickness can be determined from the actual observed images.

[0276] The thickness of the stacking direction x of the thin film layers 526 and 527 is preferably 50 nm or more and 500 nm or less.

[0277] The lower plating layer 528 has a first lower plating layer 528a and a second lower plating layer 528b. The lower plating layer 528 is formed between the laminate 512 and the thin film layer 526.

[0278] The first lower plating layer 528a is configured to cover the first main surface side thin film layer 526a1 disposed on the first main surface 512a, the third main surface side thin film layer 526a2 disposed on the second main surface 512b, the first side side thin film layer 526a3 disposed on the first side surface 512c, and the third side side thin film layer 526a4 disposed on the third side surface 512e.

[0279] The second lower coating layer 528b is configured to cover the second main surface side thin film layer 526b1 disposed on the first main surface 512a, the fourth main surface side thin film layer 526b2 disposed on the second main surface 512b, the second side side thin film layer 526b3 disposed on the second side surface 512d, and the fourth side side thin film layer 526b4 disposed on the fourth side surface 512f.

[0280] The lower plating layer 529 has a third lower plating layer 529a and a fourth lower plating layer 529b. The lower plating layer 529 is formed between the laminate 512 and the thin film layer 527.

[0281] The third lower plating layer 529a is configured to cover the fifth main surface side thin film layer 527a1 disposed on the first main surface 512a, the seventh main surface side thin film layer 527a2 disposed on the second main surface 512b, the fifth side side thin film layer 527a3 disposed on the first side surface 512c, and the seventh side side thin film layer 527a4 disposed on the fourth side surface 512f.

[0282] The fourth lower plating layer 529b is configured to cover the sixth main surface side thin film layer 527b1 disposed on the first main surface 512a, the eighth main surface side thin film layer 527b2 disposed on the second main surface 512b, the sixth side side thin film layer 527b3 disposed on the second side side 512d, and the eighth side side thin film layer 527b4 disposed on the third side side 512e.

[0283] In this embodiment, the lower plating layers 528 and 529 are formed of Cu plating layers. By forming the lower plating layers 528 and 529 with Cu plating layers and configuring them to cover the surfaces of the thin film layers 526 and 527, the penetration of plating solution is inhibited.

[0284] The thickness of the stacking direction x of the lower coating layers 528 and 529 is preferably 50 nm or more and 500 nm or less.

[0285] The upper plating layer 530 has a first upper plating layer 530a and a second upper plating layer 530b.

[0286] The first upper plating layer 530a is configured to cover the first lower plating layer 528a. Specifically, the first upper plating layer 530a is preferably disposed on the first side surface 512c and the third side surface 512e of the surface of the first lower plating layer 528a, and is configured to also reach the first main surface 512a and the second main surface 512b of the surface of the first lower plating layer 528a.

[0287] The second upper plating layer 530b is configured to cover the second lower plating layer 528b. Specifically, the second upper plating layer 530b is preferably disposed on the second side surface 512d and the fourth side surface 512f of the surface of the second lower plating layer 528b, and is configured to also reach the first main surface 512a and the second main surface 512b of the surface of the second lower plating layer 528b.

[0288] The upper plating layer 531 has a third upper plating layer 531a and a fourth upper plating layer 531b.

[0289] The third upper plating layer 531a is configured to cover the third lower plating layer 529a. Specifically, the third upper plating layer 531a is preferably disposed on the first side surface 512c and the fourth side surface 512f of the surface of the third lower plating layer 529a, and is configured to also reach the first main surface 512a and the second main surface 512b of the surface of the third lower plating layer 529a.

[0290] The fourth upper plating layer 531b is configured to cover the fourth lower plating layer 529b. Specifically, the fourth upper plating layer 531b is preferably disposed on the second side surface 512d and the third side surface 512e of the surface of the fourth lower plating layer 529b, and is configured to also reach the first main surface 512a and the second main surface 512b of the surface of the fourth lower plating layer 529b.

[0291] The upper plating layers 530 and 531 are preferably Ni plating layers that have a solder blocking effect. In this embodiment, the upper plating layers 530 and 531 are formed of Ni plating layers.

[0292] The thickness of the stacking direction x of the upper coating layers 530 and 531 is preferably 1 μm or more and 9 μm or less.

[0293] The surface coating layer 532 has a first surface coating layer 532a and a second surface coating layer 532b.

[0294] The first surface plating layer 532a is configured to cover the first upper plating layer 530a. Specifically, the first surface plating layer 532a is preferably disposed on the first side surface 512c and the third side surface 512e of the surface of the first upper plating layer 530a, and is configured to also reach the first main surface 512a and the second main surface 512b of the surface of the first upper plating layer 530a.

[0295] The second surface plating layer 532b is configured to cover the second upper plating layer 530b. Specifically, the second surface plating layer 532b is preferably disposed on the second side surface 512d and the fourth side surface 512f of the surface of the second upper plating layer 530b, and is configured to also reach the first main surface 512a and the second main surface 512b of the surface of the second upper plating layer 530b.

[0296] The surface coating layer 533 has a third surface coating layer 533a and a fourth surface coating layer 533b.

[0297] The third surface plating layer 533a is configured to cover the third upper plating layer 531a. Specifically, the third surface plating layer 533a is preferably disposed on the first side surface 512c and the fourth side surface 512f of the surface of the third upper plating layer 531a, and is configured to also reach the first main surface 512a and the second main surface 512b of the surface of the third upper plating layer 531a.

[0298] The fourth surface plating layer 533b is configured to cover the fourth upper plating layer 531b. Specifically, the fourth surface plating layer 533b is preferably disposed on the second side surface 512d and the third side surface 512e of the surface of the fourth upper plating layer 531b, and is configured to also reach the first main surface 512a and the second main surface 512b of the surface of the fourth upper plating layer 531b.

[0299] The surface plating layers 532 and 533 can be formed from Sn plating layers that have good adhesion to solder, or from Cu plating layers or the like, to meet the requirements of mounting on an embedded substrate, but are not limited to these.

[0300] The thickness of the layering direction x of the surface coating layers 532 and 533 is preferably 1 μm or more and 7 μm or less.

[0301] The dimension of the stacked ceramic capacitor 510, which includes the stacked body 512 and the external electrodes 524 and 525, in the length direction z is set as dimension L. The dimension of the stacked ceramic capacitor 510 in the stacking direction x is set as dimension T. The dimension of the stacked ceramic capacitor 510 in the width direction y is set as dimension W.

[0302] The dimensions of the multilayer ceramic capacitor 510 are preferably set to 7 / 10 ≤ L / W ≤ 10 / 7. By doing so, the multilayer 512 becomes approximately cubic, thus increasing the degree of freedom in mounting.

[0303] also, Figure 12 The stacked ceramic capacitor 510 shown achieves the same effect as the stacked ceramic capacitor 10 described above.

[0304] 2. Manufacturing method of multilayer ceramic capacitors

[0305] Next, the manufacturing method of the multilayer ceramic capacitor 510 according to the third embodiment will be described.

[0306] First, prepare the conductive paste for the ceramic green sheet and internal electrodes. The conductive paste for the ceramic green sheet and internal electrodes contains an adhesive (e.g., a known organic adhesive) and a solvent (e.g., an organic solvent).

[0307] Next, for example, conductive paste for internal electrodes is printed on the ceramic green sheet in a given pattern using screen printing, gravure printing, etc., to form... Figure 23 The internal electrode pattern is shown. Specifically, a paste containing a conductive material is applied to a ceramic green sheet using the aforementioned printing or other methods, thereby forming a conductive paste layer. The paste containing the conductive material is, for example, a paste made by adding an organic binder and an organic solvent to metal powder. Furthermore, a ceramic green sheet for an outer layer without the internal electrode pattern printed on it is also manufactured.

[0308] Furthermore, laminated sheets are made using these ceramic green sheets with internal electrode patterns. That is, a given number of ceramic green sheets without internal electrode patterns are stacked on top of each other, and ceramic green sheets with internal electrode patterns corresponding to the first internal electrode layer 516a and internal electrode patterns corresponding to the second internal electrode layer 516b are alternately stacked on top of each other, and a given number of ceramic green sheets without internal electrode patterns are stacked on top of each other, thereby making a laminated sheet.

[0309] Next, the laminated sheet is pressed together in the stacking direction using methods such as isostatic pressing to create a laminated block.

[0310] Furthermore, laminated sheets are pressed in the lamination direction using methods such as isostatic pressing to produce laminated blocks.

[0311] Next, the stacked blocks are cut to the given size to create stacked pieces. At this point, rounded corners and edges of the stacked pieces can also be formed using methods such as tumble grinding.

[0312] Next, by firing the layers of small pieces, a product is created. Figure 23 The laminate 512 shown is used. Although the firing temperature is also based on the ceramic and the material of the internal electrode layer, it is preferably 900°C or higher and 1400°C or lower.

[0313] At this time, as Figure 23 As shown, a first lead-out electrode portion 520a of the first internal electrode layer 516a is exposed from the first side surface 512c and the third side surface 512e of the laminate 512, and a third lead-out electrode portion 521a of the second internal electrode layer 516b is exposed from the first side surface 512c and the fourth side surface 512f of the laminate 512. Furthermore, a second lead-out electrode portion 520b of the first internal electrode layer 516a is exposed from the second side surface 512d and the fourth side surface 512f of the laminate 512, and a fourth lead-out electrode portion 521b of the second internal electrode layer 516b is exposed from the second side surface 512d and the third side surface 512e of the laminate 512.

[0314] Next, thin film layers 526 and 527 are formed on a portion of the first main surface 512a, a portion of the second main surface 512b, a portion of the first side surface 512c, a portion of the second side surface 512d, a portion of the third side surface 512e, and a portion of the fourth side surface 512f of the laminate 512.

[0315] For example, a photoresist containing resin or the like is disposed on the first main surface 512a, the second main surface 512b, the first side surface 512c, the second side surface 512d, the third side surface 512e, and the fourth side surface 512f of the laminate 512. A first thin film layer 526a, a second thin film layer 526b, a third thin film layer 527a, and a fourth thin film layer 527b are disposed on the photoresist and the first main surface 512a, the second main surface 512b, the first side surface 512c, the second side surface 512d, the third side surface 512e, and the fourth side surface 512f of the laminate 512 using a sputtering method, screen printing method, or the like. Then, the photoresist portion is peeled off. By doing so, the end edges of the first thin film layer 526a, the second thin film layer 526b, the third thin film layer 527a, and the fourth thin film layer 527b located at the center of the laminate 512 in the length direction z and / or the width direction y can be separated from the laminate 512.

[0316] Subsequently, a Cu plating layer is formed as the first lower plating layer 528a, covering the first thin film layer 526a. Here, in the end edge of the first thin film layer 526a located at the center side in the longitudinal direction z and / or the width direction y of the laminate 512, the first lower plating layer 528a is formed between the laminate 512 and the first thin film layer 526a.

[0317] A Cu plating layer is formed as a second lower plating layer 528b, covering the second thin film layer 526b. Here, in the end edge of the second thin film layer 526b located at the center side of the stacked body 512 in the length direction z and / or width direction y and / or stacking direction x, the second lower plating layer 528b is formed between the stacked body 512 and the second thin film layer 526b.

[0318] A Cu plating layer is formed as a third lower plating layer 529a, covering the third thin film layer 527a. Here, in the end edge of the third thin film layer 527a located at the center side of the stacked body 512 in the length direction z and / or width direction y and / or stacking direction x, the third lower plating layer 529a is formed between the stacked body 512 and the third thin film layer 527a.

[0319] A Cu plating layer is formed as the fourth lower plating layer 529b, covering the fourth thin film layer 527b. Here, in the end edge of the fourth thin film layer 527b located at the center side of the stacked body 512 in the length direction z and / or width direction y and / or stacking direction x, the fourth lower plating layer 529b is formed between the stacked body 512 and the fourth thin film layer 527b.

[0320] Next, Ni plating layers, serving as upper plating layers 530 and 531, are formed on the surfaces of the lower plating layers 528 and 529. Furthermore, Sn plating layers, serving as surface plating layers 532 and 533, are formed on the surfaces of the upper plating layers 530 and 531. During the formation of the lower plating layers 528 and 529, the upper plating layers 530 and 531, and the surface plating layers 532 and 533, electroplating using an electroplating bath with added additives or electroless plating based on a displacement reaction are performed.

[0321] Furthermore, after forming the thin film layers 526 and 527, a photoresist is applied to the first main surface 512a, followed by electrolytic plating or electroless plating. This allows the end edges of the lower plating layers 528 and 529 located at the center of the length direction z of the laminate 512 to separate from the laminate 512 in the lamination direction x and / or the width direction y and / or the length direction z. Alternatively, the photoresist can be applied after forming and firing the thin film layers 526 and 527.

[0322] In the manner described above, it is possible to manufacture Figure 12 The stacked ceramic capacitor 510 shown is an example.

[0323] D. Fourth Implementation Method

[0324] Next, the multilayer ceramic capacitor 610 according to the fourth embodiment of the present invention will be described. Figure 24 This is a perspective view showing the appearance of a multilayer ceramic capacitor according to the fourth embodiment of the present invention. Figure 25 yes Figure 24 The cross-sectional view at line XXV-XXV involved. Figure 26 yes Figure 24 The sectional view at line XXVI-XXVI involved. Figure 27 yes Figure 24 The sectional view at line XXVII-XXVII involved. Figure 28 yes Figure 24 The exploded three-dimensional view of the stacked body shown.

[0325] Compared to the multilayer ceramic capacitor 510 of the third embodiment, the multilayer ceramic capacitor 610 of the fourth embodiment differs in the shape of the inner electrode layer 516 and the shapes of the outer electrodes 524 and 525. Therefore, the same reference numerals are used for components that are equivalent to those in the third embodiment, and detailed descriptions thereof are omitted.

[0326] The multilayer ceramic capacitor 610 includes a multilayer body 612 and external electrodes 624 and 625.

[0327] The laminate 612 includes multiple dielectric layers 614 and multiple internal electrode layers 616. The laminate 612 has a first main surface 612a and a second main surface 612b opposite each other in the lamination direction x, a first side surface 612c and a second side surface 612d opposite each other in the width direction y orthogonal to the lamination direction x, and a third side surface 612e and a fourth side surface 612f opposite each other in the length direction z orthogonal to both the lamination direction x and the width direction y. The first main surface 612a and the second main surface 612b extend along the width direction y and the length direction z, respectively. The first side surface 612c and the second side surface 612d extend along the lamination direction x and the length direction z, respectively. The third side surface 612e and the fourth side surface 612f extend along the lamination direction x and the width direction y, respectively. Therefore, the stacking direction x refers to the direction that connects the first main surface 612a and the second main surface 612b, the width direction y refers to the direction that connects the first side surface 612c and the second side surface 612d, and the length direction z refers to the direction that connects the third side surface 612e and the fourth side surface 612f.

[0328] like Figure 25 as well as Figure 26As shown, the laminate 612 has an inner layer 615a with multiple internal electrode layers 616 facing each other in the lamination direction x that connects the first main surface 612a and the second main surface 612b; a first main surface side outer layer 615b1 formed by multiple dielectric layers 614 located between the internal electrode layer 616 located closest to the first main surface 612a and the first main surface 612a; and a second main surface side outer layer 615b2 formed by multiple dielectric layers 614 located between the internal electrode layer 616 located closest to the second main surface 612b and the second main surface 612b.

[0329] The dielectric layer 614 has an inner dielectric layer 614a, which is an inner layer 615a, and an outer dielectric layer 614b, which is an outer layer 615b1 on the first main surface side and an outer layer 615b2 on the second main surface side.

[0330] The outer layer 615b1 on the first main surface side is located on the first main surface 612a side of the laminate 612, and is an assembly of multiple outer dielectric layers 614b located between the first main surface 612a and the inner electrode layer 616 closest to the first main surface 612a.

[0331] The second main surface side outer layer 615b2 is located on the second main surface 612b side of the laminate 612, and is an assembly of multiple outer dielectric layers 614b located between the second main surface 612b and the inner electrode layer 616 closest to the second main surface 612b.

[0332] Furthermore, the region sandwiched between the first main surface outer layer 615b1 and the second main surface outer layer 615b2 is the inner layer 615a. That is, the inner layer 615a is the region where the inner electrode layer 616 is stacked.

[0333] The material of the dielectric layer 614 is the same as that of the dielectric layer 514 of the multilayer ceramic capacitor 510 according to the third embodiment, so the description is omitted.

[0334] like Figures 25 to 27 As shown, the internal electrode layer 616 has a plurality of first internal electrode layers 616a and a plurality of second internal electrode layers 616b. The first internal electrode layers 616a and the second internal electrode layers 616b are alternately stacked in the direction connecting the first main surface 612a and the second main surface 612b, separated by an inner dielectric layer 614a.

[0335] The first internal electrode layer 616a is disposed on the surface of the inner dielectric layer 614a. Furthermore, the first internal electrode layer 616a has a first opposing electrode portion 618a that faces the first main surface 612a and the second main surface 612b and faces the second internal electrode layer 616b, and is stacked in the direction connecting the first main surface 612a and the second main surface 612b.

[0336] Furthermore, the second internal electrode layer 616b is disposed on the surface of an inner dielectric layer 614a that is different from the inner dielectric layer 614a on which the first internal electrode layer 616a is disposed. The second internal electrode layer 616b has a second opposing electrode portion 618b that is opposite to the first main surface 612a and the second main surface 612b, and is stacked in the direction connecting the first main surface 612a and the second main surface 612b.

[0337] like Figure 27 As shown, the first internal electrode layer 616a is led out on the first side surface 612c of the laminate 612 through the first lead-out electrode portion 620a, and is led out on the second side surface 612d of the laminate 612 through the second lead-out electrode portion 620b.

[0338] like Figure 27 As shown, the second internal electrode layer 616b is led out on the first side 612c of the laminate 612 through the third lead-out electrode portion 621a, and is led out on the second side 612d of the laminate 612 through the fourth lead-out electrode portion 621b.

[0339] In addition, such as Figure 27 As shown, the laminate 612 includes an end (L gap) 622b formed between one end of the first counter electrode portion 618a in the length direction z and the third side surface 612e, and between the other end of the second counter electrode portion 618b in the length direction z and the fourth side surface 612f.

[0340] And, as Figure 27 As shown, the laminate 612 includes a side portion (W gap) 622a formed between one end of the first counter electrode portion 618a in the width direction y and the first side surface 612c, and between the other end of the second counter electrode portion 618b in the width direction y and the second side surface 612d.

[0341] The shape of the first opposing electrode portion 618a of the first inner electrode layer 616a is not particularly limited, but it is preferably rectangular in plan view. However, the corner portion in plan view can be rounded, or the corner portion can be formed as a cone in plan view. Alternatively, it can be a cone in plan view that is inclined in any direction.

[0342] The shapes of the first lead-out electrode portion 620a and the second lead-out electrode portion 620b of the first internal electrode layer 616a are not particularly limited, but are preferably rectangular in plan view. However, the corner portions in plan view can be rounded, or the corner portions can be formed into a plan view that is inclined (conical). Alternatively, they can be a plan view that is inclined in any direction.

[0343] The shape of the second opposing electrode portion 618b of the second inner electrode layer 616b is not particularly limited, but it is preferably rectangular in plan view. However, the corner portion in plan view can be rounded, or the corner portion can be formed as a cone in plan view. Alternatively, it can be a cone in plan view that is inclined in any direction.

[0344] The shapes of the third lead-out electrode portion 621a and the fourth lead-out electrode portion 621b of the second inner electrode layer 616b are not particularly limited, but are preferably rectangular in plan view. However, the corner portions in plan view can be rounded, or the corner portions can be formed as a cone shape in plan view. In addition, it can also be a cone shape in plan view that is inclined in any direction.

[0345] The material of the internal electrode layer 616 is the same as that of the internal electrode layer 516 of the stacked ceramic capacitor 510 according to the third embodiment, so the description is omitted.

[0346] External electrodes 624 and 625 are configured in the laminate 612.

[0347] The external electrode 624 has a first external electrode 624a and a second external electrode 624b.

[0348] The first external electrode 624a is configured to cover the first lead-out electrode portion 620a in the first side surface 612c, and is also configured to cover a portion of the first main surface 612a, the second main surface 612b, and the third side surface 612e. The first external electrode 624a is electrically connected to the first lead-out electrode portion 620a of the first internal electrode layer 616a.

[0349] Furthermore, the second external electrode 624b is configured to cover the second lead-out electrode portion 620b in the second side surface 612d, and is configured to cover a portion of the first main surface 612a, the second main surface 612b, and the fourth side surface 612f. The second external electrode 624b is electrically connected to the second lead-out electrode portion 620b of the first internal electrode layer 616a.

[0350] The external electrode 625 has a third external electrode 625a and a fourth external electrode 625b.

[0351] The third external electrode 625a is configured to cover the third lead-out electrode portion 621a in the first side surface 612c, and is configured to cover a portion of the first main surface 612a, the second main surface 612b, and the fourth side surface 612f. The third external electrode 625a is electrically connected to the third lead-out electrode portion 621a of the second internal electrode layer 616b.

[0352] Furthermore, the fourth external electrode 625b is configured to cover the fourth lead-out electrode portion 621b in the second side surface 612d, and is configured to cover a portion of the first main surface 612a, the second main surface 612b, and the third side surface 612e. The fourth external electrode 625b is electrically connected to the fourth lead-out electrode portion 621b of the second internal electrode layer 616b.

[0353] Within the laminate 612, an electrostatic capacitor is formed by the first opposing electrode portion 618a of the first inner electrode layer 616a and the second opposing electrode portion 618b of the second inner electrode layer 616b being opposed to each other across the inner dielectric layer 614a. Therefore, an electrostatic capacitor can be obtained between the first external electrode 624a and the second external electrode 624b connected to the first inner electrode layer 616a and the third external electrode 625a and the fourth external electrode 625b connected to the second inner electrode layer 616b, exhibiting the characteristics of a capacitor.

[0354] In this embodiment, external electrodes 624 and 625 are disposed on the first main surface 612a and the second main surface 612b of the laminate 612. However, if they are disposed on the first main surface 612a of the laminate 612, they may not be disposed on the second main surface 612b.

[0355] The thin film layer 626 has a first thin film layer 626a and a second thin film layer 626b.

[0356] The first thin film layer 626a has a first main surface side thin film layer 626a1 at the corner where the first main surface 612a, the first side surface 612c, and the third side surface 612e of the laminate 612 intersect, and a third main surface side thin film layer 626a2 at the corner where the second main surface 612b, the first side surface 612c, and the third side surface 612e of the laminate 612 intersect.

[0357] The second thin film layer 626b has a second main surface side thin film layer 626b1 at the corner where the first main surface 612a, the second side surface 612d, and the fourth side surface 612f intersect the laminate 612, and a fourth main surface side thin film layer 626b2 at the corner where the second main surface 612b, the second side surface 612d, and the fourth side surface 612f intersect the laminate 612.

[0358] The thin film layer 627 has a third thin film layer 627a and a fourth thin film layer 627b.

[0359] The third thin film layer 627a has a fifth main surface side thin film layer 627a1 at the corner where the first main surface 612a, the first side surface 612c, and the fourth side surface 612f intersect the laminate 612, and a seventh main surface side thin film layer 627a2 at the corner where the second main surface 612b, the first side surface 612c, and the fourth side surface 612f intersect the laminate 612.

[0360] The fourth thin film layer 627b has a sixth main surface side thin film layer 627b1 at the corner where the first main surface 612a, the second side surface 612d, and the third side surface 612e of the laminate 612 intersects, and an eighth main surface side thin film layer 627b2 at the corner where the second main surface 612b, the second side surface 612d, and the third side surface 612e of the laminate 612 intersects.

[0361] The end edge P5 of the first main surface side thin film layer 626a1, located at the center of the longitudinal direction z of the laminate 612, separates from the laminate 612 in the lamination direction x. In other words, the end edge P5 of the first main surface side thin film layer 626a1, located at the center of the longitudinal direction z of the laminate 612, floats off the laminate 612. Because the end edge P5 of the first main surface side thin film layer 626a1 continuously floats off in the width direction y, tensile stress applied to the end edge P5 of the first main surface side thin film layer 626a1 can be suppressed even under thermal stress. Therefore, cracks in the laminate 612 caused by thermal stress can be suppressed.

[0362] At this time, in the end edge P5 of the first main surface side film layer 626a1 located at the center of the laminate 612 in the length direction z, the position of the first main surface side film layer 626a1 closest to the center of the laminate 612 in the length direction z is designated as position A1, the position where it begins to separate from the laminate 612 in the lamination direction x is designated as position B1, and the position where it intersects the laminate 612 when a perpendicular line is drawn from position A1 in the lamination direction x is designated as position C1. ∠A1B1C1 is preferably 20 degrees or more and 70 degrees or less. By setting these values ​​within the above range, the end edge P5 of the first main surface side film layer 626a1 located at the center of the laminate 612 in the length direction z can be sufficiently separated from the laminate 612, and the distance in the length direction z from position B1 to position C1 can also be sufficiently obtained. Therefore, the direction of compressive stress can be sufficiently changed. As a result, even under the application of thermal stress, the tensile stress applied to the end edge P5 of the first main surface thin film layer 626a1 can be suppressed. Thus, cracks in the laminate 612 caused by thermal stress can be suppressed.

[0363] Furthermore, the distance z along the longitudinal direction from position A1 to position B1 is preferably 5 μm or more and 20 μm or less. This allows for a sufficiently precise distance from position A1 to position B1, thus enabling a sufficient variation in the direction of compressive stress. On the other hand, if the distance z along the longitudinal direction from position A1 to position B1 is less than 5 μm, the end edge P5 of the first main surface side thin film layer 626a1 located at the center of the longitudinal direction z of the laminate 612 cannot sufficiently separate from the laminate 612. Furthermore, if the distance z along the longitudinal direction from position A1 to position B1 is greater than 20 μm, the stress on the first main surface side thin film layer 626a1 becomes excessive, and cracks may enter the laminate 612.

[0364] Similarly, the end edge P6 of the second main surface side thin film layer 626b1 located at the center of the longitudinal direction z of the laminate 612 separates from the laminate 612 in the lamination direction x. That is, the end edge P6 of the second main surface side thin film layer 626b1 located at the center of the longitudinal direction z of the laminate 612 floats up from the laminate 612.

[0365] The end edge P7 of the third main surface side thin film layer 626a2 located at the center of the longitudinal direction z of the laminate 612 separates from the laminate 612 in the lamination direction x. That is, the end edge P7 of the third main surface side thin film layer 626a2 located at the center of the longitudinal direction z of the laminate 612 floats up from the laminate 612.

[0366] The end edge P8 of the fourth main surface side thin film layer 626b2 located at the center of the longitudinal direction z of the laminate 612 separates from the laminate 612 in the lamination direction x. That is, the end edge P8 of the fourth main surface side thin film layer 626b2 located at the center of the longitudinal direction z of the laminate 612 floats up from the laminate 612.

[0367] The end edge P9 of the fifth main surface side thin film layer 627a1 located at the center of the longitudinal direction z of the laminate 612 separates from the laminate 612 in the lamination direction x. That is, the end edge P9 of the fifth main surface side thin film layer 627a1 located at the center of the longitudinal direction z of the laminate 612 floats up from the laminate 612.

[0368] The end edge P of the sixth main surface side film layer 627b1 located at the center of the longitudinal direction z of the laminate 612 10 Separation occurs in the lamination direction x from the laminate 612. Specifically, the end edge P of the sixth main surface side thin film layer 627b1 located at the center of the laminate 612 in the longitudinal direction z. 10 It rises from the stacked body 612.

[0369] The end edge P of the 7th main surface side thin film layer 627a2 located at the center of the longitudinal direction z of the laminate 61211 Separation occurs in the lamination direction x from the laminate 612. Specifically, the end edge P of the 7th main surface side thin film layer 627a2 located at the center of the laminate 612 in the longitudinal direction z. 11 It rises from the stacked body 612.

[0370] The end edge P of the eighth main surface side film layer 627b2 located at the center of the longitudinal direction z of the laminate 612. 12 Separation occurs in the lamination direction x from the laminate 612. Specifically, the end edge P of the eighth main surface side thin film layer 627b2 located at the center of the laminate 612 in the longitudinal direction z. 12 It rises from the stacked body 612.

[0371] In the second main surface side thin film layer 626b1, the third main surface side thin film layer 626a2, the fourth main surface side thin film layer 626b2, the fifth main surface side thin film layer 627a1, the sixth main surface side thin film layer 627b1, the seventh main surface side thin film layer 627a2, and the eighth main surface side thin film layer 627b2, similarly to the first main surface side thin film layer 626a1, through each end edge P6, P7, P8, P9, P 10 P 11 P 12 It floats continuously in the width direction y, thus suppressing the stress applied to each end edge P6, P7, P8, P9, and P even under thermal stress. 10 P 11 P 12 The tensile stress is reduced. Therefore, cracks in the laminate 612 caused by thermal stress can be suppressed.

[0372] The end edge P of the first main surface side film layer 626a1 located at the center side in the width direction y of the laminate 612 13 Separation occurs in the lamination direction x from the laminate 612. Specifically, the end edge P of the first main surface side thin film layer 626a1 located at the center in the width direction y of the laminate 612... 13 It floats up from the laminate 612. It passes through the end edge P of the first main surface side thin film layer 626a1. 13 It floats continuously in the longitudinal direction z, thereby suppressing the end edge P of the first main surface side film layer 626a1 even when thermal stress is applied. 13 The tensile stress is reduced. Therefore, cracks in the laminate 612 caused by thermal stress can be suppressed.

[0373] At this time, the end edge P of the first main surface side thin film layer 626a1 located at the center side in the width direction y of the laminate 612... 13In this design, position A2 is defined as the position of the first main surface side thin film layer 626a1 closest to the center of the laminate 612 in the width direction y; position B2 is defined as the position where the laminate separates from the laminate 612 in the lamination direction x; and position C2 is defined as the position where a perpendicular line drawn from position A2 in the lamination direction x intersects the laminate 612. ∠A2B2C2 is preferably 20 degrees or more and 70 degrees or less. By setting these values ​​within the above range, the end edge P of the first main surface side thin film layer 626a1 located at the center of the laminate 612 in the width direction y can be positioned... 13 It can be sufficiently separated from the laminate 612, and the distance y in the width direction from position B2 to position C2 can also be sufficiently obtained. Therefore, the direction of compressive stress can be sufficiently changed. As a result, even when thermal stress is applied, the end edge P of the first main surface side film layer 626a1 can be suppressed. 13 The tensile stress is reduced. Therefore, cracks in the laminate 612 caused by thermal stress can be suppressed.

[0374] Furthermore, the distance in the width direction y from position A2 to position B2 is preferably 5 μm or more and 20 μm or less. This allows for a sufficiently precise distance from position A2 to position B2, thus enabling a sufficient variation in the direction of compressive stress. On the other hand, when the distance in the width direction y from position A2 to position B2 is less than 5 μm, the end edge P of the first main surface side thin film layer 626a1 located at the center side in the width direction y of the laminate 612... 13 It cannot be sufficiently separated from the laminate 612. Furthermore, when the distance in the width direction y from position A2 to position B2 is greater than 20 μm, the stress in the first main surface side film layer 626a1 is too high, and cracks may enter the laminate 612.

[0375] Similarly, the end edge P of the second main surface side thin film layer 626b1 located at the center side in the width direction y of the laminate 612 14 Separation occurs in the lamination direction x from the laminate 612. Specifically, the end edge P of the second main surface side thin film layer 626b1 located at the center in the width direction y of the laminate 612... 14 It rises from the stacked body 612.

[0376] The end edge P of the third main surface side film layer 626a2 located at the center of the width direction y of the laminate 612 15 Separation occurs from the laminate 612 in the lamination direction x. Specifically, the end edge P of the third main surface side thin film layer 626a2 located at the center in the width direction y of the laminate 612... 15 It rises from the stacked body 612.

[0377] The end edge P of the fourth main surface side film layer 626b2 located at the center of the width direction y of the laminate 612 16 Separation occurs from the laminate 612 in the lamination direction x. Specifically, the end edge P of the fourth main surface side thin film layer 626b2 located at the center in the width direction y of the laminate 612. 16 It rises from the stacked body 612.

[0378] The end edge P of the fifth main surface side film layer 627a1 located at the center of the width direction y of the laminate 612 17 Separation occurs in the lamination direction x from the laminate 612. Specifically, the end edge P of the fifth main surface side thin film layer 627a1 located at the center of the lamination in the width direction y of the laminate 612... 17 It rises from the stacked body 612.

[0379] The end edge P of the sixth main surface side film layer 627b1 located at the center of the width direction y of the laminate 612 18 Separation occurs in the lamination direction x from the laminate 612. Specifically, the end edge P of the sixth main surface side thin film layer 627b1 located at the center in the width direction y of the laminate 612... 18 It rises from the stacked body 612.

[0380] The end edge P of the 7th main surface side thin film layer 627a2 located at the center side in the width direction y of the laminate 612 19 Separation occurs in the lamination direction x from the laminate 612. Specifically, the end edge P of the 7th main surface side thin film layer 627a2 located at the center in the width direction y of the laminate 612... 19 It rises from the stacked body 612.

[0381] The end edge P of the eighth main surface side film layer 627b2 located at the center of the width direction y of the laminate 612. 20 Separation occurs in the lamination direction x from the laminate 612. Specifically, the end edge P of the eighth main surface side thin film layer 627b2 located at the center in the width direction y of the laminate 612... 20 It rises from the stacked body 612.

[0382] In the second main surface side thin film layer 626b1, the third main surface side thin film layer 626a2, the fourth main surface side thin film layer 626b2, the fifth main surface side thin film layer 627a1, the sixth main surface side thin film layer 627b1, the seventh main surface side thin film layer 627a2, and the eighth main surface side thin film layer 627b2, similarly to the first main surface side thin film layer 626a1, through each end edge P 14 P 15 P 16 P 17 P 18 P19 P 20 It floats continuously along the longitudinal direction z, thus suppressing the stress applied to each end edge P even when thermal stress is applied. 14 P 15 P 16 P 17 P 18 P 19 P 20 The tensile stress is reduced. Therefore, cracks in the laminate 612 caused by thermal stress can be suppressed.

[0383] The lower plating layer 628 has a first lower plating layer 628a and a second lower plating layer 628b. The lower plating layer 629 has a third lower plating layer 629a and a fourth lower plating layer 629b. The lower plating layers 628 and 629 are disposed on the thin film layers 626 and 627, and on the first side surface 612c, the second side surface 612d, the third side surface 612e, and the fourth side surface 612f. The lower plating layers 628 and 629 are formed between the laminate 612 and the thin film layers 626 and 627.

[0384] The first lower coating layer 628a is disposed on the first side 612c of the laminate 612 where the thin film layer 626 is not disposed, and is configured to cover the first main surface side thin film layer 626a1 disposed on the first main surface 612a and the third main surface side thin film layer 626a2 disposed on the second main surface 612b.

[0385] The second lower coating layer 628b is disposed on the second side 612d of the laminate 612 where the thin film layer 626 is not disposed, and is configured to cover the second main surface side thin film layer 626b1 disposed on the first main surface 612a and the fourth main surface side thin film layer 626b2 disposed on the second main surface 612b.

[0386] The third lower coating layer 629a is disposed on the first side 612c of the laminate 612 where the thin film layer 627 is not disposed, and is configured to cover the fifth main surface side thin film layer 627a1 disposed on the first main surface 612a and the seventh main surface side thin film layer 627a2 disposed on the second main surface 612b.

[0387] The fourth lower coating layer 629b is disposed on the second side 612d of the laminate 612 where the thin film layer 627 is not disposed, and is configured to cover the sixth main surface side thin film layer 627b1 disposed on the first main surface 612a and the eighth main surface side thin film layer 627b2 disposed on the second main surface 612b.

[0388] The upper plating layer 630 has a first upper plating layer 630a and a second upper plating layer 630b. The upper plating layer 631 has a third upper plating layer 631a and a fourth upper plating layer 631b. The first upper plating layer 630a is configured to cover the first lower plating layer 628a. The second upper plating layer 630b is configured to cover the second lower plating layer 628b. The third upper plating layer 631a is configured to cover the third lower plating layer 629a. The fourth upper plating layer 631b is configured to cover the fourth lower plating layer 629b.

[0389] Surface plating layer 632 has a first surface plating layer 632a and a second surface plating layer 632b. Surface plating layer 633 has a third surface plating layer 633a and a fourth surface plating layer 633b. The first surface plating layer 632a is configured to cover the first upper plating layer 630a. The second surface plating layer 632b is configured to cover the second upper plating layer 630b. The third surface plating layer 633a is configured to cover the third upper plating layer 631a. The fourth surface plating layer 633b is configured to cover the fourth upper plating layer 631b.

[0390] In addition, such as Figure 24 As shown, in this embodiment, the external electrodes 624 and 625 are U-shaped when viewed from the third side 612e or the fourth side 612f of the laminate 612. However, this is not a limitation; the external electrodes 624 and 625 may also be V-shaped or U-shaped when viewed from the third side 612e or the fourth side 612f of the laminate 612.

[0391] E. Fifth Embodiment

[0392] Next, the multilayer ceramic capacitor 710 according to the fifth embodiment of the present invention will be described. Figure 29 This is a perspective view showing the appearance of a multilayer ceramic capacitor according to the fifth embodiment of the present invention. Figure 30 This is a bottom view showing the multilayer ceramic capacitor according to the fifth embodiment of the present invention. Figure 31 yes Figure 29 The sectional view at line XXXI-XXXI involved. Figure 32 yes Figure 29 The sectional view at line XXXII-XXXII involved.

[0393] The multilayer ceramic capacitor 710 according to the fifth embodiment differs in the shape of its external electrodes from the multilayer ceramic capacitor 510 according to the third embodiment. Therefore, the same reference numerals are used for components that are equivalent to those in the third embodiment, and detailed descriptions thereof are omitted.

[0394] The multilayer ceramic capacitor 710 includes a multilayer body 512 and external electrodes 724 and 725.

[0395] The external electrode 724 has a first external electrode 724a and a second external electrode 724b.

[0396] The first external electrode 724a is configured to cover the first lead-out electrode portion 520a in the first side surface 512c and the third side surface 512e, and is configured to cover a portion of the first main surface 512a. The first external electrode 724a is electrically connected to the first lead-out electrode portion 520a of the first internal electrode layer 516a.

[0397] Furthermore, the second external electrode 724b is configured to cover the second lead-out electrode portion 520b in the second side surface 512d and the fourth side surface 512f, and is configured to cover a portion of the first main surface 512a. The second external electrode 724b is electrically connected to the second lead-out electrode portion 520b of the first internal electrode layer 516a.

[0398] The external electrode 725 has a third external electrode 725a and a fourth external electrode 725b.

[0399] The third external electrode 725a is configured to cover the third lead-out electrode portion 521a in the first side surface 512c and the fourth side surface 512f, and is configured to cover a portion of the first main surface 512a. The third external electrode 725a is electrically connected to the third lead-out electrode portion 521a of the second internal electrode layer 516b.

[0400] Furthermore, the fourth external electrode 725b is configured to cover the fourth lead-out electrode portion 521b in the second side surface 512d and the third side surface 512e, and is configured to cover a portion of the first main surface 512a. The fourth external electrode 725b is electrically connected to the fourth lead-out electrode portion 521b of the second internal electrode layer 516b.

[0401] Within the laminate 512, an electrostatic capacitor is formed by the first opposing electrode portion 518a of the first inner electrode layer 516a and the second opposing electrode portion 518b of the second inner electrode layer 516b being opposed to each other across the inner dielectric layer 514a. Therefore, an electrostatic capacitor can be obtained between the first external electrode 724a and the second external electrode 724b connected to the first inner electrode layer 516a and the third external electrode 725a and the fourth external electrode 725b connected to the second inner electrode layer 516b, exhibiting the characteristics of a capacitor.

[0402] The thin film layer 726 has a first thin film layer 726a and a second thin film layer 726b.

[0403] The first thin film layer 726a is formed as part of the first main surface 512a at the corner where the first main surface 512a, the first side surface 512c, and the third side surface 512e of the covering laminate 512 intersect.

[0404] The second thin film layer 726b is formed as part of the first main surface 512a at the corner where the first main surface 512a, the second side surface 512d, and the fourth side surface 512f of the covering laminate 512 intersect.

[0405] The thin film layer 727 has a third thin film layer 727a and a fourth thin film layer 727b.

[0406] The third thin film layer 727a is formed as part of the first main surface 512a at the corner where the first main surface 512a, the first side surface 512c, and the fourth side surface 512f of the covering laminate 512 intersect.

[0407] The fourth thin film layer 727b is formed as part of the first main surface 512a at the corner where the first main surface 512a, the second side surface 512d, and the third side surface 512e of the covering laminate 512 intersect.

[0408] The end edge P5 of the first thin film layer 726a, located at the center of the laminate 512 in the longitudinal direction z, separates from the laminate 512 in the lamination direction x. In other words, the end edge P5 of the first thin film layer 726a, located at the center of the laminate 512 in the longitudinal direction z, floats off the laminate 512. Because the end edge P5 of the first thin film layer 726a continuously floats off in the width direction y, tensile stress applied to the end edge P5 of the first thin film layer 726a can be suppressed even under thermal stress. Therefore, cracks in the laminate 512 caused by thermal stress can be suppressed.

[0409] At this time, in the end edge P5 of the first thin film layer 726a located at the center side of the stack 512 in the length direction z, the position of the first thin film layer 726a closest to the center side of the stack 512 in the length direction z is designated as position A1, the position where it begins to separate from the stack 512 in the stacking direction x is designated as position B1, and the position where it intersects the stack 512 when a perpendicular line is drawn from position A1 in the stacking direction x is designated as position C1. ∠A1B1C1 is preferably 20 degrees or more and 70 degrees or less. By setting these values ​​within the above range, the end edge P5 of the first thin film layer 726a located at the center side of the stack 512 in the length direction z can be sufficiently separated from the stack 512, and the distance in the length direction z from position B1 to position C1 can also be sufficiently obtained. Therefore, the direction of compressive stress can be sufficiently changed. As a result, even under the application of thermal stress, the tensile stress applied to the end edge P5 of the first thin film layer 726a can be suppressed. Thus, cracks in the laminate 512 caused by thermal stress can be suppressed.

[0410] Furthermore, the distance z along the longitudinal direction from position A1 to position B1 is preferably 5 μm or more and 20 μm or less. This allows for a sufficiently precise distance from position A1 to position B1, thus enabling a sufficient variation in the direction of compressive stress. On the other hand, if the distance z along the longitudinal direction from position A1 to position B1 is less than 5 μm, the end edge P5 of the first thin film layer 726a located at the center of the laminate 512 along the longitudinal direction z cannot sufficiently separate from the laminate 512. Furthermore, if the distance z along the longitudinal direction from position A1 to position B1 is greater than 20 μm, the stress on the first thin film layer 726a becomes excessive, and cracks may enter the laminate 512.

[0411] Similarly, the end edge P6 of the second thin film layer 726b located at the center of the laminate 512 in the longitudinal direction z separates from the laminate 512 in the lamination direction x. That is, the end edge P6 of the second thin film layer 726b located at the center of the laminate 512 in the longitudinal direction z floats up from the laminate 512.

[0412] The end edge P9 of the third thin film layer 727a located at the center of the laminate 512 in the longitudinal direction z separates from the laminate 512 in the lamination direction x. That is, the end edge P9 of the third thin film layer 727a located at the center of the laminate 512 in the longitudinal direction z floats up from the laminate 512.

[0413] The end edge P of the fourth thin film layer 727b located at the center of the longitudinal direction z of the laminate 512 10 Separation occurs in the lamination direction x from the laminate 512. Specifically, the end edge P of the fourth thin film layer 727b located at the center of the lamination in the longitudinal direction z of the laminate 512...10 It rises from the stack 512.

[0414] In the second thin film layer 726b, the third thin film layer 727a, and the fourth thin film layer 727b, similarly to the first thin film layer 726a, the end edges P6, P9, and P1 are connected. 10 It floats continuously in the width direction y, thus suppressing the stress applied to each end edge P6, P9, P even when thermal stress is applied. 10 The tensile stress is reduced. Therefore, cracks in the laminate 512 caused by thermal stress can be suppressed.

[0415] The end edge P of the first thin film layer 726a located at the center of the width direction y of the laminate 512 13 It separates from the laminate 512 in the lamination direction x. That is, the end edge P of the first thin film layer 726a located at the center side in the width direction y of the laminate 512. 13 It floats up from the laminate 512. It passes through the end edge P of the first thin film layer 726a. 13 It floats continuously in the longitudinal direction z, thereby suppressing the application of thermal stress to the end edge P of the first thin film layer 726a. 13 The tensile stress is reduced. Therefore, cracks in the laminate 512 caused by thermal stress can be suppressed.

[0416] At this time, the end edge P of the first thin film layer 726a located at the center side in the width direction y of the laminate 512... 13 In this design, position A2 is defined as the position of the first thin film layer 726a closest to the center of the laminate 512 in the width direction y; position B2 is defined as the position where it begins to separate from the laminate 512 in the lamination direction x; and position C2 is defined as the position where a perpendicular line drawn from position A2 in the lamination direction x intersects the laminate 512. ∠A2B2C2 is preferably 20 degrees or more and 70 degrees or less. By setting these values ​​within the above range, the end edge P of the first thin film layer 726a located at the center of the laminate 512 in the width direction y can be made more stable. 13 It can be sufficiently separated from the laminate 512, and the distance z in the longitudinal direction from position B2 to position C2 can also be sufficiently obtained. Therefore, the direction of compressive stress can be sufficiently changed. As a result, even when thermal stress is applied, the end edge P of the first thin film layer 726a can be suppressed. 13 The tensile stress is reduced. Therefore, cracks in the laminate 512 caused by thermal stress can be suppressed.

[0417] Furthermore, the distance in the width direction y from position A2 to position B2 is preferably 5 μm or more and 20 μm or less. This allows for a sufficiently precise distance from position A2 to position B2, thus enabling a sufficient variation in the direction of compressive stress. On the other hand, when the distance in the width direction y from position A2 to position B2 is less than 5 μm, the end edge P of the first thin film layer 726a located at the center side in the width direction y of the laminate 512... 13 It cannot be sufficiently separated from the laminate 512. Furthermore, when the distance in the width direction y from position A2 to position B2 is greater than 20 μm, the stress in the first thin film layer 726a is too high, and cracks may enter the laminate 512.

[0418] Similarly, the end edge P of the second thin film layer 726b located at the center side in the width direction y of the laminate 512 14 It separates from the laminate 512 in the lamination direction x. That is, the end edge P of the second thin film layer 726b located at the center side in the width direction y of the laminate 512. 14 It rises from the stacked body 512.

[0419] The end edge P of the third thin film layer 727a located at the center of the width direction y of the laminate 512 17 It separates from the laminate 512 in the lamination direction x. That is, the end edge P of the third thin film layer 727a located at the center side in the width direction y of the laminate 512. 17 It rises from the stacked body 512.

[0420] The end edge P on the central side of the laminate 512 in the width direction y of the fourth thin film layer 727b 18 It separates from the laminate 512 in the lamination direction x. That is, the end edge P of the fourth thin film layer 727b on the central side in the width direction y of the laminate 512. 18 It rises from the stacked body 512.

[0421] In the second thin film layer 726b, the third thin film layer 727a, and the fourth thin film layer 727b, similarly to the first thin film layer 726a, each end edge P... 14 P 17 P 18 It floats continuously in the width direction y, thus suppressing the stress applied to each end edge P even when thermal stress is applied. 14 P 17 P 18 The tensile stress is reduced. Therefore, cracks in the laminate 512 caused by thermal stress can be suppressed.

[0422] In this embodiment, the first thin film layer 726a, the second thin film layer 726b, the third thin film layer 727a, and the fourth thin film layer 727b are disposed only on the first main surface 512a. However, the first thin film layer 726a, the second thin film layer 726b, the third thin film layer 727a, and the fourth thin film layer 727b may also be disposed not only on the first main surface 512a, but also on the first side surface 512c, the second side surface 512d, the third side surface 512e, and the fourth side surface 512f. When the thin film layers 726 and 727 are configured in this way, as described in the third embodiment, the end edges of the first thin film layer 726a, the second thin film layer 726b, the third thin film layer 727a, and the fourth thin film layer 727b disposed on the first side 512c, the second side 512d, the third side 512e, and the fourth side 512f located on the central side of the laminate 512 in the length direction z and / or the width direction y can also be separated from the laminate 512.

[0423] The lower plating layer 728 has a first lower plating layer 728a and a second lower plating layer 728b. The lower plating layer 729 has a third lower plating layer 729a and a fourth lower plating layer 729b. The lower plating layers 728 and 729 are disposed on the thin film layers 726 and 727, and on the first side surface 512c, the second side surface 512d, the third side surface 512e, and the fourth side surface 512f. The lower plating layers 728 and 729 are formed between the laminate 512 and the thin film layers 726 and 727.

[0424] The first lower coating layer 728a is disposed on the first side 512c and the third side 512e of the laminate 512 where the first thin film layer 726a is not disposed, and is configured to cover the first thin film layer 726a disposed on the first main surface 512a.

[0425] The second lower coating layer 728b is disposed on the second side 512d and the fourth side 512f of the laminate 512 on which the second thin film layer 726b is not disposed, and is configured to cover the second thin film layer 726b disposed on the first main surface 512a.

[0426] The third lower coating layer 729a is disposed on the first side 512c and the fourth side 512f of the laminate 512 where the third thin film layer 727a is not disposed, and is configured to cover the third thin film layer 727a disposed on the first main surface 512a.

[0427] The fourth lower coating layer 729b is disposed on the second side 512d and the third side 512e of the laminate 512 on which the fourth thin film layer 727b is not disposed, and is configured to cover the fourth thin film layer 727b disposed on the first main surface 512a.

[0428] The upper plating layer 730 has a first upper plating layer 730a and a second upper plating layer 730b. The upper plating layer 731 has a third upper plating layer 731a and a fourth upper plating layer 731b. The first upper plating layer 730a is configured to cover the first lower plating layer 728a. The second upper plating layer 730b is configured to cover the second lower plating layer 728b. The third upper plating layer 731a is configured to cover the third lower plating layer 729a. The fourth upper plating layer 731b is configured to cover the fourth lower plating layer 729b.

[0429] Surface plating layer 732 has a first surface plating layer 732a and a second surface plating layer 732b. Surface plating layer 733 has a third surface plating layer 733a and a fourth surface plating layer 733b. The first surface plating layer 732a is configured to cover the first upper plating layer 730a. The second surface plating layer 732b is configured to cover the second upper plating layer 730b. The third surface plating layer 733a is configured to cover the third upper plating layer 731a. The fourth surface plating layer 733b is configured to cover the fourth upper plating layer 731b.

[0430] For example, the above embodiments only illustrate a shape with bilateral symmetry in the front view; however, the shape of the multilayer ceramic capacitor involved in this invention can be varied according to the object to be installed and, moreover, according to the required performance. Furthermore, this invention also includes structures that appropriately combine all or part of the structures of the above embodiments.

[0431] That is, without departing from the technical concept and purpose of the present invention, various changes can be made to the above-described embodiments regarding the mechanism, shape, material, quantity, position or configuration, etc., and these are included in the present invention.

[0432] Industrial availability

[0433] This invention relates to multilayer ceramic capacitors, and particularly to multilayer ceramic capacitors having external electrodes with thin film layers.

[0434] Explanation of reference numerals in the attached figures

[0435] 10, 110, 510, 610, 710: Multilayer ceramic capacitors;

[0436] 12, 512, 612: Layered bodies;

[0437] 12a, 512a, 612a: First principal face;

[0438] 12b, 512b, 612b: 2nd main surface;

[0439] 12c, 512c, 612c: First side view;

[0440] 12d, 512d, 612d: Second side view;

[0441] 12e: First end face;

[0442] 12f: Second end face;

[0443] 512e, 612e: Third side;

[0444] 512f, 612f: Fourth side face;

[0445] 14, 514, 614: Dielectric layer;

[0446] 14a, 514a, 614a: Inner dielectric layer;

[0447] 14b, 514b, 614b: outer dielectric layer;

[0448] 15a, 515a, 615a: Inner layer;

[0449] 15b1, 515b1, 615b1: Outer layer of the first main surface;

[0450] 15b2, 515b2, 615b2: Outer layer of the second main surface;

[0451] 16, 516, 616: Internal electrode layer;

[0452] 16a, 516a, 616a: First internal electrode layer;

[0453] 16b, 516b, 616b: Second internal electrode layer;

[0454] 18a, 518a, 618a: First opposing electrode section;

[0455] 18b, 518b, 618b: Second opposing electrode section;

[0456] 20a, 520a, 620a: First lead-out electrode section;

[0457] 20b, 520b, 620b: Second lead-out electrode section;

[0458] 521a, 621a: Third lead-out electrode section;

[0459] 521b, 621b: Fourth lead-out electrode section;

[0460] 22a, 522a, 622a: Side (W gap);

[0461] 22b, 522b, 622b: End (L-gap);

[0462] 24, 124, 524, 525, 624, 625, 724, 725: External electrodes;

[0463] 24a, 124a, 524a, 624a, 724a: First external electrode;

[0464] 24b, 124b, 524b, 624b, 724b: Second external electrode;

[0465] 525a, 625a, 725a: Third external electrode;

[0466] 525b, 625b, 725b: Fourth external electrode;

[0467] 26, 126, 526, 527, 626, 627, 726, 727: Thin film layer;

[0468] 26a, 126a, 526a, 626a, 726a: First thin film layer;

[0469] 126a1, 526a1, 626a1: Thin film layer on the first main surface;

[0470] 126a2, 526a2, 626a2: Third main surface side thin film layer;

[0471] 526a3, 626a3: First side thin film layer;

[0472] 526a4, 626a4: Third side thin film layer;

[0473] 26b, 126b, 526b, 626b, 726b: Second thin film layer;

[0474] 126b1, 526b1, 626b1: Thin film layer on the second main surface;

[0475] 126b2, 526b2, 626b2: Thin film layer on the fourth main surface;

[0476] 526b3: Second side thin film layer;

[0477] 526b4: Fourth side thin film layer;

[0478] 527a, 627a: Third thin film layer;

[0479] 527a1, 627a1: Thin film layer on the fifth main surface;

[0480] 527a2, 627a2: Thin film layer on the 7th main surface;

[0481] 527a3: Fifth side thin film layer;

[0482] 527a4: The 7th side thin film layer;

[0483] 527b, 627b: Fourth thin film layer;

[0484] 527b1, 627b1: Thin film layer on the 6th main surface;

[0485] 527b2, 627b2: Thin film layer on the 8th main surface;

[0486] 527b3: Sixth side thin film layer;

[0487] 527b4: Eighth side thin film layer;

[0488] 28, 528, 529, 628, 629, 728, 729: Lower plating layer;

[0489] 28a, 528a, 628a, 728a: First lower plating layer;

[0490] 28b, 528b, 628b, 728b: Second lower plating layer;

[0491] 529a, 629a, 729a: Third lower plating layer;

[0492] 529b, 629b, 729b: Fourth lower plating layer;

[0493] 30, 530, 531, 630, 631, 730, 731: Top plating layer;

[0494] 30a, 530a, 630a, 730a: First upper plating layer;

[0495] 30b, 530b, 630b, 730b: Second upper plating layer;

[0496] 531a, 631a, 731a: Third upper plating layer;

[0497] 531b, 631b, 731b: Fourth upper plating layer;

[0498] 32, 532, 533, 632, 633, 732, 733: Surface coating;

[0499] 32a, 532a, 632a, 732a: First surface coating;

[0500] 32b, 532b, 632b, 732b: Second surface coating;

[0501] 533a, 633a, 733a: Third surface coating;

[0502] 533b, 633b, 733b: Fourth surface coating;

[0503] A (A1, A2, A3, A4): The position of the thin film layer closest to the center of the laminate;

[0504] B (B1, B2, B3, B4): The position where the separation begins from the start of the laminate;

[0505] C (C1, C2, C3, C4): The position where the perpendicular line drawn from position A intersects with the laminated body;

[0506] P1~P 28 : End edge;

[0507] x: Stacking direction;

[0508] y: width direction;

[0509] z: Length direction;

[0510] L: The length dimension of the multilayer ceramic capacitor;

[0511] W: The width dimension of the multilayer ceramic capacitor;

[0512] T: Dimensions in the stacking direction of the multilayer ceramic capacitor.

Claims

1. A multilayer ceramic capacitor, comprising: A laminate comprising a plurality of stacked dielectric layers, and having a first main surface and a second main surface opposite to each other in the stacking direction, a first side surface and a second side surface opposite to each other in the width direction orthogonal to the stacking direction, a first end surface and a second end surface opposite to each other in the length direction orthogonal to the stacking direction and the width direction, a first internal electrode layer alternately stacked with the plurality of dielectric layers and exposed on the first end surface, and a second internal electrode layer alternately stacked with the plurality of dielectric layers and exposed on the second end surface; The first external electrode is configured to cover a portion of the first end face and a portion of the first main face of the laminate; as well as The second external electrode is configured to cover a portion of the second end face and a portion of the first main face of the laminate. The first external electrode and the second external electrode each have: A thin film layer covers at least a portion of the first main surface; The lower coating layer is coated with at least a portion of the thin film layer; An upper plating layer is disposed on the lower plating layer; as well as A surface coating layer is disposed on the upper coating layer. On the first main surface, the end edge of the thin film layer located on the central side of the laminate separates from the laminate.

2. The multilayer ceramic capacitor according to claim 1, wherein, In the end edge of the thin film layer located at the center side of the stack along the length direction, when the position of the thin film layer closest to the center side of the stack along the length direction is designated as position A, the position where the film layer begins to separate from the stack along the stacking direction is designated as position B, and the position where a perpendicular line is drawn from position A and intersects the stack along the stacking direction is designated as position C, ∠ABC is 20 degrees or more and 70 degrees or less.

3. The multilayer ceramic capacitor according to claim 1 or 2, wherein, When the position of the thin film layer closest to the center of the stack in the longitudinal direction is designated as position A, and the position where the thin film layer begins to separate from the stack in the lamination direction is designated as position B, the distance in the longitudinal direction from position A to position B is more than 5 μm and less than 20 μm.

4. The multilayer ceramic capacitor according to claim 1, wherein, The metal particle size of the thin film layer is less than 1.0 μm.

5. The multilayer ceramic capacitor according to claim 1, wherein, The combined thickness of the first external electrode and the second external electrode disposed on the first main surface, and the thickness of the laminate in the lamination direction, is 80 μm or less.

6. The multilayer ceramic capacitor according to claim 1, wherein, The dimension in the width direction is greater than the dimension in the length direction.

7. A multilayer ceramic capacitor, comprising: A laminate comprising a plurality of stacked dielectric layers, and having a first main surface and a second main surface opposite to each other in the stacking direction, a first side surface and a second side surface opposite to each other in the width direction orthogonal to the stacking direction, a third side surface and a fourth side surface opposite to each other in the length direction orthogonal to the stacking direction and the width direction, a first internal electrode layer alternately stacked with the plurality of dielectric layers and exposed at least on the first side surface and the second side surface, and a second internal electrode layer alternately stacked with the plurality of dielectric layers and exposed at least on the first side surface and the second side surface; The first external electrode is configured to cover a portion of the first side surface and a portion of the first main surface of the laminate; The second external electrode is configured to cover a portion of the second side surface and a portion of the first main surface of the laminate; The third external electrode is disposed separately from the first external electrode and is configured to cover a portion of the first side surface and a portion of the first main surface of the laminate. as well as The fourth external electrode is disposed separately from the second external electrode and is configured to cover a portion of the second side surface and a portion of the first main surface of the laminate. The first external electrode, the second external electrode, the third external electrode, and the fourth external electrode each comprise: A thin film layer that covers at least a portion of the laminate above any one of its surfaces; The lower coating layer is coated with at least a portion of the thin film layer; An upper plating layer is disposed on the lower plating layer; as well as A surface coating layer is disposed on the upper coating layer. The end edge of the thin film layer located on the central side of the laminate separates from the laminate.

8. The multilayer ceramic capacitor according to claim 7, wherein, When the thin film layer is disposed on the first main surface and / or the second main surface, at least one of the end edges of the thin film layer located on the central side of the laminate, the end edges of the thin film layer disposed opposite each other in the length direction and the end edges of the thin film layer disposed opposite each other in the width direction, separates from the laminate.

9. The multilayer ceramic capacitor according to claim 7, wherein, When the thin film layer is disposed on the first side and / or the second side, at least one of the end edges of the thin film layer disposed opposite each other in the longitudinal direction separates from the laminate.

10. The multilayer ceramic capacitor according to claim 7, wherein, When the thin film layer is disposed on the third side and / or the fourth side, at least one of the end edges of the thin film layer located on the central side of the laminate is separated from the laminate.

11. The multilayer ceramic capacitor according to claim 7 or 10, wherein, In the end edge of the thin film layer disposed on the first main surface, located at the center side of the laminate in the longitudinal direction, the position of the thin film layer closest to the center side of the laminate in the longitudinal direction is designated as position A1, the position where it separates from the laminate in the lamination direction is designated as position B1, and the position where it intersects the laminate when a perpendicular line is drawn from position A1 in the lamination direction is designated as position C1, ∠A1B1C1 is 20 degrees or more and 70 degrees or less.

12. The multilayer ceramic capacitor according to claim 7 or 10, wherein, When the end edge of the thin film layer disposed on the first main surface is located at the center side of the stack in the longitudinal direction, and the position of the thin film layer closest to the center side of the stack in the longitudinal direction is set as position A1, and the position where it begins to separate from the stack in the lamination direction is set as position B1, the distance in the longitudinal direction from position A1 to position B1 is more than 5 μm and less than 20 μm.

13. The multilayer ceramic capacitor according to claim 7 or 10, wherein, In the end edge of the thin film layer disposed on the first main surface, located at the center side in the width direction of the laminate, the position of the thin film layer closest to the center side in the width direction of the laminate is designated as position A2, the position where it separates from the laminate in the lamination direction is designated as position B2, and the position where it intersects the laminate when a perpendicular line is drawn from position A2 in the lamination direction is designated as position C2, ∠A2B2C2 is 20 degrees or more and 70 degrees or less.

14. The multilayer ceramic capacitor according to claim 7 or 10, wherein, When the end edge of the thin film layer disposed on the first main surface is located at the center side of the laminate in the width direction, and the position of the thin film layer closest to the center side of the laminate in the width direction is set as position A2, and the position where it begins to separate from the laminate in the lamination direction is set as position B2, the distance in the width direction from position A2 to position B2 is more than 5 μm and less than 20 μm.

15. The multilayer ceramic capacitor according to claim 7 or 10, wherein, In the end edge of the thin film layer disposed on the first side or the second side, located at the center side in the longitudinal direction of the laminate, the position of the thin film layer closest to the center side in the longitudinal direction of the laminate is designated as position A3, the position where it separates from the laminate in the width direction is designated as position B3, and the position where it intersects the laminate when a perpendicular line is drawn from position A3 in the width direction is designated as position C3, ∠A3B3C3 is 20 degrees or more and 70 degrees or less.

16. The multilayer ceramic capacitor according to claim 8 or 10, wherein, When the end edge of the thin film layer disposed on the first side or the second side of the laminate is located at the center side in the longitudinal direction, and the position of the thin film layer closest to the center side in the longitudinal direction of the laminate is set as position A3, and the position where it begins to separate from the laminate in the width direction is set as position B3, the distance in the longitudinal direction from position A3 to position B3 is more than 5 μm and less than 20 μm.

17. The multilayer ceramic capacitor according to claim 8 or 10, wherein, In the end edge of the thin film layer disposed on the third or fourth side of the laminate located at the center side in the width direction, the position of the thin film layer closest to the center side in the width direction of the laminate is designated as position A4, the position where it separates from the laminate in the length direction is designated as position B4, and the position where it intersects the laminate when a perpendicular line is drawn from position A4 in the length direction is designated as position C4, ∠A4B4C4 is 20 degrees or more and 70 degrees or less.

18. The multilayer ceramic capacitor according to claim 8 or 10, wherein, When the end edge of the thin film layer disposed on the third side or the fourth side of the laminate is located at the center side in the width direction, and the position of the thin film layer closest to the center side in the width direction of the laminate is set as position A4, and the position where it begins to separate from the laminate in the length direction is set as position B4, the distance in the width direction from position A4 to position B4 is more than 5 μm and less than 20 μm.

19. The multilayer ceramic capacitor according to claim 7, wherein, When the length of the laminate in the longitudinal direction is set as L and the length in the width direction is set as W, 7 / 10 ≤ L / W ≤ 10 / 7.

Images