Memory device including volatile memory and operating method thereof

Abstract

The invention discloses a storage device including volatile memory and an operating method thereof. The storage device includes: a volatile memory including a plurality of physical regions; a compression operation circuit configured to compress the write data at a first ratio to generate first compressed data; and a control operation circuit configured to divide a plurality of physical regions included in the volatile memory into a first physical region and a second physical region, store the first compressed data in the first physical region, and store the second compressed data in the second physical region. And storing first logical information indicating a region in which the first compressed data is stored in a first selected region among the second physical regions.

Description

[0001] Cross-references to related applications

[0002] This application claims priority to Korean Patent Application No. 10-2024-0068591, filed on May 27, 2024, the entire contents of which are incorporated herein by reference. Technical Field

[0003] Various embodiments of this disclosure relate to a storage device, and more specifically, to a storage device including volatile memory and a method of operating the same. Background Technology

[0004] Memory systems are storage devices implemented using semiconductors such as silicon (Si), germanium (Ge), gallium arsenide (GaAs), and indium phosphide (InP). Memory systems are divided into volatile memory devices and non-volatile memory devices. Volatile memory devices are memory devices whose stored data is lost when power is interrupted. Representative examples of volatile memory devices include static RAM (SRAM), dynamic RAM (DRAM), and synchronous DRAM (SDRAM). Non-volatile memory devices are memory devices that retain stored data even when power is interrupted. Representative examples of non-volatile memory devices include read-only memory (ROM), programmable ROM (PROM), electrically programmable ROM (EPROM), electrically erasable programmable ROM (EEPROM), flash memory, phase-change random access memory (PRAM), magnetic RAM (MRAM), resistive RAM (RRAM), and ferroelectric RAM (FRAM). Flash memory is mainly divided into NOR type memory and NAND type memory.

[0005] The storage device may also include a controller for controlling the memory (e.g., volatile / non-volatile memory), such a controller being able to receive commands from an external device and perform data read, write, and erase operations on the memory included in the storage device based on the received commands, in order to control these operations.

[0006] On the other hand, the memory capacity required by computing systems continues to increase. In particular, increasing memory capacity is becoming more difficult when the price per unit capacity of volatile memory is higher than that of non-volatile memory.

[0007] Therefore, in a storage device including volatile memory, a method for compressing and storing data stored in volatile memory has been proposed. Summary of the Invention

[0008] Various embodiments of this disclosure are intended to provide a storage device and a method of operating thereof capable of compressing written data and storing compressed data in an internal volatile memory.

[0009] The technical problems to be solved by this disclosure are not limited to the aforementioned technical problems. Those skilled in the art can clearly understand other unmentioned technical problems from the following description.

[0010] In embodiments of this disclosure, a storage device may include: a volatile memory including a plurality of physical regions; a compression operation circuit configured to compress written data at a first ratio to generate first compressed data; and a control operation circuit configured to divide the plurality of physical regions included in the volatile memory into a first physical region and a second physical region, store the first compressed data in the first physical region, and store first logical information indicating the region where the first compressed data is stored in a first selected region in the second physical region.

[0011] In embodiments of this disclosure, an operation method for a storage device including a volatile memory may include: compressing written data at a first ratio to generate first compressed data; dividing a plurality of physical regions included in the volatile memory into a first physical region and a second physical region; storing the first compressed data in the first physical region; and storing first logical information indicating the region where the first compressed data is stored in a first selected region in the second physical region.

[0012] Embodiments of this disclosure may configure a plurality of physical regions included in the volatile memory within the storage device as a first physical region for storing compressed data and a second physical region for storing logical information indicating the compressed data stored in the first physical region, and manage the first physical region and the second physical region.

[0013] Specifically, embodiments of this disclosure can independently manage the location of the corresponding logical information stored in the second physical region according to the compression ratio of the compressed data.

[0014] This allows for efficient access to compressed data stored in volatile memory. Attached Figure Description

[0015] Figures 1A to 1C This is a diagram illustrating the configuration of a data processing system including a storage device according to an embodiment of the present disclosure.

[0016] Figures 2A to 2G This is a diagram illustrating the operation of a storage device according to a first embodiment of the present disclosure storing compressed data in internal volatile memory and managing the stored compressed data.

[0017] Figures 3A to 3I This is a diagram illustrating the operation of a storage device according to a second embodiment of the present disclosure storing compressed data in internal volatile memory and managing the stored compressed data. Detailed Implementation

[0018] Various embodiments of the present disclosure will now be described in detail with reference to the accompanying drawings. However, the elements and features of the present disclosure may be configured or arranged in different ways to form other embodiments, which may be variations of any disclosed embodiment.

[0019] In this disclosure, references to various features (e.g., elements, structures, modules, components, steps, operations, characteristics, etc.) included in “one embodiment,” “example embodiment,” “embodiment,” “another embodiment,” “some embodiments,” “multiple embodiments,” “other embodiments,” “alternative embodiments,” etc., are intended to indicate that any such feature is included in one or more embodiments of this disclosure, but may or may not be combined in the same embodiments.

[0020] In this disclosure, the terms “comprising,” “including,” “having,” and “containing” are open-ended. As used in the appended claims, these terms specify the presence of the said element but do not exclude the presence or addition of one or more other elements. The terms in the claims do not exclude the device from including additional components (e.g., interface units, circuitry, etc.).

[0021] In this disclosure, various units, circuits, or other components may be described or claimed to be “configured to” perform one or more tasks. In such a context, “configured to” is used to indicate a structure by indicating that a block / unit / circuit / component includes a structure (e.g., a circuit) that performs one or more tasks during operation. Therefore, even when a block / unit / circuit / component is not currently in operation (e.g., not turned on or activated), it can be said that the specified block / unit / circuit / component is configured to perform a task. Blocks / units / circuits / components used with the “configured to” language include hardware, such as circuits, memory storing program instructions operable to perform operations, etc. Additionally, “configured to” may include general structures (e.g., general-purpose circuits) manipulated by software and / or firmware (e.g., an FPGA or general-purpose processor running software) to operate in a manner capable of performing the relevant tasks. “Configured to” may also include adjusting manufacturing processes (e.g., semiconductor manufacturing facilities) to manufacture means (e.g., integrated circuits) for performing or implementing one or more tasks.

[0022] As used in this disclosure, the terms “circuit” or “logic” refer to all of the following: (a) a purely hardware circuit implementation (e.g., an implementation of analog and / or digital circuitry only); and (b) a combination of circuitry and software (and / or firmware), such as (if applicable): (i) a combination of processors or (ii) a processor / software (including digital signal processors), software, and memory that work together to enable a device such as a mobile phone or server to perform various functions; and (c) a circuit, such as a microprocessor or a portion thereof, that requires software or firmware to function, even if the software or firmware is not physically present. The definition of “circuit” or “logic” applies to all uses of the term in this application, including in any claim. As a further example, as used in this application, the terms “circuit” or “logic” also cover implementations of only one or more processors or a portion thereof and their accompanying software and / or firmware. The terms “circuit” or “logic” also cover integrated circuits, for example, for storage devices, if applicable to a particular claim element.

[0023] As used herein, the terms “first,” “second,” “third,” etc., serve as labels for preceding nouns and do not indicate any type of ordering (e.g., spatial, temporal, logical, etc.). The terms “first” and “second” do not necessarily mean that the first value must precede the second. Furthermore, while these terms can be used herein to identify various elements, these elements are not limited by these terms. These terms are used to distinguish one element from another element with the same or similar name. For example, a first circuit can be distinguished from a second circuit.

[0024] Furthermore, the term "based on" is used to describe one or more factors that influence the determination. This term does not exclude other factors that may influence the determination. That is, the determination may be based solely on these factors, or at least partially on them. For example, the phrase "A is determined based on B." While B is a factor influencing the determination of A in this case, such a phrase does not exclude the possibility that the determination of A is also based on C. In other cases, A may be determined solely based on B.

[0025] In this document, a data item, data entry, or data term can be a bit sequence. For example, a data item may include the contents of a file, a portion of a file, a page in memory, an object in object-oriented programming, a digital message, a digitally scanned image, a portion of a video or audio signal, metadata, or any other entity that can be represented by a bit sequence. According to an embodiment, a data item may include discrete objects. According to another embodiment, a data item may include units of information within a data packet transmitted between two different components.

[0026] Figures 1A to 1CThis is a diagram illustrating a data processing system including a storage device according to embodiments of the present disclosure.

[0027] Reference Figure 1A The data processing system may include a host 102 that is coupled to or connected to a memory system (e.g., storage device 110). For example, the host 102 and the storage device 110 may be interconnected via a data bus, host cable, etc., to perform data communication.

[0028] Storage device 110 may include memory devices 140, 150 and controller 130. The memory devices 140, 150 and controller 130 in storage device 110 can be considered as physically separate components or elements. The memory devices 140, 150 and controller 130 can be connected via at least one data path. For example, a data path may include a channel and / or a way.

[0029] According to embodiments, memory devices 140, 150 and controller 130 may be functionally separate components or elements. Additionally, according to embodiments, memory devices 140, 150 and controller 130 may be implemented using a single chip or multiple chips. Controller 130 may perform data input / output operations in response to requests input from external devices. For example, when controller 130 performs a read operation in response to a read request input from an external device, data stored in a plurality of non-volatile memory cells included in memory devices 140, 150 is transferred to controller 130.

[0030] The controller 130 can control the memory devices 140 and 150 to perform read, program, and erase operations corresponding to commands input from the host 102, and the memory device 110 can perform these operations independently without commands input from an external device such as the host 102.

[0031] Specifically, memory devices 140 and 150 may include volatile memory 140 and non-volatile memory 150.

[0032] Additionally, the controller 130, volatile memory 140, and non-volatile memory 150 may be physically separate components. Each of the controller 130 and each of the volatile memory 140 and non-volatile memory 150 may be connected via at least one data path. For example, a data path may include a channel and / or a path.

[0033] The controller 130 can be independently connected to each of the volatile memory 140 and the non-volatile memory 150. For example, a first data path can be connected between the volatile memory 140 and the controller 130, and a second data path can be connected between the non-volatile memory 150 and the controller 130, and the first data path and the second data path can be physically separate.

[0034] On the other hand, the storage device 110 according to embodiments of the present disclosure can be configured not only as Figure 1A The form shown can also be configured as Figure 1B and Figure 1C As shown in the figure.

[0035] In other words, such as Figure 1B As shown, the volatile memory 140 in memory devices 140 and 150 may be included inside the controller 130 and may be connected to other components 132 and 134 inside the controller 130 via a data bus. The non-volatile memory 150 may be configured to be connected via at least one data path outside the controller 130.

[0036] like Figure 1C As shown, storage device 110 may not include non-volatile memory 150, but may include only volatile memory 140, and volatile memory 140 may be connected to controller 130 via a data path.

[0037] Reference Figures 1A to 1C According to an embodiment of the present disclosure, the storage device 110 can compress written data to generate compressed data and manage the generated compressed data in the volatile memory 140. In this case, the operation of the volatile memory 140 managing the compressed data may mean that, while the compressed data is stored in the volatile memory 140, only the volatile memory 140 performs access operations on the compressed data.

[0038] According to an embodiment, the data to be written may be data requested by host 102 to be written to storage device 110.

[0039] According to another embodiment, the written data may be data generated within the controller 130 in response to an operation of the storage device 110.

[0040] Specifically, even if Figure 1A and Figure 1B As shown, when the storage device 110 includes both volatile memory 140 and non-volatile memory 150, the storage device 110 according to the embodiments of the present disclosure can also manage compressed data by using volatile memory 140.

[0041] According to an embodiment, storage device 110 may store compressed data only in volatile memory 140 without moving the compressed data to non-volatile memory 150, and then perform access operations on the compressed data.

[0042] According to another embodiment, storage device 110 stores compressed data in both non-volatile memory 150 and volatile memory 140, but storing the compressed data in non-volatile memory 150 is for backup purposes. Access operations to the compressed data can be performed through volatile memory 140.

[0043] Refer again Figures 1A to 1C The volatile memory 140 included in the storage device 110 may include multiple physical regions (i.e., memory regions) PB<0:11>.

[0044] The controller 130 included in the storage device 110 may include a compression operation circuit 132 and a control operation circuit 134.

[0045] The control operation circuitry 134 may include internal memory 137, which is allocated space for storing a free area queue 136. Internal memory 137 may have a relatively faster operating speed than volatile memory 140. According to an embodiment, when volatile memory 140 is DRAM, internal memory 137 may be SRAM.

[0046] The following will refer to Figures 2A to 2G The first embodiment described may be an embodiment corresponding to when the control operation circuit 134 controls the operation of the volatile memory 140 without using the free area queue 136. Referring below... Figures 3A to 3I The second embodiment described may be an embodiment corresponding to the operation of the volatile memory 140 when the control operation circuit 134 controls the operation of the volatile memory 140 while using the free area queue 136.

[0047] Specifically, the compression operation circuit 132 included in the controller 130 can generate compressed data by compressing the written data. The written data can refer to uncompressed raw data, such as raw data, while the compressed data can refer to data obtained by compressing the written data using various compression algorithms such as LZ4, LZ4HC, and zStd.

[0048] The compression operation circuit 132 can change the compression ratio based on the value of the written data and the compression algorithm used. According to an embodiment, the compression operation circuit 132 can generate first compressed data by compressing first written data at a first ratio, and generate second compressed data by compressing second written data at a second ratio higher than the first ratio. In this case, the first and second written data can each be data with a predetermined size. Therefore, the size of the first compressed data compressed at a relatively lower first ratio can be larger than the size of the second compressed data compressed at a relatively higher second ratio.

[0049] This disclosure describes an example of generating two types of compressed data by compressing written data at two different ratios; however, this is merely one embodiment, and in practice, more types of compressed data can be generated by compressing written data at more different ratios.

[0050] The control operation circuit 134 included in the controller 130 can divide the multiple physical regions PB<0:11> included in the volatile memory 140 into multiple first physical regions 141 (PB<0:7>) and multiple second physical regions 142 (PB<8:11>).

[0051] According to an embodiment, the control operation circuit 134 can divide 8 of the 12 physical regions PB<0:11> into the first physical region 141 and divide the remaining four physical regions PB<8:11> into the second physical region 142. The 12 physical regions PB<0:11> are included in the volatile memory 140, as shown in the figure.

[0052] This disclosure describes an example of a volatile memory 140 comprising 12 physical regions; however, this is merely one embodiment, and in practice, the volatile memory 140 may include a greater number of physical regions. Similarly, this disclosure describes an example in which eight physical regions corresponding to two-thirds of the 12 physical regions included in the volatile memory 140 are divided into first physical regions, and the remaining four physical regions corresponding to one-third of the 12 physical regions are divided into second physical regions; however, this is merely one embodiment, and in practice, various ratios can be applied to divide the multiple physical regions included in the volatile memory 140 into first and second physical regions.

[0053] The control operation circuit 134 can store each of the first compressed data and the second compressed data, which are compressed at different compression ratios, in the first physical area 141 without overlapping each other.

[0054] According to an embodiment, the control operation circuit 134 can store the first compressed data in a first storage area (i.e., at least one of PB<0:7>) in a free area of ​​the first physical region 141, and store the second compressed data in a second storage area (i.e., at least one of PB<0:7>) in a free area of ​​the first physical region 141 that does not overlap with the first storage area.

[0055] The control operation circuit 134 can store first logic information and second logic information in the second physical region 142 so that they do not overlap. The first logic information indicates the region in the first physical region 141 that stores first compressed data compressed at a first ratio, and the second logic information indicates the region in the first physical region 141 that stores second compressed data compressed at a second ratio. Specifically, the control operation circuit 134 can determine the region of logic information corresponding to the compressed data to be stored based on the compression ratio of the compressed data.

[0056] According to an embodiment, when compressed data is compressed at different ratios, the control operation circuit 134 can store corresponding logic information in different selection areas. That is, the control operation circuit 134 can store first logic information in a first selection area (i.e., at least one of PB<8:11>) within the second physical area 142, and store second logic information in a second selection area (i.e., at least one of PB<8:11>) within the second physical area 142 that does not overlap with the first selection area. The first logic information indicates a first storage area (i.e., at least one of PB<0:7>) storing first compressed data compressed at a first ratio, and the second logic information indicates a second storage area (i.e., at least one of PB<0:7>) storing second compressed data compressed at a second ratio.

[0057] According to another embodiment, when the compressed data is compressed at the same ratio, the control operation circuit 134 can store corresponding logic information in a selection area. That is, the control operation circuit 134 can store both first logic information and second logic information in a first selection area (i.e., at least one of PB<8:11>) within the second physical area 142, where the first logic information indicates a first storage area storing first compressed data compressed at a first ratio, and the second logic information indicates a second storage area storing second compressed data compressed at the first ratio. Alternatively, the control operation circuit 134 can store both first logic information and second logic information in a second selection area (i.e., at least one of PB<8:11>) within the second physical area 142 that does not overlap with the first selection area, where the first logic information indicates a first storage area storing first compressed data compressed at a second ratio, and the second logic information indicates a second storage area storing second compressed data compressed at a second ratio.

[0058] When reading compressed data stored in volatile memory 140, control operation circuit 134 can determine the selection area for searching logical information based on the size of the selected compressed data, i.e., based on the compression ratio of the compressed data. In other words, when the selected compressed data has a first size, control operation circuit 134 can determine that the compressed data is compressed at a first ratio and search for logical information in the first selection area. Conversely, when the selected compressed data has a second size smaller than the first size, control operation circuit 134 can determine that the compressed data is compressed at a second ratio and search for logical information in the second selection area.

[0059] The control operation circuit 134 can set some of the currently available free areas as management areas to store free area information about the free areas in the first physical area 141 that can store data. Additionally, the control operation circuit 134 can check the number of currently available free areas in the first physical area 141 and change the number of areas in the currently available free areas to be set as management areas based on the checked number of currently available free areas. Therefore, the control operation circuit 134 can use a variable number of free areas from the currently available free areas to store free area information, and set the remaining number of free areas in the currently available free areas (excluding the variable number of free areas) as a first storage area or a second storage area, and use the first storage area or the second storage area to store first compressed data or second compressed data.

[0060] According to the embodiment, all eight physical regions PB<0:7> divided into the first physical region 141 can be vacant regions. In this case, the control operation circuit 134 can set two of the eight vacant regions as managed regions and store vacant region information about the remaining six vacant regions in the two physical regions set as managed regions.

[0061] According to another embodiment, the first compressed data or the second compressed data is stored in four of the eight physical regions PB<0:7> divided into a first physical region 141, which are designated as the first storage region or the second storage region, and only four of the physical regions are free regions. In this case, the control operation circuit 134 can set one of the four free regions as the management region, and then store the free region information about the three free regions in one of the physical regions included in the management region.

[0062] Subsequently, the control operation circuit 134 can manage some physical regions in the first physical region 141 that are set as management regions in the form of a linked list.

[0063] According to the embodiment, when two physical regions in the first physical region 141 are set as management regions, the control operation circuit 134 can set one of the two physical regions set as the head, set the other physical region as the tail, set the next information NEXT of the head to point to the tail, and set the 'null' value in the next information of the tail to indicate that there is no next region.

[0064] According to another embodiment, when a physical region in the first physical region 141 is set as a management region, the control operation circuit 134 can set the physical region set as a head / tail and set a 'null' value in the next information to indicate that there is no next region.

[0065] Figures 2A to 2G This is a diagram illustrating the operation of a storage device according to a first embodiment of the present disclosure in storing compressed data in internal volatile memory and managing the stored compressed data.

[0066] Reference Figures 2A to 2G This can be described as the operation of the control circuit 134 in storing and managing compressed data in the volatile memory 140 without using the free area queue 136.

[0067] It can be seen that, Figures 2A to 2G Only shown Figures 1A to 1C The data processing system shown includes a volatile memory 140 and a host computer 102 in its storage device 110. That is, it can be seen that, as will be noted below... Figures 2A to 2G The operation of the described storage device 110 is based on references 1A to 1B. Figure 1C The configuration of the storage device 110 is described.

[0068] exist Figures 2A to 2G In this volatile memory 140, there are 12 physical regions PB<0:11>. Eight of these PB<0:7> are designated as the first physical region 141, and the remaining four PB<8:11> are designated as the second physical region 142. Each of the 12 physical regions PB<0:11> in the volatile memory 140 includes four storage spaces. This is merely an example for ease of description; in practice, different numbers of physical regions and storage spaces can be configured.

[0069] Reference Figure 2A This shows the initialization state of storage device 110. The initialization state of storage device 110 can refer to the state where there is no compressed data stored in volatile memory 140.

[0070] Specifically, in the initialization state, the control operation circuit 134 included in the controller 130 can divide the multiple physical regions PB<0:11> included in the volatile memory 140 into a first physical region 141 and a second physical region 142.

[0071] Subsequently, the control operation circuit 134 can check the number of currently free areas included in the first physical area 141, and set some of the currently free areas as managed areas based on the check results.

[0072] As can be seen in the attached diagram, among the eight physical regions PB<0:7> included in the first physical region 141, two physical regions PB<0:1> are set as managed regions, and the remaining six physical regions PB<2:7> are unused regions.

[0073] However, prior to the illustrated state, i.e., before the two physical regions PB<0:1> are set as managed regions, all eight physical regions PB<0:7> included in the first physical region 141 can be idle regions. In this state, the control operation circuit 134 can set the two physical regions PB<0:1> as managed regions, generate idle region information indicating that the remaining six physical regions PB<2:7> are idle regions, and store the generated idle region information in the two physical regions PB<0:1> that are set as managed regions.

[0074] Furthermore, the control operation circuit 134 can manage the two physical regions PB<0:1> that are set as management areas in the form of a linked list. In the two physical regions PB<0:1> set as management areas, the control operation circuit 134 can set the first management area PB0 as the head HEAD and the second management area PB1 as the tail TAIL. In the next information NEXT of the first management area PB0, which is the head HEAD, the second management area PB1 is set, and in the next information NEXT of the second management area PB1, which is the tail TAIL, a 'null' value is set to indicate that there is no next area.

[0075] In the attached diagram, since the two physical regions PB<0:1> designated as the management area are managed in a linked list format, it can be seen that the free area information indicating the three free areas is stored in three of the four storage spaces included in each of the two physical regions PB<0:1>, and the remaining storage space is used to store the next information NEXT. Therefore, it can be seen that the six free area information entries are divided into three information entries FBL.<PB2:4> And three pieces of information FBL<PB5:7> And three pieces of information FBL<PB2:4> And three pieces of information FBL<PB5:7> They are stored in two physical regions PB<0:1> that are set as management regions, respectively.

[0076] Since no compressed data is stored in the first physical region 141, the control operation circuit 134 does not need to store any logic data in the second physical region 142.

[0077] Reference Figure 2B It can be seen that in Figure 2A After the storage device 110 is initialized, how does the storage device 110 manage the first write data NM_DATA1 generated in the host 102?

[0078] Specifically, the compression operation circuit 132 included in the controller 130 can generate first compressed data COMP_DATA1<0:7> by compressing the first write data NM_DATA1 sent from the host 102 at a first ratio.

[0079] Subsequently, the control operation circuit 134 included in the controller 130 can refer to the free area information stored in the management area to store the first compressed data COMP_DATA1<0:7> in the volatile memory 140, and set two areas PB<2:3> of the six free areas PB<2:7> included in the first physical area 141 as the first storage area. That is, the control operation circuit 134 can check that the first compressed data COMP_DATA1<0:7> includes 8 partial data (i.e., check that it is greater than 4 and equal to or less than 8), and then set two areas PB<2:3> of the currently free area PB<2:7> in the first physical area 141 as the first storage area.

[0080] Additionally, the control operation circuit 134 can store the first compressed data COMP_DATA1<0:7> in the first storage area PB<2:3>. That is, the control operation circuit 134 can store the eight portions of data COMP_DATA1 included in the first compressed data COMP_DATA1<0:7>. <0> COMP_DATA1 <1> COMP_DATA1 <2> COMP_DATA1 <3> COMP_DATA1 <4> COMP_DATA1 <5> COMP_DATA1 <6> and COMP_DATA1 <7> The data is divided into four parts, COMP_DATA1<0:3> and COMP_DATA1<4:7>, and stored in two regions PB<2:3>, which are set as the first storage region.

[0081] Additionally, the control operation circuit 134 can store the first compressed data COMP_DATA1<0:7> in the first storage area, and then retrieve the information FBL corresponding to the first storage area from the free area information in the management area.<PB2:3> Invalid. That is, the control operation circuit 134 can store the information FBL in two of the six storage spaces corresponding to the first storage area and stored in the two physical areas PB<0:1>.<PB2:3> Invalid, where two physical regions PB<0:1> are set as management regions to store free region information. According to one embodiment, invalidating information stored in the storage space can be an operation of overwriting a value written to the storage space with a specific value (e.g., a 'null' value). According to another embodiment, invalidating information stored in the storage space can be an operation that instructs the value in the storage space to be invalid so that other data or information can be overwritten later.

[0082] Additionally, the control operation circuit 134 can generate first logic information LOI1 indicating that the two regions PB<2:3> are set as the first storage region.<PB2:3> and the first logical information LOI1<PB2:3> The first selection area PB8 is stored in the second physical region 142. That is, the control operation circuit 134 can store the first logic information LOI1.<PB2:3> The information includes two parts: LOI1 <pb2>With LOI1 <pb3>They are stored in two of the four storage spaces included in the first selection area PB8.

[0083] Reference Figure 2C It can be seen that, Figure 2B After the first write data NM_DATA1 generated in the host 102 is stored in the first storage area PB<2:3> of the volatile memory 140 as the first compressed data COMP_DATA1<0:7> compressed at the first ratio, how is the second write data NM_DATA2 generated in the host 102 managed in the storage device 110?

[0084] Specifically, the compression operation circuit 132 included in the controller 130 can generate second compressed data COMP_DATA2<0:3> by compressing the second write data NM_DATA2 sent from the host 102 at a second ratio. In this case, based on the fact that the first compressed data COMP_DATA1<0:7> obtained by compressing the first write data NM_DATA1 at a first ratio includes eight parts of data and the second compressed data COMP_DATA2<0:3> obtained by compressing the second write data NM_DATA2 at a second ratio includes four parts of data, it can be seen that the compression ratio of the second ratio is higher than the compression ratio of the first ratio.

[0085] Subsequently, in order to store the second compressed data COMP_DATA2<0:3> in the volatile memory 140, the control operation circuit 134 included in the controller 130 can refer to the valid information FBL in the free area information stored in the two physical areas PB<0:1> that are set as the management area.<PB4:7> The control operation circuit 134 sets PB4, one of the four free areas PB<4:7> included in the first physical region 141, as the second storage region. That is, the control operation circuit 134 can detect that the second compressed data COMP_DATA2<0:3> includes four parts of data (i.e., detect that it is less than or equal to 4), and then set PB4, one of the currently free areas PB<4:7> in the first physical region 141, as the second storage region.

[0086] Additionally, the control operation circuit 134 can store the second compressed data COMP_DATA2<0:3> in the second storage area PB4. That is, the control operation circuit 134 can store the four parts of the second compressed data COMP_DATA2<0:3>, including COMP_DATA2... <0> COMP_DATA2 <1> COMP_DATA2 <2> COMP_DATA2 <3> It is stored in region PB4, which is set as the second storage region.

[0087] Additionally, the control operation circuit 134 can store the second compressed data COMP_DATA2<0:3> in the second storage area, and then retrieve the information FBL corresponding to the second storage area from the free area information in the management area. <pb4>Invalid. That is, the control operation circuit 134 can store the information FBL in one of the six storage spaces corresponding to the second storage area and stored in the two physical areas PB<0:1>. <pb4>Invalid, where two physical regions PB<0:1> are set as management regions to store free region information. In this case, Figure 2B In the two physical regions PB<0:1> designated as management areas, the information FBL corresponding to the first storage region is located in one of the six storage spaces set up to store free area information.<PB2:3> Invalidated. Therefore, in Figure 2C In the FBL, all information corresponding to the first and second storage areas.<PB2:4> Both can be invalidated, information FBL<PB2:4> It is stored in three of the six storage spaces set up in two physical regions PB<0:1>, where the two physical regions PB<0:1> are set up as management regions to store free area information.

[0088] Additionally, the control operation circuit 134 can generate second logic information LOI2 indicating that a region PB4 is set as the second storage region. <pb4>and the second logical information LOI2 <pb4>The second selected area PB9 is stored in the second physical region 142. That is, the second logical information LOI2 indicates that a region PB4 is set as the second storage region. <pb4>It can be stored in one of the four storage spaces included in the second selection area PB9.

[0089] In this case, although reference Figure 2B The first selection region PB8, as described, only stores the first logical information LOI1.<PB2:3> And both storage spaces are empty, but in Figure 2C Lieutenant General's Second Logical Information LOI2 <pb4>The reason for storing it in the second selection area PB9 is that it is stored in the first logical information LOI1.<PB2:3> The first compressed data COMP_DATA1<0:7> in the indicated first storage area PB<2:3> is obtained by compressing the first written data NM_DATA1 at a first ratio, and is stored in the second logical information LOI2. <pb4>The second compressed data COMP_DATA2<0:3> in the indicated second storage area PB4 is obtained by compressing the second write data NM_DATA2 at the second ratio.

[0090] In other words, the control operation circuit 134 can distinguish the area used to store logical information indicating compressed data based on the compression ratio of the write data used to generate compressed data. That is, unlike the attached figure, when the second compressed data COMP_DATA2<0:3> is obtained by compressing the second write data NM_DATA2 at the first ratio, the second logical information LOI2 indicating the second compressed data COMP_DATA2<0:3>... <pb4>It can be stored in the first selected area PB8.

[0091] Reference Figure 2D and Figure 2E It can be seen that, Figure 2B and Figure 2C After the first compressed data COMP_DATA1<0:7> and the second compressed data COMP_DATA2<0:3> are stored in the first and second storage areas PB<2:4> of the volatile memory 140, how to manage the storage of invalid information FBL in the free area information in the two physical areas PB<0:1> set as management areas.<PB2:4> The region PB0.

[0092] First, refer to Figure 2D After the first compressed data COMP_DATA1<0:7> and the second compressed data COMP_DATA2<0:3> are stored in the first and second storage areas PB<2:4> of the volatile memory 140, the information FBL corresponding to the first and second storage areas is...<PB2:4> It can be invalidated in the management area and can be excluded from management in the free area information. This can refer to all three information FBLs stored in the first management area PB0, which is set as the header HEAD, out of the two physical areas PB<0:1> that are set as management areas.<PB2:4> All of them were invalid.

[0093] In this case, the control operation circuit 134 can set the second management area PB1 (i.e., the physical area PB1 set as the tail TAIL in the figure) as the new head head in the next information NEXT of the first management area PB0, which is already set as the tail head. In this way, when the second management area PB1, which has already been set as the tail TAIL, is set as the head head, the second management area PB1 can be set as both the head head and the tail TAIL at the same time.

[0094] Furthermore, the control operation circuit 134 can invalidate the next information (NEXT) of the first management area PB0 when the second management area PB1 is simultaneously set as both HEAD and TAIL. In other words, the control operation circuit 134 can invalidate all data or information stored in the four storage spaces included in the first management area PB0.

[0095] Reference Figure 2E After invalidating all data or information stored in the four storage spaces included in the first management area PB0, the control operation circuit 134 can switch the first management area PB0 to an idle area and put the idle area into the idle area information.

[0096] Specifically, after switching the first management area PB0 to an idle area, the control operation circuit 134 can check the information FBL corresponding to the idle area. <pb0>Whether it can be stored in the management area and placed in the free area information, i.e., information FBL. <pb0>Can it be stored in a second management area PB1 that is simultaneously set as both HEAD and TAIL?

[0097] As shown in the figure, when there is no remaining storage space in the second management area PB1, the control operation circuit 134 can check the information FBL corresponding to the new free area PB0. <pb0>It cannot be stored in the second management area PB1. Therefore, the control operation circuit 134 can refer to the free area information stored in the second management area PB1, put a free area PB5 into the management area as the third management area, and manage the already included second management area PB1 and third management area PB5 in the form of a linked list. That is to say, the control operation circuit 134 can use the information FBL corresponding to the new free area PB0. <pb0>The information FBL will be stored in the newly included third management area PB5 within the management area. <pb0>The information is placed in the idle area information. The third management area PB5 is set in the next information NEXT of the second management area PB1. Then, the 'null' value, indicating that there is no next area, is set in the next information NEXT of the third management area PB5. Thus, the control operation circuit 134 can set only the head (HEAD) of the second management area PB1, which is simultaneously set as both the head and tail (TAIL), and set the newly added third management area PB5 as the tail (TAIL).

[0098] Additionally, the control operation circuit 134 can store the information FBL in the free area information in the second management area PB1 that corresponds to the newly included third management area PB5 in the management area. <pb5>Invalid. That is, the control operation circuit 134 can only access one piece of information FBL from the free area information stored in the second management area PB1. <pb5>Invalid. Switch the first management area PB0 to an idle area and generate the information FBL. <pb0>Stored in the newly included third management area PB5 within the management area, and the information FBL... <pb0>Place it in the free area information.

[0099] Unlike the attached diagram, when there is remaining storage space in the second management area PB1, the control operation circuit 134 can transmit the information FBL corresponding to the new free area PB0. <pb0>The information is stored in the remaining storage space of the second management area PB1, and the information is FBL. <pb0>This information is placed in the free area information. In other words, the second management area PB1 can continue to be set as HEAD and TAIL.

[0100] Since the accompanying drawings show that the management area includes two physical areas PB<0:1>, when the first management area PB0, which is set as the head, is invalidated, the second management area PB1 can be simultaneously set as both the head and the tail. According to an embodiment, unlike the accompanying drawings, when the management area includes three or more physical areas, even if the physical area set as the head is invalidated, the physical area set as the head and the physical area set as the tail can be divided into different areas. According to another embodiment, unlike the accompanying drawings, when the management area includes only one physical area simultaneously set as both the head and the tail, when the physical area is invalidated, a remaining physical area can be switched to an idle area by releasing the management area and not managing idle area information.

[0101] Reference Figure 2F It can be seen that, in reference Figure 2E Following the described state, how does the control operation circuit 134 respond to the request to send the first logic information LOI1?<PB2:3> The operation was performed using an invalid command.

[0102] Specifically, refer to Figure 2E The described state can refer to the following state: the first compressed data COMP_DATA1<0:7> is stored in the first storage area PB<2:3> of the volatile memory 140, and the first logical information LOI1<PB2:3> It is stored in the first selected area PB8, and the managed area includes two physical areas PB<1, 5>.

[0103] In this state, in order to invalidate the first compressed data COMP_DATA1<0:7> stored in the volatile memory 140, the host 102 can generate a request to invalidate the first logical information LOI1.<PB2:3> An invalid command is received, and the generated command is sent to the control operation circuit 134 of the controller 130. In response to the request, the first logic information LOI1 is sent.<PB2:3> An invalid command will cause the control circuit 134 to store the first logic information LOI1 in the first selection area PB8.<PB2:3> invalid.

[0104] In this case, because the control operation circuit 134 uses the first logic information LOI1<PB2:3> A read operation is performed on the first compressed data COMP_DATA1<0:7>, and the first logical information LOI1 is stored in the first selected area PB8.<PB2:3> Invalidated, so that it is stored in the first logical information LOI1.<PB2:3> The first compressed data COMP_DATA1<0:7> in the two physical regions PB<2:3> of the first storage region can also be invalidated.

[0105] Additionally, the control operation circuit 134 can respond to a request to send the first logic information LOI1.<PB2:3> An invalid command invalidates the first selected region PB8 and the first compressed data COMP_DATA1<0:7>, switches the first storage region PB<2:3> containing the first compressed data COMP_DATA1<0:7> to an empty region, and removes the information FBL corresponding to the first storage region PB<2:3>.<PB2:3> Stored in the third management area PB5, which is set as the management area, and the information FBL<PB2:3> Place it in the free area information.

[0106] Reference Figure 2G It can be seen that, in reference Figure 2E Following the described state, how does the control operation circuit 134 respond to the request to send the second logic information LOI2? <pb4>The operation was performed using an invalid command.

[0107] Specifically, refer to Figure 2E The described state can refer to the following state: the second compressed data COMP_DATA2<0:3> is stored in the second storage area PB4 of the volatile memory 140, and the second logical information LOI2... <pb4>It is stored in the second selection area PB9, and the management area includes two physical areas PB<1, 5>.

[0108] In this state, in order to invalidate the second compressed data COMP_DATA2<0:3> stored in the volatile memory 140, the host 102 can generate a request to invalidate the second logical information LOI2. <pb4>An invalid command is received, and the generated command is sent to the control operation circuit 134 of the controller 130. In response to the request, the second logic information LOI2 is sent. <pb4>An invalid command will cause the control circuit 134 to store the second logic information LOI2 in the second selection area PB9. <pb4>invalid.

[0109] In this case, because the control operation circuit 134 uses the second logic information LOI2 <pb4>A read operation is performed on the second compressed data COMP_DATA2<0:3>, and the second logical information LOI2 is stored in the second selection area PB9. <pb4>Invalidated, so that it is stored in the second logical information LOI2. <pb4>The second compressed data COMP_DATA2<0:3> in a physical region PB4 of the indicated second storage area can also be invalidated.

[0110] Additionally, the control operation circuit 134 can respond to a request to send the second logic information LOI2. <pb4>An invalid command invalidates the second selection area PB9 and the second compressed data COMP_DATA2<0:3>, switches the second storage area PB4, which stores the second compressed data COMP_DATA2<0:3>, to an empty area, and removes the information FBL corresponding to the second storage area PB4. <pb4>Stored in the third management area PB5, which is set as the management area, and the information FBL <pb4>Place it in the free area information.

[0111] Figures 3A to 3I This is a diagram illustrating the operation of a storage device according to a second embodiment of the present disclosure in storing compressed data in internal volatile memory and managing the stored compressed data.

[0112] Reference Figures 3A to 3I The operation of control circuitry 134 in storing and managing compressed data in volatile memory 140 while using free area queue 136 can be described. In this case, control circuitry 134 can use free area queue 136 while it is stored in an allocated area of ​​internal memory 137. Specifically, internal memory 137 included in control circuitry 134 can be a memory with a relatively faster operating speed than volatile memory 140. For example, when volatile memory 140 is DRAM, internal memory 137 included in control circuitry 134 can be SRAM.

[0113] It can be seen that, Figures 3A to 3I Only shown Figures 1A to 1C The data processing system shown includes volatile memory 140 in storage device 110 and host 102. That is, it can be seen that, as will be noted below... Figures 3A to 3I The operation of the described storage device 110 is based on references 1A to 1B. Figure 1C The configuration of the storage device 110 is described.

[0114] In addition, Figures 3A to 3I In this volatile memory 140, there are 12 physical regions PB<0:11>. Eight of these PB<0:7> are designated as the first physical region 141, and the remaining four PB<8:11> are designated as the second physical region 142. Furthermore, each of the 12 physical regions PB<0:11> in the volatile memory 140 includes four storage spaces. This is merely an example for ease of description; in practice, different numbers of physical regions and storage spaces can be configured.

[0115] Reference Figure 3A This shows the initialization state of storage device 110. In this case, the initialization state of storage device 110 may refer to the state where there is no compressed data stored in volatile memory 140.

[0116] Specifically, in the initialization state, the control operation circuit 134 included in the controller 130 divides the multiple physical regions PB<0:11> included in the volatile memory 140 into a first physical region 141 and a second physical region 142.

[0117] Subsequently, the control operation circuit 134 can check the number of currently free areas included in the first physical area 141, and set some of the currently free areas as managed areas based on the check results.

[0118] As can be seen in the attached diagram, among the eight physical regions PB<0:7> included in the first physical region 141, two physical regions PB<0,4> are set as managed regions, and the remaining six physical regions PB<1:3,5:7> are unused regions.

[0119] However, prior to the illustrated state, i.e., before the two physical regions PB<0,4> are set as managed regions, all eight physical regions PB<0:7> included in the first physical region 141 can be idle regions. In this state, the control operation circuit 134 can set the two physical regions PB<0,4> as managed regions, generate idle region information indicating that the remaining six physical regions PB<1:3,5:7> are idle regions, and store the generated idle region information in the two physical regions PB<0,4> that are set as managed regions.

[0120] Furthermore, the control operation circuit 134 can manage the two physical regions PB<0, 4> that are set as management areas in the form of a linked list. That is, in the two physical regions PB<0, 4> that are set as management areas, the control operation circuit 134 can set the first management area PB0 as the head HEAD and the second management area PB4 as the tail TAIL. In the next information NEXT of the first management area PB0, which is the head HEAD, the second management area PB4 is set, and in the next information NEXT of the second management area PB4, which is the tail TAIL, a 'null' value is set to indicate that there is no next area.

[0121] In the attached diagram, since the two physical regions PB<0,4> designated as the management area are managed in a linked list format, it can be seen that the free area information indicating the three free areas is stored in three of the four storage spaces included in each of the two physical regions PB<0,4>, and the remaining storage space is used to store the next information NEXT. Therefore, it can be seen that the six free area information entries are divided into three information entries FBL.<PB1:3> And three pieces of information FBL<PB5:7> And three pieces of information FBL<PB1:3> And three pieces of information FBL<PB5:7> They are stored in two physical regions PB<0,4> that are set as management regions, respectively.

[0122] Since no compressed data is stored in the first physical region 141, the control operation circuit 134 does not need to store any logic data in the second physical region 142.

[0123] Reference Figure 3B It can be seen that, Figure 3A After the free area information is stored in the management area of ​​the volatile memory 140, some of the free area information is moved to the free area queue 136 allocated to the internal memory 137 for management.

[0124] Specifically, the control operation circuit 134 can select a portion of the free area information managed in the management area of ​​the volatile memory 140 and move the selected information to the free area queue 136 allocated to the internal memory 137.

[0125] In addition, the control operation circuit 134 can move part of the information in the free area information managed in the management area to the free area queue 136 allocated to the internal memory 137, switch the physical area in the first physical area 141 that was set as a management area and stored part of the free area information to a free area, and move the information about the switched free area to the free area queue 136 for management.

[0126] According to an embodiment, as shown in the figure, the control operation circuit 134 can transfer a portion of the information FBL from the idle area information.<PB1:3> Moved to idle area queue 136 for management, where some information FBL is included.<PB1:3> The first management region PB0, which is set as the head, is stored in one of the two physical regions PB<0, 4> that are set as management regions. In this case, the control operation circuit 134 can set the second management region PB4 (i.e., the physical region PB4 set as the tail in the figure) set in the next information NEXT of the first management region PB0, which is set as the head, as the new head. In this way, when the second management region PB4, which has already been set as the tail, is set as the head, the second management region PB4 can be set as both the head and the tail. In addition, the control operation circuit 134 can store a portion of the free area information FBL stored in the first management region PB0.<PB1:3> Move to the free area queue 136, switch the first management area PB0 to a free area, and send the information about the area PB0 that has been switched to a free area to FBL. <pb0>Move it to the free area queue 136, then add the information FBL. <pb0>With some information FBL<PB1:3> Manage them together.

[0127] Reference Figure 3C It can be seen that, in reference Figure 3B Following the described state, how does storage device 110 manage the first write data NM_DATA1 generated in host 102?

[0128] Specifically, the compression operation circuit 132 included in the controller 130 can generate first compressed data COMP_DATA1<0:7> by compressing the first write data NM_DATA1 sent from the host 102 at a first ratio.

[0129] Subsequently, the control operation circuit 134 included in the controller 130 can refer to the free area queue 136 and the managed free area information in the management area to store the first compressed data COMP_DATA1<0:7> in the volatile memory 140, and set two areas PB<0:1> of the seven free areas PB<0:3, 5:7> included in the first physical area 141 as the first storage area. That is, the control operation circuit 134 can check that the first compressed data COMP_DATA1<0:7> includes 8 partial data (i.e., check that it is greater than 4 and equal to or less than 8), and then set two areas PB<0:1> of the current free areas PB<0:3, 5:7> in the first physical area 141 as the first storage area.

[0130] Additionally, the control operation circuit 134 can store the first compressed data COMP_DATA1<0:7> in the first storage area PB<0:1>. That is, the control operation circuit 134 can store the eight parts of data COMP_DATA1 included in the first compressed data COMP_DATA1<0:7>. <0> COMP_DATA1 <1> COMP_DATA1 <2> COMP_DATA1 <3> COMP_DATA1 <4> COMP_DATA1 <5> COMP_DATA1 <6> and COMP_DATA1 <7> The data is divided into four parts, COMP_DATA1<0:3> and COMP_DATA1<4:7>, and stored in two regions PB<0:1>, which are set as the first storage region.

[0131] Additionally, the control operation circuit 134 can store the first compressed data COMP_DATA1<0:7> in the first storage area, and then retrieve the information FBL corresponding to the first storage area from the free area queue 136 and the management area.<PB0:1> Invalid. That is, the control operation circuit 134 can transfer the information corresponding to the first storage area from the free area queue 136 and the free area information managed in the management area to the FBL.<PB0:1> Invalid. According to an embodiment, as shown in the figure, when the information FBL corresponding to the first storage area...<PB0:1> When stored in the free area queue 136, the control operation circuit 134 can delete the information FBL from the free area queue 136.<PB0:1> FBL information<PB0:1> Invalid. According to another embodiment, unlike the figures, when information corresponding to the first storage area is stored in the storage space included in the management area of ​​the volatile memory 140, the operation of invalidating the information stored in the storage space can be an operation of overwriting the value written to the storage space with a specific value (e.g., a 'null' value), or an operation of indicating that the value of the storage space is invalid so that other data or information can be overwritten later.

[0132] Additionally, the control operation circuit 134 can generate first logic information LOI1 indicating that the two regions PB<0:1> are set as the first storage region.<PB0:1> and the first logical information LOI1<PB0:1> The first selection area PB8 is stored in the second physical region 142. That is, the control operation circuit 134 can store the first logic information LOI1.<PB0:1> The information includes two parts: LOI1 <pb0>With LOI1 <pb1>They are stored in two of the four storage spaces included in the first selection area PB8.

[0133] Reference Figure 3D It can be seen that, Figure 3C After the first write data NM_DATA1 generated in the host 102 is stored in the first storage area PB<0:1> of the volatile memory 140 as the first compressed data COMP_DATA1<0:7> compressed at the first ratio, how to manage the second write data NM_DATA2 generated in the host 102 in the storage device 110.

[0134] Specifically, the compression operation circuit 132 included in the controller 130 can generate second compressed data COMP_DATA2<0:3> by compressing the second write data NM_DATA2 sent from the host 102 at a second ratio. In this case, based on the fact that the first compressed data COMP_DATA1<0:7> obtained by compressing the first write data NM_DATA1 at a first ratio includes eight parts of data and the second compressed data COMP_DATA2<0:3> obtained by compressing the second write data NM_DATA2 at a second ratio includes four parts of data, it can be seen that the compression ratio of the second ratio is higher than the compression ratio of the first ratio.

[0135] Subsequently, in order to store the second compressed data COMP_DATA2<0:3> in the volatile memory 140, the control operation circuit 134 included in the controller 130 can refer to the free area queue 136 and the free area information managed in the management area, and set one of the five free areas PB<2:3,5:7> included in the first physical area 141, PB2, as the second storage area. That is, the control operation circuit 134 can check that the second compressed data COMP_DATA2<0:3> includes four parts of data (i.e., check that it is less than or equal to 4), and then set one of the currently free areas PB<2:3,5:7> in the first physical area 141, PB2, as the second storage area.

[0136] Additionally, the control operation circuit 134 can store the second compressed data COMP_DATA2<0:3> in the second storage area PB2. That is, the control operation circuit 134 can store the four parts of the second compressed data COMP_DATA2<0:3>, including COMP_DATA2... <0> COMP_DATA2 <1> COMP_DATA2 <2> COMP_DATA2 <3> It is stored in a region PB2 that is set as the second storage region.

[0137] Additionally, the control operation circuit 134 can store the second compressed data COMP_DATA2<0:3> in the second storage area, and then retrieve the information FBL corresponding to the second storage area from the free area queue 136 and the free area information in the management area. <pb2>Invalid. That is, the control operation circuit 134 can transfer the information corresponding to the second storage area from the free area queue 136 and the managed free area information in the management area to the FBL. <pb2>invalid.

[0138] In this case, Figure 3C In the free area queue 136 and the free area information managed in the management area, the information FBL corresponding to the first storage area is...<PB0:1> It has been invalidated. Therefore, in Figure 3D In the free area queue 136 and the free area information managed in the management area, there is all the information corresponding to the first and second storage areas (FBL).<PB0:2> Both can be invalidated. According to an embodiment, as shown in the figure, when the information FBL corresponding to the first storage area and the second storage area...<PB0:2> When stored in the free area queue 136, the control operation circuit 134 can delete the information FBL from the free area queue 136.<PB0:2> FBL information<PB0:2> invalid.

[0139] Additionally, the control operation circuit 134 can generate a second logic information LOI2 indicating that a region PB2 is set as the second storage region. <pb2>and the second logical information LOI2 <pb2>The second selected area PB9 is stored in the second physical region 142. That is, the second logical information LOI2 indicates that a region PB2 is set as the second storage region. <pb2>It can be stored in one of the four storage spaces included in the second selection area PB9.

[0140] In this case, although reference Figure 3C The first selection region PB8, as described, only stores the first logical information LOI1.<PB0:1> And both storage spaces are empty, but in Figure 3D Lieutenant General's Second Logical Information LOI2 <pb2>The reason for storing it in the second selection area PB9 is that it is stored in the first logical information LOI1.<PB0:1> The first compressed data COMP_DATA1<0:7> in the indicated first storage area PB<0:1> is obtained by compressing the first written data NM_DATA1 at a first ratio, and is stored in the second logical information LOI2. <pb2>The second compressed data COMP_DATA2<0:3> in the indicated second storage area PB2 is obtained by compressing the second write data NM_DATA2 at the second ratio.

[0141] In other words, the control operation circuit 134 can distinguish the area used to store logical information indicating compressed data based on the compression ratio of the write data used to generate compressed data. That is, unlike the attached figure, when the second compressed data COMP_DATA2<0:3> is obtained by compressing the second write data NM_DATA2 at the first ratio, the second logical information LOI2 indicating the second compressed data COMP_DATA2<0:3>... <pb2>It can be stored in the first selected area PB8.

[0142] Reference Figure 3E It can be seen that, in reference Figure 3D After the described state, some of the free area information stored in the management area of ​​volatile memory 140 is moved to the free area queue 136 allocated to internal memory 137 for management.

[0143] Specifically, the control operation circuit 134 can select a portion of the free area information managed in the management area of ​​the volatile memory 140 and move the selected information to the free area queue 136 allocated to the internal memory 137.

[0144] In addition, the control operation circuit 134 can move part of the information in the free area information managed in the management area to the free area queue 136 allocated to the internal memory 137, switch the physical area in the first physical area 141 that was set as a management area and stored part of the free area information to a free area, and move the information about the switched free area to the free area queue 136 for management.

[0145] According to an embodiment, as shown in the figure, the control operation circuit 134 can transfer a portion of the information FBL from the idle area information.<PB5:7> Moved to idle area queue 136 for management, where some information FBL is included.<PB5:7> It is stored in the second management area PB4, which is set as the management area. In this case, the control operation circuit 134 can check that the next information NEXT of the second management area PB4, which is simultaneously set as HEAD and TAIL in the management area, is set to 'null', and release the management area from the volatile memory 140.

[0146] Additionally, the control operation circuit 134 can store a portion of the free area information FBL in the second management area PB4.<PB5:7> Move to the free area queue 136, switch the second management area PB4 to a free area, and send the information about the area PB4 that has been switched to a free area to FBL. <pb4>Move it to the free area queue 136, then add the information FBL. <pb4>With some information FBL<PB5:7> Manage them together.

[0147] Therefore, the control operation circuit 134 can be in Figure 3E The information FBL that was moved to the free area queue 136 was moved to the free area queue.<PB4:7> As information about the free area and in Figure 3E The remaining information FBL in the previously free area queue 136 <pb3>Manage them together.

[0148] Reference Figure 3F It can be seen that, in reference Figure 3E Following the described state, how does the control operation circuit 134 respond to the request to send the first logic information LOI1?<PB0:1> The operation was performed using an invalid command.

[0149] Specifically, refer to Figure 3E The described state can refer to the following state: the first compressed data COMP_DATA1<0:7> is stored in the first storage area PB<0:1> of the volatile memory 140, and the first logical information LOI1<PB0:1> The management area of ​​the volatile memory 140 is released and the free area information is stored in the free area queue 136. The free area information is stored in the first selection area PB8.

[0150] In this state, in order to invalidate the first compressed data COMP_DATA1<0:7> stored in the volatile memory 140, the host 102 can generate a request to invalidate the first logical information LOI1.<PB0:1> An invalid command is received, and the generated command is sent to the control operation circuit 134 of the controller 130. In response to the request, the first logic information LOI1 is sent.<PB0:1> An invalid command will cause the control circuit 134 to store the first logic information LOI1 in the first selection area PB8.<PB0:1> invalid.

[0151] In this case, because the control operation circuit 134 uses the first logic information LOI1<PB0:1> A read operation is performed on the first compressed data COMP_DATA1<0:7>, and the first logical information LOI1 is stored in the first selected area PB8.<PB0:1> Invalidated, so that it is stored in the first logical information LOI1.<PB0:1> The first compressed data COMP_DATA1<0:7> in the two physical regions PB<0:1> of the first storage region can also be invalidated.

[0152] Additionally, the control operation circuit 134 can respond to a request to send the first logic information LOI1.<PB0:1> An invalid command invalidates the first selected region PB8 and the first compressed data COMP_DATA1<0:7>, switches the first storage region PB<0:1> containing the first compressed data COMP_DATA1<0:7> to an empty region, and removes the information FBL corresponding to the first storage region PB<0:1>.<PB0:1> Stored in the free area queue 136, and the information FBL is sent.<PB0:1> Place it in the free area information.

[0153] Therefore, in the free area queue 136, in Figure 3F The information FBL that was moved to the free area queue 136 was moved to the free area queue.<PB0:1> It can be used as information about free areas and in Figure 3F The remaining information FBL in the previously free area queue 136<PB3:7> They manage it together. In this case, Figure 3F The remaining information FBL in the previously free area queue 136<PB3:7> It can be arranged as more than in Figure 3F The information FBL was then moved to queue 136 in the free area.<PB0:1> It has a higher reference priority.

[0154] Reference Figure 3G As can be seen, some of the free area information stored in the free area queue 136 is moved to the management area of ​​the volatile memory 140 for management.

[0155] Specifically, the internal memory 137 included in the control operation circuit 134 can have a relatively small storage space but a faster operating speed than the volatile memory 140. Therefore, when the size of the free area queue 136 allocated to the internal memory 137 exceeds a suitable size, the free area information stored in the free area queue 136 can be moved to the management area of ​​the volatile memory 140 for management.

[0156] More specifically, in Figure 3F Then, all free area information can be stored in the free area queue 136. Additionally, the managed area can be released from the volatile memory 140.

[0157] In this state, the control operation circuit 134 can set some of the first physical area 141 of the volatile memory 140 as management areas, and then move some of the free area information stored in the free area queue 136 for management.

[0158] According to an embodiment, in Figure 3F Subsequently, the free region information of a total of seven free regions PB<3:7,0:1> can be stored in the free region queue 136. The control operation circuit 134 can refer to the free region information stored in the free region queue 136 and store the seven information FBL in the volatile memory 140.<PB3:7,0:1> One message from FBL <pb3>The corresponding physical region PB3 is set as the management region. In this case, a physical region PB3 that is set as the management region can be set as HEAD and TAIL, and can be set to 'null' in the next message NEXT.

[0159] Subsequently, the control operation circuit 134 can refer to the free area information stored in the free area queue 136 and select three of the six information FBL<4:7,0:1> from the FBL queue.<PB4:6> Move the data to a physical region PB3 that has been designated as the management region and store three pieces of information FBL.<PB4:6> And only the remaining three FBL messages are managed in the free area queue 136.<PB7,0:1> .

[0160] Reference Figure 3H It can be seen that, in reference Figure 3E Following the described state, how does the control operation circuit 134 respond to the request to send the second logic information LOI2? <pb2>The operation was performed using an invalid command.

[0161] Specifically, refer to Figure 3E The described state can refer to the following state: the second compressed data COMP_DATA2<0:3> is stored in the second storage area PB of the volatile memory 140. <2> In the middle, the second logical information LOI2 <pb2>The management area of ​​the volatile memory 140 is released and the free area information is stored in the free area queue 136. The information is stored in the second selection area PB9.

[0162] In this state, in order to invalidate the second compressed data COMP_DATA2<0:3> stored in the volatile memory 140, the host 102 can generate a request to invalidate the second logical information LOI2. <pb2>An invalid command is received, and the generated command is sent to the control operation circuit 134 of the controller 130. In response to the request, the second logic information LOI2 is sent. <pb2>An invalid command will cause the control circuit 134 to store the second logic information LOI2 in the second selection area PB9. <pb2>invalid.

[0163] In this case, because the control operation circuit 134 uses the second logic information LOI2 <pb2>A read operation is performed on the second compressed data COMP_DATA2<0:3>, and the second logical information LOI2 is stored in the second selection area PB9. <pb2>Invalidated, so that it is stored in the second logical information LOI2. <pb2>The indicated second storage area is a physical area PB. <2> The second compressed data COMP_DATA2<0:3> in the file can also be invalidated.

[0164] Additionally, the control operation circuit 134 can respond to a request to send the second logic information LOI2. <pb2>Invalid command. Invalidate the second selection area PB9 and the second compressed data COMP_DATA2<0:3>, and invalidate the second storage area PB that stores the second compressed data COMP_DATA2<0:3>. <2> Switching to an idle area will connect it to the second storage area PB. <2> Corresponding information FBL <pb2>Stored in the free area queue 136, and the information FBL is sent. <pb2>Place it in the free area information.

[0165] Therefore, in the free area queue 136, in Figure 3H The information FBL that was moved to the free area queue 136 was moved to the free area queue. <pb2>It can be used as information about free areas and in Figure 3H The remaining information FBL in the previously free area queue 136<PB3:7> They manage it together. In this case, Figure 3H The remaining information FBL in the previously free area queue 136<PB3:7> It can be arranged as more than in Figure 3H The information FBL was then moved to queue 136 in the free area. <pb2>It has a higher reference priority.

[0166] Reference Figure 3I As can be seen, some of the free area information stored in the free area queue 136 is moved to the management area of ​​the volatile memory 140 for management.

[0167] Specifically, the internal memory 137 included in the control operation circuit 134 can have a relatively small storage space but a faster operating speed than the volatile memory 140. Therefore, when the size of the free area queue 136 allocated to the internal memory 137 exceeds a suitable size, the free area information stored in the free area queue 136 can be moved to the management area of ​​the volatile memory 140 for management.

[0168] More specifically, in Figure 3H Then, all free area information can be stored in the free area queue 136. Additionally, the managed area can be released from the volatile memory 140.

[0169] In this state, the control operation circuit 134 can set some of the first physical area 141 of the volatile memory 140 as management areas, and then move some of the free area information stored in the free area queue 136 for management.

[0170] According to an embodiment, in Figure 3H Subsequently, the free area information of a total of six free areas PB<3:7,2> can be stored in the free area queue 136. The control operation circuit 134 can refer to the free area information stored in the free area queue 136 and store the six information FBLs in the volatile memory 140.<PB3:7,2> One message from FBL <pb3>The corresponding physical region PB3 is set as the management region. In this case, a physical region PB3 that is set as the management region can be set as HEAD and TAIL, and can be set to 'null' in the next message NEXT.

[0171] Subsequently, the control operation circuit 134 can refer to the free area information stored in the free area queue 136 and select three of the five information FBL<4:7,2> from the FBL information.<PB4:6> Move the data to a physical region PB3 that has been designated as the management region and store three pieces of information FBL.<PB4:6> And only the remaining two FBL messages are managed in the free area queue 136.<PB7,2> .

[0172] The embodiments described above are not limited to the above-described embodiments and accompanying drawings, and it will be apparent to those skilled in the art that various substitutions, modifications, and changes can be made without departing from the technical spirit of this disclosure. Furthermore, embodiments can be combined to form other embodiments.

Claims

1. A storage device, comprising: Volatile memory, comprising multiple physical regions; A compression operation circuit compresses the written data at a first ratio to generate first compressed data; as well as Control operation circuit: The volatile memory is divided into a first physical region and a second physical region. Store the first compressed data in the first physical region, and The first logical information indicating the region where the first compressed data is stored is stored in the first selected region of the second physical region.

2. The storage device according to claim 1, wherein, The compression operation circuit compresses the written data at a second ratio to generate second compressed data, and The control operation circuit: The second compressed data is stored in the first physical area; as well as The second logical information indicating the region where the second compressed data is stored is stored in the second selected region of the second physical region.

3. The storage device according to claim 2, wherein, The control operation circuit: Set some of the current number of free areas as management areas to store free area information about the free areas in the first physical area that can store data; as well as The managed area is managed in the form of a linked list.

4. The storage device according to claim 3, wherein, The control operation circuit: Referring to the free area information, a first storage area is selected from the free area; The first compressed data is stored in the selected first storage area; Generate the first logical information indicating the first storage area; Store the first logical information in the first selection area; as well as Invalidate the information in the free area information corresponding to the first storage area from the management area.

5. The storage device according to claim 4, wherein, The control operation circuit: In response to a command requesting the invalidation of the first logical information, each of the first logical information and the first compressed data is invalidated; Switch the first storage area to an idle area; as well as The information of the switched free area is placed into the free area information.

6. The storage device according to claim 4, wherein, The control operation circuit: Referring to the free area information, select a second storage area from the free area; The second compressed data is stored in the selected second storage area; Generate the second logical information indicating the second storage area; Store the second logical information in the second selection area; as well as Invalidate the information in the free area information corresponding to the second storage area from the management area.

7. The storage device according to claim 6, wherein, The control operation circuit: In response to the command requesting the invalidation of the second logical information, each of the second logical information and the second compressed data is invalidated; Switch the second storage area to the free area; as well as The information of the switched free area is placed into the free area information.

8. The storage device according to claim 6, wherein, The control operation circuit: Check the number of currently free areas in the first physical region; as well as The number of areas in the current number of free areas to be set as the managed area is changed based on the number of currently free areas detected.

9. The storage device according to claim 8, wherein, When all information stored in the first management area, which is set as the head in a linked list, is invalidated, the control operation circuit: Set the second management area following the first management area as the new header; Switch the first management area to an idle area; as well as The information of the switched free area is placed into the free area information.

10. The storage device according to claim 9, wherein, The control operation circuitry includes an internal memory allocated space for storing a queue of free regions, and the internal memory operates faster than the volatile memory. The control operation circuit moves a portion of the information in the free area to the free area queue to manage the moved information.

11. The storage device according to claim 10, wherein, The control operation circuit: Move the aforementioned information to the idle area queue; The area in the first physical area that is set as the management area, which stores the partial information, will be switched to the free area; Move the information about the switched free area to the free area queue; as well as The information to be moved will be managed together with the aforementioned partial information.

12. The storage device according to claim 2, wherein, The control operation circuit: Based on the amount of the first compressed data, change the number of regions in the second physical region to be set as the first selected region; and The number of regions in the second physical region to be set as the second selected region is changed according to the amount of the second compressed data.

13. A method of operating a storage device, the storage device including volatile memory, the method comprising: Compress the written data at a first ratio to generate first compressed data; The multiple physical regions included in the volatile memory are divided into a first physical region and a second physical region. Store the first compressed data in the first physical region, and The first logical information indicating the region where the first compressed data is stored is stored in the first selected region of the second physical region.

14. The operating method according to claim 13, further comprising: The written data is compressed at a second ratio to generate second compressed data; The second compressed data is stored in the first physical area; as well as The second logical information indicating the region where the second compressed data is stored is stored in the second selected region of the second physical region.

15. The operating method according to claim 14, further comprising: Set some of the current number of currently free areas as management areas to store free area information about the free areas in the first physical area that can store data; as well as The managed area is managed in the form of a linked list.

16. The operating method according to claim 15, wherein, Storing the first compressed data includes: Referring to the free area information, a first storage area is selected from the free area; The first compressed data is stored in the selected first storage area; Generate the first logical information indicating the first storage area; Store the first logical information in the first selection area; and Invalidate the information in the free area information corresponding to the first storage area from the management area.

17. The operating method according to claim 16, wherein, Storing the first compressed data further includes: In response to a command requesting the invalidation of the first logical information, each of the first logical information and the first compressed data is invalidated; After becoming invalid, the first storage area is switched to the free area; and The information of the switched free area is placed into the free area information.

18. The operating method according to claim 16, wherein, Storing the second compressed data includes: Referring to the free area information, a second storage area is selected from the free area; and The second compressed data is stored in the selected second storage area; Generate the second logical information indicating the second storage area, and store the second logical information in the second selected area; and Invalidate the information in the free area information corresponding to the second storage area from the management area.

19. The operating method according to claim 18, wherein, Storing the second compressed data further includes: In response to the command requesting the invalidation of the second logical information, each of the second logical information and the second compressed data is invalidated; After the invalidation, the second storage area is switched to the free area; and The information of the switched free area is placed into the free area information.

20. The operating method according to claim 18, wherein, Managing the management area includes: Check the number of currently free areas in the first physical region; and The number of areas in the current number of free areas to be set as the managed area is changed based on the number of currently free areas detected.

21. The operating method according to claim 20, wherein, When all information stored in the first management area, which is set as the head of a linked list in the management area, is invalidated, managing the management area includes: Set the second management area following the first management area as the new header; Switch the first management area to the idle area; and The information of the switched free area is placed into the free area information.

22. The operating method according to claim 21, wherein, The storage device further includes internal memory, which operates faster than the volatile memory. The internal memory is physically independent and has space allocated for storing a queue of free regions. The operation method further includes moving a portion of the information in the free area information to the free area queue in order to manage the moved information.

23. The operating method according to claim 22, further comprising: Move the aforementioned information to the idle area queue; The area in the first physical area that is set as the management area, which stores the partial information, will be switched to the free area; Move the information about the switched free area to the free area queue; as well as The information to be moved will be managed together with the aforementioned partial information.

24. The operating method according to claim 13, further comprising: Based on the amount of the first compressed data, change the number of regions in the second physical region that are to be set as the first selected region; as well as The number of regions in the second physical region to be set as the second selected region is changed according to the amount of the second compressed data.

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