Memory access method and device, equipment, storage medium and computer program product

Abstract

The embodiment of the invention provides a memory access method and device, equipment, a storage medium and a computer program product, and the memory access method comprises the steps: obtaining an online access request and an offline access request for a memory, and enabling the online access request and the offline access request to share bandwidth resources for accessing the memory; a first memory access queue corresponding to the offline access request and a second memory access queue and memory access delay corresponding to the online access request are determined, the first memory access queue corresponds to a first processing priority, and the second memory access queue corresponds to a second processing priority; regulating and controlling the first processing priority based on the memory access delay and the second processing priority to obtain a regulated and controlled priority corresponding to the first memory access queue; and accessing the memory based on the regulated priority and the second processing priority. According to the scheme, the problem of bandwidth resource scrambling possibly occurring between different virtual machines or different containers can be reduced.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of memory, and in particular to a memory access method and device, equipment, a storage medium and a computer program product. BACKGROUND

[0002] With the rapid development of science and technology, memory access technology is becoming more and more mature. At present, when multiple virtual machines or multiple containers are running on a server at the same time, in order to ensure the fairness of memory access services between multiple virtual machines or multiple containers, the same bandwidth resources are often allocated to a single virtual machine or a single container.

[0003] However, when multiple different virtual machines or containers on the server are running at the same time, and there is high load between the virtual machines or containers, different virtual machines or different containers may compete for bandwidth resources, which cannot guarantee the stability and reliability of memory access operations. SUMMARY

[0004] The embodiments of the present application provide a memory access method, device, equipment, storage medium and computer program product, which can guarantee the stability and reliability of memory access operations.

[0005] In a first aspect, the embodiments of the present application provide a memory access method, comprising:

[0006] obtaining an online access request and an offline access request for a memory, the online access request and the offline access request sharing bandwidth resources for accessing the memory;

[0007] determining a first memory access queue corresponding to the offline access request, and a second memory access queue and a memory access time delay corresponding to the online access request, wherein the first memory access queue corresponds to a first processing priority, and the second memory access queue corresponds to a second processing priority;

[0008] controlling the first processing priority based on the memory access time delay and the second processing priority to obtain a controlled priority corresponding to the first memory access queue;

[0009] accessing the memory based on the controlled priority and the second processing priority.

[0010] In a second aspect, the embodiments of the present application provide a memory access device, comprising:

[0011] a first obtaining module configured to obtain an online access request and an offline access request for a memory, the online access request and the offline access request sharing bandwidth resources for accessing the memory;

[0012] The first determining module is configured to determine a first memory access queue corresponding to the offline access request, a second memory access queue corresponding to the online access request, and a memory access time delay.

[0013] The first processing module is configured to regulate the first processing priority based on the memory access time delay and the second processing priority, to obtain a regulated priority corresponding to the first memory access queue.

[0014] The first processing module is further configured to access the memory based on the regulated priority and the second processing priority.

[0015] In a third aspect, an electronic device is provided, including a memory and a processor. The memory is configured to store one or more computer instructions. The one or more computer instructions, when executed by the processor, implement the memory access method of the first aspect.

[0016] In a fourth aspect, a computer storage medium is provided, which is configured to store a computer program. The computer program, when executed by a computer, implements the memory access method of the first aspect.

[0017] In a fifth aspect, a computer program product is provided, which includes a computer program. When the computer program is executed by a processor of an electronic device, the processor performs the steps of the memory access method of the first aspect.

[0018] The memory access method, device, electronic device, storage medium, and computer program product provided in the embodiments of the present application can effectively implement memory access operations in different application scenarios by flexibly regulating the processing priority of offline access requests. This can not only reduce the bandwidth resource contention between different virtual machines or different containers, but also reduce the situation of low processing efficiency of online access requests caused by resource occupation. Therefore, the stability and reliability of memory access operations are ensured, and the practicability of the method is effectively improved. BRIEF DESCRIPTION OF DRAWINGS

[0019] In order to more clearly illustrate the technical solutions in the embodiments of the present application or the prior art, the accompanying drawings needed to be used in the embodiments or prior art description will be briefly introduced as follows. Obviously, the accompanying drawings in the following description are some embodiments of the present application, and other drawings can also be obtained by those skilled in the art without any creative effort on the basis of these drawings.

[0020] Figure 1 A principle diagram of a memory access method provided by an embodiment of the present application;

[0021] Figure 2 A flow diagram of a memory access method provided by an embodiment of the present application;

[0022] Figure 3 A flow diagram of determining whether a data access request is an online access request or an offline access request provided by an embodiment of the present application;

[0023] Figure 4 A flow diagram of regulating the first processing priority based on the memory access delay and the second processing priority to obtain a regulated priority corresponding to the first memory access queue provided by an embodiment of the present application;

[0024] Figure 5 A flow diagram of another memory access method provided by an embodiment of the present application;

[0025] Figure 6 A flow diagram of still another memory access method provided by an embodiment of the present application;

[0026] Figure 7 A principle of a memory access method provided by an embodiment of the present application Figure 1 ;

[0027] Figure 8 A principle of a memory access method provided by an embodiment of the present application Figure 2 ;

[0028] Figure 9 An interaction diagram of a memory access method provided by an embodiment of the present application;

[0029] Figure 10 A structure diagram of a memory access device provided by an embodiment of the present application;

[0030] Figure 11 A structure diagram of an electronic device corresponding to a memory access device provided by an embodiment Figure 10 ; DETAILED DESCRIPTION

[0031] In order to make the purposes, technical solutions and advantages of the embodiments of the present application clearer, the technical solutions in the embodiments of the present application will be described clearly and completely below with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are only some but not all of the embodiments of the present application. Based on the embodiments in the present application, all other embodiments obtained by a person of ordinary skill in the art without creative work fall within the protection scope of the present application.

[0032] The terms used in the embodiments of the present application are merely for the purpose of describing particular embodiments and are not intended to limit the present application. The singular forms "a", "said" and "the" used in the embodiments of the present application and the appended claims are also intended to include the plural forms, unless the context clearly indicates otherwise. "Plural" generally includes at least two, but does not exclude the case of including at least one.

[0033] It should be understood that the term "and / or" used herein is only to describe the association relationship of the associated objects, which means that there can be three relationships, for example, A and / or B, which can represent the three cases of A alone, A and B together, and B alone. In addition, the character " / " herein generally represents an "or" relationship between the front and rear associated objects.

[0034] Depending on the context, the word "if" as used herein can be interpreted as "when" or "upon" or "in response to determining" or "in response to detecting". Similarly, depending on the context, the phrase "if it is determined" or "if (a stated condition or event) is detected" can be interpreted as "when it is determined" or "in response to determining" or "when (a stated condition or event) is detected" or "in response to detecting (a stated condition or event)".

[0035] It should also be noted that the terms "comprising", "including", or any other variant thereof are intended to cover non-exclusive inclusion, so that a product or system including a series of elements not only includes those elements, but also includes other elements not explicitly listed or inherent to such product or system. Without more limitations, the element defined by the sentence "including a" does not exclude the presence of another identical element in the product or system including the element.

[0036] In addition, the sequence of steps in each of the following method embodiments is only an example, not a strict limitation.

[0037] Term definition:

[0038] Online application scenario: refers to commercial activities such as shopping, payment, reservation, etc. through the Internet.

[0039] Offline application scenario: refers to business activities carried out without network connection, such as offline shopping, payment, etc.

[0040] Offline multi-tenancy: refers to the simultaneous running of different tenant virtual machines (VM) on one physical server.

[0041] Offline mixed deployment: refers to the running of multiple containers of one tenant on the same VM / server, which can improve resource utilization efficiency through peak shaving, but may also cause the risk of experience decline due to resource contention.

[0042] Memory bandwidth: refers to the memory transmission rate of a network device or server, which affects the speed and efficiency of data transmission.

[0043] VM / Docker: refers to virtual machine / container technology, which can divide a physical server into multiple independent virtual machines or containers to improve resource utilization efficiency.

[0044] core_ID: refers to the CPU core ID of the server, used to distinguish different server resources.

[0045] In order to understand the specific implementation process and implementation principle of the technical solutions in this embodiment, the related technologies will be briefly described first:

[0046] With the rapid development of science and technology, users have higher and higher requirements for memory bandwidth and latency; in order to meet the above requirements, the related technology provides a memory bandwidth control method implemented by a resource detection technology (RDT), specifically, the RDT technology provides allocation, detection control capabilities of the last level cache (LLC) and memory bandwidth (MB), this method can allow users to directly detect and control and allocate the L2 cache, L3 cache (LLC) and memory bandwidth of each CPU core through a series of CPU instructions.

[0047] The aforementioned memory bandwidth control methods can only achieve fairness among multiple virtual machines or containers. For example, when using the RDT scheme for resource allocation, online application scenarios will pre-allocate 70% of the bandwidth resources to ensure online processing performance and latency; offline application scenarios will pre-allocate 30% or 25% of the bandwidth resources. Compared to online application scenarios, the bandwidth resources among virtual machines / containers in offline application scenarios are significantly compressed. Even if there are many idle resources in online application scenarios, they cannot be allocated to offline application scenarios. Furthermore, since memory access is a request that occurs at the nanosecond level, it is impossible to improve the utilization rate of bandwidth resources by dynamically switching resource ratios.

[0048] In general, when multiple different virtual machines or containers run simultaneously on a server, and there is high load among the virtual machines or containers, the following problems are likely to occur:

[0049] (1) Resource contention problem in offline multi-tenancy: Different virtual machines or different containers may compete for bandwidth resources, which makes it impossible to guarantee the stability and reliability of memory access operations;

[0050] (2) Problems in the scenario of mixed online and offline deployment: This refers to the situation where multiple containers of a tenant run on the same VM / server. While this can improve resource utilization efficiency by smoothing out peaks and valleys, it may also lead to memory access operations in online application scenarios due to resource contention, thereby reducing the user experience.

[0051] To achieve low latency for online requests while ensuring greater memory bandwidth in offline scenarios, this embodiment provides a memory access method, apparatus, device, storage medium, and computer program product. (See attached document.) Figure 1 As shown, the execution entity of the memory access method is the memory access device 200. The memory access device 200 can communicate with one or more virtual machines 100. The one or more virtual machines 100 can be used by online users or offline users. For example, virtual machine 1 is used for online users and virtual machine 2 is used for offline users, so as to realize the processing operation of memory access queue in online application scenarios or offline application scenarios.

[0052] Specifically, the memory access device 200 can be any programmable computing device with a certain memory access capability.

[0053] In addition, the basic structure of the memory access device 200 can include at least one processor. The number of processors depends on the configuration and type of the memory access device 200. The memory access device 200 can also include a memory, which can be volatile, such as RAM, or non-volatile, such as read-only memory (ROM), flash memory, etc., or both. The memory usually stores an operating system (OS), one or more applications, and program data, etc. In addition to the processing unit and the memory, the memory access device 200 also includes some basic configurations, such as a network card chip, an IO bus, a display component, and some peripheral devices, etc. Optionally, some peripheral devices can include, for example, a keyboard, a mouse, a stylus, a printer, etc. Other peripheral devices are well known in the art and will not be described here.

[0054] In addition, the virtual machine 100 can be deployed in any one of the following entity devices: a VR client, a video client, a vehicle terminal, a smart wearable device, a handheld terminal, a tablet computer, a personal computer, etc. The entity device and the memory access device 200 can be connected by a network, which can be a wireless or wired network connection. If the entity device and the memory access device 200 are in communication connection, the network mode of the mobile network can be any one of 4G (LTE), 4G+ (LTE+), 5G, 5.5G, 6G, etc.

[0055] In the embodiments of the present application, the virtual machine 100 is used by the user to perform application to implement memory access operation. Specifically, the virtual machine 100 can display an interactive interface. When there is a memory access demand of an online user and / or an offline user, the online access request and the offline access request for the memory can be obtained through the interactive interface. In order to accurately implement the memory access operation, after obtaining the online access request and the offline access request, the online access request and the offline access request for the memory can be sent to the memory access device 200.

[0056] The memory access device 200 is used to obtain the online access request and the offline access request for the memory through different virtual machines 100. Since the online access request and the offline access request are access requests for the same memory, the online access request and the offline access request share the bandwidth resource for accessing the memory. After determining the offline access request and the online access request, the first memory access queue corresponding to the offline access request, the second memory access queue corresponding to the online access request, and the memory access time delay can be determined, wherein the first memory access queue corresponds to a first processing priority, and the second memory access queue corresponds to a second processing priority.

[0057] Since memory access latency reflects the request processing status of online access requests and is closely related to the processing priorities of the first and second memory access queues, in order to ensure the stability and reliability of processing online access requests, after determining the first memory access queue, the second memory access queue, and the memory access latency, the first processing priority can be adjusted based on the memory access latency and the second processing priority to obtain the adjusted priority corresponding to the first memory access queue; then, memory access operations can be performed on online and offline access requests based on the second processing priority and the adjusted priority.

[0058] Specifically, when memory access latency is high, the first processing priority can be lowered based on the second processing priority, so that the adjusted priority is lower than the second processing priority. This allows memory access operations to be prioritized for online access requests in the second memory access queue, ensuring the processing quality and effectiveness of online access requests. Conversely, when memory access latency is low, the first processing priority can be increased based on the second processing priority, so that the adjusted priority is higher than the second processing priority. This allows memory access operations to be prioritized for offline access requests in the first memory access queue. This not only ensures the utilization rate of memory bandwidth resources but also guarantees the stability and effectiveness of analyzing and processing online and offline access requests, further improving the flexibility and reliability of the method.

[0059] The following detailed description of some embodiments of the present invention is provided in conjunction with the accompanying drawings. Where there is no conflict between the embodiments, the following embodiments and features can be combined with each other. Furthermore, the timing of the steps in the following method embodiments is merely an example and not a strict limitation.

[0060] Figure 2 This is a flowchart illustrating a memory access method provided in an embodiment of this application; see attached document. Figure 2 As shown, this embodiment provides a memory access method. The execution subject of this method is a memory access device. It can be understood that the memory access device can be implemented as software, or a combination of software and hardware. Specifically, when the memory access device is implemented as hardware, it can be various electronic devices with memory access capabilities. When the memory access device is implemented as software, it can be installed in the aforementioned electronic devices. Based on the aforementioned memory access device, memory access operations can be implemented. Specifically, the memory access method may include the following steps:

[0061] Step S201: Obtain online and offline access requests for memory. Online and offline access requests share the bandwidth resources for accessing memory.

[0062] Step S202: determine a first memory access queue corresponding to the offline access request, and a second memory access queue and a memory access time delay corresponding to the online access request, wherein the first memory access queue corresponds to a first processing priority, and the second memory access queue corresponds to a second processing priority.

[0063] Step S203: regulating the first processing priority based on the memory access time delay and the second processing priority, to obtain a regulated priority corresponding to the first memory access queue.

[0064] Step S204: accessing the memory based on the regulated priority and the second processing priority.

[0065] The specific implementation process and implementation effect of each step are described in detail as follows:

[0066] Step S201: obtaining an online access request and an offline access request for the memory, wherein the online access request and the offline access request share bandwidth resources for accessing the memory.

[0067] The memory is pre-configured to store operation data and data for interacting with external storage such as a hard disk. Different application scenarios can correspond to different types of memory, for example, the memory can include any one of the following: memory of a cloud server, memory of a physical server, memory of a processing chip, and the like.

[0068] When a user has online access requirements and offline access requirements for the memory, the memory access device can obtain an online access request and an offline access request for the memory. The online access request refers to an access request through the Internet, which often has high requirements for timeliness. The offline access request refers to an access request without network connection, which often has low requirements for timeliness.

[0069] In addition, the embodiment does not limit the acquisition method of the online access request and the offline access request. In implementation mode one, the online access request and the offline access request can be obtained through different virtual machines or different containers. At this time, obtaining the online access request and the offline access request for the memory can include: obtaining the online access request through a first virtual machine in communication connection with the memory, and obtaining the offline access request through a second virtual machine in communication connection with the memory; or obtaining the online access request through a first container in communication connection with the memory, and obtaining the offline access request through a second container in communication connection with the memory, wherein the first container and the second container come from the same virtual machine or different virtual machines.

[0070] Specifically, the memory access device can be communicatively connected with a first virtual machine and a second virtual machine, the first virtual machine can be applied in an online application scenario, and the second virtual machine can be applied in an offline application scenario; when a user in the online application scenario has an online access demand for the memory, an online access request can be obtained through the first virtual machine; when a user in the offline application scenario has an offline access demand for the memory, an offline access request can be obtained through the second virtual machine; and the online access request and the offline access request can be obtained synchronously or asynchronously.

[0071] Similarly, the memory access device can be communicatively connected with a plurality of containers, the plurality of containers can correspond to the same memory access task or different memory access tasks, and the plurality of containers can include a first container and a second container, the first container can be applied in an online scenario, and the second container can be applied in an offline scenario; when a user in the online application scenario has an online access demand for the memory, an online access request can be obtained through the first container; when a user in the offline application scenario has an offline access demand for the memory, an offline access request can be obtained through the second container.

[0072] It should be noted that when the online access request and the offline access request come from the first container and the second container, the processor core corresponding to the container can be switched due to the change in the number of scheduling times or other reasons, therefore, in order to improve the stability and reliability of the memory access operation, the embodiment can further include: obtaining a processor core corresponding to the first container or the second container; when the processor core is switched, determining a first post-switch queue corresponding to the first container or a second post-switch queue corresponding to the second container; taking the first memory access queue as a new first memory access queue, or taking the second memory access queue as a new second post-switch queue.

[0073] When the online access request comes from the first container or the offline access request comes from the second container, in order to accurately perform the memory access operation, the first container or the second container can be allocated with a corresponding processor core, for example, at t1, a plurality of processor cores for implementing the memory access operation are pre-configured, the plurality of processor cores can be 8, 16, etc., when the online access request is acquired through the first container, the online access request can be allocated to the processor core 3 for processing, that is, the first container corresponds to the processor core 3; or when the offline access request is acquired through the second container, the offline access request can be allocated to the processor core 5 for processing, that is, the second container corresponds to the processor core 5. At t2, the online access request can be acquired again through the first container, the online access request at this time is different from the online access request corresponding to t1; in order to be able to implement the memory access operation, the online access request at t2 can be allocated to the processor core 2 for processing, that is, compared with the historical time t1, the processor core corresponding to the first container is switched; similarly, the offline access request can also be acquired again through the second container, the offline access request at this time is different from the offline access request corresponding to t1; in order to be able to implement the memory access operation, the offline access request at t2 can be allocated to the processor 6 for processing, that is, compared with the historical time t2, the processor core corresponding to the second container is switched.

[0074] Since the processor core corresponding to the first container or the second container can be switched, in order to ensure the stability and reliability of the memory access operation, the memory access queue corresponding to the first container or the second container can be switched synchronously, at this time, the processor core corresponding to the first container or the second container can be acquired first; then whether the processor core corresponding to the first container is switched or whether the processor core corresponding to the second container is switched can be detected, specifically whether the processor core corresponding to the first container or the second container is the same as the historical processor core corresponding to the first container or the second container in the historical time or the last period.

[0075] When the detection result is that the processor core is switched, the first switched queue corresponding to the first container or the second switched queue corresponding to the second container can be determined, and then the first switched queue can be used as a new first memory access queue, or the second switched queue can be used as a new second memory access queue, thereby effectively realizing that when the processor core corresponding to the container is switched, the memory access queue corresponding to the container will also be changed, which effectively ensures the stability and reliability of the memory access operation.

[0076] In a second implementation, the memory access apparatus can not only directly obtain the online access request and the offline access request through different virtual machines or different containers, but also can first identify whether the obtained data access request is an online access request or an offline access request by a request tag of the obtained data access request. Before obtaining the online access request and the offline access request for the memory, the method in this embodiment can further include: obtaining a data access request for the memory; determining a request tag corresponding to the data access request, the request tag including any one of a virtual machine tag and a container tag; and determining, based on the request tag, whether the data access request is an online access request or an offline access request.

[0077] When the user has a memory access demand for the memory, the memory access apparatus can obtain a data access request for the memory. In some examples, the data access request can be obtained through human-computer interaction operation, or the data access request can be obtained through a preset device. To identify whether the data access request is an online access request or an offline access request, after obtaining the data access request for the memory, a request tag corresponding to the data access request can be determined. The request tag can include a virtual machine tag or a container tag. The request tag can be determined by information extraction on the data access request. After obtaining the request tag, the request tag can be analyzed and processed to determine whether the data access request is an online access request or an offline access request.

[0078] In some examples, determining, based on the request tag, whether the data access request is an online access request or an offline access request can include: obtaining a label whitelist pre-configured to identify an online access operation; identifying whether a standard request tag matching the request tag exists in the label whitelist; determining that the data access request is an online access request when the standard request tag matching the request tag exists in the label whitelist; and determining that the data access request is an offline access request when the standard request tag matching the request tag does not exist in the label whitelist. Similarly, a label whitelist identifying an offline access operation can also be used to determine whether the data access request is an online access request or an offline access request, as long as the online access request and the offline access request can be accurately identified. Details are not repeated here.

[0079] In a third implementation, the memory access apparatus can identify whether a data access request is an online access request or an offline access request not only by the request tag of the obtained data access request, but also by the application process tag, and before obtaining the online access request and the offline access request for the memory, the method in this embodiment can further include: obtaining a data access request for the memory; determining an application process identifier corresponding to the data access request; and determining, based on the application process identifier, whether the data access request is an online access request or an offline access request.

[0080] In this third implementation, the specific implementation, implementation principle and implementation effect are similar to those of the above-mentioned second implementation (identifying whether a data access request is an online access request or an offline access request by a preset white list and an application process identifier) in order to stably obtain online access requests and offline access requests. For details, refer to the above description.

[0081] It should be noted that, for the obtained online access request and offline access request, since the online access request and the offline access request are access requests obtained for the same memory, when performing an access operation based on the online access request and the offline access request, the online access request and the offline access request share the bandwidth resources for accessing the memory.

[0082] Step S202: determining a first memory access queue corresponding to the offline access request, and a second memory access queue and a memory access time delay corresponding to the online access request, wherein the first memory access queue corresponds to a first processing priority, and the second memory access queue corresponds to a second processing priority.

[0083] Since the offline access request is used to implement the memory access operation in the offline application scenario, and the online access request is used to implement the memory access operation in the online application scenario, in order to realize the quality and effect of the memory access operation in the offline and online mixed application scenario, after obtaining the offline access request and the online access request, the first memory access queue corresponding to the offline access request and the second memory access request corresponding to the online access request and the memory access time delay can be determined. In some examples, the first memory access queue, the second memory access request, and the memory access time delay can be obtained synchronously or asynchronously. For example, the first memory access queue can be determined through the first mapping relationship corresponding to the offline access request, the second memory access queue can be determined through the second mapping relationship corresponding to the online access request, and the memory access time delay can be obtained through the time delay detector. At this time, determining the memory access time delay corresponding to the online access request can include: obtaining a pre-deployed time delay detector, which can be deployed in a hypervisor layer of a virtual machine management program in a cloud server / physical server / processing chip; and performing time delay detection on the online access request through the time delay detector, so as to obtain the memory access time delay corresponding to the online access request. In this way, the accuracy and reliability of determining the memory access time delay are effectively ensured.

[0084] It should be noted that the first memory access queue and the second memory access queue are different access queues, the first memory access queue includes one or more offline access requests for performing the access operation on the memory, the second memory access queue includes one or more online access requests for performing the access operation on the memory, and the first memory access queue corresponds to a first processing priority and the second memory access queue corresponds to a second processing priority. The first processing priority and the second processing priority can be the same or different priorities. Generally, the second processing priority is higher than the first processing priority, or the second processing priority can be the same as the first processing priority.

[0085] Step S203: Based on the memory access time delay and the second processing priority, the first processing priority is regulated to obtain a regulated priority corresponding to the first memory access queue.

[0086] Since the memory access latency can reflect the state and efficiency of analyzing and processing the online access request, the first processing priority can reflect the processing order of analyzing and processing the offline access request in the first memory access queue, the second processing priority can reflect the processing order of analyzing and processing the online access request in the second memory access queue, and the online access request and the offline access request share the bandwidth resource for accessing the memory, the processing order of analyzing and processing the online access request and the offline access request can directly affect the memory access latency of analyzing and processing the online access request. Based on the above description, in order to ensure the quality and efficiency of analyzing and processing the online access request and try to improve the resource utilization rate of the bandwidth resource, after obtaining the memory access latency and the second processing priority, the first processing priority can be flexibly regulated based on the memory access latency and the second processing priority, and the regulated priority corresponding to the first memory access queue is obtained. The obtained regulated priority can be the same as or different from the first processing priority.

[0087] In some examples, the regulation operation of the first processing priority can be implemented by a pre-trained machine learning model or a task processing model, and at this time, regulating the first processing priority based on the memory access latency and the second processing priority to obtain the regulated priority corresponding to the first memory access queue can include: obtaining a pre-trained machine learning model or a task processing model for implementing the priority regulation operation; inputting the memory access latency, the second processing priority and the first processing priority into the machine learning model or the task processing model to obtain the regulated priority output by the machine learning model or the task processing model.

[0088] In other examples, the regulation operation of the first processing priority can not only be implemented by a pre-trained machine learning model or a task processing model, but also be implemented by directly analyzing and processing the memory access latency, the second processing priority and the first processing priority with a preset algorithm, and at this time, regulating the first processing priority based on the memory access latency and the second processing priority to obtain the regulated priority corresponding to the first memory access queue can include: when the memory access latency is greater than or equal to a preset latency threshold, lowering the first processing priority based on the second processing priority to obtain the regulated priority corresponding to the first memory access queue, and the regulated priority is lower than the second processing priority; when the memory access latency is less than the preset latency threshold, keeping the first processing priority unchanged.

[0089] Specifically, the preset latency threshold for analyzing and processing the memory access latency is pre-configured, which can be an upper limit value of latency that can be accepted or tolerated by the online user when performing the memory access operation. In some examples, the preset latency threshold can be 100 nanoseconds (ns), 150 ns, 200 ns, 250 ns, 300 ns, etc. Those skilled in the art can flexibly configure or control the preset latency threshold according to the specific application scenario or application requirement.

[0090] When the user has an online access demand for the memory, after obtaining the memory access latency corresponding to the online access request, in order to understand the state of the online memory access operation in time, the memory access latency can be compared with the preset latency threshold. When the memory access latency is less than the preset latency threshold, it means that the latency of the online access request at this time is small, i.e., the processing state of the online access request is in a normal state, which can meet the user's memory access demand. At this time, the first processing priority can be controlled to remain unchanged, i.e., no need to control the first processing priority.

[0091] Correspondingly, when the analysis and comparison result of the memory access latency and the preset latency threshold is that the memory access latency is greater than or equal to the preset latency threshold, it means that the latency of the online access request at this time is large, i.e., the processing state of the online access request is in an abnormal state. At this time, in order to ensure the efficiency of analyzing and processing the online access request, the first processing priority can be lowered based on the second processing priority to obtain the adjusted priority corresponding to the first memory access queue. It should be noted that the adjusted priority is not only lower than the first processing priority, but also lower than the second processing priority, so that when the memory access operation includes the offline access operation and the online access operation, the online access request (i.e., the online access operation) in the second memory access queue can be processed based on the second processing priority and the adjusted priority. This can greatly improve the processing quality and efficiency of the online access request.

[0092] The process of lowering the first processing priority based on the second processing priority can include: progressively lowering the first processing priority based on the second processing priority, which can be done once or multiple times. For example, if both the first and second processing priorities are level 13, the first processing priority can be lowered from level 13 to level 12, resulting in a adjusted priority of level 12. This allows online access requests in the second memory access queue to be processed preferentially based on the second processing priority during memory access operations. Similarly, if the first processing priority is level 13 and the second processing priority is level 12, the first processing priority can be lowered from level 13 to level 12, and then further lowered from level 12 to level 11, resulting in a adjusted priority of level 11.

[0093] Alternatively, lowering the first processing priority based on the second processing priority can also include: lowering the first processing priority by skipping levels based on the second processing priority. In this case, the lowering operation can be performed once. For example, when both the first and second processing priorities are level 13, the first processing priority can be directly reduced from level 13 to level 12, 11, or 10, etc., resulting in a adjusted priority of level 12, 11, or 10, etc. This allows online access requests in the second memory access queue to be processed preferentially based on the second processing priority during memory access operations. When the first processing priority is level 13 and the second processing priority is level 12, the first processing priority can be directly reduced from level 13 to level 11 or 10, resulting in a adjusted priority of level 11 or 10.

[0094] Furthermore, the analysis and comparison results of memory access latency and preset latency threshold show that when the memory access latency is greater than or equal to the preset latency threshold, the latency detector can not only perform latency detection operations to obtain the memory access latency, but also generate alarm information corresponding to the memory access request, so that users can quickly and timely understand the current latency information of the online access request through the alarm information.

[0095] Step S204: Access memory based on the adjusted priority and the second processing priority.

[0096] After obtaining the adjusted priority and the second processing priority, memory access operations can be performed based on the adjusted priority and the second processing priority. Specifically, since the adjusted priority is lower than the second processing priority, online access requests in the second memory access queue can be analyzed and processed first based on the second processing priority. This effectively ensures the processing quality and efficiency of online access requests and guarantees the stability and reliability of memory access operations.

[0097] The memory access method provided by the embodiment determines the first memory access queue corresponding to the offline access request and the second memory access queue and the memory access time delay corresponding to the online access request based on the online access request and the offline access request for the memory, and then regulates the first processing priority based on the memory access time delay and the second processing priority to obtain the regulated priority corresponding to the first memory access queue. The memory is accessed based on the regulated priority and the second processing priority, effectively realizing the memory access operation by flexibly regulating the processing priority of the offline access request in different application scenarios. This not only can reduce the bandwidth resource contention between different virtual machines or different containers, but also can reduce the low processing efficiency of the online access request caused by resource occupation, thereby ensuring the stability and reliability of the memory access operation and effectively improving the practicability of the method.

[0098] Figure 3 The flowchart for determining whether the data access request is an online access request or an offline access request is provided for the embodiments of the application. Based on the above embodiments, with reference to the accompanying drawings, the online access request and the offline access request can be identified or determined not only by the request label and the application process label of the data access request, but also by the occupied bandwidth upper limit of the virtual machine or the container. At this time, before obtaining the online access request and the offline access request for the memory, the method in the embodiment can further include: Figure 3

[0099] Step S301: Obtain a data access request for the memory.

[0100] When the user has access demand for the memory, the memory access device can obtain the data access request for the memory. The data access request can be obtained through human-computer interaction or through a preset device.

[0101] Step S302: Determine the virtual machine or the container corresponding to the data access request.

[0102] Step S303: Obtain the actual occupied bandwidth and the bandwidth occupation time length corresponding to the virtual machine or the container.

[0103] ​Since the bandwidth information occupied by the virtual machine or the container in different application scenarios within a preset time period is often different, after determining the virtual machine or the container corresponding to the data access request, the actual occupied bandwidth corresponding to the virtual machine or the container and the bandwidth occupation time length can be determined, wherein the actual occupied bandwidth is used to identify the real-time occupied bandwidth of the virtual machine or the container during the data access operation, and the actual occupied bandwidth can be obtained by the pre-deployed bandwidth detection device, and the bandwidth occupation time length can be obtained by the pre-configured timing device.

[0104] Step S304: determining whether the data access request is an online access request or an offline access request based on the actual occupied bandwidth and the bandwidth occupation time length.

[0105] After obtaining the actual occupied bandwidth and the bandwidth occupation time length, the data access request can be identified as an online access request or an offline access request based on the actual occupied bandwidth and the bandwidth occupation time length. In some examples, the actual occupied bandwidth and the bandwidth occupation time length can be analyzed and processed by a pre-trained machine learning model to determine whether the data access request is an online access request or an offline access request.

[0106] In yet some examples, the actual occupied bandwidth and the bandwidth occupation time length can also be analyzed and processed based on a preset algorithm to determine whether the data access request is an online access request or an offline access request. At this time, determining whether the data access request is an online access request or an offline access request based on the actual occupied bandwidth and the bandwidth occupation time length can include: obtaining a preset pre-empted bandwidth corresponding to the virtual machine or the container; when the actual occupied bandwidth is greater than the preset pre-empted bandwidth, counting the bandwidth occupation time length during which the actual occupied bandwidth is greater than the preset pre-empted bandwidth, and when the bandwidth occupation time length is greater than a preset time length, determining that the data access request is an offline access request; when the occupied bandwidth is less than or equal to the preset pre-empted bandwidth, or the bandwidth occupation time length is less than or equal to the preset time length, determining that the data access request is an online access request.

[0107] To accurately identify whether the data access request is an online access request or an offline access request, after determining the virtual machine or the container corresponding to the data access request, a preset pre-empted bandwidth corresponding to the virtual machine or the container can be obtained, which is used to identify the upper limit of the bandwidth resources that can be pre-empted by the virtual machine or the container in an offline application scenario. Different virtual machines or containers at different times can correspond to different preset pre-empted bandwidths.

[0108] After obtaining the preset preempted bandwidth and the actual occupied bandwidth, the preset preempted bandwidth can be used to analyze and process the actual occupied bandwidth. When the processing result shows that the actual occupied bandwidth is greater than the preset preempted bandwidth, it means that the bandwidth resources occupied by the virtual machine or container have exceeded the corresponding bandwidth resource limit. In order to reduce false detection of instantaneous bandwidth peaks, the bandwidth occupation time when the actual occupied bandwidth is greater than the preset preempted bandwidth can be counted. Then, the bandwidth occupation time and the preset time can be analyzed and compared. When the bandwidth occupation time is greater than the preset time, it means that the virtual machine or container has been occupying the preset preempted bandwidth for a long time. This is often the case in offline application scenarios. Therefore, it can be determined that the data access request at this time is an offline access request.

[0109] Correspondingly, if the actual bandwidth occupied is less than or equal to the preset preempted bandwidth, or the bandwidth occupation time is less than or equal to the preset time, it indicates that the virtual machine or container is not in the state of occupying the preset preempted bandwidth for a long time. This is often the case in online application scenarios. Therefore, it can be determined that the data access request is an online access request. This effectively realizes the accurate identification of whether the data processing request is an online access request or an offline access request.

[0110] In this embodiment, by acquiring data access requests for memory, the virtual machine or container corresponding to the data access request, as well as the actual bandwidth occupied and bandwidth usage duration of the virtual machine or container, are determined. Then, based on the actual bandwidth occupied and bandwidth usage duration, it is determined whether the data access request is an online access request or an offline access request. This effectively achieves accurate identification of whether a data processing request is an online or offline access request, which facilitates different memory access operations based on the identified online or offline access requests, further improving the practicality of the method.

[0111] Figure 4 This application provides a flowchart illustrating how a first processing priority is adjusted based on memory access latency and a second processing priority to obtain an adjusted priority corresponding to a first memory access queue. Based on the above embodiments, refer to the appendix... Figure 4 As shown, when adjusting the priority of the first memory access queue, not only the memory access latency corresponding to online access requests can be considered, but also the bandwidth resources occupied by offline access requests can be combined. In this embodiment, adjusting the first processing priority based on memory access latency and the second processing priority to obtain the adjusted priority corresponding to the first memory access queue can include:

[0112] Step S401: Obtain the total offline bandwidth occupied by the second virtual machine or second container corresponding to the offline access request.

[0113] Since the online access request and the offline access request share the bandwidth resource for accessing the memory, the offline total bandwidth occupied by the second virtual machine or the second container corresponding to the offline access request affects the bandwidth resource corresponding to the online access request, that is, when the offline total bandwidth occupied increases, the bandwidth resource that can be occupied by the online access request decreases; when the offline total bandwidth occupied decreases, the bandwidth resource that can be occupied by the online access request increases. Therefore, in order to ensure the stability and reliability of the memory access operation, the offline total bandwidth occupied by the second virtual machine or the second container corresponding to the offline access request can be obtained, and the offline total bandwidth occupied is used to identify the total bandwidth resource occupied by the second virtual machine or the second container for analyzing and processing the offline access request. In some examples, the offline total bandwidth occupied can be obtained by a preset bandwidth detection module or a preset bandwidth detector.

[0114] Step S402: regulating the first processing priority based on the memory access latency, the second processing priority and the offline total bandwidth occupied, to obtain a regulated priority corresponding to the first memory access queue.

[0115] After obtaining the offline total bandwidth occupied, the first processing priority can be regulated based on the memory access latency, the second processing priority and the offline total bandwidth occupied, so as to obtain a regulated priority corresponding to the first memory access queue. In some examples, the regulation operation of the processing priority can be realized by a pre-trained machine learning model, at this time, regulating the first processing priority based on the memory access latency, the second processing priority and the offline total bandwidth occupied, to obtain a regulated priority corresponding to the first memory access queue can include: obtaining a pre-trained machine learning model; inputting the memory access latency, the second processing priority, the offline total bandwidth occupied and the first processing priority into the machine learning model to obtain a regulated priority output by the machine learning model.

[0116] In some examples, the priority regulation operation can be implemented by a pre-trained machine learning model. In other examples, the priority regulation operation can be implemented by a preset delay threshold and a preset committed bandwidth. In these examples, the memory access delay, the second processing priority, the offline total occupied bandwidth, and the first processing priority are analyzed and processed based on the memory access delay, the second processing priority, and the offline total occupied bandwidth to obtain the regulated priority corresponding to the first memory access queue. For example, when the memory access delay is greater than or equal to the preset delay threshold and the offline total occupied bandwidth is greater than the preset committed bandwidth, the first processing priority is lowered based on the second processing priority to obtain the regulated priority corresponding to the first memory access queue, and the regulated priority is lower than the second processing priority. When the memory access delay is less than the preset delay threshold or the offline total occupied bandwidth is less than or equal to the preset committed bandwidth, the first processing priority remains unchanged.

[0117] For any virtual machine or container, a preset committed bandwidth for analyzing and processing offline access requests is pre-allocated. The preset committed bandwidth can be a legal bandwidth resource allocated or purchased for the virtual machine or container. The preset committed bandwidth corresponding to the virtual machine or container is different in different application scenarios. In order to improve the utilization rate of bandwidth resources, in the case of sufficient system bandwidth resources, the virtual machine or container in the offline scenario can preempt other idle bandwidth resources for memory access operations, thereby improving the quality and efficiency of memory access in the offline scenario. The actual bandwidth resource occupied by the virtual machine or container at this time can be greater than the preset committed bandwidth.

[0118] In order to stably implement the priority regulation operation, a preset delay threshold for analyzing and processing the memory access delay and a preset committed bandwidth for analyzing and processing the offline total occupied bandwidth can be obtained. Then, the memory access delay, the preset delay threshold, the offline total occupied bandwidth, and the preset committed bandwidth are analyzed and processed. When the memory access delay is greater than or equal to the preset delay threshold and the offline total occupied bandwidth is greater than the preset committed bandwidth, it indicates that the processing efficiency of the online access request is low, and the bandwidth resource occupied by the offline access request is large. At this time, in order to improve the processing quality and efficiency of the online access request, the first processing priority can be lowered based on the second processing priority to obtain the regulated priority corresponding to the first memory access queue. Since the regulated priority is lower than the second processing priority, the bandwidth resource occupied in the offline scenario will also decrease with the decrease of the priority. Thus, the online access request can be analyzed and processed based on the regulated priority, which is beneficial to improving the processing quality and efficiency of the online access request.

[0119] Correspondingly, when the memory access latency is less than the preset latency threshold, it indicates that the quality and efficiency of the online access request at this time can meet the user demand, at this time, the first processing priority can be controlled without operation; or when the offline total occupied bandwidth is less than or equal to the preset committed bandwidth, it indicates that the bandwidth resource occupied by the offline access request is not more, at this time, the first processing priority can also be controlled to remain unchanged, which not only can meet the application demand of the online scene, but also can improve the quality and effect of the memory access in the offline scene, and further guarantee the stable reliability of the memory access operation.

[0120] In the embodiment, the offline total occupied bandwidth of the second virtual machine or the second container corresponding to the offline access request is obtained, and then the first processing priority is controlled based on the memory access latency, the second processing priority and the offline total occupied bandwidth, so as to effectively realize the priority control operation, obtain the controlled priority corresponding to the first memory access queue, and then the memory access operation can be performed based on the controlled priority, thereby effectively guaranteeing the stable reliability of the memory access operation.

[0121] Figure 5 Another flowchart of a memory access method provided by the embodiment of the application is shown in the following. Figure 5 After obtaining the controlled priority corresponding to the first memory access queue, the priority recovery operation can be performed in time, and the method in the embodiment can further include:

[0122] Step S501: Obtain the total idle bandwidth of the memory corresponding to the access request for the memory.

[0123] Since the priority control operation of the first memory access queue is directly related to the total idle bandwidth of the memory in the system, and the priority recovery operation of the first memory access queue is also related to the total idle bandwidth of the memory in the system, in order to realize the priority recovery operation, after obtaining the controlled priority corresponding to the first memory access queue, the total idle bandwidth of the memory corresponding to the access request for the memory can be obtained, the total idle bandwidth of the memory is the actual idle resource in the total bandwidth resource for realizing the memory access operation in the system, which can be obtained by real-time detection of the system resource by a preset bandwidth detector.

[0124] Step S502: When the memory access latency is less than or equal to the preset latency threshold, and the total idle bandwidth of the memory is greater than the preset bandwidth threshold, the controlled priority is restored to the first processing priority.

[0125] Since the memory access latency can identify the processing quality and efficiency of the online access request, and the total idle bandwidth of the memory can identify the idle degree of the system resource, the memory access latency can be compared with the preset latency threshold, and the total idle bandwidth of the memory can be compared with the preset bandwidth threshold. When the memory access latency is less than or equal to the preset latency threshold, and the total idle bandwidth of the memory is greater than the preset bandwidth threshold, it indicates that the quality and efficiency of processing the online access request can meet the user demand, and the memory bandwidth resource is relatively sufficient. At this time, in order to improve the memory access quality and efficiency in the offline scene, and improve the utilization rate of the bandwidth resource, the priority of the first memory access queue can be restored from the regulated priority to the first processing priority, thereby effectively realizing the priority restoration operation.

[0126] Step S503: When the memory access latency is greater than the preset latency threshold, or the total idle bandwidth of the memory is less than or equal to the preset bandwidth threshold, the regulated priority is controlled to remain unchanged.

[0127] When the analysis result of the memory access latency and the total idle bandwidth of the memory is that the memory access latency is greater than the preset latency threshold, or the total idle bandwidth of the memory is less than or equal to the preset bandwidth threshold, it indicates that the quality and efficiency of processing the online access request is relatively low, and cannot meet the user demand, or the memory bandwidth resource used to implement the memory access operation is insufficient. At this time, in order to ensure the processing quality and efficiency of the online access request, the priority of the first memory access queue can be controlled to remain unchanged at the regulated priority.

[0128] Similar to the above embodiment, not only the priority restoration operation can be realized based on the memory access latency and the total idle bandwidth of the memory, but also the priority restoration operation can be realized based on the total idle bandwidth of the memory or the memory access latency alone. At this time, after obtaining the regulated priority corresponding to the first memory access queue, the method steps in the embodiment can include:

[0129] Step S501a: Obtain the total idle bandwidth of the memory corresponding to the access request for the memory.

[0130] Step S502a: When the total idle bandwidth of the memory is less than or equal to the preset bandwidth threshold, the regulated priority is restored to the first processing priority.

[0131] Step S503a: When the total idle bandwidth of the memory is greater than the preset bandwidth threshold, the regulated priority is controlled to remain unchanged.

[0132] The specific implementation process and implementation principle of each step in the embodiment are similar to those of each step in the above embodiment, and specific reference can be made to the above statements, which will not be repeated here.

[0133] Similar to the above embodiment, after obtaining the regulated priority corresponding to the first memory access queue, the method steps in this embodiment can include:

[0134] Step S501b: Obtain a preset latency threshold corresponding to the memory access latency.

[0135] In order to accurately implement the memory access operation, the preset latency threshold corresponding to the memory access latency can be obtained. In some instances, the preset latency threshold can be a value pre-configured and stored in a preset area, and thus the preset latency threshold corresponding to the memory access latency can be obtained by accessing the area. In other instances, the preset latency threshold can also be obtained through human-computer interaction operation. Those skilled in the art can select the obtaining method of the preset latency threshold according to the specific application scene or application requirement, as long as the accuracy and reliability of obtaining the preset latency threshold can be ensured, and details are not repeated here.

[0136] Step S502b: When the memory access latency is less than or equal to the preset latency threshold, restore the regulated priority to the first processing priority.

[0137] Step S503b: When the memory access latency is greater than the preset latency threshold, control the regulated priority to remain unchanged.

[0138] The specific implementation process and implementation principle of each step in this embodiment are similar to those of each step in the above embodiment, and specific reference can be made to the above statements, and details are not repeated here.

[0139] In this embodiment, by obtaining the total idle bandwidth of the memory corresponding to the access request for the memory, when the memory access latency is less than or equal to the preset latency threshold, and the total idle bandwidth of the memory is greater than the preset bandwidth threshold, the regulated priority of the offline access request can be restored to the first processing priority when the processing efficiency of the online access request is relatively high and the system resources are relatively sufficient. When the memory access latency is greater than the preset latency threshold, or the total idle bandwidth of the memory is less than or equal to the preset bandwidth threshold, the regulated priority can be controlled to remain unchanged when the processing efficiency of the online access request is relatively low or the system resources are insufficient. This effectively improves the stability and reliability of the memory access operation, and further improves the practicability of the method.

[0140] Figure 6 Another flowchart of a memory access method provided by the embodiment of the present application is shown. Based on any one of the above embodiments, reference is made to the accompanying drawings Figure 6As shown, in the process of regulating the first processing priority of the first memory access queue, in order to reduce the frequent regulation of the priority, before the first processing priority is lowered based on the second processing priority, the method in the embodiment can further include:

[0141] Step S601: Obtain the time interval between two regulation operations of the priority of the first memory access queue.

[0142] Step S602: When the time interval is less than or equal to the preset interval threshold, prohibit lowering the first processing priority based on the second processing priority.

[0143] Step S603: When the time interval is greater than the preset interval threshold, allow lowering the first processing priority based on the second processing priority.

[0144] For the first memory access queue, a preset interval threshold can be configured to limit the regulation frequency of the priority of the first memory access queue, and the preset interval threshold is used to identify the lower limit of the time of the regulation operation of the priority of the first memory access queue. For example, when the time interval is 60s, it means that the time interval between two regulation operations of the priority of the first memory access queue is at least 60s; when the time interval is 120s, it means that the time interval between two regulation operations of the priority of the first memory access queue is at least 120s, and so on. For the specific value of the time interval, those skilled in the art can flexibly configure and regulate the preset interval threshold according to the specific application scene or application requirement.

[0145] In order to stably regulate the priority of the first memory access queue, before lowering the first processing priority based on the second processing priority, the time interval between two regulation operations of the priority of the first memory access queue can be obtained. In some examples, the time interval can be obtained by detecting the timer. After obtaining the time interval, the time interval can be compared with the preset interval threshold. When the comparison result is that the time interval is less than or equal to the preset interval threshold, it means that the time interval between two regulation operations of the priority of the memory access queue is relatively short, and then the lowering of the first processing priority based on the second processing priority is prohibited. This can reduce the frequent regulation of the priority of the first memory access queue. When the comparison result is that the time interval is greater than the preset interval threshold, it means that the time interval between two regulation operations of the priority of the memory access queue is relatively long, and then the lowering of the first processing priority based on the second processing priority is allowed. This effectively ensures the stability and reliability of the regulation of the priority of the first memory access queue.

[0146] In this embodiment, the time interval between the two times of regulating the priority of the first memory access queue is obtained, when the time interval is less than or equal to the preset interval threshold, the first processing priority is prohibited to be lowered based on the second processing priority; when the time interval is greater than the preset interval threshold, the first processing priority is allowed to be lowered based on the second processing priority, so that the situation of frequent regulation of the priority of the first memory access queue is effectively prevented, and the stability and reliability of the memory access operation are further ensured.

[0147] In a specific application, the application embodiment provides a memory access method, and an execution subject of the memory access method can be a memory access device. The memory access device can be implemented as a controller deployed in a virtualization Hypervisor layer. The controller can be in communication connection with a console and a time delay detector. The controller or the time delay detector can be deployed in the hypervisor layer and can be in communication connection with the memory through a CPU mesh network to implement a memory access operation.

[0148] The method can obtain the memory access time delay of the online access request through the memory time delay detection technology. When it is found that the memory access time delay becomes large, the processing priority corresponding to the offline access request can be lowered. When the memory bandwidth resource is relatively sufficient, the priority of the offline access request after being lowered can be restored to a default value. In addition, in order to prevent the frequent regulation of the processing priority of the offline access request from affecting the memory access operation, a debounce mechanism can be used to limit the regulation effective interval between two times of priority regulation operation, for example, the regulation effective interval can be greater than a preset time threshold (for example, 60s, 120s, 180s, etc.). Through the above operation, the online access operation of the memory can have a lower memory access time delay, and the offline access operation of the memory can occupy a larger memory bandwidth resource.

[0149] Specifically, referring to FIG. 1, a virtual machine VM1 (or a first container docker) is used to obtain an online access request, and a virtual machine VM2 (or a second container docker) is used to obtain an offline access request. The method in this embodiment can include the following steps: Figures 7-9

[0150] Step 1: The controller obtains a memory access request for the memory through the VM1, and obtains a memory access request for the memory through the VM2.

[0151] The offline occupied bandwidth of the VM2 can be relatively large, and the online occupied bandwidth of the VM1 can be relatively small, for example, the offline occupied bandwidth of the VM2 can include a promised bandwidth of 10GB / s, a pre-empted bandwidth of 10GB / s, a limited bandwidth of 10GB / s, etc. ​

[0152] Step 2: Identify the application scenario corresponding to the memory access request.

[0153] Since online and offline application scenarios are different, and each scenario has a different memory access priority, the memory access latency in online and offline application scenarios is a significant factor affecting memory access operation performance. To accurately perform memory access operations, it is essential to first identify whether the memory access request originates from an online or offline application scenario. This can be done through the following methods:

[0154] (a) Identifying application scenarios through the tags corresponding to VMs

[0155] For VMs used to implement memory access operations, administrators can tag different VMs for different application scenarios according to preset scheduling and control policies. The tags can be strings composed of numbers, letters, symbols, etc., thereby obtaining a tag table corresponding to the VM. The tag table can include the VM's identity, tag, and mapping relationship with the application scenario. The application scenario can be an online application scenario or an offline application scenario. The processing priority of the online application scenario can be higher than that of the offline application scenario, or the processing priority of the online application scenario can be equal to that of the offline application scenario.

[0156] After receiving a memory access request, the identity of the VM corresponding to the request can be obtained. Then, a data query operation can be performed on the tag table based on the VM's identity. Once the tag table includes a standard identity matching the VM, the application scenario of the memory access request can be determined based on the tag corresponding to the standard identity. If the application scenario is an online application scenario, the memory access request can be determined as an online access request; if the application scenario is an offline application scenario, the memory access request can be determined as an offline access request. If the tag table does not include a standard identity matching the VM, it indicates that the VM may be a newly added VM. In this case, the memory access request corresponding to the VM is processed according to the system default method to determine the processing priority of the memory access request.

[0157] (b) Identify application scenarios by application process name and whitelist.

[0158] After obtaining a memory access request, the application process name corresponding to the memory access request can be obtained. Then, the application scenario can be identified by using a preset whitelist and the application process name. The preset whitelist includes the association between the application process name and online or offline application scenarios. Therefore, the application scenario of the memory access request can be determined by using the application process name and the whitelist.

[0159] (c) identifying an application scenario based on the behavior of the VM long-term bandwidth occupation

[0160] When the bandwidth resource occupied by the VM exceeds the upper limit of the preset preemption bandwidth and the time is greater than the preset time length, it can be determined that the application scenario is an offline application scenario; when the bandwidth resource occupied by the VM does not exceed the upper limit of the preset preemption bandwidth, or the time is less than or equal to the preset time length, it can be determined that the application scenario is an online application scenario.

[0161] It should be noted that when the application scenario corresponding to the memory access request is identified by the above-mentioned manner, the request type of the memory access request can be determined based on the type of the application scenario. Specifically, when the application scenario is an online application scenario, the memory access request can be determined as an online access request; when the application scenario is an offline application scenario, the memory access request can be determined as an offline access request.

[0162] Step 3: determining a first memory access queue corresponding to the offline access request and a second memory access queue corresponding to the online access request, wherein the first memory access queue corresponds to a first processing priority, and the second memory access queue corresponds to a second processing priority.

[0163] Taking 16 memory access queues pre-configured for implementing memory access operations as an example, taking memory access queue Que15 as the first memory access queue and taking memory access queue Que14 as the second memory access queue, the processing priority of the memory access queue Que15 is 15, and the processing priority of the memory access queue Que14 can also be 15. The above-mentioned priority is the highest priority, which can ensure the processing quality and efficiency of the online access request, and can implement the following for the offline access request: when the bandwidth resource is idle, the entire idle bandwidth resource can be preempted as much as possible.

[0164] Step 4: detecting the memory access delay corresponding to the online access request.

[0165] In order to ensure the stability and reliability of the memory operation, the console can install a delay detector for implementing the delay detection operation in the online scenario in the virtualization Hypervisor layer in the cloud server, and obtain the memory access delay of the online access request in real time or at a fixed time. When the memory access delay of the online access request is obtained at a fixed time, the detection interval can be 10 milliseconds, 20 milliseconds, 15 milliseconds or 30 milliseconds, etc.

[0166] Step 5: obtaining the offline total bandwidth of the VM2 corresponding to the offline access request.

[0167] Specifically, the bottom data collection module SPE can be used to collect data in the VM 2 corresponding to the offline access request to obtain the offline total bandwidth of the VM 2 corresponding to the offline access request. It should be noted that when the offline total bandwidth is greater than the preset committed bandwidth, in order to enable the system to know the current bandwidth resource occupation of the VM 2, a memory bandwidth alarm corresponding to the offline total bandwidth can be generated by the time delay detector, and the memory bandwidth alarm can be displayed or indicated.

[0168] Step 6: When the memory access time delay is greater than or equal to the preset time delay threshold, and the offline total bandwidth is greater than the preset committed bandwidth, the first processing priority is lowered based on the second processing priority to obtain the adjusted priority corresponding to the first memory access queue, and the adjusted priority is lower than the second processing priority. When the memory access time delay is less than the preset time delay threshold, or the offline total bandwidth is less than or equal to the preset committed bandwidth, the first processing priority remains unchanged.

[0169] Specifically, when the memory access time delay is greater than or equal to the preset time delay threshold, it means that the memory access time delay in the online application scenario is relatively large, for example, the memory access time delay can be greater than 200ns, 300ns or 400ns, etc. When the memory access time delay is greater than or equal to the preset time delay threshold, the memory time delay detector can send a memory time delay alarm to the controller to enable the user to quickly and timely understand the current processing state.

[0170] When the offline total bandwidth is greater than the preset committed bandwidth, it means that the bandwidth occupied by the VM 2 exceeds the committed bandwidth, that is, the bandwidth resource occupied by the VM 2 includes the preempted system idle resource. In order to ensure the quality and effect of the online access request, the priority of the offline access request can be lowered, that is, the first processing priority corresponding to the offline access request is lowered to obtain the adjusted priority corresponding to the first memory access queue, and the adjusted priority is lower than the second processing priority. Since the processing priority of the first memory access queue is lowered, the bandwidth resource occupied by the VM 2 will also be lowered, that is, the system idle resource cannot be preempted.

[0171] When the memory access latency is less than the preset latency threshold, it indicates that the memory access latency in the online scenario is relatively small; when the offline total bandwidth is less than or equal to the preset committed bandwidth, it indicates that the bandwidth resource corresponding to the VM2 does not exceed the committed bandwidth, that is, the bandwidth resource occupied in the VM2 does not include the preempted system idle resource, at this time, the first processing priority of the first memory access queue can be controlled without operation; or, the first processing priority corresponding to the offline access request can be lowered, for example, the first processing priority is lowered from 15 to 14 or 13, to obtain the controlled priority corresponding to the first memory access queue, the controlled priority is lower than the second processing priority, and because the processing priority of the first memory access queue is lowered, the effective use maximum bandwidth resource occupied by the VM2 is also lowered, that is, the system idle resource cannot be preempted.

[0172] Before the first processing priority is lowered based on the second processing priority, a detection operation of the anti-jitter mechanism can be performed. Specifically, in order to prevent other influences caused by frequent control of the priority of the first memory access queue, an effective time interval (for example, 60s) for limiting the control operation interval can be configured in advance, at this time, the time interval between the secondary control operations can be obtained, when the time interval is greater than or equal to the effective time interval, the first processing priority is lowered based on the second processing priority; when the time interval is less than the effective time interval, the first processing priority is not lowered based on the second processing priority, so that the control operation of the priority can be ensured to not cause window jitter and other influences on the memory access operation.

[0173] Step 7: Perform the memory access operation on the online access request and the offline access request based on the second processing priority and the controlled priority.

[0174] Step 8: Perform the recovery operation on the control operation of the first processing priority of the first memory access queue.

[0175] When the memory access latency in the online scenario decreases and the system bandwidth is relatively sufficient, the priority lowering operation in the offline scenario can be released, that is, the priority of the first memory access queue is restored to the default priority. In some examples, the above process can include: obtaining the total idle bandwidth of the memory corresponding to the access request of the memory; when the memory access latency is less than or equal to the preset latency threshold, and the total idle bandwidth of the memory is greater than the preset bandwidth threshold (for example, 100ns, 120ns, 140ns, etc.), the controlled priority is restored to the first processing priority; when the memory access latency is greater than the preset latency threshold, or the total idle bandwidth of the memory is less than or equal to the preset bandwidth threshold, the controlled priority is controlled to remain unchanged.

[0176] Or, the method can further comprise: obtaining a total memory occupancy bandwidth corresponding to the memory access request; when the memory access latency is less than or equal to a preset latency threshold, and the total free bandwidth is less than or equal to a preset bandwidth threshold (for example, 40% of the total bandwidth), the adjusted priority is restored to the first processing priority; when the memory access latency is greater than the preset latency threshold, or the total free bandwidth is less than or equal to the preset bandwidth threshold, the adjusted priority remains unchanged.

[0177] Step 9: Switching operation of the memory access queue.

[0178] When the memory access request comes from the container, the memory access request can be switched to the processor core CPUcore. When it is detected that the processor core is switched (for example, in the application scenario of secondary scheduling), the current process identifier corresponding to the memory access request can be determined, and then the memory access queue corresponding to the current process identifier is reinitialized to switch the queue corresponding to the memory access request. Specifically, the post-switching queue corresponding to the memory access request can be determined first, and the post-switching queue can be determined by the process identifier corresponding to the memory access request, so that the off-line container can be configured to the latest memory access queue, and the stability and reliability of the memory access operation are ensured.

[0179] The technical solution provided in this application embodiment can overcome the shortcomings of related technologies where increased offline load due to fixed allocation of memory bandwidth resources in offline scenarios leads to deterioration of overall machine memory latency, and memory access response in online scenarios is still not guaranteed. This method can achieve low latency in online scenarios, resulting in even lower latency for online memory access operations, while ensuring greater utilization of memory bandwidth resources in offline scenarios. Specifically, a latency detector can be used to detect memory access latency in online scenarios. When memory access latency increases, for example, exceeding 200ns, the processing priority of the memory access queue in offline scenarios can be downgraded, which can effectively guarantee low latency for memory access in online scenarios. In addition, after downgrading the processing priority, the system's operating status can be adjusted accordingly. To address the issue of priority downgrading, a reversal operation is performed. Specifically, when the total memory bandwidth usage of the system is less than a preset threshold (e.g., 40%), it indicates that the system has high idle resource bandwidth. In this case, to reduce the performance degradation of memory access requests in offline scenarios, the priority downgrading operation can be reversed, restoring the processing priority of the memory access queue in offline scenarios to the default priority. This improves the performance of offline memory access. Furthermore, when adjusting the processing priority of the memory access queue in offline scenarios, an anti-jitter mechanism is configured, controlling the time interval between two priority adjustment operations, for example, a time interval greater than 60 seconds. This reduces high-frequency priority adjustments, improves system stability, and further enhances the practicality of the solution.

[0180] Figure 10 This is a schematic diagram of a memory access device provided in an embodiment of this application; see attached diagram. Figure 10 As shown, this embodiment provides a memory access device for performing the above-described... Figure 2 The memory access method shown herein, specifically, the memory access device may include:

[0181] The first acquisition module 11 is used to acquire online access requests and offline access requests for memory, and the online access requests and offline access requests share the bandwidth resources for accessing memory;

[0182] The first determining module 12 is used to determine the first memory access queue corresponding to the offline access request, the second memory access queue corresponding to the online access request, and the memory access latency, wherein the first memory access queue corresponds to the first processing priority and the second memory access queue corresponds to the second processing priority.

[0183] The first processing module 13 is configured to regulate the first processing priority based on the memory access latency and the second processing priority, and obtain a regulated priority corresponding to the first memory access queue.

[0184] The first processing module 13 is further configured to access the memory based on the regulated priority and the second processing priority.

[0185] In some examples, when the first obtaining module 11 obtains the online access request and the offline access request for the memory, the first obtaining module 11 is configured to perform: obtaining the online access request by a first virtual machine in communication connection with the memory, and obtaining the offline access request by a second virtual machine in communication connection with the memory; or obtaining the online access request by a first container in communication connection with the memory, and obtaining the offline access request by a second container in communication connection with the memory, the first container and the second container being from the same virtual machine or different virtual machines.

[0186] In some examples, the first obtaining module 11, the first determining module 12 and the first processing module 13 in the embodiment are configured to perform the following steps:

[0187] The first obtaining module 11 is configured to obtain a processor core corresponding to the first container or the second container.

[0188] The first determining module 12 is configured to determine a first post-switch queue corresponding to the first container or a second post-switch queue corresponding to the second container when the processor core switches.

[0189] The first processing module 13 is configured to take the first post-switch queue as a new first memory access queue, or take the second post-switch queue as a new second memory access queue.

[0190] In some examples, before obtaining the online access request and the offline access request for the memory, the first obtaining module 11 is further configured to perform: obtaining a data access request for the memory; determining a request tag corresponding to the data access request, the request tag including any one of the following: a virtual machine tag, a container tag; and determining, based on the request tag, whether the data access request is an online access request or an offline access request.

[0191] In some examples, before obtaining the online access request and the offline access request for the memory, the first obtaining module 11 is further configured to perform: obtaining a data access request for the memory; determining an application process identifier corresponding to the data access request; and determining, based on the application process identifier, whether the data access request is an online access request or an offline access request.

[0192] In some examples, before obtaining the online access request and the offline access request for the memory, the first obtaining module 11 is further configured to perform: obtaining a data access request for the memory; determining a virtual machine or a container corresponding to the data access request; obtaining an actual occupied bandwidth and a bandwidth occupation duration corresponding to the virtual machine or the container; and determining, based on the actual occupied bandwidth and the bandwidth occupation duration, whether the data access request is an online access request or an offline access request.

[0193] In some examples, when the first obtaining module 11 determines, based on the actual occupied bandwidth and the bandwidth occupation duration, whether the data access request is an online access request or an offline access request, the first obtaining module 11 is configured to perform: obtaining a preset preemption bandwidth corresponding to the virtual machine or the container; when the actual occupied bandwidth is greater than the preset preemption bandwidth, counting a bandwidth occupation duration in which the actual occupied bandwidth is greater than the preset preemption bandwidth; when the bandwidth occupation duration is greater than a preset duration threshold, determining that the data access request is an offline access request; and when the occupied bandwidth is less than or equal to the preset preemption bandwidth or the bandwidth occupation duration is less than or equal to the preset duration threshold, determining that the data access request is an online access request.

[0194] In some examples, when the first processing module 13 adjusts the first processing priority based on the memory access latency and the second processing priority to obtain the adjusted priority corresponding to the first memory access queue, the first processing module 13 is configured to perform: when the memory access latency is greater than or equal to a preset latency threshold, lowering the first processing priority based on the second processing priority to obtain the adjusted priority corresponding to the first memory access queue, the adjusted priority being lower than the second processing priority; and when the memory access latency is less than the preset latency threshold, keeping the first processing priority unchanged.

[0195] In some examples, when the first processing module 13 adjusts the first processing priority based on the memory access latency and the second processing priority to obtain the adjusted priority corresponding to the first memory access queue, the first processing module 13 is configured to perform: obtaining an offline total occupied bandwidth of a second virtual machine or a second container corresponding to the offline access request; and adjusting the first processing priority based on the memory access latency, the second processing priority, and the offline total occupied bandwidth to obtain the adjusted priority corresponding to the first memory access queue.

[0196] In some examples, when the first processing module 13 regulates the first processing priority based on the memory access latency, the second processing priority, and the off-line total occupied bandwidth, to obtain the regulated priority corresponding to the first memory access queue, the first processing module 13 is configured to: when the memory access latency is greater than or equal to a preset latency threshold, and the off-line total occupied bandwidth is greater than a preset committed bandwidth, lower the first processing priority based on the second processing priority, to obtain the regulated priority corresponding to the first memory access queue, the regulated priority being lower than the second processing priority; and when the memory access latency is less than the preset latency threshold, or the off-line total occupied bandwidth is less than or equal to the preset committed bandwidth, keep the first processing priority unchanged.

[0197] In some examples, after obtaining the regulated priority corresponding to the first memory access queue, the first obtaining module 11 and the first processing module 13 in the embodiment are configured to perform the following steps:

[0198] The first obtaining module 11 is configured to obtain a total idle bandwidth of the memory corresponding to the access request.

[0199] The first processing module 13 is configured to: when the memory access latency is less than or equal to a preset latency threshold, and the total idle bandwidth of the memory is greater than a preset bandwidth threshold, restore the regulated priority to the first processing priority; and when the memory access latency is greater than the preset latency threshold, or the total idle bandwidth of the memory is less than or equal to the preset bandwidth threshold, keep the regulated priority unchanged.

[0200] In some examples, before lowering the first processing priority based on the second processing priority, the first obtaining module 11 and the first processing module 13 in the embodiment are configured to perform the following steps:

[0201] The first obtaining module 11 is configured to obtain a time interval between two regulation operations on the priority of the first memory access queue.

[0202] The first processing module 13 is configured to: when the time interval is less than or equal to a preset interval threshold, prohibit lowering the first processing priority based on the second processing priority; and when the time interval is greater than the preset interval threshold, allow lowering the first processing priority based on the second processing priority.

[0203] In some examples, after obtaining the regulated priority corresponding to the first memory access queue, the first obtaining module 11 and the first processing module 13 in the embodiment are configured to perform the following steps:

[0204] The first obtaining module 11 is configured to obtain a total idle bandwidth of the memory corresponding to the access request.

[0205] The first processing module 13 is configured to restore the adjusted priority to the first processing priority when the total free bandwidth of the memory is less than or equal to the preset bandwidth threshold; and keep the adjusted priority unchanged when the total free bandwidth of the memory is greater than the preset bandwidth threshold.

[0206] Figure 10 The memory access device can perform Figures 2-9 The method of the embodiment shown, the part not described in detail in the embodiment, can refer to the related description of the Figures 2-9 The embodiment shown. The execution process and technical effects of the technical solution are described in the embodiment shown, which will not be described here. Figures 2-9

[0207] In one possible design, Figure 10 The structure of the memory access device shown can be implemented as an electronic device. Referring to the accompanying Figure 11 The memory access device in the embodiment can be implemented as an electronic device, and specifically, the electronic device can include a first processor 21 and a first memory 22. The first memory 22 is configured to store programs for the electronic device to perform the above-mentioned Figure 2 The memory access method provided in the embodiment shown, the first processor 21 is configured to execute the programs stored in the first memory 22.

[0208] The program includes one or more computer instructions, and when the one or more computer instructions are executed by the first processor 21, the following steps can be implemented: obtaining online access requests and offline access requests for the memory, the online access requests and the offline access requests sharing bandwidth resources for accessing the memory; determining a first memory access queue corresponding to the offline access requests, and a second memory access queue corresponding to the online access requests and a memory access delay, wherein the first memory access queue corresponds to a first processing priority, and the second memory access queue corresponds to a second processing priority; adjusting the first processing priority based on the memory access delay and the second processing priority to obtain an adjusted priority corresponding to the first memory access queue; and accessing the memory based on the adjusted priority and the second processing priority.

[0209] Further, the first processor 21 is further configured to perform all or part of the steps in the foregoing Figure 2 The embodiment shown. The structure of the electronic device can further include a first communication interface 23 for communication between the electronic device and other devices or communication networks.

[0210] In addition, the embodiment of the application provides a computer storage medium for storing computer software instructions for an electronic device, which includes a program for performing the memory access method involved in the above-mentioned Figure 2 The method embodiment shown.​

[0211] Further, the embodiment of the present application provides a computer program product, comprising: a computer program, when the computer program is executed by a processor of an electronic device, causing the processor to execute Figure 2 The memory access method in the method embodiment is shown.

[0212] It should be noted that the user information (including but not limited to user equipment information, user personal information, etc.) and data (including but not limited to data for analysis, stored data, displayed data, etc.) involved in the present application are all information and data authorized by the user or authorized by all parties, and the collection, use and processing of related data need to comply with relevant laws, regulations and standards of countries and regions, and provide corresponding operation portal for user to choose authorization or refusal.

[0213] The device embodiments described above are only schematic, wherein the units shown as separate components can or can not be physically separate, and the components shown as units can or can not be physical units, i.e., can be located in one place, or can be distributed on multiple network units. Part or all of the modules can be selected to achieve the purpose of the present embodiment scheme according to actual needs. Those skilled in the art can understand and implement without creative labor.

[0214] Through the description of the above embodiments, those skilled in the art can clearly understand that each embodiment can be realized by means of a general hardware platform as necessary, and of course can also be realized by means of combination of hardware and software. Based on such understanding, the above technical solutions can be embodied in the form of computer products, and the present application can adopt the form of computer program product implemented on one or more computer usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) containing computer usable program code.

[0215] The present application is described with reference to flowcharts and / or block diagrams according to the method, device (system) and computer program product of the present application. It should be understood that each flow and / or block in the flowchart and / or block diagram, and the combination of flows and / or blocks in the flowchart and / or block diagram can be realized by computer program instructions. These computer program instructions can be provided to the processor of a general-purpose computer, a special-purpose computer, an embedded processor or other programmable device to produce a machine, so that the instructions executed by the processor of the computer or other programmable device produce a machine that implements the functions specified in the flowchart and / or block diagram. Figure 1 The function of one flow or multiple flows and / or blocks Figure 1 The device of the function specified in one block or multiple blocks.

[0216] These computer program instructions can also be stored in a computer- readable memory that can direct a computer or other programmable apparatus to function in a particular manner, such that the instructions stored in the computer-readable memory produce an article of manufacture including instructions which implement the Figure 1 function specified in the flow or flows and / or blocks Figure 1 These computer program instructions can also be loaded onto a computer or other programmable apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer-implemented process such that the instructions which execute on the computer or other programmable apparatus provide steps for implementing the Figure 1 function specified in the flow or flows and / or blocks Figure 1 function specified in the flow or flows and / or blocks

[0217] In a typical configuration, a computing device includes one or more processors (CPUs), input / output interfaces, network interfaces, and memory. The memory can include non-persistent memory, random access memory (RAM), and / or non-volatile memory, such as read only memory (ROM) or flash memory, in a computer readable medium. The memory is an example of computer readable media.

[0218] Computer readable media includes permanent and non-permanent, removable and non-removable media implemented in any method or technology for data storage. Data can be computer readable instructions, data structures, program modules or other data. Examples of computer storage media include, but are not limited to, phase change memory (PRAM), static random access memory (SRAM), dynamic random access memory (DRAM), other types of random access memory (RAM), read only memory (ROM), electrically erasable programmable read only memory (EEPROM), flash memory or other memory technology, compact disc read only memory (CD-ROM), digital versatile disc (DVD), or other optical storage, magnetic cassettes, magnetic tapes, magnetic disk storage or other magnetic storage devices, or any other non-transmission medium that can be used to store data accessible by a computing device. According to the definition herein, computer readable media does not include transitory media, such as modulated data signals and carrier waves.

[0219] Finally, it should be noted that: the above embodiments are only used to illustrate the technical solutions of the present application, but not to limit them; although the present application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that: it can still modify the technical solutions recorded in the foregoing embodiments, or make equivalent replacement for part or all of the technical features; and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the scope of the technical solutions of the embodiments of the present application.

Claims

1. A memory access method, characterized in that, include: Obtain online and offline access requests for a preset memory, wherein the online and offline access requests share the bandwidth resources for accessing the memory; The first memory access queue corresponding to the offline access request, and the second memory access queue and memory access latency corresponding to the online access request are determined, wherein the first memory access queue corresponds to a first processing priority and the second memory access queue corresponds to a second processing priority; The first processing priority is adjusted based on the memory access latency and the second processing priority to obtain the adjusted priority corresponding to the first memory access queue. The memory is accessed based on the adjusted priority and the second processing priority.

2. The method according to claim 1, characterized in that, Obtain online and offline access requests for memory, including: Online access requests are obtained through a first virtual machine connected to the memory, and offline access requests are obtained through a second virtual machine connected to the memory; or... Online access requests are obtained through a first container connected to the memory, and offline access requests are obtained through a second container connected to the memory. The first container and the second container come from the same virtual machine or different virtual machines.

3. The method according to claim 2, characterized in that, The method further includes: Obtain the processor kernel corresponding to the first container or the second container; When the processor core is switched, a first post-switch queue corresponding to the first container or a second post-switch queue corresponding to the second container is determined; The first switched queue is used as the new first memory access queue, or the second switched queue is used as the new second memory access queue.

4. The method according to claim 1, characterized in that, Before obtaining online and offline access requests for memory, the following is included: Obtain data access requests for memory; Determine the virtual machine or container corresponding to the data access request; Obtain the actual bandwidth used and bandwidth usage duration corresponding to the virtual machine or container; Based on the actual bandwidth used and the duration of bandwidth usage, the data access request is determined to be either an online access request or an offline access request.

5. The method according to claim 4, characterized in that, Based on the actual bandwidth usage and bandwidth usage duration, determining whether the data access request is an online or offline access request includes: Obtain the preset preempted bandwidth corresponding to the virtual machine or container; When the actual occupied bandwidth is greater than the preset preemption bandwidth, the duration of bandwidth occupation when the actual occupied bandwidth is greater than the preset preemption bandwidth is recorded. When the bandwidth usage time exceeds a preset time threshold, the data access request is determined to be an offline access request; When the actual bandwidth occupied is less than or equal to the preset preempted bandwidth, or the bandwidth occupation time is less than or equal to the preset time threshold, the data access request is determined to be the online access request.

6. The method according to claim 1, characterized in that, The first processing priority is adjusted based on the memory access latency and the second processing priority to obtain an adjusted priority corresponding to the first memory access queue, including: When the memory access latency is greater than or equal to the preset latency threshold, the first processing priority is lowered based on the second processing priority to obtain a regulated priority corresponding to the first memory access queue, wherein the regulated priority is lower than the second processing priority. When the memory access latency is less than the preset latency threshold, the first processing priority is kept unchanged.

7. The method according to claim 1, characterized in that, The first processing priority is adjusted based on the memory access latency and the second processing priority to obtain an adjusted priority corresponding to the first memory access queue, including: Obtain the total offline bandwidth occupied by the second virtual machine or second container corresponding to the offline access request; The first processing priority is adjusted based on the memory access latency, the second processing priority, and the total offline bandwidth to obtain the adjusted priority corresponding to the first memory access queue.

8. The method according to claim 7, characterized in that, The first processing priority is adjusted based on the memory access latency, the second processing priority, and the total offline bandwidth to obtain an adjusted priority corresponding to the first memory access queue, including: When the memory access latency is greater than or equal to the preset latency threshold and the total offline bandwidth is greater than the preset committed bandwidth, the first processing priority is lowered based on the second processing priority to obtain a regulated priority corresponding to the first memory access queue, wherein the regulated priority is lower than the second processing priority. When the memory access latency is less than the preset latency threshold, or when the total offline bandwidth is less than or equal to the preset committed bandwidth, the first processing priority is kept unchanged.

9. The method according to claim 6 or 8, characterized in that, Before lowering the first processing priority based on the second processing priority, the method further includes: Obtain the time interval between two priority adjustment operations on the first memory access queue; When the time interval is less than or equal to a preset time interval threshold, it is prohibited to lower the first processing priority based on the second processing priority; When the time interval is greater than a preset interval threshold, the first processing priority can be lowered based on the second processing priority.

10. The method according to any one of claims 1-8, characterized in that, After obtaining the adjusted priority corresponding to the first memory access queue, the method further includes: Get the total free bandwidth of memory corresponding to the memory access requests; When the total free memory bandwidth is less than or equal to a preset bandwidth threshold, the adjusted priority is restored to the first processing priority; When the total free bandwidth of memory is greater than a preset bandwidth threshold, the priority after the adjustment remains unchanged.

11. The method according to any one of claims 1-8, characterized in that, After obtaining the adjusted priority corresponding to the first memory access queue, the method further includes: Get the total free bandwidth of memory corresponding to the memory access requests; When the memory access latency is less than a preset latency threshold and the total memory free bandwidth is greater than a preset bandwidth threshold, the adjusted priority is restored to the first processing priority. When the memory access latency is greater than or equal to a preset latency threshold, or when the total memory free bandwidth is less than or equal to a preset bandwidth threshold, the priority after the adjustment remains unchanged.

12. A memory access device, characterized in that, include: The first acquisition module is used to acquire online access requests and offline access requests for memory, wherein the online access requests and the offline access requests share the bandwidth resources for accessing the memory; The first determining module is used to determine the first memory access queue corresponding to the offline access request, and the second memory access queue and memory access latency corresponding to the online access request, wherein the first memory access queue corresponds to a first processing priority and the second memory access queue corresponds to a second processing priority; The first processing module is used to adjust the first processing priority based on the memory access latency and the second processing priority to obtain the adjusted priority corresponding to the first memory access queue. The first processing module is also used to access the memory based on the adjusted priority and the second processing priority.

13. An electronic device, characterized in that, include: A memory and a processor; wherein the memory is used to store one or more computer instructions, wherein the one or more computer instructions, when executed by the processor, implement the method as described in any one of claims 1-11.

14. A computer program product, characterized in that, include: A computer program, when executed by a processor of an electronic device, causes the processor to perform the steps of the method of any one of claims 1-11.

15. A computer storage medium, characterized in that, The computer storage medium is used to store a computer program that, when executed by a computer, enables the method described in any one of claims 1-11.

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